2026-05-06 01:31:10.185 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.248.20:5700'
2026-05-06 01:31:10.185 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.248.20:5802)
2026-05-06 01:31:10.185 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.248.20:5801)
2026-05-06 01:31:10.185 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.248.22:6700'
2026-05-06 01:31:10.185 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.248.22:6802)
2026-05-06 01:31:10.185 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.248.22:6801)
2026-05-06 01:31:10.185 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.248.20:5700/1'
2026-05-06 01:31:10.185 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.248.20:5804)
2026-05-06 01:31:10.185 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.248.20:5803)
2026-05-06 01:31:10.185 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.248.20:5700/2'
2026-05-06 01:31:10.185 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.248.20:5806)
2026-05-06 01:31:10.185 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.248.20:5805)
2026-05-06 01:31:10.185 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.248.20:5700/3'
2026-05-06 01:31:10.185 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.248.20:5808)
2026-05-06 01:31:10.185 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.248.20:5807)
2026-05-06 01:31:10.185 [INFO] fake_trx.py:429 Init complete
2026-05-06 01:31:10.185 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-06 01:31:10.787 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:10.787 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:10.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:10.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:10.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:10.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:14.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:14.778 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:14.779 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:14.779 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:14.779 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 0 -> 1
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:14.780 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:14.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 0 -> 1
2026-05-06 01:31:14.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:14.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:14.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 0 -> 1
2026-05-06 01:31:14.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:14.782 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:14.782 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 0 -> 1
2026-05-06 01:31:14.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:14.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:31:14.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:31:14.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:31:14.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:31:14.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:31:14.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:31:14.784 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:31:14.784 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:31:14.784 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:14.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:14.788 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:31:15.252 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:31:15.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:15.297 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:31:15.298 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:31:15.298 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:31:15.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:15.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:15.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:15.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:15.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:15.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:15.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:15.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:15.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:15.521 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:15.521 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:15.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:15.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:15.716 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:31:15.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:15.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:15.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:15.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:15.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:15.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:15.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:15.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:15.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:15.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:15.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:15.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:15.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:15.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:15.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:15.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:15.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:16.010 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:16.010 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:16.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.181 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:31:16.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:16.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:16.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:16.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:16.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:16.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:16.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:16.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:16.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:16.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:16.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:16.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:16.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:16.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:16.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:16.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:16.620 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:16.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:16.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:16.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:16.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:16.622 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:16.622 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:16.644 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:31:16.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:16.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:16.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:16.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:16.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:16.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:16.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:16.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:17.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:17.096 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:17.096 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:17.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:17.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:17.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:17.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.102 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:17.102 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:17.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:17.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:17.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:31:17.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:17.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:17.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:17.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.573 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:31:17.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:17.612 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:17.612 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:17.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:17.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:17.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:17.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:17.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:17.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:17.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:17.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:17.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:17.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:17.787 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:17.787 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:17.838 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:17.838 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:17.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:17.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:18.037 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:31:18.503 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:31:18.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:18.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:18.623 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:18.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:18.628 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:18.628 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:18.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:18.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:18.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:18.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:18.629 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:18.629 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:18.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:18.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:18.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:18.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:18.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:18.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:18.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:18.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:18.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:18.969 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:31:19.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:19.163 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:19.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:19.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:19.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:19.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:19.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:19.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:19.179 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:19.179 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:19.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:19.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:19.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:19.267 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:19.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.437 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:31:19.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:19.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:19.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:19.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:19.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:19.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:19.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:19.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:19.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:19.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:19.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:19.901 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:31:19.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:19.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:19.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:19.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:20.363 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:31:20.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:20.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:20.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:20.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:20.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:20.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:20.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:20.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:20.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:20.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:20.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:20.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:20.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:20.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:20.827 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:31:20.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:20.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:20.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:20.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:21.291 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:31:21.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:21.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:21.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:21.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:21.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:21.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:21.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:21.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:21.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:21.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:21.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:21.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:21.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:21.755 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:31:21.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:21.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:21.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:21.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:22.217 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:31:22.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:22.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:22.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:22.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:22.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:22.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:22.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:22.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:22.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:22.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:22.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:22.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:22.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:22.683 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:31:22.712 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:22.712 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:22.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:22.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.146 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:31:23.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:23.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:23.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:23.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:23.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:23.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:23.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:23.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:23.545 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:23.545 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:23.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:23.615 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:31:23.644 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:23.644 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:23.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:23.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:23.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:23.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:23.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:23.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:23.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:23.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:23.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:23.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:23.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:23.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:23.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:23.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:23.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.078 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:31:24.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:24.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:24.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:24.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:24.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:24.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:24.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.257 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:24.257 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:24.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:24.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:24.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:24.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:24.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:24.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.540 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:31:24.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:24.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:24.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:24.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:24.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:24.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:24.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:24.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:24.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:24.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:24.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:24.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:24.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:24.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:24.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.004 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:31:25.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:25.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:25.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:25.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:25.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:25.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:25.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:25.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:25.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:25.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:25.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:25.296 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:25.296 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:25.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:25.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:25.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:25.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:25.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:25.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:25.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.396 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:25.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:25.396 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:25.396 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:25.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:25.467 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:31:25.499 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:25.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:25.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:25.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:25.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:25.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:25.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:25.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:25.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:25.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:25.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:25.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:25.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:25.929 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:31:25.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:25.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:25.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:25.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:26.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:26.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:26.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:26.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:26.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:26.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:26.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:26.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:26.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:26.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:26.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:26.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:26.395 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:31:26.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:26.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:26.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:26.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:26.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:26.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:26.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:26.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:26.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:26.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:26.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:26.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:26.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:26.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:26.851 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:26.851 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:26.851 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:26.851 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:31:26.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:26.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:26.851 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2651 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:31.857 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:31.857 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:31.857 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:31.857 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:31.857 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:31.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:31.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:31.869 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:31.869 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:31.870 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:31.870 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:31:31.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:31:31.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:31:31.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:31.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:31.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:31.874 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:31:31.874 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:31.874 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:31:31.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:31.876 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:31:31.876 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:31:31.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:31.876 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:31.876 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:31.876 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:31:31.876 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:31.876 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:31:31.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:31.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:31:31.879 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:31:31.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:31.879 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:31.879 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:31.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:31:31.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:31.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:31:31.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:31.881 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:31:31.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:31:31.881 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:31:31.881 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:31:31.881 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:31:31.881 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:31:31.882 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:31:31.882 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:31:31.882 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:31.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:31.887 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:31:32.366 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:31:32.406 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:31:32.408 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:31:32.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.410 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:31:32.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:32.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:32.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:32.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 01:31:32.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.832 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:31:32.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:32.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:32.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:32.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:32.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:32.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 01:31:33.296 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-05-06 01:31:33.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.761 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:31:33.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.766 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:33.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:33.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:33.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:33.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:33.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:33.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:33.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:33.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:33.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:33.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:33.841 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:31:33.841 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=427 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:33.841 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=427 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:38.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:38.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:38.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:38.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:38.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:38.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:38.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:38.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:38.854 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:38.854 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:38.854 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:31:38.858 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:31:38.858 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:31:38.858 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:38.859 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:38.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:38.859 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:31:38.859 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:38.860 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:31:38.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:38.861 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:31:38.861 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:31:38.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:38.861 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:38.861 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:38.861 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:31:38.861 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:38.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:31:38.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:38.863 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:31:38.864 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:31:38.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:38.864 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:38.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:38.864 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:31:38.864 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:38.864 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:31:38.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:38.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:31:38.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:31:38.867 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:31:38.867 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:31:38.867 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:38.872 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:31:39.351 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:31:39.389 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:31:39.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:39.392 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:31:39.394 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:31:39.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:39.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:39.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:39.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:39.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:39.456 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:39.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:39.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:39.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:39.461 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:39.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:39.461 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:39.462 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:39.462 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:39.462 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:39.462 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:31:39.462 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:39.462 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:39.462 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:39.462 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:39.462 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:39.463 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:39.463 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:44.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:44.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:44.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:44.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:44.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:44.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:44.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:44.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:44.468 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:44.468 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:44.468 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:31:44.469 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:31:44.469 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:31:44.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:44.469 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:44.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:44.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:31:44.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:44.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:44.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:44.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:31:44.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:44.471 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:31:44.471 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:31:44.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:44.471 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:44.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:44.472 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:31:44.472 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:44.472 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:31:44.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:44.473 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:31:44.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:31:44.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:31:44.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:31:44.473 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:31:44.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:31:44.474 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:31:44.474 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:31:44.474 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.474 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:44.478 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:31:44.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:31:44.995 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:31:44.997 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:31:44.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:45.000 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:31:45.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:45.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:45.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:45.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:45.056 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:45.056 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:45.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:45.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:45.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:45.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:45.057 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:31:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:45.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:50.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:50.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:50.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:50.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:50.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:50.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:50.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:50.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:50.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:50.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:50.072 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:31:50.074 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:31:50.074 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:31:50.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:50.075 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:50.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:50.075 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:31:50.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:50.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:31:50.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:50.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:50.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:31:50.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:50.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:50.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:31:50.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:31:50.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:31:50.082 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:31:50.082 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:50.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:50.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:31:50.564 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:31:50.609 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:31:50.611 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:31:50.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:50.614 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:31:50.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:50.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:50.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:50.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:50.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:50.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:50.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:50.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:50.741 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:50.741 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:50.741 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:50.741 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:31:50.741 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:50.741 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:50.741 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:50.741 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:50.741 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:31:55.748 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:31:55.748 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:31:55.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:55.748 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:55.748 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:55.748 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:55.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:31:55.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:55.757 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:55.757 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:31:55.757 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:31:55.759 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:31:55.759 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:31:55.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:55.760 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:55.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:31:55.760 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:31:55.761 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:31:55.761 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:31:55.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:55.762 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:31:55.762 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:31:55.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:55.762 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:55.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:31:55.762 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:31:55.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:31:55.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:31:55.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:55.764 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:31:55.764 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:31:55.764 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:55.764 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:31:55.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:31:55.765 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:31:55.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:31:55.765 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:31:55.765 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:31:55.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:31:55.770 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:31:55.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:31:55.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:31:55.775 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:31:56.254 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:31:56.302 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:31:56.306 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:31:56.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:56.309 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:31:56.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:31:56.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:31:56.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:31:56.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:56.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:56.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:56.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:31:56.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:31:56.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:56.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:31:56.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:31:56.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:56.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:31:56.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:31:56.726 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:31:56.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:56.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:56.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:56.774 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:57.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:31:57.672 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:31:57.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:57.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:57.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:57.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:58.144 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:31:58.615 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:31:58.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:58.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:58.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:58.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:31:59.088 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:31:59.561 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:31:59.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:31:59.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:31:59.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:31:59.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:32:00.033 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:32:00.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:00.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:00.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:00.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:00.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:00.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:00.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:00.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:00.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:00.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:00.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:00.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:00.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:00.504 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:32:00.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:00.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:00.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:00.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:00.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:00.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:32:00.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:32:00.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:32:00.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:32:00.974 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:32:01.448 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:32:01.920 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:32:02.392 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:32:02.863 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:32:03.336 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:32:03.809 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:32:04.281 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:32:04.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:04.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:04.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:04.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:04.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:04.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:04.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:04.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:04.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:04.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:04.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:04.736 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:04.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:04.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:04.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:04.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:04.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:04.754 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:32:05.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:05.227 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:32:05.699 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:32:06.170 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:32:06.641 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:32:07.114 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:32:07.587 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:32:08.059 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:32:08.530 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:32:09.003 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:32:09.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:09.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:09.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:09.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:09.200 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:09.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:09.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:09.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:09.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:09.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:09.202 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:09.202 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:09.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:09.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:09.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:09.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:09.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:09.475 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:32:09.948 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:32:10.419 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:32:10.892 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:32:11.364 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:32:11.836 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:32:12.307 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:32:12.781 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:32:13.253 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:32:13.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:13.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:13.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:13.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:13.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:13.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:13.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:13.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:13.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:13.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:13.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:13.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:13.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:13.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:13.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:13.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:13.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:13.724 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:32:14.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:14.196 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:32:14.668 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:32:15.139 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:32:15.613 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:32:16.086 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:32:16.558 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:32:17.029 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:32:17.502 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:32:17.975 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:32:18.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:18.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:18.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:18.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:18.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:18.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:18.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:18.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:18.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:18.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:18.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:18.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:18.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:18.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:18.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:18.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:18.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:18.447 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:32:18.918 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:32:18.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:19.392 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:32:19.865 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:32:20.335 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:32:20.809 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:32:21.282 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:32:21.753 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:32:22.223 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:32:22.697 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:32:22.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:22.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:22.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:22.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:22.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:22.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:22.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:22.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:22.958 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:22.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:22.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:22.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:22.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:22.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:22.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:22.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:22.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:23.170 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:32:23.644 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:32:23.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:24.116 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:32:24.589 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:32:25.062 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:32:25.534 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:32:26.007 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:32:26.480 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:32:26.953 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:32:27.425 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:32:27.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:27.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:27.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:27.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:27.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:27.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:27.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:27.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:27.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:27.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:27.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:27.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:27.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:32:27.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:27.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:27.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:27.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:27.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:32:28.371 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:32:28.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:28.843 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:32:29.314 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:32:29.785 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:32:30.256 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 01:32:30.729 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 01:32:31.202 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 01:32:31.674 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 01:32:32.148 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 01:32:32.620 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 01:32:32.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:32.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:32.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:32.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:32.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:32.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:32.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:32.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:32.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:32.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:32.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:32.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:32.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:32.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:32.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:32.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:32.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 01:32:33.563 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 01:32:33.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:34.037 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 01:32:34.509 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 01:32:34.980 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 01:32:35.454 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 01:32:35.926 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 01:32:36.398 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 01:32:36.869 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 01:32:37.340 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 01:32:37.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:37.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:37.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:37.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:37.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:37.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:37.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:37.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:37.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:37.593 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:37.593 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:37.593 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:37.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:32:37.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:37.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:37.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:37.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:37.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:37.811 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 01:32:38.284 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 01:32:38.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:38.757 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 01:32:39.229 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 01:32:39.700 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 01:32:40.174 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 01:32:40.646 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 01:32:41.118 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 01:32:41.591 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 01:32:42.064 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 01:32:42.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:42.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:42.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:42.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:42.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:42.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:42.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:42.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:42.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:42.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:42.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:42.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:42.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:42.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:42.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:42.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:42.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:42.536 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 01:32:43.007 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 01:32:43.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:43.481 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 01:32:43.953 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 01:32:44.424 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 01:32:44.898 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 01:32:45.370 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 01:32:45.842 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 01:32:46.316 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 01:32:46.789 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 01:32:47.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:47.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:47.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:47.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:47.155 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:47.155 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:47.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:47.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:47.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:47.156 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:47.156 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:47.156 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:47.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:47.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:47.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:47.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:47.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:47.260 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 01:32:47.732 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 01:32:48.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:48.206 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 01:32:48.678 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 01:32:49.149 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 01:32:49.620 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 01:32:50.091 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 01:32:50.561 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 01:32:51.035 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 01:32:51.507 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 01:32:51.980 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 01:32:52.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:52.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:52.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:52.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:52.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:52.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:52.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:52.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:52.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:52.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:52.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:52.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:52.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:52.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:52.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:52.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:52.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:52.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:52.450 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 01:32:52.924 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 01:32:53.396 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 01:32:53.868 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 01:32:54.339 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 01:32:54.812 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 01:32:55.284 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 01:32:55.757 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 01:32:56.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:56.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:56.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:56.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:56.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:32:56.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:32:56.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:32:56.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:56.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:56.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:56.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:32:56.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:32:56.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:56.183 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:32:56.183 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:32:56.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:56.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:32:56.227 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 01:32:56.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:32:56.698 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 01:32:57.171 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 01:32:57.644 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 01:32:58.115 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 01:32:58.588 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 01:32:59.061 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 01:32:59.533 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 01:33:00.004 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 01:33:00.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:00.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:00.405 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:00.405 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:00.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:00.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:00.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:00.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:00.426 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:00.426 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:00.426 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:00.426 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:00.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:00.477 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 01:33:00.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:00.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:00.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:00.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:00.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:00.950 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 01:33:01.422 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 01:33:01.893 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 01:33:02.366 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 01:33:02.839 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 01:33:03.311 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 01:33:03.785 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 01:33:04.257 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 01:33:04.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:04.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:04.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:04.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:04.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:04.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:04.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:04.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:04.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:04.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:04.682 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:04.682 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:04.729 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 01:33:04.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:04.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:04.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:04.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:04.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:04.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:05.200 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 01:33:05.674 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 01:33:06.146 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 01:33:06.618 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 01:33:07.089 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 01:33:07.562 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 01:33:08.035 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 01:33:08.507 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 01:33:08.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:08.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:08.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:08.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:08.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:08.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:08.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:08.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:08.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:08.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:08.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:08.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:08.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:08.977 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 01:33:08.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:08.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:08.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:08.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:09.449 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 01:33:09.922 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 01:33:10.394 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 01:33:10.866 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 01:33:11.339 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 01:33:11.812 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 01:33:12.284 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 01:33:12.757 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 01:33:13.229 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 01:33:13.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:13.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:13.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:13.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:13.391 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:13.391 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:13.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:13.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:13.393 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:13.393 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:13.393 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:13.393 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:13.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:13.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:13.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:13.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:13.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:13.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:13.701 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 01:33:14.172 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 01:33:14.646 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 01:33:15.118 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 01:33:15.590 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 01:33:16.064 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 01:33:16.536 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 01:33:17.008 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 01:33:17.479 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 01:33:17.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:17.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:17.644 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:17.644 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:17.652 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:17.652 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:17.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:17.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:17.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:17.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:17.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:17.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:17.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:17.662 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:17.662 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:17.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:17.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:17.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:17.952 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 01:33:18.425 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 01:33:18.897 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 01:33:19.368 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 01:33:19.841 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 01:33:20.314 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 01:33:20.786 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 01:33:21.257 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 01:33:21.728 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-06 01:33:21.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:21.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:21.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:21.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:21.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:21.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:21.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:21.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:21.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:21.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:21.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:21.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:21.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:21.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:21.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:21.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:21.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:22.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:22.200 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-06 01:33:22.673 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-06 01:33:23.145 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-06 01:33:23.616 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-06 01:33:24.089 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-06 01:33:24.562 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-06 01:33:25.034 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-06 01:33:25.505 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-06 01:33:25.976 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-06 01:33:26.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:26.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:26.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:26.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:26.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:26.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:26.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:26.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:26.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:26.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:26.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:33:26.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:33:26.196 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:33:26.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:26.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:26.196 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19532 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:31.200 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:33:31.200 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:33:31.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:31.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:31.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:31.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:31.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:31.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:33:31.206 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:31.207 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:33:31.207 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:33:31.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:33:31.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:33:31.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:33:31.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:31.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:31.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:33:31.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:33:31.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:33:31.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:31.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:33:31.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:33:31.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:33:31.214 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:31.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:31.214 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:33:31.214 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:33:31.214 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:33:31.215 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:31.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:33:31.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:33:31.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:33:31.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:31.217 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:31.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:33:31.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:33:31.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:33:31.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:31.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:33:31.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:33:31.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:31.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:33:31.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:33:31.221 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:33:31.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:33:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:31.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:33:31.223 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:33:31.223 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:31.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:33:36.234 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:33:36.234 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:36.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:36.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:36.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:36.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:36.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:33:36.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:36.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:33:36.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:33:36.246 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:33:36.247 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:33:36.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:33:36.247 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:36.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:36.248 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:33:36.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:33:36.248 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:33:36.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:36.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:33:36.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:33:36.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:33:36.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:36.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:36.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:33:36.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:33:36.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:33:36.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:33:36.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:33:36.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:33:36.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:33:36.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:33:36.254 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:33:36.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:36.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:36.259 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:33:36.739 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:33:36.779 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:33:36.781 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:33:36.782 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:33:36.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:36.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:36.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:36.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:36.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:36.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:36.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:36.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:36.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:36.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:36.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:36.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:36.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:36.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:36.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:36.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:36.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:36.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:36.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:36.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:36.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:36.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:36.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:36.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:36.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:36.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:37.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:37.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:37.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:37.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.210 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:33:37.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:37.256 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:37.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:37.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:37.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:37.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:37.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:37.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:37.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:37.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:37.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:37.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:37.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:37.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:37.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:37.500 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:37.500 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:37.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:37.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:37.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:37.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:37.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:37.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:37.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.671 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:37.671 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:37.671 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:37.671 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:37.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:33:37.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:37.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:37.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:37.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:37.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:38.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:38.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:38.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:38.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:38.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:38.152 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:33:38.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.153 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:38.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:38.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:38.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:38.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:38.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:38.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:38.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:38.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:38.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:38.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:38.623 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:33:38.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:38.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:38.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:38.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:38.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:38.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:38.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:38.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:38.678 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:38.678 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:38.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:38.727 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:38.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:38.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:38.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.094 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:33:39.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:39.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:39.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:39.217 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:39.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:39.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:39.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:39.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:39.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:39.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:39.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:39.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:39.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:39.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:39.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:39.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:39.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:39.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.267 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.565 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:33:39.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:39.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:39.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:39.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:39.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:39.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:39.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:39.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:39.759 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:39.759 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:39.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:39.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:39.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:39.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:39.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.038 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:33:40.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:40.259 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:40.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:40.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:40.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:40.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:40.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:40.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:40.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:40.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:40.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:40.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:40.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:40.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:40.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:40.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.511 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:33:40.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:40.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:40.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:40.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:40.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:40.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:40.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:40.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:40.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:40.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:40.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:40.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:40.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:40.896 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:40.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:40.983 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:33:41.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:41.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:41.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:41.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:41.454 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:33:41.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:41.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:41.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:41.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:41.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:41.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:41.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:41.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:41.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:41.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:41.741 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:41.741 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:41.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:41.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:41.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:41.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:41.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:41.926 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:33:42.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:42.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:42.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:42.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:42.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:42.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:42.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:42.224 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:42.224 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:42.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:42.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:42.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:42.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:42.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.399 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:33:42.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:42.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:42.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:42.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:42.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:42.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:42.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:42.772 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:42.772 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:42.772 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:42.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:42.829 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:42.829 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:42.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:42.871 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:33:43.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:43.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:43.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:43.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:43.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:43.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:43.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.049 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:43.049 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:43.050 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:43.050 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:43.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:43.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:43.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:43.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.342 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:33:43.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:43.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:43.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:43.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:43.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:43.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:43.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.544 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:43.544 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:43.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:43.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:43.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:43.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:43.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:43.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:43.813 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:33:44.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:44.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:44.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:44.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:44.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:44.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:44.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:44.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:44.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:44.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:44.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:44.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:44.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:44.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.286 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:33:44.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:44.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:44.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:44.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:44.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:44.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:44.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:44.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:44.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:44.519 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:44.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:44.573 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:44.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:44.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:44.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:44.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:44.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:44.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:44.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:44.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:44.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:44.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:44.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:44.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:44.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:44.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:44.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:44.758 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:33:45.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:45.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:45.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:45.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:45.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:45.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:45.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:45.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:45.188 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:45.188 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:45.230 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:33:45.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:45.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:45.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:45.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:45.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:45.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:45.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:45.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:45.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:45.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:45.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:45.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:45.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:45.701 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:33:45.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:45.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:45.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:45.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:45.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:46.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:46.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:46.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:46.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:46.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:46.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:46.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:46.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:46.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:46.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:46.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:33:46.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:33:46.167 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:33:46.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:46.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:46.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:46.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:46.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:46.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:46.168 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:51.169 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:33:51.169 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:33:51.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:51.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:51.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:51.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:51.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:33:51.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:33:51.179 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:51.179 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:33:51.179 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:33:51.182 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:33:51.183 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:33:51.183 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:33:51.183 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:51.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:33:51.184 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:33:51.185 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:33:51.185 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:33:51.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:51.187 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:33:51.187 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:33:51.187 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:33:51.188 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:51.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:33:51.188 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:33:51.188 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:33:51.188 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:33:51.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:51.190 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:33:51.190 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:33:51.190 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:33:51.190 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:33:51.191 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:33:51.191 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:33:51.191 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:33:51.191 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:33:51.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:51.196 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:33:51.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:33:51.196 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:33:51.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.197 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:33:51.197 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:33:51.198 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:33:51.198 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:33:51.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:33:51.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.200 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:33:51.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:33:51.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:33:51.733 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:33:51.735 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:33:51.736 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:33:51.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:51.749 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:51.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:51.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:51.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:51.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:51.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:51.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:51.753 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:51.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:51.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:51.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:51.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:51.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:52.152 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:33:52.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:52.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:52.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:52.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:52.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:52.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:52.624 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:33:52.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:52.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:52.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:52.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:52.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:52.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:52.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:52.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:52.846 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:52.846 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:52.846 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:52.846 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:52.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:52.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:52.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:52.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:52.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:53.097 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:33:53.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:53.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:53.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:33:53.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:53.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:54.042 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:33:54.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:54.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:54.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:54.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:54.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:54.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:54.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:54.265 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=662 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:33:54.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:54.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:54.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:54.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:54.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:54.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:54.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:54.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:54.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:54.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:54.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:54.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:54.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:54.513 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:33:54.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:54.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:54.987 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:33:55.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:55.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:55.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:55.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:55.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:55.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:55.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:55.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:55.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:55.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:55.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:55.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:55.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:55.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:55.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:55.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:55.459 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:33:55.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:55.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:55.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:55.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:55.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:55.931 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:33:56.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:33:56.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:33:56.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:33:56.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:33:56.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:56.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:56.404 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:33:56.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:56.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:56.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:56.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:56.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:56.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:56.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:56.876 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:33:56.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:56.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:56.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:56.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:56.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:56.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:56.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:56.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:56.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:56.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:57.349 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:33:57.822 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:33:57.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:57.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:58.295 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:33:58.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:58.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:58.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:58.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:58.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:58.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:58.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:58.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:58.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:58.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:58.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:58.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:58.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:58.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:58.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:58.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:58.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:58.768 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:33:59.241 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:33:59.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:59.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:59.713 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:33:59.929 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:33:59.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:59.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:59.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:59.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:33:59.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:33:59.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:33:59.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:33:59.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:33:59.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:33:59.953 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:33:59.953 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:33:59.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:00.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:00.005 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:00.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:00.005 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:00.186 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:34:00.657 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:34:00.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:00.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:01.130 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:34:01.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:01.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:01.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:01.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:01.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:01.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:01.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:01.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:01.452 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:01.452 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:01.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:01.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:01.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:01.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:01.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:01.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:01.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:01.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:01.602 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:34:02.075 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:34:02.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:02.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:02.546 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:34:02.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:02.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:02.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:02.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:02.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:02.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:02.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:02.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:02.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:02.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:02.960 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:02.960 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:03.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:03.019 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:34:03.021 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:03.021 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:03.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:03.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:03.491 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:34:03.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:03.964 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:34:03.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:04.435 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:34:04.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:04.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:04.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:04.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:04.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:04.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:04.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:04.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:04.462 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:04.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:04.462 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:04.462 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:04.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:04.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:04.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:04.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:04.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:04.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:04.905 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:34:05.379 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:34:05.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:05.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:05.852 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:34:06.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:06.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:06.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:06.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:06.324 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:34:06.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:06.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:06.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:06.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:06.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:06.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:06.329 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:06.329 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:06.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:06.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:06.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:06.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:06.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:06.795 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:34:07.266 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:34:07.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:07.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:07.739 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:34:07.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:07.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:07.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:07.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:07.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:07.773 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:07.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:07.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:07.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:07.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:07.775 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:07.775 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:07.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:07.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:07.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:07.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:07.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:08.212 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:34:08.683 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:34:08.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:08.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:09.154 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:34:09.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:09.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:09.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:09.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:09.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:09.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:09.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:09.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:09.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:09.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:09.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:09.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:09.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:09.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:09.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:09.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:09.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:09.624 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:34:10.095 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:34:10.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:10.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:10.569 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:34:10.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:10.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:10.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:10.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:10.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:10.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:10.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:10.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:10.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:10.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:10.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:10.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:10.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:10.788 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:10.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:10.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:10.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:11.040 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:34:11.512 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:34:11.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:11.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:11.983 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:34:12.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:12.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:12.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:12.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:12.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:12.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:12.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:12.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:12.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:12.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:12.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:12.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:12.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:12.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:12.228 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:12.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:12.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:12.456 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:34:12.929 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:34:13.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:13.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:13.401 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:34:13.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:13.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:13.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:13.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:13.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:13.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:13.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:13.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:13.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:13.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:13.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:13.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:13.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:13.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:13.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:13.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:13.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:13.872 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:34:14.343 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:34:14.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:14.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:14.816 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:34:15.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:15.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:15.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:15.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:15.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:15.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:15.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:15.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:15.047 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:15.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:15.047 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:15.047 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:15.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:15.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:15.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:15.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:15.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:15.288 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:34:15.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:15.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:15.760 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:34:16.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:16.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:16.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:16.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:16.171 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:16.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:16.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:16.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:16.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:16.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:16.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:16.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:16.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:16.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:16.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:16.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:16.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:16.231 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:34:16.702 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:34:17.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:17.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:17.173 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:34:17.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:17.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:17.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:17.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:17.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:17.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:17.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:17.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:17.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:17.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:17.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:17.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:17.646 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:34:17.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:17.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:17.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:17.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:17.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:18.118 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:34:18.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:18.590 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:34:19.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:19.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:19.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:19.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:19.030 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:19.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:19.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:19.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:19.032 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:19.032 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:19.032 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:19.032 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:19.061 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:34:19.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:19.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:19.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:19.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:19.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:19.532 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:34:19.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:19.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:20.005 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:34:20.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:20.452 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:20.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:20.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:20.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:20.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:20.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:20.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:20.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:34:20.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:34:20.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:34:20.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:34:20.467 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:34:20.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:34:20.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:34:25.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:34:25.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:34:25.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:34:25.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:34:25.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:34:25.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:34:25.480 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:34:25.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:34:25.482 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:34:25.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:34:25.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:34:25.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:34:25.490 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:34:25.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:34:25.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:34:25.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:34:25.490 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:34:25.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:34:25.491 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:34:25.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:25.495 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:34:25.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:34:25.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:34:25.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:34:25.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:34:25.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:34:25.496 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:34:25.496 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:34:25.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:25.500 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:34:25.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:34:25.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:34:25.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:34:25.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:34:25.501 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:34:25.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:34:25.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:34:25.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:25.506 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:34:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:34:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:34:25.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:34:25.506 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.507 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:34:25.507 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:34:25.508 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:34:25.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:25.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:34:25.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:34:25.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:34:26.039 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:34:26.040 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:34:26.041 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:34:26.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:26.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:26.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:26.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:26.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:26.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:26.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:26.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:26.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:26.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:26.093 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:26.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:26.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:26.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:26.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:34:26.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:26.934 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:34:27.407 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:34:27.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:27.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:27.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:27.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:27.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:34:28.352 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:34:28.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:28.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:28.826 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:34:29.298 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:34:29.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:29.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:29.770 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:34:29.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:29.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:29.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:29.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:29.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:29.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:29.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:29.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:29.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:29.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:29.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:29.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:30.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:30.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:30.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:30.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:30.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:30.243 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:34:30.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:34:30.517 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:34:30.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:34:30.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:34:30.716 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:34:31.187 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:34:31.659 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:34:32.132 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:34:32.605 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:34:33.076 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:34:33.548 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:34:34.021 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:34:34.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:34.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:34.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:34.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:34.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:34.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:34.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:34.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:34.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:34.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:34.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:34.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:34.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:34.307 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:34.307 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:34.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:34.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:34.494 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:34:34.966 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:34:35.439 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:34:35.912 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:34:36.384 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:34:36.855 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:34:37.325 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:34:37.798 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:34:38.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:38.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:38.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:38.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:38.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:38.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:38.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:38.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:38.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:38.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:38.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:38.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:38.271 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:34:38.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:38.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:38.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:38.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:38.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:38.743 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:34:39.214 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:34:39.687 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:34:40.160 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:34:40.632 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:34:41.103 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:34:41.576 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:34:42.048 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:34:42.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:42.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:42.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:42.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:42.520 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:34:42.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:42.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:42.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:42.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:42.535 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:42.535 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:42.535 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:42.535 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:42.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:42.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:42.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:42.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:42.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:42.992 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:34:43.462 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:34:43.936 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:34:44.408 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:34:44.881 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:34:45.352 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:34:45.825 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:34:46.298 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:34:46.770 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:34:47.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:47.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:47.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:47.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:47.177 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=4680 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:34:47.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:47.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:47.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:47.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:47.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:47.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:47.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:47.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:47.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:34:47.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:47.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:47.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:47.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:47.712 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:34:48.185 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:34:48.658 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:34:49.130 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:34:49.601 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:34:50.074 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:34:50.547 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:34:51.020 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:34:51.493 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:34:51.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:51.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:51.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:51.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:51.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:51.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:51.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:51.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:51.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:51.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:51.587 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:51.587 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:51.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:51.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:51.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:51.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:51.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:51.966 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:34:52.438 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:34:52.912 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:34:53.384 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:34:53.857 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:34:54.327 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:34:54.801 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:34:55.273 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:34:55.746 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:34:55.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:55.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:55.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:55.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:55.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:34:55.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:34:55.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:34:55.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:55.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:55.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:55.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:34:55.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:34:56.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:34:56.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:34:56.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:34:56.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:34:56.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:56.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:34:56.219 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:34:56.692 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:34:57.163 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:34:57.635 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:34:58.103 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:34:58.574 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:34:59.046 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:34:59.519 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:34:59.990 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 01:35:00.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:00.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:00.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:00.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:00.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:00.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:00.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:00.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:00.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:00.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:00.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:00.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:00.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:00.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:00.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:00.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:00.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:00.463 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 01:35:00.936 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 01:35:01.408 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 01:35:01.879 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 01:35:02.349 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 01:35:02.820 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 01:35:03.293 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 01:35:03.766 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 01:35:04.238 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 01:35:04.709 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 01:35:04.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:04.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:04.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:04.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:04.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:04.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:04.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:04.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:04.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:04.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:04.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:04.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:04.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:04.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:04.825 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:04.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:04.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:04.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:05.182 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 01:35:05.655 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 01:35:06.127 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 01:35:06.601 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 01:35:07.074 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 01:35:07.546 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 01:35:08.019 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 01:35:08.492 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 01:35:08.965 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 01:35:09.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:09.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:09.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:09.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:09.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:09.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:09.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:09.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:09.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:09.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:09.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:09.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:09.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:09.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:09.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:09.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:09.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:09.437 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 01:35:09.910 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 01:35:10.382 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 01:35:10.853 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 01:35:11.327 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 01:35:11.799 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 01:35:12.271 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 01:35:12.745 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 01:35:13.217 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 01:35:13.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:13.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:13.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:13.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:13.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:13.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:13.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:13.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:13.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:13.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:13.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:13.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:13.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:13.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:13.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:13.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:13.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:13.690 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 01:35:14.161 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 01:35:14.632 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 01:35:15.105 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 01:35:15.577 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 01:35:16.049 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 01:35:16.523 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 01:35:16.995 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 01:35:17.467 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 01:35:17.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:17.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:17.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:17.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:17.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:17.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:17.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:17.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:17.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:17.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:17.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:17.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:17.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:17.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:17.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:17.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:17.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:17.940 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 01:35:18.413 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 01:35:18.885 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 01:35:19.358 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 01:35:19.831 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 01:35:20.303 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 01:35:20.774 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 01:35:21.247 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 01:35:21.720 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 01:35:21.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:21.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:21.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:21.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:21.897 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:21.897 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:21.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:21.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:21.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:21.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:21.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:21.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:21.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:21.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:21.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:21.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:21.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:22.192 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 01:35:22.663 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 01:35:23.136 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 01:35:23.608 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 01:35:24.080 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 01:35:24.551 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 01:35:25.025 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 01:35:25.497 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 01:35:25.969 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 01:35:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:26.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:26.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:26.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:26.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:26.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:26.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:26.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:26.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:26.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:26.167 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:26.167 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:26.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:26.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:26.240 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:26.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:26.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:26.440 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 01:35:26.914 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 01:35:27.386 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 01:35:27.858 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 01:35:28.329 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 01:35:28.803 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 01:35:29.275 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 01:35:29.747 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 01:35:30.217 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 01:35:30.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:30.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:30.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:30.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:30.428 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:30.428 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:30.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:30.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:30.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:30.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:30.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:30.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:30.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:30.479 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:30.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:30.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:30.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:30.690 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 01:35:31.163 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 01:35:31.635 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 01:35:32.106 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 01:35:32.580 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 01:35:33.052 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 01:35:33.525 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 01:35:33.995 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 01:35:34.469 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 01:35:34.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:34.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:34.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:34.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:34.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:34.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:34.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:34.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:34.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:34.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:34.701 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:34.701 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:34.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:34.755 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:34.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:34.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:34.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:34.941 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 01:35:35.413 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 01:35:35.884 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 01:35:36.358 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 01:35:36.830 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 01:35:37.302 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 01:35:37.773 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 01:35:38.247 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 01:35:38.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:38.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:38.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:38.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:38.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:38.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:38.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:38.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:38.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:38.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:38.657 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:38.657 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:38.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:38.709 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:38.710 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:38.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:38.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:38.719 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 01:35:39.191 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 01:35:39.664 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 01:35:40.136 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 01:35:40.608 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 01:35:41.082 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 01:35:41.554 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 01:35:42.026 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 01:35:42.497 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 01:35:42.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:42.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:42.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:42.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:42.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:42.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:42.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:42.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:42.929 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:42.929 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:42.929 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:42.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:42.970 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 01:35:42.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:42.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:42.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:42.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:42.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:43.443 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 01:35:43.915 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 01:35:44.386 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 01:35:44.857 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 01:35:45.330 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 01:35:45.803 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 01:35:46.275 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 01:35:46.746 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 01:35:47.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:47.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:47.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:47.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:47.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:47.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:47.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:35:47.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:47.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:47.197 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:47.197 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:35:47.197 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:35:47.219 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 01:35:47.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:47.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:35:47.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:35:47.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:47.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:47.691 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 01:35:48.163 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 01:35:48.634 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 01:35:49.108 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 01:35:49.580 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 01:35:50.052 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 01:35:50.524 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 01:35:50.997 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 01:35:51.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:35:51.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:35:51.444 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:35:51.444 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:35:51.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:35:51.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:35:51.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:35:51.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:35:51.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:35:51.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:35:51.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:35:51.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:35:51.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:35:51.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:35:51.460 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:51.461 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:35:56.463 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:35:56.463 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:35:56.463 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:35:56.463 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:35:56.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:35:56.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:35:56.466 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:35:56.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:35:56.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:35:56.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:35:56.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:35:56.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:35:56.468 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:35:56.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:35:56.469 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:35:56.469 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:35:56.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:35:56.470 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:35:56.470 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:35:56.470 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:35:56.470 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:35:56.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:35:56.471 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:35:56.471 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:35:56.471 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:35:56.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:35:56.472 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:35:56.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:35:56.472 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:35:56.472 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:35:56.472 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:35:56.472 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:35:56.473 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:35:56.473 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:35:56.473 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.473 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:35:56.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:35:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:35:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:35:56.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:35:56.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:35:56.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:35:56.474 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:36:01.482 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:36:01.482 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:36:01.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:36:01.482 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:36:01.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:36:01.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:36:01.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:36:01.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:36:01.493 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:36:01.493 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:36:01.493 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:36:01.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:36:01.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:36:01.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:36:01.499 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:36:01.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:36:01.499 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:36:01.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:36:01.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:36:01.500 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:36:01.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:36:01.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:36:01.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:36:01.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:36:01.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:36:01.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:36:01.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:36:01.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:36:01.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:36:01.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:36:01.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:36:01.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:36:01.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:36:01.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:36:01.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:36:01.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:36:01.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:36:01.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:36:01.509 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:36:01.509 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:36:01.509 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:36:01.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:36:01.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:01.514 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:36:01.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:36:02.034 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:36:02.037 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:36:02.039 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:36:02.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:02.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:02.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:02.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:02.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:02.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:02.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:02.066 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:02.066 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:02.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:02.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:02.098 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:02.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:02.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:02.465 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:36:02.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:36:02.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:36:02.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:36:02.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:36:02.936 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:36:03.410 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:36:03.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:36:03.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:36:03.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:36:03.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:36:03.882 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:36:04.354 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:36:04.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:36:04.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:36:04.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:36:04.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:36:04.825 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:36:05.299 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:36:05.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:36:05.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:36:05.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:36:05.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:36:05.772 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:36:06.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:06.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:06.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:06.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:06.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:06.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:06.158 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:06.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:06.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:06.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:06.160 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:06.160 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:06.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:06.211 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:06.211 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:06.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:06.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:06.244 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:36:06.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:36:06.516 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:36:06.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:36:06.517 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:36:06.717 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:36:07.190 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:36:07.662 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:36:08.133 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:36:08.606 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:36:09.078 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:36:09.550 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:36:10.040 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:36:10.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:10.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:10.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:10.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:10.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:10.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:10.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:10.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:10.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:10.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:10.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:10.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:10.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:10.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:10.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:10.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:10.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:10.511 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:36:10.983 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:36:11.453 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:36:11.927 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:36:12.399 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:36:12.871 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:36:13.342 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:36:13.816 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:36:14.288 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:36:14.760 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:36:14.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:14.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:14.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:14.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:14.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:14.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:14.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:14.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:14.911 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:14.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:14.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:14.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:14.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:14.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:14.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:14.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:14.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:15.231 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:36:15.704 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:36:16.177 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:36:16.649 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:36:17.120 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:36:17.593 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:36:18.066 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:36:18.538 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:36:19.009 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:36:19.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:19.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:19.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:19.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:19.168 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:19.168 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:19.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:19.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:19.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:19.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:19.170 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:19.170 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:19.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:19.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:19.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:19.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:19.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:19.482 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:36:19.955 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:36:20.428 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:36:20.899 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:36:21.372 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:36:21.844 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:36:22.317 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:36:22.788 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:36:23.261 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:36:23.734 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:36:23.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:23.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:23.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:23.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:23.805 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:23.805 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:23.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:23.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:23.807 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:23.807 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:23.807 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:23.807 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:23.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:23.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:23.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:23.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:23.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:24.206 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:36:24.677 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:36:25.151 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:36:25.623 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:36:26.094 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:36:26.568 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:36:27.041 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:36:27.514 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:36:27.987 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:36:28.459 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:36:28.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:28.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:28.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:28.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:28.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:28.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:28.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:28.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:28.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:28.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:28.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:28.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:28.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:28.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:28.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:28.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:28.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:36:29.404 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:36:29.876 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:36:30.347 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:36:30.821 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:36:31.294 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:36:31.767 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:36:32.240 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:36:32.712 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:36:33.183 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:36:33.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:33.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:33.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:33.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:33.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:33.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:33.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:33.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:33.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:33.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:33.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:33.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:33.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:33.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:33.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:33.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:33.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:33.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:33.657 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:36:34.129 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:36:34.601 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:36:35.074 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:36:35.548 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:36:36.020 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 01:36:36.493 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 01:36:36.965 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 01:36:37.438 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 01:36:37.909 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 01:36:38.382 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 01:36:38.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:38.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:38.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:38.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:38.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:38.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:38.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:38.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:38.437 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:38.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:38.438 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:38.438 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:38.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:38.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:38.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:38.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:38.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:38.854 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 01:36:39.327 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 01:36:39.800 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 01:36:40.273 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 01:36:40.745 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 01:36:41.219 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 01:36:41.691 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 01:36:42.163 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 01:36:42.634 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 01:36:43.105 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 01:36:43.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:43.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:43.303 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:43.303 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:43.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:43.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:43.321 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:43.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:43.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:43.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:43.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:43.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:43.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:36:43.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:43.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:43.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:43.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:43.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:43.576 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 01:36:44.049 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 01:36:44.522 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 01:36:44.993 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 01:36:45.466 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 01:36:45.939 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 01:36:46.411 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 01:36:46.885 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 01:36:47.357 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 01:36:47.830 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 01:36:48.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:48.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:48.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:48.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:48.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:48.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:48.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:48.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:48.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:48.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:48.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:48.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:48.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:48.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:48.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:48.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:48.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:48.302 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 01:36:48.775 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 01:36:49.247 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 01:36:49.718 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 01:36:50.192 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 01:36:50.664 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 01:36:51.136 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 01:36:51.607 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 01:36:52.078 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 01:36:52.549 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 01:36:52.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:52.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:52.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:52.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:52.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:52.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:52.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:52.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:52.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:52.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:52.889 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:52.889 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:52.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:52.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:52.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:52.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:52.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:53.019 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 01:36:53.493 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 01:36:53.965 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 01:36:54.438 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 01:36:54.909 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 01:36:55.382 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 01:36:55.855 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 01:36:56.327 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 01:36:56.800 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 01:36:57.273 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 01:36:57.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:57.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:57.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:57.744 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:57.745 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 01:36:57.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:36:57.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:36:57.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:36:57.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:57.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:57.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:57.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:36:57.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:36:57.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:36:57.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:36:57.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:36:57.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:57.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:36:58.216 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 01:36:58.690 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 01:36:59.162 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 01:36:59.634 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 01:37:00.105 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 01:37:00.579 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 01:37:01.051 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 01:37:01.523 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 01:37:01.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:01.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:01.846 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:01.846 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:01.846 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=13026 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:37:01.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:01.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:01.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:01.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:01.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:01.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:01.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:01.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:01.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:01.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:01.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:01.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:01.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:01.994 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 01:37:02.468 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 01:37:02.940 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 01:37:03.412 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 01:37:03.883 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 01:37:04.356 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 01:37:04.829 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 01:37:05.300 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 01:37:05.771 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 01:37:06.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:06.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:06.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:06.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:06.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:06.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:06.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:06.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:06.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:06.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:06.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:06.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:06.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:06.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:06.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:06.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:06.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:06.242 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 01:37:06.713 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 01:37:07.184 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 01:37:07.657 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 01:37:08.130 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 01:37:08.602 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 01:37:09.073 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 01:37:09.546 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 01:37:10.019 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 01:37:10.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:10.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:10.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:10.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:10.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:10.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:10.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:10.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:10.399 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:10.399 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:10.399 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:10.399 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:10.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:10.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:10.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:10.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:10.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:10.490 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 01:37:10.962 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 01:37:11.433 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 01:37:11.906 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 01:37:12.378 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 01:37:12.850 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 01:37:13.321 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 01:37:13.795 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 01:37:14.267 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 01:37:14.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:14.647 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:14.647 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:14.647 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:14.665 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:14.665 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:14.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:14.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:14.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:14.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:14.667 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:14.667 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:14.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:14.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:14.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:14.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:14.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:14.739 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 01:37:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 01:37:15.684 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 01:37:16.155 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 01:37:16.627 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 01:37:17.098 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 01:37:17.572 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 01:37:18.044 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 01:37:18.516 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 01:37:18.987 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 01:37:19.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:19.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:19.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:19.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:19.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:19.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:19.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:19.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:19.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:19.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:19.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:19.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:19.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:19.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:19.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:19.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:19.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:19.460 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 01:37:19.933 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 01:37:20.405 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 01:37:20.876 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 01:37:21.349 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 01:37:21.822 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 01:37:22.294 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 01:37:22.765 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 01:37:23.239 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 01:37:23.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:23.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:23.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:23.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:23.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:23.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:23.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:23.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:23.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:23.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:23.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:23.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:23.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:23.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:23.429 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:23.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:23.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:23.711 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 01:37:24.183 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 01:37:24.654 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 01:37:25.125 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 01:37:25.595 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 01:37:26.066 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 01:37:26.539 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 01:37:27.012 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 01:37:27.484 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-06 01:37:27.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:27.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:27.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:27.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:27.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:27.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:27.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:27.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:27.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:27.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:27.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:27.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:27.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:27.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:27.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:27.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:27.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:27.955 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-06 01:37:28.426 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-06 01:37:28.899 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-06 01:37:29.371 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-06 01:37:29.844 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-06 01:37:30.315 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-06 01:37:30.788 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-06 01:37:31.261 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-06 01:37:31.733 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-06 01:37:31.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:31.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:31.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:31.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:31.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:31.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:31.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:31.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:31.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:37:31.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:37:31.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:37:31.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:37:31.886 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:37:31.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:37:31.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:37:36.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:37:36.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:37:36.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:37:36.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:37:36.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:37:36.893 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:37:36.900 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:37:36.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:37:36.900 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:36.901 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:37:36.901 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:37:36.904 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:37:36.904 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:37:36.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:37:36.905 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:36.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:37:36.905 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:37:36.905 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:37:36.905 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:37:36.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:36.909 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:37:36.909 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:37:36.909 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:37:36.909 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:36.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:37:36.909 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:37:36.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:37:36.910 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:37:36.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:36.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:37:36.912 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:37:36.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:37:36.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:36.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:37:36.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:37:36.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:37:36.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:37:36.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:36.916 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:37:36.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:37:36.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:37:36.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:37:36.916 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:37:36.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:37:36.917 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:37:36.917 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:37:36.917 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:36.917 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:37:36.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:37:36.918 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:36.918 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.926 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:37:41.926 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:37:41.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:37:41.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:37:41.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:37:41.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:37:41.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:37:41.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:37:41.938 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:41.938 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:37:41.938 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:37:41.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:37:41.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:37:41.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:37:41.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:41.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:37:41.945 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:37:41.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:37:41.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:37:41.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:41.949 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:37:41.950 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:37:41.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:37:41.950 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:41.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:37:41.950 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:37:41.950 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:37:41.950 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:37:41.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:41.954 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:37:41.954 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:37:41.954 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:37:41.954 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:37:41.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:37:41.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:37:41.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:37:41.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:37:41.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:37:41.961 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:37:41.961 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:37:41.961 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:41.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:37:41.966 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:37:42.443 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:37:42.486 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:37:42.488 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:37:42.489 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:37:42.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:42.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:42.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:42.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:42.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:42.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:42.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:42.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:42.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:42.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:42.545 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:42.545 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:42.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:42.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:42.915 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:37:42.964 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:42.964 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:42.964 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:42.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:43.386 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:37:43.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:43.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:43.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:43.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:43.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:43.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:43.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:43.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:43.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:43.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:43.600 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:43.600 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:43.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:43.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:43.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:43.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:43.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:43.859 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:37:43.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:43.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:43.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:43.966 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:44.331 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:37:44.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:37:44.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:44.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:44.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:44.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:45.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:45.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:45.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:45.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:45.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:45.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:45.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:45.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:45.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:45.044 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:45.044 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:45.044 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:45.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:45.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:45.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:45.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:45.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:45.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:37:45.748 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:37:45.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:45.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:45.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:45.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:46.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:46.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:46.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:46.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:46.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:46.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:46.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:46.195 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:46.195 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:46.195 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:46.195 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:46.195 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:37:46.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:46.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:46.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:46.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:46.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:46.692 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:37:46.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:37:46.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:37:46.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:37:46.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:37:47.163 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:37:47.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:47.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:47.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:47.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:47.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:47.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:47.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:47.636 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:37:47.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:47.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:47.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:47.639 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:47.639 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:47.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:47.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:47.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:47.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:47.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:48.109 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:37:48.582 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:37:48.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:48.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:48.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:48.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:48.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:48.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:48.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:48.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:48.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:48.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:48.721 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:48.721 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:48.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:48.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:48.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:48.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:48.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:49.055 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:37:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:37:49.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:49.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:49.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:49.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:49.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:49.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:49.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:49.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:49.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:49.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:49.753 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:49.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:49.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:49.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:49.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:49.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:49.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:50.000 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:37:50.471 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:37:50.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:50.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:50.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:50.749 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:50.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:50.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:50.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:50.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:50.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:50.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:50.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:50.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:50.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:50.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:50.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:50.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:50.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:50.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:50.944 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:37:51.417 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:37:51.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:51.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:51.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:51.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:51.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:51.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:51.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:51.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:51.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:51.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:51.797 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:51.797 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:51.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:51.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:51.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:51.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:51.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:51.889 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:37:52.360 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:37:52.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:52.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:52.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:52.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:52.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:52.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:52.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:52.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:52.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:52.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:52.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:52.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:52.830 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:37:52.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:37:52.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:52.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:52.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:52.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:52.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:53.302 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:37:53.775 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:37:54.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:54.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:54.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:54.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:54.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:54.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:54.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:54.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:54.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:54.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:54.193 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:54.193 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:54.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:54.247 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:37:54.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:54.251 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:54.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:54.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:54.720 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:37:55.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:55.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:55.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:55.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:55.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:55.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:55.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:55.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:55.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:55.159 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:55.159 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:55.159 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:55.193 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:37:55.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:55.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:55.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:55.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:55.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:55.665 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:37:56.138 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:37:56.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:56.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:56.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:56.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:56.183 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:56.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:56.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:56.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:56.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:56.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:56.186 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:56.186 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:56.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:56.239 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:56.239 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:56.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:56.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:56.608 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:37:57.082 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:37:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:57.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:57.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:57.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:57.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:57.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:57.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:57.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:57.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:57.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:57.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:57.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:57.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:57.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:57.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:57.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:57.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:57.554 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:37:58.026 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:37:58.497 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:37:58.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:58.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:58.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:58.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:58.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:37:58.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:37:58.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:37:58.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:58.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:58.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:58.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:37:58.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:37:58.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:37:58.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:37:58.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:37:58.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:58.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:37:58.969 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:37:59.442 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:37:59.914 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:38:00.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:00.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:00.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:00.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:00.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:00.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:00.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:00.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:00.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:00.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:00.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:00.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:00.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:00.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:00.179 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:00.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:00.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:00.385 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:38:00.859 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:38:01.331 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:38:01.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:01.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:01.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:01.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:01.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:01.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:01.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:01.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:01.569 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:01.569 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:01.569 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:01.569 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:01.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:01.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:01.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:01.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:01.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:01.803 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:38:02.274 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:38:02.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:02.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:02.668 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:02.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:02.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:02.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:02.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:02.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:02.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:02.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:02.688 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:02.688 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:02.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:02.746 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:38:02.750 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:02.750 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:02.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:02.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:03.218 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:38:03.690 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:38:04.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:04.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:04.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:04.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:04.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:04.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:04.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:04.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:04.126 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:04.127 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:04.127 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:04.127 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:04.162 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:38:04.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:04.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:04.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:04.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:04.633 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:38:05.104 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:38:05.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:05.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:05.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:05.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:05.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:05.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:05.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:05.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:05.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:05.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:05.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:05.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:05.575 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:38:05.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:05.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:05.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:05.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:05.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:06.046 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:38:06.519 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:38:06.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:06.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:06.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:06.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:06.975 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:06.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:06.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:06.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:06.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:38:06.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:38:06.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:38:06.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:38:06.978 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:38:06.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:38:06.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:38:06.978 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:06.979 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:06.979 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:06.979 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:06.979 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:06.979 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:06.979 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:11.983 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:38:11.983 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:38:11.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:38:11.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:38:11.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:38:11.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:38:11.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:38:11.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:38:11.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:11.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:38:11.992 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:38:11.994 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:38:11.995 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:38:11.995 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:38:11.995 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:11.995 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:38:11.996 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:38:11.996 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:38:11.996 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:38:11.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:11.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:38:11.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:38:11.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:38:11.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:11.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:38:11.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:38:11.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:38:11.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:38:11.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:11.999 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:38:11.999 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:38:11.999 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:38:11.999 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:11.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:38:11.999 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:38:12.000 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:38:12.000 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:38:12.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:38:12.002 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:38:12.002 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:38:12.002 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:12.007 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:38:12.486 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:38:12.525 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:38:12.527 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:38:12.529 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:38:12.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:12.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:12.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:12.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:12.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:12.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:12.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:12.560 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:12.560 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:12.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:12.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:12.587 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:12.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:12.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:12.957 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:38:13.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:13.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:13.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:13.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:13.429 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:38:13.903 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:38:14.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:14.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:14.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:14.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:14.375 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:38:14.848 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:38:15.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:15.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:15.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:15.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:15.322 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:38:15.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:15.794 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:38:16.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:16.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:16.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:16.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:16.265 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:38:16.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:16.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:16.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:16.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:16.339 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:16.339 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:16.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:16.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:16.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:16.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:16.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:16.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:16.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:16.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:16.359 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:16.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:16.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:16.739 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:38:17.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:17.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:17.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:17.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:17.211 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:38:17.682 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:38:18.155 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:38:18.628 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:38:19.101 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:38:19.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:19.574 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:38:20.047 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:38:20.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:20.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:20.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:20.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:20.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:20.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:20.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:20.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:20.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:20.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:20.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:20.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:20.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:20.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:20.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:20.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:20.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:20.517 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:38:20.989 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:38:21.462 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:38:21.935 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:38:22.407 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:38:22.878 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:38:23.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:23.351 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:38:23.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:23.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:23.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:23.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:23.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:23.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:23.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:23.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:23.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:23.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:23.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:23.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:23.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:23.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:23.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:23.823 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:38:24.296 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:38:24.766 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:38:25.237 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:38:25.711 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:38:26.184 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:38:26.657 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:38:26.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:27.130 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:38:27.602 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:38:27.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:27.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:27.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:27.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:27.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:27.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:27.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:27.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:27.677 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:27.677 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:27.677 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:27.677 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:27.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:27.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:27.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:27.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:27.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:28.075 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:38:28.548 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:38:29.020 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:38:29.491 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:38:29.962 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:38:30.435 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:38:30.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:30.907 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:38:31.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:31.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:31.348 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:31.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:31.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:31.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:31.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:31.350 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:31.351 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:31.351 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:31.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:31.380 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:38:31.380 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:31.380 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:31.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:31.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:31.851 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:38:32.321 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:38:32.795 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:38:33.267 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:38:33.739 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:38:34.210 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:38:34.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:34.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:34.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:34.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:34.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:34.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:34.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:34.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:34.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:34.669 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:34.669 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:34.669 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:34.669 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:34.680 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:38:34.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:34.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:34.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:34.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:34.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:35.152 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:38:35.625 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:38:36.097 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:38:36.569 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:38:37.040 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:38:37.513 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:38:37.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:37.985 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:38:38.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:38.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:38.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:38.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:38.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:38.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:38.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:38.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:38.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:38.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:38.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:38.408 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:38.408 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:38.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:38.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:38.457 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:38:38.928 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:38:39.402 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:38:39.874 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:38:40.346 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:38:40.820 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:38:41.292 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:38:41.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:41.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:41.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:41.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:41.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:41.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:41.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:41.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:41.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:41.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:38:41.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:38:41.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:38:41.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:38:41.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:38:41.700 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:38:41.700 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:38:41.700 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6414 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:41.700 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6414 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:41.700 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6414 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:41.700 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6414 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:41.700 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6414 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:41.700 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:46.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:38:46.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:38:46.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:38:46.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:38:46.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:38:46.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:38:46.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:38:46.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:38:46.712 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:46.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:38:46.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:38:46.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:38:46.717 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:38:46.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:38:46.717 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:46.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:38:46.718 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:38:46.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:38:46.719 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:38:46.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:46.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:38:46.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:38:46.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:38:46.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:46.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:38:46.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:38:46.723 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:38:46.723 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:38:46.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:46.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:38:46.725 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:38:46.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:38:46.725 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:38:46.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:38:46.725 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:38:46.725 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:38:46.725 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:38:46.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:46.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:38:46.730 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:38:46.730 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:38:46.730 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:38:46.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:38:46.735 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:38:47.213 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:38:47.258 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:38:47.261 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:38:47.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:47.263 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:38:47.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:47.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:47.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:47.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:47.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:47.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:47.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:47.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:47.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:47.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:47.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:47.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:47.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:47.685 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:38:47.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:47.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:47.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:47.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:48.156 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:38:48.630 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:38:48.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:48.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:48.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:48.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:49.102 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:38:49.574 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:38:49.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:49.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:49.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:49.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:50.048 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:38:50.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:50.521 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:38:50.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:50.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:50.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:50.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:50.993 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:38:51.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:51.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:51.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:51.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:51.067 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:51.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:51.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:51.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:51.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:51.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:51.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:51.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:51.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:51.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:51.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:51.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:51.467 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:38:51.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:38:51.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:38:51.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:38:51.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:38:51.939 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:38:52.412 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:38:52.885 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:38:53.358 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:38:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:38:54.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:54.319 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:38:54.791 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:38:54.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:54.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:54.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:54.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:54.940 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=1768 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:38:54.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:54.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:54.941 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:54.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:54.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:54.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:54.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:54.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:54.977 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:54.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:54.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:55.262 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:38:55.736 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:38:56.208 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:38:56.681 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:38:57.152 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:38:57.625 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:38:57.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:58.098 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:38:58.570 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:38:58.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:58.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:58.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:58.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:58.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:58.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:58.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:58.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:58.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:58.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:58.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:58.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:58.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:58.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:58.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:59.044 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:38:59.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:59.516 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:38:59.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:38:59.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:59.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:59.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:59.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:38:59.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:38:59.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:38:59.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:59.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:59.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:59.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:38:59.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:38:59.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:38:59.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:38:59.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:38:59.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:59.829 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:38:59.988 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:39:00.461 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:39:00.934 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:39:01.406 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:39:01.877 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:39:02.351 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:39:02.823 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:39:02.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:03.295 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:39:03.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:03.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:03.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:03.370 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:03.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:03.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:03.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:03.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:03.371 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:03.371 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:03.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:03.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:03.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:03.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:03.765 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:39:04.239 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:39:04.712 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:39:05.183 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:39:05.653 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:39:06.124 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:39:06.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:06.598 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:39:07.071 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:39:07.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:07.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:07.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:07.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:07.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:07.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:07.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:07.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:07.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:07.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:07.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:07.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:07.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:07.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:07.544 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:39:08.016 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:39:08.488 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:39:08.959 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:39:09.433 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:39:09.905 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:39:10.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:10.377 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:39:10.849 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:39:11.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:11.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:11.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:11.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:11.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:11.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:11.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:11.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:11.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:11.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:11.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:11.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:11.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:11.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:11.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:11.321 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:39:11.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:11.794 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:39:12.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:12.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:12.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:12.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:12.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:12.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:12.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:12.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:12.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:12.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:12.056 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:12.056 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:12.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:12.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:12.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:12.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:12.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:12.266 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:39:12.737 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:39:13.211 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:39:13.683 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:39:14.155 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:39:14.629 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:39:15.101 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:39:15.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:15.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:15.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:15.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:15.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:15.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:15.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:15.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:15.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:15.543 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:15.543 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:15.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:15.573 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:39:15.575 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:15.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:15.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:15.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:16.044 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:39:16.518 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:39:16.990 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:39:17.462 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:39:17.933 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:39:18.406 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:39:18.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:18.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:18.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:18.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:18.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:18.843 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=6931 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:18.843 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=6931 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:18.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:18.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:18.843 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:18.843 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:18.843 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:18.843 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:18.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:18.874 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:18.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:18.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:18.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:18.879 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:39:19.351 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:39:19.822 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:39:20.295 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:39:20.768 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:39:21.240 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 01:39:21.711 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 01:39:21.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:22.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:22.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:22.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:22.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:22.149 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=7645 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:22.150 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=7645 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:22.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:22.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:22.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:22.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:22.150 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:22.150 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:22.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:22.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:22.182 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 01:39:22.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:22.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:22.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:22.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:22.655 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 01:39:23.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:23.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:23.092 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:23.092 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:23.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:23.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:23.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:23.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:23.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:23.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:23.103 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:23.103 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:23.127 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 01:39:23.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:23.149 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:23.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:23.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:23.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:23.599 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 01:39:24.070 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 01:39:24.544 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 01:39:25.016 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 01:39:25.487 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 01:39:25.959 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 01:39:26.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:26.432 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 01:39:26.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:26.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:26.823 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:26.823 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:26.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:26.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:26.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:26.825 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:26.825 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:26.825 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:26.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:26.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:26.852 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:26.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:26.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:26.904 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 01:39:27.376 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 01:39:27.847 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 01:39:28.321 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 01:39:28.793 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 01:39:29.265 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 01:39:29.736 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 01:39:29.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:30.126 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:30.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:30.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:30.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:30.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:30.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:30.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:30.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:30.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:30.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:30.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:30.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:30.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:30.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:30.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:30.210 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 01:39:30.682 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 01:39:31.154 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 01:39:31.625 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 01:39:32.099 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 01:39:32.571 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 01:39:33.043 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 01:39:33.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:33.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:33.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:33.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:33.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:33.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:33.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:33.438 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:33.439 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:33.439 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:33.439 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:33.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:39:33.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:33.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:33.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:33.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:33.514 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 01:39:33.987 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 01:39:34.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:34.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:34.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:34.378 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:34.378 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:34.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:34.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:34.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:34.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:34.386 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:39:34.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:39:34.386 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:39:34.386 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:39:34.386 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:39:34.386 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:39:34.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:39:39.393 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:39:39.393 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:39:39.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:39:39.393 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:39:39.394 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:39:39.394 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:39:39.400 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:39:39.402 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:39:39.402 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:39.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:39:39.403 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:39:39.406 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:39:39.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:39:39.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:39:39.407 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:39.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:39:39.407 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:39:39.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:39:39.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:39:39.408 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:39.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:39:39.412 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:39:39.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:39:39.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:39.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:39:39.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:39:39.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:39:39.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:39:39.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:39.416 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:39:39.416 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:39:39.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:39:39.416 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:39.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:39:39.417 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:39:39.417 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:39:39.417 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:39:39.417 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:39.422 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:39:39.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:39:39.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:39:39.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:39:39.422 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:39:39.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:39:39.423 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:39:39.423 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:39:39.423 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:39:39.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.424 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:39.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:39.428 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:39:39.906 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:39:39.950 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:39:39.952 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:39:39.954 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:39:39.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:39.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:39.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:39.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:39.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:39.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:39.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:39.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:39.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:40.379 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:39:40.427 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:40.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:40.427 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:40.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:40.850 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:39:41.321 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:39:41.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:41.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:41.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:41.429 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:41.794 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:39:42.267 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:39:42.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:42.429 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:42.430 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:42.430 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:42.739 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:39:43.209 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:39:43.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:43.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:43.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:43.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:43.681 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:39:44.151 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:39:44.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:44.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:44.625 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:39:45.097 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:39:45.570 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:39:46.040 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:39:46.511 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:39:46.985 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:39:47.457 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:39:47.929 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:39:48.399 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:39:48.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:48.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:48.775 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:48.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:48.775 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:48.775 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:48.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:39:48.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:39:48.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:39:48.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:39:48.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:39:48.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:39:48.780 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:39:48.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2022 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:48.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2022 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:48.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2022 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:48.781 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2022 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:48.781 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2022 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:48.781 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2022 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:39:53.781 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:39:53.781 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:39:53.781 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:39:53.781 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:39:53.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:39:53.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:39:53.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:39:53.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:39:53.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:53.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:39:53.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:39:53.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:39:53.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:39:53.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:39:53.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:53.794 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:39:53.794 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:39:53.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:39:53.795 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:39:53.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:53.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:39:53.799 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:39:53.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:39:53.799 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:53.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:39:53.799 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:39:53.799 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:39:53.800 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:39:53.800 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:53.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:39:53.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:39:53.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:39:53.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:39:53.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:39:53.804 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:39:53.804 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:39:53.804 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:39:53.804 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:39:53.810 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:39:53.810 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:39:53.810 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:39:53.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:39:53.815 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:39:54.293 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:39:54.348 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:39:54.350 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:39:54.351 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:39:54.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:39:54.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:39:54.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:39:54.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:39:54.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:39:54.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:39:54.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:39:54.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:39:54.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:39:54.766 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:39:54.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:54.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:54.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:54.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:55.237 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:39:55.707 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:39:55.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:55.816 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:55.816 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:55.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:56.178 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:39:56.649 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:39:56.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:56.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:56.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:56.819 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:57.119 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:39:57.590 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:39:57.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:57.818 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:57.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:58.061 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:39:58.532 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:39:58.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:39:58.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:39:58.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:39:58.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:39:59.003 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:39:59.473 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:39:59.944 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:40:00.414 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:40:00.886 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:40:01.356 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:40:01.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:40:02.297 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:40:02.768 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:40:03.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:03.125 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:03.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:03.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:03.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:03.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:03.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:03.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:03.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:03.135 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:40:03.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:03.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:03.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:08.139 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:08.139 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:08.139 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:08.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:08.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:08.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:08.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:08.146 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:08.146 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:08.147 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:08.147 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:40:08.149 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:40:08.149 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:40:08.150 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:08.150 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:08.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:08.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:40:08.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:08.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:40:08.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:08.153 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:40:08.154 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:40:08.154 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:08.154 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:08.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:08.155 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:40:08.155 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:08.155 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:40:08.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:08.157 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:40:08.157 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:40:08.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:08.157 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:08.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:08.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:40:08.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:08.158 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:40:08.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:40:08.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:40:08.162 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:40:08.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:08.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:08.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:40:08.645 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:40:08.691 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:08.693 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:40:08.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:08.695 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:40:08.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:08.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:08.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:09.117 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:40:09.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:09.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:09.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:09.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:09.586 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:40:09.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:09.701 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:09.701 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:09.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:09.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:10.054 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:40:10.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:10.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:10.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:10.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:10.527 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:40:11.000 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:40:11.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:11.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:11.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:11.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:11.471 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:40:11.943 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:40:12.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:12.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:12.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:12.171 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:12.413 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:40:12.886 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:40:13.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:13.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:13.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:13.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:13.354 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:40:13.826 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:40:14.296 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:40:14.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:40:15.237 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:40:15.708 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:40:16.180 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:40:16.650 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:40:17.121 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:40:17.592 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:40:18.063 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:40:18.533 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:40:19.004 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:40:19.477 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:40:19.950 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:40:20.422 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:40:20.896 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:40:21.368 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:40:21.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:21.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:21.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:21.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:21.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:21.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:21.482 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:21.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:21.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:21.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:21.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:21.483 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:40:21.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:26.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:26.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:26.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:26.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:26.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:26.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:26.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:26.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:26.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:26.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:26.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:40:26.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:40:26.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:40:26.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:26.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:26.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:26.508 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:40:26.508 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:26.508 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:40:26.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:26.510 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:40:26.510 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:40:26.510 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:26.510 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:26.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:26.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:40:26.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:26.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:40:26.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:26.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:40:26.513 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:40:26.513 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:26.513 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:26.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:26.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:40:26.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:26.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:40:26.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.517 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:40:26.517 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:40:26.517 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:40:26.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:26.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:26.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:40:27.000 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:40:27.044 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:27.046 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:40:27.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:27.048 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:40:27.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:27.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:27.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:27.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:27.053 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:27.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:27.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:27.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:27.472 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:40:27.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:27.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:27.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:27.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:27.943 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:40:28.090 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:28.414 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:40:28.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:28.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:28.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:28.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:28.616 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:28.888 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:40:29.132 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:29.360 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:40:29.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:29.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:29.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:29.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:29.832 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:40:30.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:40:30.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:30.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:30.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:30.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:30.778 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:40:31.153 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:31.250 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:40:31.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:31.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:31.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:31.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:31.687 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:31.721 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:40:32.195 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:40:32.203 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:32.667 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:40:32.726 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:33.139 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:40:33.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:40:34.084 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:40:34.556 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:40:34.732 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:35.027 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:40:35.499 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:40:35.972 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:40:36.445 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:40:36.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:36.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:36.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:36.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:36.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:36.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:36.780 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:40:41.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:41.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:41.786 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:41.786 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:41.786 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:41.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:41.794 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:41.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:41.795 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:41.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:41.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:40:41.797 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:40:41.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:40:41.798 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:41.798 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:41.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:41.799 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:40:41.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:41.799 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:40:41.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:41.800 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:40:41.800 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:40:41.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:41.801 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:41.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:41.801 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:40:41.801 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:41.801 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:40:41.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:41.803 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:41.803 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:40:41.803 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:40:41.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:40:41.806 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:40:41.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:41.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:41.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:40:42.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:40:42.334 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:42.336 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:40:42.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.339 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:40:42.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:42.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.359 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:42.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:42.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:42.391 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.392 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:42.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:42.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:42.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:42.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:42.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.735 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.735 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.735 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:42.735 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:42.759 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:40:42.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:42.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.769 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:42.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:42.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:42.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:42.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:42.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:42.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:42.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:42.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:42.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:42.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.231 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:40:43.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.299 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.299 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.323 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.323 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.346 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.346 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.370 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.370 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.370 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.393 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:43.414 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.437 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.473 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:43.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.529 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.529 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.531 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.531 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.531 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.531 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.591 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.591 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.696 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:40:43.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:43.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:43.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:43.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:43.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:43.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:43.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:43.809 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:43.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:43.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:43.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:43.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:43.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:43.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:43.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.051 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:44.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.053 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.053 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:44.053 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:44.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:44.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.166 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:40:44.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:44.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.306 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:44.306 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:44.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:44.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:44.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:44.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:44.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:44.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.639 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:40:44.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:44.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:44.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:44.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:44.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:44.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:44.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:44.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:44.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:44.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:44.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:44.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:44.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.831 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:44.831 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:44.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:44.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:44.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:44.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:44.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:45.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:45.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:45.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:45.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:45.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:45.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:45.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:45.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:45.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:45.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:45.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:45.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:45.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:45.088 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:40:45.088 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:45.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:45.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:45.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:45.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:45.089 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:45.089 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:45.089 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:45.089 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=711 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:50.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:50.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:50.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:50.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:50.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:50.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:50.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:50.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:50.100 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:50.100 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:50.100 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:40:50.106 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:40:50.106 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:40:50.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:50.107 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:50.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:50.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:40:50.108 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:50.108 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:40:50.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:50.111 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:40:50.111 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:40:50.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:50.111 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:50.112 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:50.112 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:40:50.112 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:50.112 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:40:50.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:50.115 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:50.115 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:40:50.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:40:50.119 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:40:50.119 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:40:50.119 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.119 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:50.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:50.124 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:40:50.603 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:40:50.646 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:40:50.647 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:40:50.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:50.648 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:40:50.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:50.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:50.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:40:50.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:50.666 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:50.666 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:50.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:40:50.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:40:50.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 01:40:50.705 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:40:50.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:40:50.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:50.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:40:50.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:40:51.075 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:40:51.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:51.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:51.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:51.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:51.547 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:40:52.020 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:40:52.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:52.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:52.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:52.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:52.493 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:40:52.764 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:40:52.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:40:52.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:52.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:52.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:52.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:52.769 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:52.769 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:52.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:52.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:52.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:52.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:52.770 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:40:52.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:52.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:52.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:52.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:52.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:40:57.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:57.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:57.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:57.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:57.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:57.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:57.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:57.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:57.784 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:57.785 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:40:57.785 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:40:57.788 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:40:57.789 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:40:57.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:57.789 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:57.790 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:57.790 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:40:57.790 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:40:57.790 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:40:57.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:40:57.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:40:57.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:40:57.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:57.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:57.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:57.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:40:57.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:40:57.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:40:57.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:40:57.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:40:57.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:40:57.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:57.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:40:57.800 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:40:57.800 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:40:57.800 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:40:57.800 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:40:57.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:40:57.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:40:57.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:40:57.808 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:40:57.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:40:57.810 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.810 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.810 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:40:57.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:40:57.811 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:40:57.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:40:57.812 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.819 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:02.819 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:02.819 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:02.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:02.819 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:02.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:02.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:02.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:02.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:02.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:02.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:41:02.833 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:41:02.833 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:41:02.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:02.834 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:02.834 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:41:02.834 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:02.834 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:41:02.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:02.837 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:41:02.837 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:41:02.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:02.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:02.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:02.838 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:41:02.838 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:02.838 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:41:02.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:02.839 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:41:02.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:41:02.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:02.840 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:02.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:02.840 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:41:02.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:02.840 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:41:02.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:41:02.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:41:02.843 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:41:02.844 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:02.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:41:03.323 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:41:03.374 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:41:03.376 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:41:03.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:41:03.378 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:41:03.795 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:41:03.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:03.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:04.269 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:41:04.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:41:04.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:04.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:04.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:04.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:05.213 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:41:05.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:41:05.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:05.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:05.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:05.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:06.160 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:41:06.634 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:41:06.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:06.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:06.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:06.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:07.106 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:41:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:41:07.871 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:07.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:07.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:07.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:08.049 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:41:08.524 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:41:08.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:08.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:08.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:08.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:08.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:08.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:08.863 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:08.863 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:08.863 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:08.863 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:08.863 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:41:13.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:13.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:13.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:13.870 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:13.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:13.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:13.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:13.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:13.878 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:13.878 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:13.878 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:41:13.881 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:41:13.881 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:41:13.882 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:13.882 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:13.882 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:13.882 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:41:13.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:13.883 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:41:13.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:13.884 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:13.884 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:41:13.884 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:13.886 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:13.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:41:13.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:41:13.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:41:13.889 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:41:13.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:13.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:13.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:41:14.372 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:41:14.404 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:41:14.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:41:14.406 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:41:14.408 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:41:14.844 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:41:14.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:14.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:14.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:14.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:15.319 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:41:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:41:15.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:15.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:15.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:15.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:16.265 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:41:16.737 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:41:16.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:16.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:16.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:16.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:17.209 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:41:17.683 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:41:17.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:17.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:17.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:17.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:18.155 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:41:18.627 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:41:18.897 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:18.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:18.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:18.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:19.102 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:41:19.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:19.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:19.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:19.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:19.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:19.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:19.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:19.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:19.424 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:41:19.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:19.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:19.424 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:19.424 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:19.424 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:19.424 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:19.425 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:19.425 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:19.425 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1193 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:24.426 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:24.426 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:24.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:24.427 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:24.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:24.427 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:24.434 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:24.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:24.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:24.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:24.436 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:41:24.439 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:41:24.439 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:41:24.440 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:24.440 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:24.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:24.440 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:41:24.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:24.441 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:41:24.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:24.442 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:41:24.442 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:41:24.442 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:24.442 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:24.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:24.443 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:41:24.443 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:24.443 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:41:24.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:24.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:41:24.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:41:24.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:24.445 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:24.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:24.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:41:24.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:24.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:41:24.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:24.447 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:41:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:41:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:41:24.447 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:41:24.447 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:41:24.448 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:41:24.448 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:41:24.448 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:24.448 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:24.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:24.449 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:24.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.457 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:29.457 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:29.457 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:29.457 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:29.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:29.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:29.465 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:29.466 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:29.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:29.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:29.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:41:29.471 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:41:29.472 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:41:29.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:29.472 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:29.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:29.472 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:41:29.473 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:29.473 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:41:29.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:29.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:41:29.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:41:29.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:29.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:29.477 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:29.477 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:41:29.478 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:29.478 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:41:29.478 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:29.479 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:41:29.479 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:41:29.479 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:29.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:29.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:29.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:41:29.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:29.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:41:29.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:41:29.484 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:41:29.484 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:41:29.484 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:29.488 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:41:29.965 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:41:30.010 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:41:30.013 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:41:30.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:41:30.014 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:41:30.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:41:30.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:41:30.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:41:30.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:41:30.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:30.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:30.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:30.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:30.913 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:41:31.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:41:31.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:41:31.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:41:31.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:41:31.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:41:31.385 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:41:31.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:31.488 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:31.488 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:31.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:31.856 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:41:32.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:41:32.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:32.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:32.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:32.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:32.797 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:41:33.268 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:41:33.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:33.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:33.738 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:41:34.209 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:41:34.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:34.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:34.681 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:41:35.151 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:41:35.622 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:41:36.093 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:41:36.563 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:41:37.035 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:41:37.504 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:41:37.975 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:41:38.446 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:41:38.918 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:41:39.388 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:41:39.858 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:41:40.330 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:41:40.801 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:41:41.274 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:41:41.746 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:41:42.218 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:41:42.689 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:41:43.163 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:41:43.635 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:41:44.107 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:41:44.578 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:41:44.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:41:44.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:41:44.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:44.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:44.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:44.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:44.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:44.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:44.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:44.774 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:41:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:44.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:49.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:49.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:49.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:49.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:49.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:49.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:49.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:49.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:49.792 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:49.792 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:41:49.792 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:41:49.795 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:41:49.795 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:41:49.795 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:49.795 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:49.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:49.796 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:41:49.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:41:49.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:41:49.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:49.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:41:49.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:41:49.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:49.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:41:49.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:41:49.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.804 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:41:49.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:41:49.805 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:41:49.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:41:49.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:41:50.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:41:50.328 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:41:50.331 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:41:50.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:41:50.332 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:41:50.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:41:50.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:41:50.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:41:50.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:41:50.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:41:50.360 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:41:50.360 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:41:50.360 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:41:50.376 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:41:50.379 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:41:50.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:41:50.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:41:50.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:41:50.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:41:50.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:41:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:41:50.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:50.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:50.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:50.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:51.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:41:51.700 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:41:51.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:51.808 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:51.808 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:51.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:52.173 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:41:52.645 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:41:52.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:52.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:52.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:52.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:53.119 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:41:53.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:41:53.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:53.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:53.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:53.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:54.064 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:41:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:41:54.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:54.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:54.811 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:54.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:55.005 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:41:55.479 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:41:55.952 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:41:56.424 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:41:56.898 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:41:57.370 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:41:57.842 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:41:58.316 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:41:58.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:41:58.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:41:58.393 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:41:58.393 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:41:58.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:41:58.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:41:58.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:41:58.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:41:58.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:41:58.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:41:58.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:41:58.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:41:58.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:41:58.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:41:58.405 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:41:58.405 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:58.405 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:58.405 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:41:58.405 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:03.410 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:42:03.410 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:42:03.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:03.410 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:03.410 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:03.410 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:03.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:03.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:42:03.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:03.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:42:03.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:42:03.427 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:42:03.427 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:42:03.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:42:03.428 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:03.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:03.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:42:03.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:42:03.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:42:03.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:03.432 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:42:03.432 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:42:03.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:42:03.432 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:03.432 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:03.432 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:42:03.433 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:42:03.433 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:42:03.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:03.435 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:42:03.436 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:42:03.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:42:03.436 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:03.436 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:03.436 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:42:03.436 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:42:03.436 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:42:03.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:03.439 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:42:03.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:42:03.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:42:03.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:42:03.440 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:42:03.440 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:42:03.440 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.440 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:03.441 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:03.445 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:42:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:42:03.975 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:03.977 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:03.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:03.981 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:42:04.005 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:04.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:04.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:42:04.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:04.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:04.012 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:04.013 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:42:04.013 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:42:04.060 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:04.064 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:04.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:04.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:04.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:04.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:04.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:04.395 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:42:04.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:04.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:04.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:04.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:04.868 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:42:05.341 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:42:05.444 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:05.444 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:05.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:05.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:05.813 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:42:06.287 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:42:06.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:06.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:06.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:06.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:06.759 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:42:07.232 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:42:07.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:07.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:07.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:07.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:07.703 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:42:08.177 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:42:08.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:08.447 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:08.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:08.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:08.649 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:42:09.120 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:42:09.594 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:42:10.066 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:42:10.537 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:42:11.011 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:42:11.483 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:42:11.956 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:42:12.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:12.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:12.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:12.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:12.099 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:12.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:12.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:12.102 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:12.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:12.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:12.102 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:42:12.102 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:42:12.102 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:42:12.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1870 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:12.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1870 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:12.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1870 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:12.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1870 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:12.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1870 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:12.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1870 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:17.106 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:42:17.106 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:42:17.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:17.106 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:17.106 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:17.106 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:17.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:17.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:42:17.115 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:17.115 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:42:17.115 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:42:17.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:42:17.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:42:17.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:42:17.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:17.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:17.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:42:17.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:42:17.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:42:17.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:42:17.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:42:17.120 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:42:17.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:42:17.122 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:42:17.122 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:42:17.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:42:17.125 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:42:17.125 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:42:17.125 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:17.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:17.129 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:42:17.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:42:17.645 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:17.646 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:17.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:17.648 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:42:17.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:17.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:17.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:42:17.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:17.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:17.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:17.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:42:17.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:42:17.699 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:17.702 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:17.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:17.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:17.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:17.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:17.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:18.079 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:42:18.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:18.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:18.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:18.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:18.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:42:19.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:42:19.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:19.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:19.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:19.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:19.495 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:42:19.967 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:42:20.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:20.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:20.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:20.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:20.439 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:42:20.910 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:42:21.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:21.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:21.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:21.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:21.381 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:42:21.855 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:42:22.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:22.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:22.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:22.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:22.327 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:42:22.799 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:42:23.270 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:42:23.743 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:42:24.216 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:42:24.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:42:25.159 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:42:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:42:25.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:25.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:25.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:25.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:25.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:25.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:25.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:42:25.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:25.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:25.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:25.744 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:42:25.744 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:42:25.765 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:25.768 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:25.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:25.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:25.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:25.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:25.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:26.100 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:42:26.572 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:42:27.045 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:42:27.518 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:42:27.989 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:42:28.462 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:42:28.935 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:42:29.407 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:42:29.881 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:42:30.353 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:42:30.826 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:42:31.300 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:42:31.773 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:42:32.246 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:42:32.718 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:42:33.191 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:42:33.661 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:42:33.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:33.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:33.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:33.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:33.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:33.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:33.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:33.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:33.795 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:33.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:33.795 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:42:33.795 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:42:33.795 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:42:33.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:33.795 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:33.795 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:38.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:42:38.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:42:38.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:38.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:38.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:38.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:38.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:38.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:42:38.811 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:38.811 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:42:38.811 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:42:38.816 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:42:38.816 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:42:38.816 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:42:38.816 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:38.817 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:38.817 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:42:38.817 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:42:38.817 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:42:38.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:42:38.819 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:42:38.819 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:42:38.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:38.821 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:42:38.822 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:42:38.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:42:38.822 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:42:38.822 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:38.822 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:42:38.822 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:42:38.822 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:42:38.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:38.824 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:42:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:42:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:42:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:42:38.824 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:42:38.824 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:42:38.825 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:42:38.825 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:42:38.825 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.825 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:42:38.830 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:42:39.307 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:42:39.351 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:39.353 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:39.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:39.355 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:42:39.370 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:39.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:39.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:42:39.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:39.376 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:39.376 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:39.376 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:42:39.376 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:42:39.399 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:39.403 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:39.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:39.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:39.415 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:39.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:39.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:39.779 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:42:39.828 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:39.828 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:39.828 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:39.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:40.251 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:42:40.721 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:42:40.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:40.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:40.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:40.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:41.192 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:42:41.666 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:42:41.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:41.831 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:41.831 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:41.831 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:42.138 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:42:42.611 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:42:42.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:42.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:42.832 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:42.832 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:43.084 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:42:43.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:42:43.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:44.029 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:42:44.503 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:42:44.975 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:42:45.447 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:42:45.918 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:42:46.392 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:42:46.864 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:42:47.336 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:42:47.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:47.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:47.421 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:47.421 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:47.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:47.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:47.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:42:47.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:47.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:47.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:47.444 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:42:47.444 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:42:47.473 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:42:47.478 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:42:47.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:47.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:42:47.491 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:42:47.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:47.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:47.807 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:42:48.278 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:42:48.751 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:42:49.224 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:42:49.696 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:42:50.167 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:42:50.638 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:42:51.109 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:42:51.582 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:42:52.055 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:42:52.526 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:42:52.999 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:42:53.472 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:42:53.944 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:42:54.415 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:42:54.889 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:42:55.360 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:42:55.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:42:55.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:42:55.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:42:55.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:42:55.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:42:55.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:42:55.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:42:55.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:42:55.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:42:55.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:42:55.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:42:55.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:42:55.515 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:42:55.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:42:55.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:42:55.515 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:55.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:55.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:55.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:55.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:55.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:42:55.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3605 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:00.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:43:00.517 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:43:00.517 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:00.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:00.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:00.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:00.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:00.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:43:00.527 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:00.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:43:00.528 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:43:00.534 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:43:00.534 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:43:00.535 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:43:00.535 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:00.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:00.536 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:43:00.536 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:43:00.537 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:43:00.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:00.539 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:43:00.540 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:43:00.540 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:43:00.540 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:00.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:00.541 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:43:00.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:43:00.541 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:43:00.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:00.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:43:00.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:43:00.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:43:00.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:00.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:00.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:43:00.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:43:00.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:43:00.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:00.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:43:00.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:43:00.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:43:00.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:43:00.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:43:00.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:43:00.549 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:43:00.549 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:43:00.549 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:00.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:00.554 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:43:01.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:43:01.075 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:01.078 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:01.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:01.080 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:43:01.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:01.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:01.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:01.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:01.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:01.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:01.119 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:01.119 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:01.169 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:01.173 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:01.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:01.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:01.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:01.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:01.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:01.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:43:01.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:01.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:01.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:01.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:01.699 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:01.699 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:01.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:01.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:01.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:01.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:01.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:01.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:01.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:43:01.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:43:01.705 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:43:01.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:01.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:06.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:43:06.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:43:06.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:06.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:06.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:06.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:06.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:06.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:43:06.720 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:06.720 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:43:06.720 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:43:06.724 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:43:06.724 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:43:06.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:43:06.725 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:06.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:06.725 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:43:06.725 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:43:06.725 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:43:06.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:06.729 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:43:06.729 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:43:06.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:43:06.729 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:06.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:06.730 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:43:06.730 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:43:06.730 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:43:06.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:06.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:43:06.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:43:06.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:43:06.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:06.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:06.734 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:43:06.734 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:43:06.734 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:43:06.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:43:06.740 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:43:06.740 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:43:06.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:06.745 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:43:07.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:43:07.266 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:07.268 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:07.270 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:43:07.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:07.295 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:07.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:07.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:07.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:07.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:07.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:07.303 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:07.303 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:07.316 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:07.321 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:07.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:07.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:07.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:07.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:07.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:07.695 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:43:07.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:07.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:07.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:07.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:08.166 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:43:08.639 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:43:08.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:08.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:08.745 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:08.745 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:09.112 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:43:09.585 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:43:09.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:10.059 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:43:10.531 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:43:10.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:10.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:10.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:10.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:11.002 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:43:11.475 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:43:11.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:11.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:11.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:11.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:11.948 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:43:12.421 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:43:12.894 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:43:13.367 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:43:13.839 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:43:14.310 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:43:14.781 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:43:15.254 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:43:15.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:15.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:15.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:15.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:15.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:15.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:15.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:15.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:15.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:15.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:15.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:15.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:15.388 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:15.392 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:15.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:15.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:15.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:15.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:15.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:15.726 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:43:16.199 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:43:16.669 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:43:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:43:17.614 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:43:18.087 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:43:18.559 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:43:19.033 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:43:19.505 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:43:19.977 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:43:20.451 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:43:20.923 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:43:21.395 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:43:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:43:22.340 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:43:22.813 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:43:23.285 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:43:23.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:23.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:23.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:23.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:23.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:23.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:23.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:23.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:23.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:23.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:23.428 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:23.428 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:23.468 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:23.473 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:23.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:23.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:23.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:23.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:23.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:23.759 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:43:24.232 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:43:24.704 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:43:25.178 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:43:25.650 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:43:26.123 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:43:26.594 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:43:27.064 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:43:27.535 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:43:28.006 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:43:28.479 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:43:28.952 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:43:29.424 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:43:29.898 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:43:30.370 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:43:30.843 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:43:31.314 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:43:31.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:31.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:31.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:31.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:31.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:31.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:31.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:31.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:31.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:31.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:31.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:31.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:31.546 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:31.550 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:31.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:31.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:31.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:31.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:31.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:31.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:31.784 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:43:32.257 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:43:32.731 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:43:33.203 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:43:33.677 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:43:34.149 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:43:34.622 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:43:35.095 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:43:35.568 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:43:36.040 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:43:36.514 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:43:36.987 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:43:37.459 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:43:37.930 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:43:38.403 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:43:38.876 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:43:39.348 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:43:39.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:39.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:39.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:39.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:39.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:39.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:39.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:39.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:39.578 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:39.578 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:39.578 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:43:39.578 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:43:39.578 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:43:39.578 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:39.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:39.578 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7090 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:43:44.584 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:43:44.584 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:43:44.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:44.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:44.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:44.585 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:44.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:43:44.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:43:44.593 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:44.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:43:44.594 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:43:44.596 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:43:44.596 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:43:44.596 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:43:44.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:44.597 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:43:44.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:43:44.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:43:44.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:43:44.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:44.599 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:43:44.599 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:43:44.599 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:43:44.599 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:44.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:43:44.599 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:43:44.600 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:43:44.600 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:43:44.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:43:44.601 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:43:44.601 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:43:44.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:43:44.604 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:43:44.604 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:43:44.604 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.604 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:43:44.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:43:44.609 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:43:45.087 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:43:45.129 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:45.131 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:45.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:45.133 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:43:45.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:45.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:45.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:45.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:45.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:45.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:45.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:45.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:45.178 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:45.181 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:45.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:45.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:45.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:45.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:45.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:45.559 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:43:45.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:45.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:45.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:45.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:46.031 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:43:46.501 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:43:46.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:46.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:46.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:46.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:46.972 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:43:47.446 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:43:47.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:47.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:47.609 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:47.609 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:47.918 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:43:48.391 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:43:48.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:48.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:48.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:48.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:48.864 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:43:49.336 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:43:49.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:43:49.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:43:49.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:43:49.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:43:49.808 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:43:50.280 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:43:50.753 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:43:51.225 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:43:51.697 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:43:52.167 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:43:52.638 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:43:53.109 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:43:53.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:53.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:53.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:53.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:53.214 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:43:53.214 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:43:53.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:43:53.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:53.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:53.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:53.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:43:53.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:43:53.246 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:43:53.249 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:43:53.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:43:53.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:43:53.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:43:53.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:53.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:43:53.582 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:43:54.055 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:43:54.527 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:43:54.998 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:43:55.468 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:43:55.939 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:43:56.410 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:43:56.881 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:43:57.351 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:43:57.822 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:43:58.296 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:43:58.768 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:43:59.240 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:43:59.711 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:44:00.185 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:44:00.657 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:44:01.130 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:44:01.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:01.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:01.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:01.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:01.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:01.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:01.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:01.272 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:44:01.272 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:44:01.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:44:01.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:44:01.272 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:44:01.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:44:01.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:01.273 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3603 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:44:06.277 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:44:06.283 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:44:06.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:44:06.283 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:44:06.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:44:06.283 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:44:06.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:44:06.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:44:06.286 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:06.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:44:06.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:44:06.290 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:44:06.290 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:44:06.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:44:06.291 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:06.291 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:44:06.291 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:44:06.291 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:44:06.291 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:44:06.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:06.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:44:06.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:44:06.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:44:06.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:06.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:44:06.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:44:06.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:44:06.295 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:44:06.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:06.298 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:44:06.298 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:44:06.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:44:06.298 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:06.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:44:06.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:44:06.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:44:06.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:44:06.299 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:44:06.302 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:44:06.303 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:44:06.303 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:44:06.303 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:06.308 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:44:06.786 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:44:06.825 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:06.827 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:06.828 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:44:06.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:06.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:06.847 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:06.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:44:06.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:06.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:06.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:06.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:44:06.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:44:06.878 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:06.882 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:06.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:06.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:06.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:06.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:06.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:07.258 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:44:07.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:07.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:07.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:07.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:07.730 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:44:08.203 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:44:08.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:08.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:08.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:08.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:08.676 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:44:09.147 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:44:09.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:09.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:09.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:09.308 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:09.619 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:44:10.092 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:44:10.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:10.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:10.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:10.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:10.565 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:44:11.037 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:44:11.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:11.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:11.310 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:11.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:11.508 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:44:11.981 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:44:12.454 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:44:12.926 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:44:13.397 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:44:13.870 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:44:14.343 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:44:14.815 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:44:14.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:14.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:14.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:14.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:14.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:14.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:14.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:44:14.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:14.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:14.915 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:14.915 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:44:14.915 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:44:14.951 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:14.955 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:14.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:14.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:14.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:14.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:14.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:15.288 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:44:15.761 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:44:16.233 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:44:16.707 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:44:17.179 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:44:17.651 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:44:18.122 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:44:18.596 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:44:19.068 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:44:19.540 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:44:20.011 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:44:20.484 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:44:20.956 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:44:21.428 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:44:21.899 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:44:22.373 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:44:22.845 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:44:22.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:22.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:22.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:22.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:22.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:22.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:22.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:44:22.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:22.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:22.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:22.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:44:22.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:44:23.029 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:23.032 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:23.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:23.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:23.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:23.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:23.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:23.317 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:44:23.788 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:44:24.262 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:44:24.734 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:44:25.206 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:44:25.680 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:44:26.152 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:44:26.625 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:44:27.098 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:44:27.570 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:44:28.042 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:44:28.513 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:44:28.987 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:44:29.459 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:44:29.932 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:44:30.402 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:44:30.876 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:44:31.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:31.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:31.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:31.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:31.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:31.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:31.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:44:31.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:31.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:31.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:31.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:44:31.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:44:31.106 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:31.110 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:31.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:31.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:31.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:31.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:31.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:31.348 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:44:31.820 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:44:32.291 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:44:32.764 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:44:33.237 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:44:33.709 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:44:34.180 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:44:34.654 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:44:35.126 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:44:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:44:36.072 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:44:36.544 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:44:37.016 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:44:37.487 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:44:37.960 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:44:38.433 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:44:38.905 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:44:39.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:39.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:39.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:39.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:39.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:39.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:39.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:39.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:39.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:44:39.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:44:39.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:44:39.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:44:39.131 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:44:39.131 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:44:39.131 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:44:44.138 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:44:44.138 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:44:44.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:44:44.138 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:44:44.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:44:44.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:44:44.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:44:44.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:44:44.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:44.149 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:44:44.149 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:44:44.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:44:44.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:44:44.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:44:44.153 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:44.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:44:44.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:44:44.154 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:44:44.154 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:44:44.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:44.155 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:44:44.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:44:44.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:44:44.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:44.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:44:44.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:44:44.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:44:44.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:44:44.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:44.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:44:44.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:44:44.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:44:44.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:44:44.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:44:44.159 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:44:44.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:44:44.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:44:44.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:44.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:44:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:44:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:44:44.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:44:44.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:44:44.162 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:44:44.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:44:44.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:44:44.646 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:44:44.686 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:44.688 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:44.691 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:44:44.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:44.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:44.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:44.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:44:44.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:44.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:44.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:44.715 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:44:44.715 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:44:44.738 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:44.741 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:44.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:44.752 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:44.752 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:44.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:45.116 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:44:45.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:45.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:45.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:45.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:45.589 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:44:46.061 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:44:46.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:46.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:46.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:46.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:46.535 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:44:47.007 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:44:47.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:47.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:47.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:47.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:47.479 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:44:47.950 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:44:48.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:48.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:48.167 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:48.167 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:48.423 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:44:48.895 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:44:49.167 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:44:49.167 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:44:49.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:44:49.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:44:49.368 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:44:49.839 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:44:50.312 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:44:50.784 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:44:51.256 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:44:51.727 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:44:52.201 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:44:52.673 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:44:52.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:52.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:52.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:52.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:52.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:44:52.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:44:52.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:44:52.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:52.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:52.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:52.778 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:44:52.778 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:44:52.811 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:44:52.815 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:44:52.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:44:52.826 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:44:52.826 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:44:52.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:52.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:44:53.145 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:44:53.616 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:44:54.089 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:44:54.562 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:44:55.034 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:44:55.505 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:44:55.978 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:44:56.451 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:44:56.922 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:44:57.394 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:44:57.865 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:44:58.338 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:44:58.810 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:44:59.282 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:44:59.753 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:45:00.227 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:45:00.699 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:45:00.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:00.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:00.832 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:00.832 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:00.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:00.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:00.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:00.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:00.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:00.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:00.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:00.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:00.884 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:00.889 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:00.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:00.899 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:00.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:00.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:00.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:01.171 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:45:01.643 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:45:02.116 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:45:02.588 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:45:03.060 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:45:03.531 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:45:04.005 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:45:04.477 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:45:04.949 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:45:05.420 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:45:05.894 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:45:06.366 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:45:06.838 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:45:07.309 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:45:07.783 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:45:08.255 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:45:08.727 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:45:08.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:08.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:08.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:08.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:08.924 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:08.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:08.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:08.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:08.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:08.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:08.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:08.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:08.961 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:08.965 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:08.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:08.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:08.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:08.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:08.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:09.198 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:45:09.669 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:45:10.142 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:45:10.614 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:45:11.086 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:45:11.560 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:45:12.032 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:45:12.504 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:45:12.975 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:45:13.448 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:45:13.921 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:45:14.393 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:45:14.863 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:45:15.334 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:45:15.808 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:45:16.280 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:45:16.752 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:45:16.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:16.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:16.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:16.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:16.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:16.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:16.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:17.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:17.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:17.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:17.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:17.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:17.032 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:17.036 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:17.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:17.046 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:17.047 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:17.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:17.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:17.223 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:45:17.694 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:45:18.165 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:45:18.639 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 01:45:19.111 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 01:45:19.583 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 01:45:20.053 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 01:45:20.525 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 01:45:20.998 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 01:45:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 01:45:21.942 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 01:45:22.413 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 01:45:22.887 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 01:45:23.359 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 01:45:23.830 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 01:45:24.302 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 01:45:24.775 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 01:45:25.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:25.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:25.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:25.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:25.071 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:25.071 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:25.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:25.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:25.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:25.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:25.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:25.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:25.099 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:25.102 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:25.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:25.109 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:25.109 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:25.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:25.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:25.247 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 01:45:25.719 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 01:45:26.193 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 01:45:26.664 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 01:45:27.136 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 01:45:27.608 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 01:45:28.081 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 01:45:28.553 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 01:45:29.025 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 01:45:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 01:45:29.970 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 01:45:30.442 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 01:45:30.914 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 01:45:31.385 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 01:45:31.859 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 01:45:32.331 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 01:45:32.803 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 01:45:33.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:33.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:33.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:33.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:33.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:33.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:33.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:33.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:33.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:33.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:33.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:33.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:33.175 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:33.179 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:33.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:33.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:33.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:33.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:33.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:33.273 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 01:45:33.745 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 01:45:34.218 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 01:45:34.691 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 01:45:35.163 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 01:45:35.634 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 01:45:36.104 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 01:45:36.578 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 01:45:37.050 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 01:45:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 01:45:37.993 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 01:45:38.464 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 01:45:38.937 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 01:45:39.409 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 01:45:39.881 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 01:45:40.353 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 01:45:40.826 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 01:45:41.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:41.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:41.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:41.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:41.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:41.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:41.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:41.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:41.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:41.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:41.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:41.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:41.240 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:41.243 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:41.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:41.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:41.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:41.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:41.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:41.298 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 01:45:41.770 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 01:45:42.241 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 01:45:42.715 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 01:45:43.187 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 01:45:43.659 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 01:45:44.130 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 01:45:44.603 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 01:45:45.075 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 01:45:45.548 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 01:45:46.018 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 01:45:46.489 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 01:45:46.963 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 01:45:47.435 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 01:45:47.908 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 01:45:48.379 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 01:45:48.851 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 01:45:49.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:49.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:49.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:49.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:49.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:49.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:49.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:49.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:49.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:45:49.267 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:45:49.267 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:45:49.267 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:45:49.267 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:45:49.267 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:45:49.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:45:54.278 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:45:54.278 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:45:54.278 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:45:54.279 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:45:54.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:45:54.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:45:54.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:45:54.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:45:54.287 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:45:54.287 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:45:54.287 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:45:54.289 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:45:54.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:45:54.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:45:54.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:45:54.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:45:54.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:45:54.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:45:54.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:45:54.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:45:54.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:45:54.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:45:54.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:45:54.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:45:54.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:45:54.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:45:54.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:45:54.297 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:45:54.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:45:54.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:45:54.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:45:54.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:45:54.820 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:54.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:54.822 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:54.825 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:45:54.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:45:54.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:45:54.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:45:54.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:54.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:54.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:54.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:45:54.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:45:54.874 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:45:54.878 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:45:54.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:45:54.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:45:54.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:45:54.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:54.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:45:55.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:45:55.298 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:55.299 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:55.299 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:55.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:55.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:45:56.194 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:45:56.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:56.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:56.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:56.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:56.668 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:45:57.140 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:45:57.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:57.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:57.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:57.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:45:58.083 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:45:58.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:58.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:58.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:58.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:58.556 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:45:59.029 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:45:59.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:45:59.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:45:59.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:45:59.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:45:59.501 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:45:59.975 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:46:00.448 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:46:00.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:46:01.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:46:01.862 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:46:02.332 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:46:02.806 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:46:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:02.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:02.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:02.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:02.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:02.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:02.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:46:02.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:02.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:02.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:02.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:46:02.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:46:02.940 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:46:02.945 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:46:02.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:02.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:02.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:02.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:02.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:03.278 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:46:03.750 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:46:04.221 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:46:04.692 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:46:05.165 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:46:05.637 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:46:06.110 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:46:06.581 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:46:07.054 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:46:07.527 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:46:07.999 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:46:08.473 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:46:08.945 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:46:09.417 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:46:09.888 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:46:10.362 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:46:10.834 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:46:10.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:10.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:10.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:10.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:10.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:10.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:10.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:10.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:10.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:10.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:10.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:10.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:10.972 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:10.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:10.972 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:46:15.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:15.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:15.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:15.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:15.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:15.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:15.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:15.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:15.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:15.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:15.983 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:46:15.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:46:15.987 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:46:15.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:15.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:15.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:15.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:46:15.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:15.988 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:46:15.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:15.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:46:15.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:46:15.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:15.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:15.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:15.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:46:15.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:15.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:46:15.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:15.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:15.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:46:15.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:15.996 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:46:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:46:15.996 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:46:15.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:46:15.997 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:46:15.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:46:15.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:15.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:15.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:16.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:46:16.481 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:46:16.528 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:46:16.530 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:46:16.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:16.532 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:46:16.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:16.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:16.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:46:16.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:16.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:16.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:16.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:46:16.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:46:16.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:16.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:16.578 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:16.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:16.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:16.953 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:46:17.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:17.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:17.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:17.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:17.427 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:46:17.900 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:46:18.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:18.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:18.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:18.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:18.372 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:46:18.843 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:46:19.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:19.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:19.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:19.313 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:46:19.784 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:46:20.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:20.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:20.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:20.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:20.255 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:46:20.729 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:46:21.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:21.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:21.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:21.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:21.201 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:46:21.674 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:46:22.144 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:46:22.618 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:46:23.090 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:46:23.563 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:46:24.036 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:46:24.509 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:46:24.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:24.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:24.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:24.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:24.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:24.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:24.613 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:46:24.613 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:24.613 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:29.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:29.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:29.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:29.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:29.619 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:29.619 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:29.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:29.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:29.626 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:29.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:29.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:46:29.629 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:46:29.629 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:46:29.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:29.629 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:29.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:29.630 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:46:29.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:29.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:46:29.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:29.631 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:29.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:46:29.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:29.633 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:29.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:46:29.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:29.636 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:46:29.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:46:29.637 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:46:29.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:29.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:29.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:29.642 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:46:30.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:46:30.175 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:46:30.178 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:46:30.180 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:46:30.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:30.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:30.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:30.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:46:30.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:30.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:30.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:30.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:46:30.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:46:30.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:30.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:30.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:30.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:30.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:30.593 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:46:30.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:30.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:30.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:30.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:31.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:46:31.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:46:31.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:31.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:31.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:31.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:32.008 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:46:32.480 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:46:32.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:32.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:32.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:32.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:32.953 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:46:33.427 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:46:33.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:33.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:33.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:33.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:33.899 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:46:34.371 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:46:34.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:34.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:34.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:34.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:34.845 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:46:35.317 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:46:35.790 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:46:36.263 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:46:36.736 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:46:37.207 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:46:37.678 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:46:38.151 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:46:38.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:38.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:38.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:38.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:38.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:38.243 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:38.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:38.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:38.247 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:38.247 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:38.247 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:38.247 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:38.247 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:38.247 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:38.247 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:46:38.247 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1859 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:46:38.247 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1859 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:46:38.247 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1859 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:46:38.247 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1859 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:46:38.247 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1859 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:46:43.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:43.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:43.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:43.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:43.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:43.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:43.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:43.259 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:43.260 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:43.260 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:43.260 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:46:43.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:46:43.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:46:43.262 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:43.262 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:43.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:43.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:46:43.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:43.263 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:46:43.263 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:43.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:46:43.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:46:43.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:43.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:43.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:43.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:46:43.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:43.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:46:43.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:43.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:43.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:46:43.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:46:43.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:46:43.269 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:46:43.269 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:46:43.269 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:43.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:46:43.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:46:43.788 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:46:43.790 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:46:43.791 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:46:43.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:43.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:43.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:43.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:46:43.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:43.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:43.817 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:43.818 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:46:43.818 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:46:44.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:46:44.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:44.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:44.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:44.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:44.698 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:46:45.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:46:45.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:45.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:45.642 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:46:46.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:46:46.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:46.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:46.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:46.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:46.588 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:46:47.061 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:46:47.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:47.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:47.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:47.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:47.534 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:46:48.006 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:46:48.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:48.276 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:48.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:48.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:48.478 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:46:48.952 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:46:49.424 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:46:49.896 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:46:50.367 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:46:50.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:50.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:50.501 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:50.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:50.501 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:50.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:50.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:50.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:50.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:50.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:50.502 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:46:50.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:50.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:55.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:46:55.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:46:55.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:55.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:55.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:55.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:55.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:46:55.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:55.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:55.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:46:55.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:46:55.521 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:46:55.521 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:46:55.521 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:55.521 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:55.522 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:46:55.522 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:46:55.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:46:55.522 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:46:55.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:55.524 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:46:55.524 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:46:55.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:55.526 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:46:55.526 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:46:55.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:46:55.529 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:46:55.529 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:46:55.529 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.529 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:46:55.530 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:46:55.534 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:46:56.011 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:46:56.051 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:46:56.054 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:46:56.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:46:56.056 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:46:56.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:46:56.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:46:56.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:46:56.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:46:56.085 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:46:56.086 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:46:56.086 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:46:56.086 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:46:56.483 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:46:56.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:56.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:56.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:56.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:56.955 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:46:57.428 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:46:57.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:57.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:57.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:57.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:57.900 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:46:58.372 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:46:58.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:58.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:58.534 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:58.534 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:58.843 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:46:59.317 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:46:59.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:46:59.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:46:59.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:46:59.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:46:59.789 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:47:00.261 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:47:00.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:00.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:00.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:00.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:00.732 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:47:00.753 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:00.753 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:00.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:00.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:00.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:00.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:00.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:00.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:00.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:00.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:00.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:00.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:00.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:00.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:00.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:00.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:00.756 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:01.212 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:47:01.692 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:47:02.173 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:47:02.653 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:47:03.134 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:47:03.614 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:47:04.094 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:47:04.575 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:47:05.056 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:47:05.537 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:47:05.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:05.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:05.757 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:47:05.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:05.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:05.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:05.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:05.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:05.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:05.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:05.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:05.766 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:05.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:05.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:05.767 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:05.767 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:47:05.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:05.768 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:05.768 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:47:05.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:05.770 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:05.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:47:05.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:47:05.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:47:05.772 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:47:05.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:05.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:05.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:05.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:05.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:05.775 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:05.775 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:05.775 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:47:10.782 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:10.782 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:10.782 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:10.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:10.782 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:10.782 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:10.789 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:10.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:10.790 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:10.790 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:10.790 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:47:10.792 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:47:10.792 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:47:10.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:10.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:10.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:10.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:47:10.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:10.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:47:10.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:10.795 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:47:10.795 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:47:10.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:10.796 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:10.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:10.796 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:47:10.796 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:10.796 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:47:10.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:10.799 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:47:10.799 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:47:10.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:10.799 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:10.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:10.799 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:47:10.799 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:10.799 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:47:10.800 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:47:10.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:47:10.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:47:10.805 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:47:10.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:10.810 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:47:11.288 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:47:11.341 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:47:11.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:47:11.345 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:47:11.347 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:47:11.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:11.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:11.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:47:11.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:11.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:11.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:11.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:47:11.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:47:11.761 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:47:11.809 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:11.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:11.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:11.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:12.232 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:47:12.705 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:47:12.811 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:12.811 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:12.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:13.177 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:47:13.649 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:47:13.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:13.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:13.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:13.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:14.120 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:47:14.594 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:47:14.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:14.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:14.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:14.815 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:15.066 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:47:15.538 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:47:15.815 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:15.815 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:15.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:15.816 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:16.009 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:47:16.483 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:47:16.955 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:47:17.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:17.426 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:47:17.900 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:47:18.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:18.372 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:47:18.844 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:47:19.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:19.315 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:47:19.788 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:47:20.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:20.261 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:47:20.733 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:47:21.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:21.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:21.205 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:47:21.679 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:47:22.151 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:47:22.625 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:47:23.097 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:47:23.569 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:47:24.044 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:47:24.516 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:47:24.992 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:47:25.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:25.464 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:47:25.935 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:47:26.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:26.408 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:47:26.881 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:47:27.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:27.352 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:47:27.824 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:47:28.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:28.297 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:47:28.769 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:47:29.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:29.241 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:47:29.712 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:47:30.038 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:30.183 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:47:30.654 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:47:31.127 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:47:31.600 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:47:32.072 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:47:32.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:32.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:32.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:32.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:32.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:32.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:32.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:32.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:32.207 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:32.207 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:32.207 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:47:32.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:32.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:37.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:37.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:37.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:37.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:37.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:37.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:37.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:37.217 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:37.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:37.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:37.218 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:47:37.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:47:37.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:47:37.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:37.219 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:37.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:37.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:47:37.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:37.219 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:47:37.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:37.220 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:37.220 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:47:37.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:37.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:37.221 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:47:37.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:47:37.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:47:37.223 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:47:37.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:37.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:37.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:47:37.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:47:37.749 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:47:37.751 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:47:37.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:47:37.754 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:47:37.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:37.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:37.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:47:37.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:37.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:37.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:37.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:47:37.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:47:37.799 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:47:37.802 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:47:37.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 01:47:37.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:37.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:37.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:37.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:38.179 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:47:38.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:38.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:38.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:38.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:38.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 01:47:38.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:38.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:38.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:38.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:38.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:38.624 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:38.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:38.629 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:38.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:38.629 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:38.629 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:38.629 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:38.629 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:38.629 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:38.630 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:47:43.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:43.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:43.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:43.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:43.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:43.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:43.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:43.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:43.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:43.642 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:43.642 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:47:43.647 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:47:43.647 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:47:43.647 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:43.647 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:43.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:43.648 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:47:43.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:43.648 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:47:43.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:43.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:47:43.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:47:43.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:43.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:43.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:43.653 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:47:43.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:43.653 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:47:43.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:43.656 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:47:43.657 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:47:43.657 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:43.657 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:43.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:43.657 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:47:43.657 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:43.657 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:47:43.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:43.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:47:43.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:47:43.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:47:43.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:47:43.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:47:43.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:47:43.664 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:47:43.665 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:43.669 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:47:44.147 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:47:44.201 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:47:44.204 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:47:44.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:47:44.206 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:47:44.221 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:44.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:44.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:47:44.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:44.224 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:44.225 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:44.225 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:47:44.225 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:47:44.239 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:47:44.243 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:47:44.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 01:47:44.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:44.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:44.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:44.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:44.620 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:47:44.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:44.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:44.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:44.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:45.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 01:47:45.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:45.057 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:45.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:45.065 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:45.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:45.065 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:45.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:45.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:45.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:45.066 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:45.066 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:45.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:45.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:45.066 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:47:50.072 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:47:50.072 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:47:50.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:50.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:50.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:50.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:50.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:47:50.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:50.080 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:50.080 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:47:50.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:47:50.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:47:50.083 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:47:50.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:50.083 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:50.083 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:47:50.084 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:47:50.084 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:47:50.084 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:47:50.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:50.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:47:50.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:47:50.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:50.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:50.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:47:50.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:47:50.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:47:50.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:47:50.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:50.087 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:47:50.087 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:47:50.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:47:50.090 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:47:50.090 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:47:50.090 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:47:50.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:47:50.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:47:50.571 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:47:50.623 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:47:50.625 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:47:50.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:47:50.628 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:47:50.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:47:50.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:47:50.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:47:50.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:50.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:50.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:50.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:47:50.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:47:50.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:47:50.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:47:50.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:47:50.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:50.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:47:51.044 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:47:51.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:51.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:51.515 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:47:51.988 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:47:52.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:52.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:52.461 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:47:52.933 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:47:53.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:53.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:53.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:53.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:53.407 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:47:53.879 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:47:54.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:54.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:54.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:54.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:54.352 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:47:54.825 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:47:55.097 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:47:55.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:47:55.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:47:55.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:47:55.298 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:47:55.770 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:47:56.241 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:47:56.712 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:47:57.186 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:47:57.658 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:47:58.131 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:47:58.604 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:47:59.077 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:47:59.549 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:48:00.023 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:48:00.508 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:48:00.980 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:48:01.454 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:48:01.926 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:48:02.399 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:48:02.872 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:48:03.345 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:48:03.817 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:48:04.288 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:48:04.761 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:48:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:48:05.706 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:48:06.177 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:48:06.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:06.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:06.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:06.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:06.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:06.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:06.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:48:06.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:06.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:48:06.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:48:06.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:48:06.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:48:06.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:06.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:48:06.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:48:06.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:06.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:06.651 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:48:07.124 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:48:07.596 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:48:08.067 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:48:08.540 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:48:09.013 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:48:09.485 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:48:09.956 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:48:10.430 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:48:10.902 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:48:11.375 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:48:11.848 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:48:12.321 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:48:12.793 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:48:13.267 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:48:13.739 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:48:14.211 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:48:14.685 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:48:15.157 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:48:15.630 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:48:16.103 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:48:16.576 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:48:17.048 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:48:17.519 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:48:17.992 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:48:18.465 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:48:18.937 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:48:19.408 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:48:19.882 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:48:20.354 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:48:20.827 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:48:21.300 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:48:21.773 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:48:21.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:21.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:21.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:21.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:21.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:21.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:21.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:48:21.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:21.982 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:48:21.982 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:48:21.982 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:48:21.982 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:48:22.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:22.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:48:22.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:48:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:22.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:22.245 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:48:22.719 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:48:23.191 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:48:23.664 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:48:24.134 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:48:24.605 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 01:48:25.076 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 01:48:25.550 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 01:48:26.022 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 01:48:26.493 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 01:48:26.967 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 01:48:27.439 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 01:48:27.911 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 01:48:28.382 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 01:48:28.856 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 01:48:29.329 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 01:48:29.801 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 01:48:30.275 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 01:48:30.747 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 01:48:31.220 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 01:48:31.693 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 01:48:32.166 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 01:48:32.638 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 01:48:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 01:48:33.584 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 01:48:34.057 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 01:48:34.528 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 01:48:35.001 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 01:48:35.474 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 01:48:35.946 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 01:48:36.420 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 01:48:36.892 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 01:48:37.364 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 01:48:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:37.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:37.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:37.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:37.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:37.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:37.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:48:37.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:37.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:48:37.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:48:37.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:48:37.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:48:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:37.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:37.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:48:37.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:48:37.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:37.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:37.835 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 01:48:38.309 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 01:48:38.781 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 01:48:39.254 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 01:48:39.727 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 01:48:40.200 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 01:48:40.672 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 01:48:41.146 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 01:48:41.618 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 01:48:42.090 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 01:48:42.561 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 01:48:43.035 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 01:48:43.507 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 01:48:43.980 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 01:48:44.451 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 01:48:44.924 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 01:48:45.396 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 01:48:45.868 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 01:48:46.342 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 01:48:46.815 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 01:48:47.287 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 01:48:47.758 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 01:48:48.231 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 01:48:48.704 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 01:48:49.176 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 01:48:49.647 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 01:48:50.121 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 01:48:50.593 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 01:48:51.066 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 01:48:51.536 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 01:48:52.010 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 01:48:52.483 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 01:48:52.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:48:52.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:48:52.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:48:52.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:48:52.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:48:52.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:48:52.930 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:48:52.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:48:52.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:48:52.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:48:52.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:48:52.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:48:52.932 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:48:52.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:48:52.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:52.933 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=13563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:48:57.936 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:48:57.936 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:48:57.936 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:48:57.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:48:57.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:48:57.937 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:48:57.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:48:57.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:48:57.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:48:57.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:48:57.951 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:48:57.953 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:48:57.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:48:57.954 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:48:57.954 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:48:57.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:48:57.954 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:48:57.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:48:57.955 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:48:57.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:48:57.956 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:48:57.956 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:48:57.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:48:57.957 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:48:57.957 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:48:57.957 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:48:57.957 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:48:57.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:48:57.957 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:48:57.958 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:48:57.958 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:48:57.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:48:57.959 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:48:57.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:48:57.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:48:57.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:48:57.959 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:48:57.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:48:57.960 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:48:57.960 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:48:57.960 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.960 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:48:57.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:48:57.961 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:48:57.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:02.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:49:02.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:49:02.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:02.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:02.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:02.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:02.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:02.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:49:02.971 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:02.971 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:49:02.971 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:49:02.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:49:02.972 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:49:02.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:02.973 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:49:02.973 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:49:02.973 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:49:02.973 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:02.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:02.974 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:49:02.974 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:49:02.974 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:49:02.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:49:02.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:49:02.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:49:02.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:49:02.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:49:02.977 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:49:02.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:02.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:02.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:49:03.456 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:49:03.506 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:49:03.508 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:49:03.510 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:49:03.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:03.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:49:03.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:49:03.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:49:03.551 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:49:03.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:03.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:49:03.554 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:49:03.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:49:03.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:49:03.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:03.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:49:03.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:49:03.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:03.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:03.928 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:49:03.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:03.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:04.400 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:49:04.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:49:04.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:04.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:04.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:04.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:05.346 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:49:05.818 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:49:05.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:05.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:06.291 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:49:06.764 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:49:06.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:06.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:06.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:07.237 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:49:07.710 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:49:07.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:08.183 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:49:08.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:49:09.126 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:49:09.599 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:49:10.072 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:49:10.544 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:49:11.015 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:49:11.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:49:11.961 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:49:12.433 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:49:12.904 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:49:13.375 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:49:13.848 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:49:14.321 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:49:14.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:14.420 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:14.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:49:14.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:49:14.423 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:14.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:14.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:14.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:14.424 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:14.424 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:14.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:14.424 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:14.424 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:49:14.424 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:49:14.424 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:49:19.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:49:19.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:49:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:19.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:19.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:19.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:19.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:49:19.441 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:19.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:49:19.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:49:19.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:49:19.445 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:49:19.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:49:19.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:19.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:19.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:49:19.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:49:19.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:49:19.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:19.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:49:19.448 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:49:19.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:49:19.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:19.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:19.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:49:19.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:49:19.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:49:19.448 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:19.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:49:19.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:49:19.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:49:19.451 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:19.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:19.451 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:49:19.451 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:49:19.451 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:49:19.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:19.454 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:49:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:49:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:49:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:49:19.454 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:49:19.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:49:19.455 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:49:19.455 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:49:19.455 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:19.460 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:49:19.938 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:49:19.975 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:49:19.977 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:49:19.979 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:49:19.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:20.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:49:20.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:49:20.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:49:20.020 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:49:20.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:20.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:49:20.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:49:20.025 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:49:20.025 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:49:20.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:20.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:49:20.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:49:20.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:20.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:20.410 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:49:20.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:20.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:20.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:49:21.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:49:21.458 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:21.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:21.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:21.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:21.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:49:22.300 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:49:22.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:22.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:22.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:22.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:22.771 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:49:23.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:49:23.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:23.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:23.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:23.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:23.717 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:49:24.189 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:49:24.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:24.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:24.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:24.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:24.663 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:49:25.136 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:49:25.608 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:49:26.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:49:26.552 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:49:27.025 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:49:27.497 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:49:27.968 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:49:28.441 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:49:28.914 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:49:29.386 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:49:29.857 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:49:30.331 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:49:30.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:30.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:30.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:49:30.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:49:30.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:30.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:30.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:30.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:30.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:30.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:30.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:30.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:30.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:49:30.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:49:30.439 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:30.440 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2372 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:49:35.441 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:49:35.441 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:49:35.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:35.442 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:35.442 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:35.442 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:35.444 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:35.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:49:35.445 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:35.445 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:49:35.445 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:49:35.446 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:49:35.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:49:35.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:49:35.447 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:49:35.447 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:49:35.447 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:35.448 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:49:35.448 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:49:35.448 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:49:35.448 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:49:35.448 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:49:35.448 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:49:35.449 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:49:35.449 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:49:35.449 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:49:35.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:49:35.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:49:35.451 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:49:35.451 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:49:35.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:49:35.934 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:49:35.975 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:49:35.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:35.977 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:49:35.978 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:49:36.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:49:36.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:49:36.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:49:36.015 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:49:36.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:36.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:49:36.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:49:36.017 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:49:36.017 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:49:36.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:36.029 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:49:36.029 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:49:36.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:36.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:36.406 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:49:36.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:36.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:36.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:36.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:36.877 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:49:36.892 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:49:37.348 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:49:37.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:37.454 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:37.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:37.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:37.822 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:49:38.294 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:49:38.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:38.456 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:38.456 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:38.456 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:38.767 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:49:39.237 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:49:39.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:39.457 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:39.457 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:39.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:39.708 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:49:40.182 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:49:40.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:40.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:40.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:40.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:40.655 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:49:41.127 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:49:41.601 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:49:42.073 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:49:42.545 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:49:43.019 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:49:43.491 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:49:43.964 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:49:44.437 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:49:44.910 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:49:45.382 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:49:45.853 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:49:46.327 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:49:46.799 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:49:47.273 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:49:47.745 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:49:48.218 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:49:48.689 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:49:49.162 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:49:49.635 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:49:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:49:50.578 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:49:51.050 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:49:51.522 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:49:51.995 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:49:52.467 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:49:52.938 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:49:53.409 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:49:53.882 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:49:54.355 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:49:54.827 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:49:55.298 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:49:55.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:49:55.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:49:55.619 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:49:55.619 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:49:55.621 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:49:55.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:49:55.621 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:49:55.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:49:55.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:49:55.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:49:55.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:49:55.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:49:55.622 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:49:55.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:49:55.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:00.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:00.630 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:00.630 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:00.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:00.630 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:00.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:00.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:00.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:00.636 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:00.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:00.636 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:50:00.637 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:50:00.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:50:00.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:00.638 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:00.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:00.638 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:50:00.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:00.639 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:50:00.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:00.640 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:00.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:50:00.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:00.642 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:50:00.642 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:50:00.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:00.642 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:00.642 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:00.642 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:50:00.643 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:00.643 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:50:00.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:50:00.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:50:00.648 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:50:00.648 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:50:00.648 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:00.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:00.653 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:50:01.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:50:01.174 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:50:01.176 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:01.178 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:50:01.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:01.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:01.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:01.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:01.213 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:01.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:01.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:01.216 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:01.216 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:01.216 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:01.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:01.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:01.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:01.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:01.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:01.604 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:50:01.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:01.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:01.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:01.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:02.076 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:50:02.090 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:02.549 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:50:02.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:02.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:02.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:02.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:03.022 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:50:03.056 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:03.494 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:50:03.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:03.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:03.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:03.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:03.968 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:50:04.016 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:04.440 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:50:04.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:04.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:04.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:04.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:04.912 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:50:04.983 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:05.383 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:50:05.655 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:05.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:05.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:05.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:05.857 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:50:05.943 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:06.330 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:50:06.802 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:50:06.909 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:07.275 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:50:07.748 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:50:07.875 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:08.220 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:50:08.691 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:50:08.835 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:09.165 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:50:09.637 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:50:09.801 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:10.110 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:50:10.583 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:50:10.762 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:11.056 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:50:11.528 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:50:11.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:11.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:11.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:11.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:11.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:11.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:11.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:11.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:11.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:11.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:11.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:11.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:11.635 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:50:11.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:11.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:11.636 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:11.636 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:11.636 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:11.636 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:11.637 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:11.637 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:11.637 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2371 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:16.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:16.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:16.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:16.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:16.645 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:16.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:16.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:16.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:16.646 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:50:16.650 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:50:16.650 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:50:16.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:16.650 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:16.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:16.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:50:16.651 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:16.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:50:16.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:16.654 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:50:16.654 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:50:16.654 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:16.654 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:16.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:16.655 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:50:16.655 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:16.655 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:50:16.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:16.658 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:50:16.658 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:50:16.658 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:16.658 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:16.658 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:16.658 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:50:16.659 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:16.659 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:50:16.659 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:16.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:50:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:50:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:50:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:50:16.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:50:16.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.664 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:50:16.664 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:50:16.664 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:50:16.664 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.665 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:16.669 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:50:17.147 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:50:17.194 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:50:17.196 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:17.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:17.198 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:50:17.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:17.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:17.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:17.228 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:50:17.229 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:17.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:17.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:17.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:17.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:17.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:17.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:17.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:17.246 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:17.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:17.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:17.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:17.619 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:50:17.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:17.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:17.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:17.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:18.090 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:50:18.105 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:18.561 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:50:18.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:18.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:18.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:18.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:19.032 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:50:19.503 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:50:19.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:19.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:19.669 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:19.669 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:19.976 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:50:20.449 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:50:20.670 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:20.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:20.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:20.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:20.921 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:50:21.395 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:50:21.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:21.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:21.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:21.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:21.867 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:50:22.340 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:50:22.810 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:50:23.281 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:50:23.755 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:50:24.227 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:50:24.700 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:50:25.173 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:50:25.646 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:50:26.118 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:50:26.589 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:50:27.060 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:50:27.533 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:50:27.731 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:28.006 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:50:28.478 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:50:28.951 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:50:29.429 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:50:29.901 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:50:30.372 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:50:30.846 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:50:31.318 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:50:31.790 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:50:32.264 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:50:32.736 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:50:33.208 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:50:33.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:33.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:33.527 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:33.527 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:33.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:33.538 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:33.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:33.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:33.541 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:33.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:33.541 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:33.541 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:33.541 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:33.541 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:33.541 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:33.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:38.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:38.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:38.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:38.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:38.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:38.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:38.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:38.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:38.556 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:38.556 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:38.556 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:50:38.560 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:50:38.560 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:50:38.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:38.560 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:38.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:38.560 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:50:38.560 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:38.560 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:50:38.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:38.562 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:50:38.563 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:50:38.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:38.563 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:38.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:38.563 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:50:38.563 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:38.563 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:50:38.563 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:38.565 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:50:38.565 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:50:38.565 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:38.565 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:38.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:38.565 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:50:38.566 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:38.566 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:50:38.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.569 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:50:38.569 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:50:38.569 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:50:38.570 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.570 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:38.574 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:50:39.052 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:50:39.102 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:50:39.104 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:39.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:39.106 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:50:39.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:39.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:39.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:39.147 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:39.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:39.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:39.153 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:39.153 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:39.153 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:39.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:39.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:39.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:39.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:39.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:39.524 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:50:39.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:39.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:39.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:39.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:39.995 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:50:40.469 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:50:40.494 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:50:40.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:40.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:40.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:40.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:40.942 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:50:41.415 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:50:41.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:41.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:41.574 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:41.574 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:41.888 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:50:42.360 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:50:42.575 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:42.575 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:42.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:42.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:42.831 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:50:43.305 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:50:43.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:43.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:43.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:43.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:43.777 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:50:44.250 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:50:44.723 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:50:45.196 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:50:45.668 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:50:46.142 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:50:46.614 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:50:47.087 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:50:47.560 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:50:48.033 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:50:48.505 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:50:48.976 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:50:49.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:49.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:49.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:49.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:49.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:49.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:49.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:49.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:49.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:49.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:49.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:49.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:49.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:49.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:49.225 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:50:49.225 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:49.226 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:49.226 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:49.226 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:49.226 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:49.226 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:49.226 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:54.230 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:54.230 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:54.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:54.230 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:54.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:54.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:54.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:54.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:54.240 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:54.240 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:50:54.240 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:50:54.244 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:50:54.244 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:50:54.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:54.245 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:54.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:54.245 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:50:54.245 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:50:54.245 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:50:54.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:54.249 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:50:54.249 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:50:54.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:54.250 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:54.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:54.250 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:50:54.250 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:50:54.250 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:50:54.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:54.253 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:50:54.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:50:54.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:54.254 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:50:54.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:54.254 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:50:54.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:50:54.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:50:54.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:54.259 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:50:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:50:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:50:54.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:50:54.259 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.260 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:50:54.260 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:50:54.260 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:50:54.261 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:50:54.265 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:50:54.743 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:50:54.793 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:50:54.794 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:50:54.795 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:50:54.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:54.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:54.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:54.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:54.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:54.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:54.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:54.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:54.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:54.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:54.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:54.848 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:54.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:54.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.215 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:50:55.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:55.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:55.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:55.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:55.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:55.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:55.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:55.245 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:55.245 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:55.245 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:55.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:55.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:55.262 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:55.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:55.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:55.266 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:55.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:55.686 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:50:55.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:55.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:55.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:55.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:55.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:55.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:55.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:55.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:55.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:55.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:55.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:56.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:56.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:56.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:56.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:56.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.126 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:56.126 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:56.144 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:56.144 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:56.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:50:56.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:56.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:56.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:50:56.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:50:56.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:56.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:50:56.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:50:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.155 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.158 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:50:56.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:56.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:56.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:56.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:56.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:50:56.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:50:56.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:50:56.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:50:56.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:50:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:50:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:50:56.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:50:56.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:50:56.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:50:56.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:50:56.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:50:56.565 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:50:56.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:50:56.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:50:56.565 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:56.565 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:56.565 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:56.566 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:56.566 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:56.566 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:50:56.566 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:01.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:01.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:01.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:01.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:01.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:01.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:01.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:01.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:01.578 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:01.578 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:01.579 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:51:01.583 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:51:01.583 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:51:01.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:01.583 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:01.584 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:51:01.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:01.584 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:01.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:51:01.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:01.588 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:51:01.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:51:01.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:01.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:01.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:01.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:51:01.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:01.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:51:01.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:01.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:01.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:51:01.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:51:01.596 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:51:01.596 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:51:01.596 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:51:01.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:01.597 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:01.601 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:51:02.079 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:51:02.125 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:51:02.126 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:51:02.127 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:51:02.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:02.139 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:02.139 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:02.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:02.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:02.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:02.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:02.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:02.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:02.170 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:51:02.175 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 01:51:02.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:02.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:02.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:02.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:02.187 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:02.550 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:51:02.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:02.600 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:02.600 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:02.600 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:03.022 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:51:03.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:03.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:03.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:03.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:03.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:03.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:03.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:03.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:03.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:03.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:03.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:03.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:03.054 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:03.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:08.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:08.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:08.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:08.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:08.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:08.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:08.064 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:08.064 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:08.064 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:51:08.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:51:08.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:51:08.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:08.067 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:08.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:08.067 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:51:08.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:08.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:51:08.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:08.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:08.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:51:08.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:08.073 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:08.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:51:08.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:51:08.077 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:51:08.078 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:51:08.078 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:51:08.078 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:08.083 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:51:08.560 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:51:08.606 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:51:08.608 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:51:08.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:08.610 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:51:08.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:08.635 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:08.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:08.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:08.639 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:08.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:08.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:08.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:08.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:08.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:08.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:08.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:08.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:08.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:09.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:51:09.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:09.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:09.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:09.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:09.507 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:51:09.979 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:51:10.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:10.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:10.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:10.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:10.451 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:51:10.922 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:51:11.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:11.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:11.395 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:51:11.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:11.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:11.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:11.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:11.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:11.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:11.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:11.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:11.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:11.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:11.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:11.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:11.868 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:51:11.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:11.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:11.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:11.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:11.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:12.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:12.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:12.340 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:51:12.811 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:51:13.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:13.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:13.285 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:51:13.757 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:51:14.229 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:51:14.700 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:51:15.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:15.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:15.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:15.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:15.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:15.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:15.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:15.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:15.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:15.061 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:15.062 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:15.062 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:15.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:15.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:15.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:15.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:15.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:15.172 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:51:15.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:15.646 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:51:16.117 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:51:16.588 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:51:17.062 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:51:17.534 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:51:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:51:18.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:18.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:18.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:18.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:18.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:18.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:18.428 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:18.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:18.429 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:18.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:18.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:18.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:18.477 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:51:18.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:18.487 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:18.487 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:18.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:18.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:18.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:18.951 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:51:19.423 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:51:19.894 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:51:20.366 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:51:20.839 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:51:21.311 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:51:21.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:21.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:21.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:21.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:21.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:21.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:21.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:21.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:21.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:21.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:21.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:21.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:21.654 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:21.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:21.654 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:51:21.654 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:21.654 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:21.654 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:21.654 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:21.654 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:21.654 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:51:26.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:26.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:26.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:26.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:26.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:26.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:26.668 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:26.670 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:26.670 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:26.671 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:26.671 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:51:26.676 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:51:26.677 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:51:26.677 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:26.677 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:26.678 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:26.678 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:51:26.679 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:26.679 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:51:26.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:26.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:51:26.682 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:51:26.682 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:26.682 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:26.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:26.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:51:26.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:26.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:51:26.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:26.687 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:51:26.687 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:51:26.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:26.687 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:26.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:26.687 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:51:26.688 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:26.688 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:51:26.688 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:26.691 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:51:26.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.692 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:51:26.692 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:51:26.692 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:51:26.692 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.693 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:26.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:26.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:26.697 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:51:27.174 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:51:27.220 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:51:27.221 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:51:27.223 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:51:27.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:27.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:27.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:27.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:27.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:27.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:27.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:27.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:27.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:27.647 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:51:27.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:27.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:27.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:27.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:28.118 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:51:28.591 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:51:28.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:28.698 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:28.698 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:28.699 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:29.063 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:51:29.535 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:51:29.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:29.699 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:29.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:29.700 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:30.006 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:51:30.479 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:51:30.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:30.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:30.951 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:51:31.423 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:51:31.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:31.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:31.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:31.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:31.894 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:51:32.368 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:51:32.840 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:51:33.312 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:51:33.785 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:51:34.258 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:51:34.730 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:51:35.201 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:51:35.674 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:51:36.147 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:51:36.619 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:51:37.090 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:51:37.563 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:51:38.036 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:51:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:51:38.979 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:51:39.452 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:51:39.924 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:51:40.396 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:51:40.867 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:51:41.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:41.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:41.161 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:41.162 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:41.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:41.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:41.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:41.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:41.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:41.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:41.165 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:51:41.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:41.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:46.168 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:51:46.168 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:51:46.168 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:46.168 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:46.168 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:46.168 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:46.176 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:51:46.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:46.177 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:46.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:51:46.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:51:46.181 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:51:46.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:51:46.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:46.182 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:46.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:51:46.182 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:51:46.182 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:51:46.182 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:51:46.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:46.185 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:51:46.186 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:51:46.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:46.186 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:46.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:51:46.186 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:51:46.186 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:51:46.186 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:51:46.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:46.189 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:51:46.189 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:51:46.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:51:46.192 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:51:46.193 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:51:46.193 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:51:46.193 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.193 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.194 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:51:46.198 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:51:46.676 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:51:46.720 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:51:46.722 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:51:46.723 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:51:46.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:46.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:46.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:46.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:46.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:46.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:46.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:46.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:46.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:46.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:51:46.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:46.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:46.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:46.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:47.148 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:51:47.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:47.196 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:47.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:47.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:47.619 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:51:48.092 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:51:48.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:48.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:48.198 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:48.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:48.565 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:51:48.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:48.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:51:48.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:51:48.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:51:48.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:51:48.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:51:48.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:51:48.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:51:48.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:51:49.037 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:51:49.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:49.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:49.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:49.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:49.508 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:51:49.981 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:51:50.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:50.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:50.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:50.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:50.454 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:51:50.925 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:51:51.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:51:51.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:51:51.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:51:51.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:51:51.397 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:51:51.870 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:51:52.342 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:51:52.814 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:51:53.285 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:51:53.759 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:51:54.231 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:51:54.704 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:51:55.177 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:51:55.649 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:51:56.121 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:51:56.592 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:51:57.066 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:51:57.538 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:51:58.010 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:51:58.481 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:51:58.952 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:51:59.425 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:51:59.898 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:52:00.370 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:52:00.843 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:52:01.316 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:52:01.788 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:52:02.259 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:52:02.732 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:52:03.205 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:52:03.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:52:03.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:52:03.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:52:03.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:03.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:03.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:03.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:03.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:03.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:03.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:52:03.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:52:03.506 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:52:03.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:03.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:03.506 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:52:08.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:52:08.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:52:08.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:08.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:08.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:52:08.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:08.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:08.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:52:08.523 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:08.523 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:52:08.523 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:52:08.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:52:08.529 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:52:08.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:52:08.530 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:08.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:08.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:52:08.531 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:52:08.531 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:52:08.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:08.534 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:52:08.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:52:08.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:52:08.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:08.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:08.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:52:08.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:52:08.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:52:08.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:08.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:52:08.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:52:08.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:52:08.538 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:08.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:52:08.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:52:08.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:52:08.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:52:08.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:52:08.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:52:08.545 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:52:08.545 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:52:08.545 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:08.550 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:52:09.029 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:52:09.075 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:52:09.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:52:09.079 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:52:09.083 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:52:09.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:52:09.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:52:09.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:52:09.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:52:09.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:52:09.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:52:09.090 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:52:09.090 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:52:09.501 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:52:09.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:09.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:09.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:09.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:09.972 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:52:10.446 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:52:10.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:10.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:10.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:10.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:10.918 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:52:11.390 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:52:11.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:11.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:11.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:11.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:11.861 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:52:12.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:52:12.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:12.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:12.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:12.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:12.807 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:52:13.279 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:52:13.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:13.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:13.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:13.554 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:13.750 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:52:14.223 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:52:14.696 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:52:15.167 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:52:15.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:52:16.112 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:52:16.584 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:52:17.056 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:52:17.527 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:52:18.001 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:52:18.473 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:52:18.945 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:52:19.416 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:52:19.889 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:52:20.362 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:52:20.837 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:52:21.309 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:52:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:52:22.252 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:52:22.726 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:52:23.198 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:52:23.670 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:52:24.141 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:52:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:52:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:52:25.559 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:52:26.030 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:52:26.503 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:52:26.976 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:52:27.448 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:52:27.919 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:52:28.392 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:52:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:52:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:52:29.808 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:52:30.281 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:52:30.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:52:30.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:52:30.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:30.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:30.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:30.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:30.571 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:52:30.571 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:52:30.571 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:52:30.571 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:30.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:52:35.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:52:35.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:52:35.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:35.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:35.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:35.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:52:35.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:35.586 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:52:35.586 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:35.587 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:52:35.587 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:52:35.592 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:52:35.593 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:52:35.593 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:52:35.593 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:35.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:35.594 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:52:35.594 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:52:35.594 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:52:35.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:35.597 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:52:35.598 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:52:35.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:52:35.598 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:35.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:35.598 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:52:35.598 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:52:35.598 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:52:35.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:35.601 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:52:35.602 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:52:35.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:52:35.602 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:52:35.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:52:35.602 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:52:35.602 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:52:35.602 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:52:35.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.606 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:52:35.606 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:52:35.606 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:52:35.606 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:52:35.611 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:52:36.089 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:52:36.137 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:52:36.139 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:52:36.141 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:52:36.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:52:36.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:52:36.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:52:36.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:52:36.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:52:36.144 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:52:36.144 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:52:36.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:52:36.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:52:36.561 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:52:36.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:36.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:37.032 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:52:37.503 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:52:37.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:37.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:37.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:37.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:37.977 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:52:38.449 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:52:38.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:38.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:38.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:38.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:38.921 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:52:39.392 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:52:39.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:39.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:39.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:39.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:39.865 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:52:40.338 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:52:40.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:40.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:40.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:40.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:40.810 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:52:41.281 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:52:41.754 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:52:42.226 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:52:42.698 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:52:43.169 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:52:43.642 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:52:44.115 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:52:44.587 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:52:45.060 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:52:45.533 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:52:46.005 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:52:46.476 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:52:46.949 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:52:47.422 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:52:47.893 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:52:48.364 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:52:48.836 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:52:49.309 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:52:49.781 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:52:50.253 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:52:50.724 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:52:51.198 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:52:51.670 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:52:52.142 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:52:52.613 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:52:53.087 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:52:53.558 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:52:54.030 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:52:54.501 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:52:54.975 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:52:55.447 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:52:55.919 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:52:56.390 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:52:56.864 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:52:57.336 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:52:57.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:52:57.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:52:57.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:52:57.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:52:57.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:52:57.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:52:57.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:52:57.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:52:57.631 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:52:57.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:52:57.631 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:52:57.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:52:57.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:53:02.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:53:02.638 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:53:02.638 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:53:02.638 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:53:02.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:53:02.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:53:02.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:53:02.649 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:53:02.649 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:02.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:53:02.650 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:53:02.655 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:53:02.656 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:53:02.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:53:02.656 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:02.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:53:02.656 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:53:02.657 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:53:02.657 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:53:02.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:02.661 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:53:02.661 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:53:02.661 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:53:02.661 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:02.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:53:02.661 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:53:02.662 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:53:02.662 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:53:02.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:02.665 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:53:02.665 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:53:02.665 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:53:02.665 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:02.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:53:02.666 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:53:02.666 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:53:02.666 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:53:02.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:02.671 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:53:02.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:53:02.671 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:53:02.671 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:53:02.671 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:53:02.671 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.672 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:53:02.672 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:53:02.672 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:53:02.672 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.673 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:02.674 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:02.677 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:53:03.156 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:53:03.209 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:53:03.211 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:53:03.213 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:53:03.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:53:03.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:53:03.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:53:03.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:53:03.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:53:03.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:53:03.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:53:03.217 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:53:03.217 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:53:03.628 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:53:03.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:03.677 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:03.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:03.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:04.099 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:53:04.570 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:53:04.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:04.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:04.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:04.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:05.043 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:53:05.516 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:53:05.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:05.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:05.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:05.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:05.988 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:53:06.459 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:53:06.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:06.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:06.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:06.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:06.932 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:53:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:53:07.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:07.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:07.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:07.683 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:07.876 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:53:08.350 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:53:08.822 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:53:09.294 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:53:09.765 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:53:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:53:10.710 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:53:11.182 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:53:11.656 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:53:12.128 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:53:12.600 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:53:13.071 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:53:13.545 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:53:14.017 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:53:14.489 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:53:14.960 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:53:15.433 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:53:15.905 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:53:16.377 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:53:16.848 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:53:17.322 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:53:17.793 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:53:18.265 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:53:18.736 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:53:19.210 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:53:19.682 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:53:20.154 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:53:20.628 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:53:21.100 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:53:21.572 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:53:22.043 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:53:22.516 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:53:22.989 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:53:23.461 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:53:23.932 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:53:24.405 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:53:24.878 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:53:25.350 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:53:25.826 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:53:26.297 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:53:26.769 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:53:27.242 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:53:27.714 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:53:28.186 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:53:28.657 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:53:29.130 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:53:29.602 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:53:30.075 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:53:30.548 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:53:31.020 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:53:31.492 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:53:31.963 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:53:32.436 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:53:32.909 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:53:33.381 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:53:33.852 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:53:34.325 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:53:34.798 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:53:35.270 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:53:35.741 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:53:36.214 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:53:36.687 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:53:36.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:53:36.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:53:36.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:36.701 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:36.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:36.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:36.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:53:36.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:53:36.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:53:36.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:53:36.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:53:36.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:53:36.703 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:53:41.708 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:53:41.708 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:53:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:53:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:53:41.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:53:41.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:53:41.715 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:53:41.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:53:41.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:41.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:53:41.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:53:41.719 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:53:41.719 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:53:41.719 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:53:41.719 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:41.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:53:41.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:53:41.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:53:41.720 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:53:41.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:41.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:53:41.722 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:53:41.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:53:41.722 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:41.722 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:53:41.722 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:53:41.722 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:53:41.722 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:53:41.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:53:41.724 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:53:41.724 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:53:41.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:53:41.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:53:41.727 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:53:41.727 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:53:41.727 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:53:41.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:53:41.732 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:53:42.210 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:53:42.254 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:53:42.256 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:53:42.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:53:42.259 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:53:42.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:53:42.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:53:42.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:53:42.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:53:42.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:53:42.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:53:42.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:53:42.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:53:42.682 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:53:42.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:42.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:42.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:42.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:43.153 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:53:43.627 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:53:43.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:43.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:43.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:43.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:44.100 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:53:44.571 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:53:44.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:44.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:44.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:44.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:45.043 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:53:45.516 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:53:45.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:45.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:45.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:45.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:45.988 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:53:46.460 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:53:46.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:53:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:53:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:53:46.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:53:46.931 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:53:47.405 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:53:47.877 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:53:48.349 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:53:48.820 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:53:49.294 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:53:49.766 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:53:50.238 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:53:50.709 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:53:51.183 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:53:51.655 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:53:52.127 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:53:52.600 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:53:53.073 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:53:53.545 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:53:54.016 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:53:54.489 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:53:54.962 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:53:55.434 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:53:55.905 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:53:56.378 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:53:56.850 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:53:57.322 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:53:57.793 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:53:58.267 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:53:58.739 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:53:59.211 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:53:59.682 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:54:00.155 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:54:00.627 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:54:01.099 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:54:01.570 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:54:02.041 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:54:02.515 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:54:02.987 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:54:03.459 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:54:03.930 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:54:04.404 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:54:04.876 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:54:05.348 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:54:05.819 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:54:06.292 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:54:06.764 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:54:07.237 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:54:07.710 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:54:08.182 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:54:08.654 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:54:09.125 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:54:09.599 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:54:09.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:54:09.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:54:09.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:09.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:09.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:09.747 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:09.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:09.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:09.747 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:09.747 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:09.747 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:09.747 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6053 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:14.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:14.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:14.754 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:14.754 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:14.754 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:14.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:14.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:14.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:14.764 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:14.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:14.765 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:54:14.769 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:54:14.769 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:54:14.769 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:14.769 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:14.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:14.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:54:14.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:14.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:54:14.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:14.773 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:54:14.773 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:54:14.773 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:14.773 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:14.773 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:14.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:54:14.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:14.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:54:14.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:14.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:54:14.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:54:14.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:14.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:14.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:14.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:54:14.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:14.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:54:14.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:14.780 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:54:14.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:54:14.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:54:14.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:54:14.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:54:14.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:54:14.781 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:54:14.781 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:54:14.781 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.782 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:14.786 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:54:15.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:54:15.306 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:54:15.308 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:54:15.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:54:15.312 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:54:15.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:15.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:15.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:15.324 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:15.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:15.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:15.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:15.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:15.327 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:15.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:15.327 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:54:20.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:20.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:20.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:20.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:20.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:20.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:20.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:20.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:20.339 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:20.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:20.339 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:54:20.341 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:54:20.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:54:20.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:20.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:20.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:20.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:54:20.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:20.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:54:20.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:20.344 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:54:20.344 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:54:20.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:20.345 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:20.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:20.345 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:54:20.345 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:20.345 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:54:20.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:20.347 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:20.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:54:20.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:20.349 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:54:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:54:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:54:20.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:54:20.349 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:54:20.350 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:54:20.350 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:54:20.350 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:20.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:20.355 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:54:20.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:54:20.881 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:54:20.884 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:54:20.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:54:20.886 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:54:20.900 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:20.901 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:20.901 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:20.901 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:20.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:20.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:20.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:20.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:20.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:20.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:20.905 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:20.905 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:25.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:25.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:25.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:25.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:25.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:25.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:25.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:25.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:25.911 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:25.911 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:25.911 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:25.913 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:25.913 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:54:25.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:25.914 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:54:25.914 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:54:25.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:25.914 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:25.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:25.915 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:54:25.915 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:25.915 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:54:25.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:25.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:54:25.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:54:25.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:25.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:25.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:25.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:54:25.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:25.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:54:25.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:54:25.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:54:25.919 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:54:25.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:25.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:25.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:54:26.401 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:54:26.441 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:54:26.442 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:54:26.443 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:54:26.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:54:26.499 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:26.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:26.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:26.499 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:26.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:26.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:26.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:26.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:26.503 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:54:26.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:26.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:31.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:31.506 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:31.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:31.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:31.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:31.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:31.515 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:31.516 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:31.516 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:54:31.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:54:31.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:54:31.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:31.519 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:31.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:31.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:54:31.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:31.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:54:31.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:31.521 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:54:31.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:54:31.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:31.522 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:31.522 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:31.522 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:54:31.522 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:31.522 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:54:31.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:31.524 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:31.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:54:31.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:54:31.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:54:31.527 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:54:31.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:31.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:31.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:54:32.009 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:54:32.054 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:54:32.056 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:54:32.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:54:32.058 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:54:32.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:54:32.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:54:32.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:54:32.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:54:32.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:54:32.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:54:32.070 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:54:32.070 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:54:32.480 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:54:32.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:32.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:32.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:32.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:32.952 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:54:33.425 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:54:33.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:33.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:33.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:33.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:33.898 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:54:34.370 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:54:34.533 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:34.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:34.533 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:34.533 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:34.841 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:54:35.314 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:54:35.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:35.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:35.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:35.535 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:35.786 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:54:36.258 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:54:36.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:36.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:36.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:36.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:36.729 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:54:37.203 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:54:37.675 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:54:38.147 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:54:38.618 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:54:39.092 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:54:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:54:40.035 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:54:40.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:54:40.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:54:40.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:40.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:40.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:40.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:40.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:40.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:40.116 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:40.116 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:40.116 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:54:40.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:40.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:45.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:45.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:45.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:45.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:45.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:45.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:45.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:45.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:45.130 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:45.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:45.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:54:45.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:54:45.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:54:45.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:45.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:45.134 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:45.134 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:54:45.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:45.134 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:54:45.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:45.136 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:54:45.136 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:54:45.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:45.136 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:45.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:45.137 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:54:45.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:45.137 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:54:45.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:45.138 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:54:45.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:54:45.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:45.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:45.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:45.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:54:45.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:45.139 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:54:45.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:54:45.141 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:54:45.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:54:45.142 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:54:45.142 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:45.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:45.146 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:54:45.624 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:54:45.669 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:54:45.671 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:54:45.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:54:45.673 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:54:45.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:54:45.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:54:45.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:54:45.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:54:45.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:54:45.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:54:45.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:54:45.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:54:46.097 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:54:46.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:46.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:46.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:46.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:46.568 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:54:47.041 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:54:47.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:47.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:47.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:47.145 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:47.514 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:54:47.985 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:54:48.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:48.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:48.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:48.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:48.457 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:54:48.930 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:54:49.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:49.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:49.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:49.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:49.403 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:54:49.874 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:54:50.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:50.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:50.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:50.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:50.346 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:54:50.816 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:54:51.287 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:54:51.760 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:54:52.233 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:54:52.705 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:54:53.176 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:54:53.649 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:54:53.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:54:53.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:54:53.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:53.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:53.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:53.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:53.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:53.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:53.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:53.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:53.733 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:54:53.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:53.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:53.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:53.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:53.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:53.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:53.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:53.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:53.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:54:58.736 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:54:58.736 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:54:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:58.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:58.736 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:58.739 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:54:58.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:58.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:58.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:54:58.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:54:58.740 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:54:58.740 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:54:58.740 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:58.740 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:58.741 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:54:58.741 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:54:58.741 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:54:58.741 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:54:58.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:58.741 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:54:58.741 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:54:58.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:58.742 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:58.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:54:58.742 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:54:58.742 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:54:58.742 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:54:58.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:58.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:54:58.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:54:58.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:54:58.745 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:54:58.745 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:54:58.745 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:54:58.750 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:54:59.229 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:54:59.274 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:54:59.276 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:54:59.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:54:59.278 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:54:59.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:54:59.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:54:59.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:54:59.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:54:59.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:54:59.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:54:59.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:54:59.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:54:59.700 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:54:59.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:54:59.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:54:59.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:54:59.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:00.172 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:55:00.645 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:55:00.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:00.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:00.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:00.749 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:01.118 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:55:01.590 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:55:01.749 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:01.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:01.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:01.750 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:02.061 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:55:02.534 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:55:02.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:02.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:02.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:02.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:03.006 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:55:03.478 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:55:03.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:03.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:03.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:03.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:03.951 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:55:04.424 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:55:04.896 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:55:05.367 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:55:05.840 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:55:06.312 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:55:06.784 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:55:07.255 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:55:07.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:07.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:07.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:07.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:07.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:07.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:07.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:07.330 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:07.330 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:07.330 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:07.330 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:07.330 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:07.330 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:55:12.336 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:12.336 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:12.336 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:12.336 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:12.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:12.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:12.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:12.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:55:12.345 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:12.345 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:55:12.345 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:55:12.348 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:55:12.348 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:55:12.348 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:55:12.348 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:12.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:12.349 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:55:12.349 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:55:12.349 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:55:12.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:12.350 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:55:12.350 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:55:12.350 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:55:12.350 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:12.351 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:12.351 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:55:12.351 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:55:12.351 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:55:12.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:12.352 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:55:12.353 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:55:12.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:55:12.353 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:12.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:12.353 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:55:12.353 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:55:12.353 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:55:12.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:55:12.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:55:12.356 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:55:12.356 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:55:12.356 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:12.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:12.360 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:55:12.839 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:55:12.878 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:55:12.881 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:55:12.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:55:12.883 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:55:12.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:12.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:12.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:55:12.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:55:12.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:55:12.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:55:12.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:55:12.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:55:13.311 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:55:13.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:13.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:13.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:13.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:13.782 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:55:14.256 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:55:14.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:14.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:14.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:14.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:14.728 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:55:15.200 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:55:15.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:15.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:15.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:15.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:15.671 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:55:16.141 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:55:16.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:16.615 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:55:17.087 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:55:17.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:17.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:17.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:17.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:17.559 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:55:18.030 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:55:18.504 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:55:18.975 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:55:19.447 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:55:19.918 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:55:20.392 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:55:20.864 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:55:20.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:20.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:20.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:20.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:20.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:20.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:20.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:20.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:20.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:20.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:20.951 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:55:20.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:20.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:20.951 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:20.951 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:20.952 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:20.952 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:20.952 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:20.952 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:20.952 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:25.952 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:25.952 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:25.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:25.952 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:25.952 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:25.952 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:25.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:25.959 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:55:25.959 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:25.960 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:55:25.960 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:55:25.963 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:55:25.963 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:55:25.964 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:55:25.964 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:25.964 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:25.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:55:25.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:55:25.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:55:25.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:25.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:55:25.968 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:55:25.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:55:25.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:25.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:25.969 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:55:25.970 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:55:25.970 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:55:25.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:25.972 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:55:25.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:55:25.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:55:25.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:25.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:25.973 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:55:25.973 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:55:25.973 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:55:25.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:55:25.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:55:25.979 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:55:25.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:25.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:25.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:55:26.462 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:55:26.511 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:55:26.513 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:55:26.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:55:26.515 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:55:26.519 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:26.519 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:26.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:55:26.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:55:26.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:55:26.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:55:26.520 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:55:26.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:55:26.934 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:55:26.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:26.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:26.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:26.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:27.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:55:27.879 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:55:27.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:27.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:27.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:27.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:28.351 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:55:28.823 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:55:28.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:28.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:28.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:28.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:29.294 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:55:29.767 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:55:29.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:29.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:30.239 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:55:30.711 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:55:30.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:30.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:30.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:30.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:31.182 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:55:31.656 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:55:32.128 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:55:32.600 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:55:33.071 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:55:33.545 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:55:34.017 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:55:34.489 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:55:34.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:34.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:34.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:34.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:34.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:34.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:34.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:34.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:34.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:34.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:34.572 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:55:34.573 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:34.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:34.573 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:55:39.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:39.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:39.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:39.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:39.575 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:39.575 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:39.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:39.601 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:55:39.601 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:39.602 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:55:39.602 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:55:39.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:55:39.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:55:39.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:55:39.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:39.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:39.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:55:39.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:55:39.613 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:55:39.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:39.617 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:55:39.617 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:55:39.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:55:39.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:39.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:39.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:55:39.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:55:39.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:55:39.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:39.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:55:39.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:55:39.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:55:39.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:55:39.626 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:55:39.626 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:55:39.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:55:39.627 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:55:39.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:39.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:39.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:55:39.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:55:39.633 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:55:39.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:55:39.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:55:39.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:55:39.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:55:39.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:55:40.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:55:40.161 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:55:40.163 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:55:40.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:55:40.166 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:55:40.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:40.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:40.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:55:40.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:55:40.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:55:40.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:55:40.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:55:40.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:55:40.588 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:55:40.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:40.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:40.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:40.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:41.059 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:55:41.532 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:55:41.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:41.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:41.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:41.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:42.005 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:55:42.477 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:55:42.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:42.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:42.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:42.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:42.948 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:55:43.421 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:55:43.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:43.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:43.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:43.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:43.893 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:55:44.365 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:55:44.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:44.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:44.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:44.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:44.836 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:55:45.310 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:55:45.782 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:55:46.254 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:55:46.725 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:55:47.199 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:55:47.671 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:55:48.143 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:55:48.614 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:55:49.087 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:55:49.559 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:55:50.031 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:55:50.503 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:55:50.973 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:55:51.447 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:55:51.919 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:55:52.391 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:55:52.862 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:55:53.336 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:55:53.808 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:55:54.280 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:55:54.751 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:55:55.224 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:55:55.696 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:55:56.168 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:55:56.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:55:56.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:55:56.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:55:56.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:55:56.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:55:56.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:55:56.220 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:55:56.220 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:55:56.220 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:55:56.220 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:55:56.220 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:55:56.220 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:55:56.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:01.227 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:01.227 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:01.227 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:01.227 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:01.227 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:01.227 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:01.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:01.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:01.236 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:01.236 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:01.237 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:01.239 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:01.240 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:01.240 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:01.240 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:01.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:01.240 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:01.241 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:01.241 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:01.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:01.242 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:01.242 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:01.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:01.242 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:01.242 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:01.242 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:01.242 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:01.243 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:01.243 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:01.245 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:01.245 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:01.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:01.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:01.248 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:01.248 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:01.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:01.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:01.732 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:01.776 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:01.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:01.780 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:01.782 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:01.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:01.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:01.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:01.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:56:01.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:56:01.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:56:01.795 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:56:01.795 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:56:02.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:56:02.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:02.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:02.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:02.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:02.675 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:56:03.148 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:56:03.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:03.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:03.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:03.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:03.620 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:56:04.092 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:56:04.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:04.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:04.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:04.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:04.563 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:56:05.037 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:56:05.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:05.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:05.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:05.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:05.509 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:56:05.981 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:56:06.255 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:06.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:06.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:06.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:06.452 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:56:06.925 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:56:07.397 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:56:07.869 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:56:08.340 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:56:08.813 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:56:09.286 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:56:09.758 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:56:09.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:09.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:09.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:09.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:09.839 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:09.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:14.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:14.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:14.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:14.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:14.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:14.846 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:14.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:14.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:14.855 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:14.855 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:14.855 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:14.859 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:14.860 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:14.860 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:14.860 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:14.860 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:14.860 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:14.861 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:14.861 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:14.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:14.864 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:14.864 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:14.864 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:14.864 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:14.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:14.865 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:14.865 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:14.865 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:14.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:14.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:14.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:14.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:14.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:14.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:14.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:14.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:14.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:14.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:14.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:14.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:14.873 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:14.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:14.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:15.357 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:15.401 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:15.404 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:15.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:15.406 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:15.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:15.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:15.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:15.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:56:15.416 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:56:15.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:56:15.416 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:56:15.417 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:56:15.829 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:56:15.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:15.876 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:15.876 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:15.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:16.300 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:56:16.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:56:16.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:16.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:16.877 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:16.877 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:17.246 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:56:17.718 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:56:17.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:17.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:17.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:17.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:18.189 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:56:18.662 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:56:18.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:18.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:18.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:19.135 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:56:19.607 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:56:19.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:19.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:19.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:19.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:20.080 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:56:20.552 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:56:21.024 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:56:21.495 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:56:21.968 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:56:22.441 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:56:22.912 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:56:23.384 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:56:23.857 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:56:24.329 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:56:24.801 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:56:25.272 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:56:25.746 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:56:26.218 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:56:26.690 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:56:27.161 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:56:27.635 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:56:28.107 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:56:28.579 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:56:29.050 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:56:29.523 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:56:29.996 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:56:30.467 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:56:30.939 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:56:31.412 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:56:31.466 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:31.466 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:31.470 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:31.471 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:31.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:31.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:31.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:31.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:31.471 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:31.472 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:31.472 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:36.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:36.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:36.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:36.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:36.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:36.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:36.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:36.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:36.486 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:36.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:36.486 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:36.487 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:36.487 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:36.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:36.489 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:36.489 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:36.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:36.491 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:36.491 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:36.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:36.493 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:36.493 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:36.493 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:36.493 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:36.498 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:36.977 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:37.014 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:37.016 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:37.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:37.018 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:37.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:37.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:37.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:37.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:37.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:37.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:37.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:37.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:37.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:37.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:37.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:37.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:37.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:37.051 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:37.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:42.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:42.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:42.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:42.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:42.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:42.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:42.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:42.063 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:42.063 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:42.063 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:42.068 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:42.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:42.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:42.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:42.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:42.068 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:42.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:42.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:42.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:42.073 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:42.073 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:42.073 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:42.073 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:42.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:42.074 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:42.074 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:42.074 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:42.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:42.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:42.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:42.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:42.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:42.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:42.078 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:42.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:42.078 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:42.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:42.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:42.085 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:42.085 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:42.085 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:42.090 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:42.569 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:42.619 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:42.621 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:42.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:42.624 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:42.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:42.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:42.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:42.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:42.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:42.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:42.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:42.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:42.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:42.665 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:42.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:42.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:42.665 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:47.667 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:47.667 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:47.667 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:47.667 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:47.667 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:47.667 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:47.675 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:47.676 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:47.676 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:47.677 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:47.677 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:47.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:47.681 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:47.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:47.681 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:47.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:47.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:47.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:47.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:47.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:47.685 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:47.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:47.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:47.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:47.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:47.686 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:47.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:47.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:47.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:47.689 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:47.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:47.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:47.690 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:47.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:47.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:47.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:47.690 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:47.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:47.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:47.696 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:47.696 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:47.696 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:47.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:47.701 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:48.180 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:48.233 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:48.236 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:48.238 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:48.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:48.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:48.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:48.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:48.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:48.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:48.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:48.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:48.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:48.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:48.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:48.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:48.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:48.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:48.287 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:48.287 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:53.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:53.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:53.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:53.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:53.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:53.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:53.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:53.295 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:53.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:53.296 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:53.298 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:53.298 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:53.299 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:53.299 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:53.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:53.300 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:53.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:53.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:53.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:53.302 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:53.302 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:53.302 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:53.303 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:53.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:53.303 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:53.303 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:53.303 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:53.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:53.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:53.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:53.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:53.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:53.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:53.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:53.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:53.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:53.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:53.312 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:53.312 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:53.312 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.312 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:53.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:53.317 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:53.796 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:53.837 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:53.838 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:53.839 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:53.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:53.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:53.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:53.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:53.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:53.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:53.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:53.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:53.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:53.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:53.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:53.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:53.867 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:53.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:53.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:53.868 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:58.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:58.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:58.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:58.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:58.872 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:58.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:58.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:58.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:58.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:58.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:56:58.881 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:56:58.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:56:58.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:56:58.883 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:58.883 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:58.883 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:58.883 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:56:58.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:56:58.884 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:56:58.884 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:58.888 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:56:58.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:56:58.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:58.889 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:58.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:58.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:56:58.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:56:58.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:56:58.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:58.893 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:56:58.893 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:56:58.893 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:58.893 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:56:58.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:58.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:56:58.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:56:58.894 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:56:58.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:56:58.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:56:58.901 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:56:58.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:56:58.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:56:58.906 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:56:59.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:56:59.435 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:56:59.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:56:59.438 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:56:59.441 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:56:59.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:59.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:59.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:59.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:56:59.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:56:59.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:56:59.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:56:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:56:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:56:59.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:56:59.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:56:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:56:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:56:59.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:56:59.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:56:59.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:56:59.494 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:56:59.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:04.496 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:04.496 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:04.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:04.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:04.496 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:04.496 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:04.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:04.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:04.503 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:04.503 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:04.503 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:04.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:04.504 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:57:04.504 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:04.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:57:04.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:57:04.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:04.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:04.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:04.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:57:04.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:04.506 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:57:04.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:04.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:57:04.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:57:04.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:04.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:04.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:04.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:57:04.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:04.510 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:57:04.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:57:04.516 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:57:04.516 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:57:04.516 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:04.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:04.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:57:04.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:57:05.045 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:57:05.047 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:57:05.049 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:57:05.050 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:57:05.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:57:05.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:57:05.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:57:05.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:57:05.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:57:05.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:57:05.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:05.122 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:05.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:05.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:05.123 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:05.123 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:05.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:05.123 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:05.123 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:05.123 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:05.123 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:57:05.123 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:05.123 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:05.123 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:05.123 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:05.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:05.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:10.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:10.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:10.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:10.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:10.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:10.131 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:10.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:10.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:10.134 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:10.134 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:10.134 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:10.135 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:10.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:57:10.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:10.136 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:10.136 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:57:10.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:10.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:57:10.138 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:57:10.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:10.138 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:10.138 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:10.138 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:57:10.138 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:10.138 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:57:10.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:57:10.140 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:57:10.140 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:57:10.140 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:10.145 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:57:10.620 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:57:10.654 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:57:10.655 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:57:10.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:57:10.656 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:57:10.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:57:10.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:57:10.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:57:10.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:57:10.659 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:57:10.659 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:57:10.659 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:57:10.659 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:57:11.092 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:57:11.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:11.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:11.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:11.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:11.563 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:57:12.037 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:57:12.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:12.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:12.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:12.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:12.509 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:57:12.981 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:57:13.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:13.145 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:13.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:13.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:13.452 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:57:13.925 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:57:14.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:14.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:14.398 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:57:14.870 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:57:15.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:15.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:15.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:15.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:15.341 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:57:15.814 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:57:16.287 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:57:16.759 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:57:17.229 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:57:17.703 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:57:18.176 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:57:18.648 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:57:19.121 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 01:57:19.593 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 01:57:20.065 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 01:57:20.536 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 01:57:21.009 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 01:57:21.482 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 01:57:21.954 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 01:57:22.425 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 01:57:22.898 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 01:57:23.370 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 01:57:23.843 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 01:57:24.316 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 01:57:24.788 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 01:57:25.260 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 01:57:25.731 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 01:57:26.205 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 01:57:26.677 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 01:57:27.149 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 01:57:27.620 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 01:57:28.094 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 01:57:28.566 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 01:57:29.038 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 01:57:29.509 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 01:57:29.980 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 01:57:30.451 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 01:57:30.924 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 01:57:31.396 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 01:57:31.868 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 01:57:32.339 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 01:57:32.813 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 01:57:33.285 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 01:57:33.757 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 01:57:34.228 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 01:57:34.701 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 01:57:35.173 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 01:57:35.645 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 01:57:36.119 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 01:57:36.591 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 01:57:37.063 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 01:57:37.534 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 01:57:38.007 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 01:57:38.479 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 01:57:38.952 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 01:57:39.423 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 01:57:39.896 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 01:57:40.368 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 01:57:40.840 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 01:57:41.311 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 01:57:41.785 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 01:57:42.257 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 01:57:42.730 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 01:57:43.203 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 01:57:43.675 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 01:57:44.147 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 01:57:44.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:57:44.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:57:44.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:44.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:44.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:44.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:44.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:44.167 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:44.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:44.167 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:44.167 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:44.167 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:44.167 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:57:44.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:44.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:44.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:44.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:44.167 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:49.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:49.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:49.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:49.170 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:49.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:49.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:49.175 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:49.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:49.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:49.177 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:49.177 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:57:49.180 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:57:49.181 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:57:49.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:49.181 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:49.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:49.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:57:49.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:49.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:57:49.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:49.183 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:57:49.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:57:49.183 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:49.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:49.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:49.184 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:57:49.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:49.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:57:49.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:49.186 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:49.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:57:49.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:49.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:57:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:57:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:57:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:57:49.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:57:49.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:57:49.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:57:49.189 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:57:49.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:49.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:49.194 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:57:49.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:57:49.716 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:57:49.719 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:57:49.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:57:49.721 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:57:50.142 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:57:50.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:50.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:50.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:50.615 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:57:51.089 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:57:51.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:51.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:57:52.036 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:57:52.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:52.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:52.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:52.508 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:57:52.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:57:52.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:52.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:52.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:52.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:52.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:52.761 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:57:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:52.763 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=771 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:57:57.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:57:57.764 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:57:57.764 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:57.764 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:57.764 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:57.764 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:57.771 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:57:57.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:57.772 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:57.772 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:57:57.772 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:57:57.776 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:57:57.776 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:57:57.776 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:57.776 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:57.777 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:57:57.777 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:57:57.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:57:57.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:57:57.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:57.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:57:57.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:57:57.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:57.780 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:57.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:57:57.780 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:57:57.780 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:57:57.780 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:57:57.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:57.782 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:57:57.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:57:57.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:57.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:57:57.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:57:57.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:57:57.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:57:57.783 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:57:57.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:57:57.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:57:57.787 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:57:57.787 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:57:57.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:57:57.792 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:57:58.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:57:58.315 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:57:58.317 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:57:58.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:57:58.319 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:57:58.742 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:57:58.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:58.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:58.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:58.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:57:59.217 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:57:59.689 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:57:59.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:57:59.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:57:59.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:57:59.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:00.164 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:58:00.636 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:58:00.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:00.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:00.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:00.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:01.111 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:58:01.583 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:58:01.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:01.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:01.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:01.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:02.059 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:58:02.531 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:58:02.796 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:02.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:02.796 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:02.797 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:03.006 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:58:03.478 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:58:03.953 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:58:04.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:04.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:04.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:04.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:04.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:04.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:04.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:04.335 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:58:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:09.342 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:09.342 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:09.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:09.342 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:09.342 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:09.342 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:09.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:09.349 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:09.349 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:09.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:09.350 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:58:09.353 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:58:09.354 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:58:09.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:09.355 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:09.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:09.356 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:58:09.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:09.356 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:58:09.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:09.359 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:58:09.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:58:09.359 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:09.359 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:09.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:09.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:58:09.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:09.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:58:09.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:09.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:58:09.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:58:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:09.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:09.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:09.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:58:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:09.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:58:09.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:58:09.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:58:09.369 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:58:09.369 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:09.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:09.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:58:09.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:58:09.893 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:58:09.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:58:09.896 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:58:09.898 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:58:10.323 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:58:10.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:10.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:10.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:10.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:10.797 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:58:11.269 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:58:11.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:11.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:11.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:11.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:11.741 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:58:12.212 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:58:12.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:12.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:12.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:12.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:12.687 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:58:13.159 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:58:13.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:13.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:13.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:13.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:13.634 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:58:14.106 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:58:14.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:14.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:14.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:14.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:14.581 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:58:15.053 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:58:15.527 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:58:15.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:15.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:15.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:15.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:15.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:15.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:15.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:15.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:15.916 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:58:15.917 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:15.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:15.917 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:15.917 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:15.917 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:15.917 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:15.917 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:15.918 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:15.918 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1413 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:20.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:20.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:20.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:20.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:20.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:20.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:20.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:20.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:20.922 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:20.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:20.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:58:20.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:58:20.925 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:58:20.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:20.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:20.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:20.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:58:20.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:20.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:58:20.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:20.928 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:58:20.928 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:58:20.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:20.928 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:20.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:20.928 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:58:20.928 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:20.928 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:58:20.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:20.930 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:20.930 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:58:20.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:20.932 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:58:20.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:58:20.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:58:20.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:58:20.933 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:58:20.933 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:58:20.933 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:20.938 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:58:21.416 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:58:21.451 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:58:21.452 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:58:21.453 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:58:21.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:58:21.888 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:58:21.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:21.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:21.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:21.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:22.362 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:58:22.834 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:58:22.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:22.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:22.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:22.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:23.306 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:58:23.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:58:23.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:23.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:24.253 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:58:24.727 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:58:24.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:24.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:24.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:24.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:25.199 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:58:25.670 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:58:25.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:25.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:25.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:25.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:26.142 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:58:26.614 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:58:27.089 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:58:27.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:27.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:27.465 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:27.465 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:27.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:27.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:27.467 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:27.467 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:27.467 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:58:27.467 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:27.467 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:32.471 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:32.471 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:32.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:32.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:32.471 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:32.471 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:32.479 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:32.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:32.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:32.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:32.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:58:32.489 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:58:32.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:58:32.490 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:32.490 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:32.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:32.491 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:58:32.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:32.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:58:32.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:32.494 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:58:32.495 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:58:32.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:32.495 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:32.496 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:32.496 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:58:32.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:32.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:58:32.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:32.499 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:58:32.500 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:58:32.500 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:32.500 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:32.500 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:32.500 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:58:32.501 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:32.501 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:58:32.501 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:32.504 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:58:32.504 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:58:32.504 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:58:32.504 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.505 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:58:32.505 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:58:32.505 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:58:32.505 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:32.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:32.510 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:58:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:58:33.032 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:58:33.035 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:58:33.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:58:33.039 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:58:33.459 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:58:33.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:33.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:33.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:33.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:33.933 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:58:34.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:58:34.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:34.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:34.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:34.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:34.880 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:58:35.352 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:58:35.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:35.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:35.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:35.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:35.827 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:58:36.299 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:58:36.513 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:36.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:36.515 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:36.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:36.775 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:58:37.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:58:37.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:58:37.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:37.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:37.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:37.721 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:58:38.192 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:58:38.664 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:58:39.135 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:58:39.610 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:58:40.082 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:58:40.555 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:58:41.028 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:58:41.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:41.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:41.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:41.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:41.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:41.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:41.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:41.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:41.065 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:58:41.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:41.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:41.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:46.070 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:46.070 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:46.070 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:46.071 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:46.071 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:46.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:46.079 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:46.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:46.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:46.082 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:46.082 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:58:46.088 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:58:46.088 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:58:46.089 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:46.089 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:46.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:46.090 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:58:46.090 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:46.090 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:58:46.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:46.093 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:58:46.093 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:58:46.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:46.094 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:46.094 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:46.094 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:58:46.094 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:46.094 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:58:46.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:46.097 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:58:46.097 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:58:46.097 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:46.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:46.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:46.098 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:58:46.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:46.098 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:58:46.098 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:46.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:58:46.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:58:46.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:58:46.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:58:46.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:58:46.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:46.107 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:58:46.586 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:58:46.633 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:58:46.634 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:58:46.635 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:58:46.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:58:47.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:58:47.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:47.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:47.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:47.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:47.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:58:48.005 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:58:48.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:48.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:48.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:48.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:48.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:58:48.951 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:58:49.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:49.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:49.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:49.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:49.423 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:58:49.898 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:58:50.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:50.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:50.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:50.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:50.370 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:58:50.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:50.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:50.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:50.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:50.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:50.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:50.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:50.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:50.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:50.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:50.669 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:58:50.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:50.670 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:50.670 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:50.670 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:50.670 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:50.670 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:50.670 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=985 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:55.657 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:55.657 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:55.657 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:55.657 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:55.657 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:55.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:55.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:55.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:55.682 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:55.683 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:58:55.683 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:58:55.687 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:58:55.687 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:58:55.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:55.688 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:55.688 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:55.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:58:55.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:58:55.690 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:58:55.690 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:55.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:58:55.692 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:58:55.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:55.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:55.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:55.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:58:55.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:58:55.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:58:55.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:55.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:58:55.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:58:55.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:55.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:58:55.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:55.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:58:55.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:58:55.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:58:55.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:55.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:58:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:58:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:58:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:58:55.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:58:55.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:58:55.701 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:58:55.701 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:58:55.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:58:55.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:58:56.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:58:56.232 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:58:56.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:58:56.236 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:58:56.238 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:58:56.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:58:56.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:58:56.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:58:56.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:58:56.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:58:56.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:58:56.254 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:58:56.254 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:58:56.255 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:58:56.255 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:58:56.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:58:56.255 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:01.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:01.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:01.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:01.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:01.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:01.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:01.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:01.268 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:01.268 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:01.268 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:01.271 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:01.271 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:01.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:01.271 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:01.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:01.272 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:01.272 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:01.272 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:01.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:01.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:01.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:01.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:01.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:01.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:01.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:01.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:01.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:01.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:01.277 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:01.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:01.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:01.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:01.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:01.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:01.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:01.278 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:01.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:01.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:01.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:01.282 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:01.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:01.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:01.287 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:01.765 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:01.806 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:01.806 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:01.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:01.807 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:01.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:01.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:01.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:01.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:01.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:01.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:01.827 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:01.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:01.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:01.828 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:59:01.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:01.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:01.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.829 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.829 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.829 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.829 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:01.829 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:06.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:06.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:06.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:06.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:06.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:06.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:06.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:06.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:06.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:06.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:06.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:06.844 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:06.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:06.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:06.845 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:06.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:06.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:06.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:06.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:06.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:06.849 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:06.849 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:06.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:06.849 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:06.849 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:06.850 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:06.850 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:06.850 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:06.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:06.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:06.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:06.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:06.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:06.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:06.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:06.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:06.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:06.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.859 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.860 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:06.860 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:06.860 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:06.860 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:06.860 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.860 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.860 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:06.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.862 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:06.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:06.865 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:07.343 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:07.394 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:07.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:07.397 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:07.399 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:07.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:07.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:07.414 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:07.414 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:07.414 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:07.414 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:07.414 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:07.414 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:07.415 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:07.415 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:12.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:12.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:12.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:12.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:12.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:12.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:12.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:12.423 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:12.424 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:12.424 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:12.424 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:12.426 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:12.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:12.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:12.427 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:12.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:12.428 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:12.428 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:12.428 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:12.428 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:12.430 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:12.431 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:12.431 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:12.431 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:12.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:12.431 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:12.432 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:12.432 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:12.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:12.434 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:12.434 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:12.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:12.437 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:12.437 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:12.438 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:12.438 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:12.438 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.438 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:12.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:12.443 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:12.921 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:12.968 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:12.972 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:12.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:12.976 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:12.983 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:12.983 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:59:12.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:12.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:12.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:12.984 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:59:12.984 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:59:13.393 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:59:13.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:13.442 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:13.864 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:59:14.338 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:59:14.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:14.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:14.443 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:14.443 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:14.810 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:59:15.282 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:59:15.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:15.443 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:15.444 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:15.444 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:15.753 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:59:16.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:16.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:16.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:16.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:16.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:16.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:16.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:16.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:16.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:16.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:16.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:16.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:16.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:16.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:16.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:16.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:16.092 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:59:16.092 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:21.096 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:21.096 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:21.096 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:21.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:21.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:21.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:21.103 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:21.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:21.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:21.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:21.103 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:21.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:21.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:21.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:21.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:21.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:21.107 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:21.107 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:21.107 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:21.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:21.109 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:21.109 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:21.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:21.110 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:21.110 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:21.110 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:21.111 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:21.111 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:21.111 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:21.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:21.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:21.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:21.113 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:21.113 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:21.113 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:21.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:21.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:21.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:21.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:21.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:21.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:21.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:21.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:21.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:21.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:21.117 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:21.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:21.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:21.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:21.600 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:21.647 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:21.649 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:21.652 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:21.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:21.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:21.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:21.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:59:21.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:21.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:21.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:21.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:59:21.661 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:59:22.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:59:22.119 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:22.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:22.120 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:22.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:22.543 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:59:23.014 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:59:23.120 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:23.120 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:23.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:23.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:23.485 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:59:23.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:59:24.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:24.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:24.122 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:24.122 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:24.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:59:24.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:24.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:24.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:24.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:24.903 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:59:25.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:25.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:25.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:25.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:25.374 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:59:25.384 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:25.384 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:25.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:25.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:25.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:25.396 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:25.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:25.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:25.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:25.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:25.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:25.397 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:59:25.398 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:25.398 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:25.398 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:25.398 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:25.398 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:25.398 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:30.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:30.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:30.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:30.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:30.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:30.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:30.406 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:30.408 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:30.408 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:30.409 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:30.409 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:30.415 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:30.415 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:30.416 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:30.416 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:30.416 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:30.417 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:30.417 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:30.417 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:30.418 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:30.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:30.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:30.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:30.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:30.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:30.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:30.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:30.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:30.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:30.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:30.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:30.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:30.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:30.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:30.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:30.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:30.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:30.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:30.432 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:30.432 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:30.432 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:30.433 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:30.437 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:30.913 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:30.965 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:30.967 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:30.969 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:30.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:30.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:30.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:30.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:59:30.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:30.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:30.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:30.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:59:30.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:59:31.385 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:59:31.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:31.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:31.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:31.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:31.856 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:59:32.329 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:59:32.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:32.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:32.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:32.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:32.802 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:59:33.274 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:59:33.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:33.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:33.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:33.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:33.745 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:59:34.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:34.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:34.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:34.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:34.218 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:59:34.439 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:34.440 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:34.440 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:34.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:34.690 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:59:35.162 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:59:35.441 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:35.441 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:35.633 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:59:36.107 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:59:36.579 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:59:37.051 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:59:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:59:37.995 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:59:38.468 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:59:38.940 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:59:39.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:39.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:39.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:39.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:39.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:39.049 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:39.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:39.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:39.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:39.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:39.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:39.051 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:59:39.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:39.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:39.051 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:44.056 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:44.056 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:44.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:44.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:44.064 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:44.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:44.065 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:44.065 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:44.065 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:44.067 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:44.068 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:44.068 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:44.068 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:44.068 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:44.069 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:44.069 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:44.069 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:44.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:44.070 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:44.070 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:44.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:44.070 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:44.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:44.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:44.071 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:44.071 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:44.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:44.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:44.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:44.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:44.072 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:44.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:44.073 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:44.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:44.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:44.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:44.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:44.075 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:44.076 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:44.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:44.080 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:44.558 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:44.599 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:44.601 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:44.603 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:44.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:44.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:44.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:44.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:59:44.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:44.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:44.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:44.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:59:44.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:59:45.030 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:59:45.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:45.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:45.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:45.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:45.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:59:45.975 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:59:46.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:46.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:46.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:46.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:46.447 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 01:59:46.919 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 01:59:47.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:47.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:47.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:47.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:47.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 01:59:47.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:47.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:47.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:47.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:47.863 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 01:59:48.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:48.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:48.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:48.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:48.336 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 01:59:48.808 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 01:59:49.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:49.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:49.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:49.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:49.279 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 01:59:49.753 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 01:59:50.225 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 01:59:50.697 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 01:59:51.171 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 01:59:51.643 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 01:59:52.115 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 01:59:52.586 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 01:59:52.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:52.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:52.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:52.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:52.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:52.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:52.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:52.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:52.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:52.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:52.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:52.697 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 01:59:52.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:52.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:52.697 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:52.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:52.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:52.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:52.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:52.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:52.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 01:59:57.700 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 01:59:57.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 01:59:57.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:57.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:57.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:57.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:57.708 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 01:59:57.708 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:57.709 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:57.709 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 01:59:57.709 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 01:59:57.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 01:59:57.712 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 01:59:57.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:57.712 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:57.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 01:59:57.713 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 01:59:57.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 01:59:57.713 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 01:59:57.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:57.714 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 01:59:57.714 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 01:59:57.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:57.714 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:57.714 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 01:59:57.714 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 01:59:57.714 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 01:59:57.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 01:59:57.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:57.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 01:59:57.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 01:59:57.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:57.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 01:59:57.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 01:59:57.717 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 01:59:57.717 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 01:59:57.717 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 01:59:57.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 01:59:57.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 01:59:57.720 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 01:59:57.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 01:59:57.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 01:59:58.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 01:59:58.246 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 01:59:58.248 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 01:59:58.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 01:59:58.251 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 01:59:58.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 01:59:58.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 01:59:58.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 01:59:58.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 01:59:58.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 01:59:58.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 01:59:58.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 01:59:58.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 01:59:58.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 01:59:58.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:58.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:58.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:58.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 01:59:59.147 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 01:59:59.620 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 01:59:59.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 01:59:59.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 01:59:59.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 01:59:59.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:00.093 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:00:00.565 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:00:00.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:00.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:00.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:00.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:01.036 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:00:01.319 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:01.319 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:01.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:01.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:01.507 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:00:01.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:01.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:01.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:01.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:01.980 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:00:02.452 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:00:02.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:02.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:02.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:02.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:02.925 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:00:03.398 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:00:03.871 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:00:04.343 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:00:04.814 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:00:05.287 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:00:05.759 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:00:06.232 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:00:06.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:06.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:06.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:06.340 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:06.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:06.340 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:06.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:06.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:06.343 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:06.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:06.343 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:06.343 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:06.343 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:06.343 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:06.343 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:11.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:11.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:11.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:11.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:11.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:11.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:11.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:11.356 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:11.356 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:11.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:11.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:00:11.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:00:11.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:00:11.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:11.361 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:11.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:11.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:00:11.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:11.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:00:11.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:11.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:00:11.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:00:11.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:11.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:11.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:11.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:00:11.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:11.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:00:11.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:11.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:11.367 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:00:11.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:11.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:00:11.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:00:11.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:00:11.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:00:11.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:00:11.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:00:11.371 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:00:11.371 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:00:11.371 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:11.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:00:11.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:00:11.900 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:00:11.902 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:00:11.903 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:00:11.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:11.908 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:11.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:11.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:00:11.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:11.910 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:11.911 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:11.911 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:00:11.911 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:00:11.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:11.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:11.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:11.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:12.326 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:00:12.373 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:12.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:12.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:12.374 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:12.798 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:00:13.271 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:00:13.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:13.374 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:13.374 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:13.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:13.743 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:00:14.215 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:00:14.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:14.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:14.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:14.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:14.686 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:00:15.160 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:00:15.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:15.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:15.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:15.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:15.632 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:00:16.104 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:00:16.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:16.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:16.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:16.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:16.575 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:00:16.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:16.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:16.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:16.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:16.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:16.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:16.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:16.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:16.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:16.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:16.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:16.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:16.961 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:21.966 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:21.966 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:21.966 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:21.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:21.966 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:21.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:21.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:21.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:21.974 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:21.974 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:21.974 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:00:21.977 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:00:21.977 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:00:21.977 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:21.977 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:21.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:21.977 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:00:21.978 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:21.978 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:00:21.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:21.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:21.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:00:21.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:21.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:21.982 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:00:21.982 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:00:21.985 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:00:21.985 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:00:21.985 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:00:21.985 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:21.990 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:00:22.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:00:22.498 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:00:22.498 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:00:22.499 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:00:22.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:22.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:22.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:22.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:00:22.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:22.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:22.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:22.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:00:22.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:00:22.940 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:00:22.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:22.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:23.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:00:23.886 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:00:23.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:23.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:23.991 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:24.358 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:00:24.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:00:24.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:24.991 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:24.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:24.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:25.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:00:25.524 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:25.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:25.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:25.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:25.774 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:00:25.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:25.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:25.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:25.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:26.246 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:00:26.719 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:00:26.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:26.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:26.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:26.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:27.189 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:00:27.660 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:00:28.133 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:00:28.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:28.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:28.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:28.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:28.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:28.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:28.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:28.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:28.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:28.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:28.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:28.186 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:28.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:28.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:33.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:33.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:33.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:33.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:33.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:33.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:33.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:33.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:33.206 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:33.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:33.206 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:00:33.208 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:00:33.209 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:00:33.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:33.209 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:33.209 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:33.209 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:00:33.209 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:33.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:00:33.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:33.211 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:33.211 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:00:33.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:33.213 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:33.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:00:33.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:00:33.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:00:33.216 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:00:33.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:33.221 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:00:33.697 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:00:33.745 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:00:33.747 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:00:33.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:33.749 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:00:33.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:33.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:33.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:00:33.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:33.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:33.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:33.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:00:33.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:00:34.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:00:34.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:34.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:34.640 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:00:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:00:35.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:35.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:35.221 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:35.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:35.584 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:00:36.057 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:00:36.222 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:36.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:36.223 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:36.529 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:00:36.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:36.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:36.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:36.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:36.846 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:36.846 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:36.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:36.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:36.847 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:41.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:41.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:41.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:41.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:41.860 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:41.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:41.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:41.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:41.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:00:41.868 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:00:41.869 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:00:41.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:41.869 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:41.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:41.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:00:41.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:41.869 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:00:41.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:41.873 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:00:41.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:00:41.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:41.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:41.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:41.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:00:41.875 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:41.875 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:00:41.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:41.878 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:00:41.878 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:00:41.878 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:41.878 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:41.878 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:41.879 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:00:41.879 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:41.879 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:00:41.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:00:41.883 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:00:41.884 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:00:41.884 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:00:41.884 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:00:41.884 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.885 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:41.889 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:00:42.367 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:00:42.417 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:00:42.419 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:00:42.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:42.422 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:00:42.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:42.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:42.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:00:42.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:42.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:42.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:42.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:00:42.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:00:42.837 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:00:42.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:42.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:42.887 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:42.888 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:43.310 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:00:43.782 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:00:43.888 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:43.888 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:43.888 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:43.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:44.253 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:00:44.727 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:00:44.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:44.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:44.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:44.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:45.199 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:00:45.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:45.515 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:45.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:45.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:45.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:45.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:45.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:45.523 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:45.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:45.523 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:45.523 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:45.523 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:45.523 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:45.523 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:45.523 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:50.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:50.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:50.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:50.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:50.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:50.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:50.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:50.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:50.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:50.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:50.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:00:50.539 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:00:50.539 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:00:50.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:50.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:50.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:50.540 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:00:50.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:50.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:00:50.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:50.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:50.542 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:00:50.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:50.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:00:50.544 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:00:50.544 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:50.544 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:50.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:50.544 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:00:50.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:50.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:00:50.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:50.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:00:50.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:00:50.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:00:50.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:00:50.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:00:50.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:00:50.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:00:50.548 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:00:50.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:50.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:50.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:00:51.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:00:51.074 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:00:51.077 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:00:51.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:51.079 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:00:51.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:51.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:51.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:00:51.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:51.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:51.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:51.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:00:51.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:00:51.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:51.347 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:51.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:51.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:51.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:51.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:51.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:51.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:51.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:51.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:51.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:51.355 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:51.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:51.355 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:56.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:56.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:56.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:56.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:56.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:56.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:56.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:56.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:56.370 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:56.370 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:00:56.370 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:00:56.373 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:00:56.374 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:00:56.374 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:56.374 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:56.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:56.375 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:00:56.375 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:00:56.375 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:00:56.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:56.377 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:00:56.377 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:00:56.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:56.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:56.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:56.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:00:56.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:00:56.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:00:56.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:56.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:00:56.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:00:56.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:00:56.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:00:56.384 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:00:56.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:00:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:00:56.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:00:56.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:00:56.865 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:00:56.912 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:00:56.914 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:00:56.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:00:56.917 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:00:56.925 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:56.925 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:56.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:00:56.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:00:56.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:00:56.926 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:00:56.926 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:00:56.926 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:00:57.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:00:57.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:00:57.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:00:57.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:00:57.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:00:57.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:00:57.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:00:57.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:00:57.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:00:57.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:00:57.142 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:00:57.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:00:57.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:00:57.142 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:57.143 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:57.143 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:57.143 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:57.143 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:57.143 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:00:57.143 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:02.147 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:02.147 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:02.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:02.147 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:02.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:02.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:02.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:02.157 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:02.157 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:02.158 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:02.158 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:01:02.162 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:01:02.162 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:01:02.163 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:02.163 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:02.163 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:02.163 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:01:02.164 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:02.164 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:01:02.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:02.166 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:01:02.167 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:01:02.167 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:02.167 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:02.167 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:02.168 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:01:02.168 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:02.168 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:01:02.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:02.171 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:01:02.171 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:01:02.171 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:02.171 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:02.171 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:02.172 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:01:02.172 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:02.172 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:01:02.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.176 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:01:02.177 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:01:02.177 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:01:02.177 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.177 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:02.178 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:02.182 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:01:02.659 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:01:02.706 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:01:02.708 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:01:02.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:02.710 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:02.716 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:01:02.716 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:01:02.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:01:02.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:01:02.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:01:02.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:01:02.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:01:02.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:01:03.131 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:01:03.179 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:03.180 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:03.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:03.602 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:01:04.072 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:01:04.180 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:04.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:04.543 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:01:05.011 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:01:05.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:05.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:05.181 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:05.181 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:05.477 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:01:05.943 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:01:06.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:06.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:06.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:06.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:06.414 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:01:06.884 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:01:07.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:07.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:07.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:07.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:07.355 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:01:07.826 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:01:08.297 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:01:08.767 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:01:09.236 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:01:09.701 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:01:10.166 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:01:10.630 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:01:11.098 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:01:11.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:01:11.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:01:11.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:11.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:11.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:11.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:11.438 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:01:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:11.438 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.438 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.439 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.439 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.439 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.439 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.439 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:11.439 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:16.440 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:16.440 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:16.440 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:16.440 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:16.440 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:16.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:16.443 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:16.443 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:16.443 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:16.444 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:16.444 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:01:16.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:01:16.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:01:16.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:16.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:16.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:16.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:01:16.445 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:16.445 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:01:16.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:16.446 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:16.446 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:01:16.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:16.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:16.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:01:16.447 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:01:16.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:01:16.450 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:01:16.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:16.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:16.454 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:01:16.925 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:01:16.973 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:01:16.974 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:01:16.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:16.976 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:16.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:01:16.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:01:16.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:01:16.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:01:16.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:01:16.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:01:16.980 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:01:16.980 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:01:17.392 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:01:17.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:17.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:17.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:17.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:17.859 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:01:18.324 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:01:18.452 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:18.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:18.452 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:18.452 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:18.790 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:01:19.255 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:01:19.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:19.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:19.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:19.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:19.723 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:01:20.194 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:01:20.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:20.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:20.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:20.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:20.664 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:01:21.135 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:01:21.455 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:21.455 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:21.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:21.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:21.605 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:01:22.077 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:01:22.547 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:01:23.019 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:01:23.488 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:01:23.955 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:01:24.421 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:01:24.885 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:01:25.352 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:01:25.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:01:25.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:01:25.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:25.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:25.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:25.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:25.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:25.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:25.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:25.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:25.690 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:01:25.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:25.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:25.690 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2014 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:30.696 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:30.696 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:30.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:30.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:30.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:30.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:30.706 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:30.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:30.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:30.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:30.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:01:30.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:01:30.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:01:30.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:30.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:30.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:30.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:01:30.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:30.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:01:30.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:30.710 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:30.710 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:01:30.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:30.711 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:30.711 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:01:30.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:01:30.713 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:01:30.713 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:01:30.713 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.713 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:30.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:30.718 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:01:31.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:01:31.226 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:01:31.227 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:31.227 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:01:31.227 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:31.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:01:31.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:01:31.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:01:31.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:01:31.229 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:01:31.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:01:31.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:01:31.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:01:31.652 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:01:31.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:31.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:31.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:31.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:32.117 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:01:32.590 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:01:32.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:32.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:32.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:32.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:33.062 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:01:33.528 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:01:33.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:33.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:33.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:33.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:33.995 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:01:34.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:01:34.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:01:34.293 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:01:34.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:01:34.340 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.381 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.422 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.459 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.460 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:01:34.497 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.540 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.576 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.619 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.660 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.698 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:34.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:34.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:34.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:34.739 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.780 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:34.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:01:34.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:01:34.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:34.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:34.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:34.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:34.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:34.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:34.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:34.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:34.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:34.826 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:01:34.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:34.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:39.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:39.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:39.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:39.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:39.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:39.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:39.841 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:39.841 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:01:39.844 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:01:39.844 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:01:39.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:39.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:39.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:39.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:01:39.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:39.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:01:39.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:39.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:01:39.847 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:01:39.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:39.848 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:39.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:39.848 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:01:39.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:39.848 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:01:39.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:39.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:39.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:01:39.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:39.852 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:01:39.853 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:01:39.853 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:01:39.853 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:39.858 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:01:40.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:01:40.369 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:01:40.370 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:01:40.371 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:40.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:40.475 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:40.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:40.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:40.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:40.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:40.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:40.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:40.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:40.476 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:01:45.477 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:45.478 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:45.478 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:45.478 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:45.478 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:45.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:45.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:45.481 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:45.481 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:45.482 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:01:45.482 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:01:45.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:01:45.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:01:45.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:45.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:45.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:45.483 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:01:45.483 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:01:45.483 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:01:45.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:45.484 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:01:45.484 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:01:45.484 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:45.485 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:01:45.485 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:01:45.485 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:01:45.487 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:01:45.487 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:01:45.487 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:01:45.492 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:01:45.958 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:01:45.999 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:01:45.999 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:01:45.999 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:01:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:46.425 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:01:46.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:46.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:46.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:46.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:46.890 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:01:47.359 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:01:47.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:47.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:47.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:47.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:47.826 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:01:48.293 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:01:48.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:48.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:48.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:48.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:48.761 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:01:49.225 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:01:49.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:49.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:49.493 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:49.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:49.693 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:01:50.163 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:01:50.493 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:50.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:50.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:50.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:50.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:01:51.101 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:01:51.565 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:01:52.029 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:01:52.495 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:01:52.958 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:01:53.429 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:01:53.902 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:01:54.370 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:01:54.833 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:01:55.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:01:55.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:01:55.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:01:55.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:01:55.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:01:55.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:01:55.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:01:55.029 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:01:55.029 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:01:55.029 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:01:55.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:01:55.029 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:01:55.029 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2085 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:00.035 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:00.035 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:00.035 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:00.035 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:00.035 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:00.035 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:00.043 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:00.044 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:00.045 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:00.045 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:00.045 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:00.047 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:00.048 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:00.048 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:00.048 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:00.048 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:00.049 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:00.049 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:00.049 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:00.049 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:00.050 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:00.050 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:00.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:00.050 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:00.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:00.050 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:00.050 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:00.050 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:00.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:00.052 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:00.053 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:00.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:00.053 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:00.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:00.053 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:00.053 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:00.053 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:00.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:00.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:00.056 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:00.056 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:00.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:00.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:00.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:00.060 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:00.537 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:00.582 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:00.584 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:00.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:00.586 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:01.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:01.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:01.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:01.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:01.484 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:02:01.956 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:02:02.061 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:02.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:02.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:02.062 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:02.431 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:02:02.899 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:02:03.063 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:03.063 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:03.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:03.063 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:03.363 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:02:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:02:04.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:04.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:04.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:04.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:04.289 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:02:04.751 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:02:05.064 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:05.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:05.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:05.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:05.213 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:02:05.676 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:02:06.142 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:02:06.605 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:02:07.068 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:02:07.534 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:02:07.996 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:02:08.461 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:02:08.931 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:02:09.400 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:02:09.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:09.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:09.607 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:09.607 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:09.607 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:09.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:09.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:09.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:09.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:09.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:09.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:09.609 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:09.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2088 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:09.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2088 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:09.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2088 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:09.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2088 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:09.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2088 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:09.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2088 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:14.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:14.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:14.614 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:14.614 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:14.614 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:14.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:14.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:14.625 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:14.625 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:14.626 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:14.626 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:14.631 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:14.631 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:14.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:14.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:14.632 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:14.632 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:14.632 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:14.632 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:14.633 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:14.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:14.634 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:14.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:14.636 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:14.636 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:14.636 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:14.636 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:14.636 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:14.636 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:14.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:14.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:14.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.639 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:14.639 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:14.639 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:14.640 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:14.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:15.116 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:15.151 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:15.151 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:15.152 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:15.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:15.578 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:15.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:15.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:15.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:15.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:16.041 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:02:16.503 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:02:16.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:16.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:16.642 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:16.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:16.966 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:02:17.431 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:02:17.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:17.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:17.895 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:02:18.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:18.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:18.186 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:18.186 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:18.186 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:23.188 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:23.188 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:23.188 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:23.188 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:23.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:23.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:23.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:23.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:23.192 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:23.192 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:23.192 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:23.194 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:23.194 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:23.194 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:23.194 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:23.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:23.195 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:23.195 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:23.195 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:23.195 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:23.196 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:23.196 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:23.196 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:23.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:23.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:23.198 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:23.201 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:23.201 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:23.201 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:23.201 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:23.206 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:23.672 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:23.713 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:23.713 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:23.713 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:23.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:23.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:23.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:23.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:02:23.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:23.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:02:23.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:02:23.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:02:23.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:02:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:23.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:02:23.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:02:23.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:23.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:24.137 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:24.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:24.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:24.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:24.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:24.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:24.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:24.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:24.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:24.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:24.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:24.142 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:24.142 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:24.142 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:24.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:24.142 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:29.144 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:29.144 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:29.144 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:29.144 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:29.144 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:29.144 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:29.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:29.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:29.150 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:29.150 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:29.150 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:29.151 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:29.151 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:29.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:29.152 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:29.152 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:29.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:29.153 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:29.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:29.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:29.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:29.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:29.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:29.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:29.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:29.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:29.156 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:29.156 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:29.156 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:29.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:29.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:29.667 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:29.667 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:29.668 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:29.668 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:29.671 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:29.671 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:29.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:29.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:29.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:29.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:29.672 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:29.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:29.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:34.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:34.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:34.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:34.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:34.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:34.675 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:34.678 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:34.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:34.679 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:34.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:34.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:34.680 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:34.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:34.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:34.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:34.680 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:34.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:34.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:34.681 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:34.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:34.682 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:34.683 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:34.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:34.683 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:34.683 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:34.683 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:34.683 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:34.683 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:34.683 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:34.685 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:34.685 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:34.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:34.689 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:34.690 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:34.690 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:34.690 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:34.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:34.695 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:35.162 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:35.215 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:35.216 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:35.217 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:35.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:35.628 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:35.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:35.693 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:35.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:35.693 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:36.094 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:02:36.560 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:02:36.694 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:36.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:36.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:36.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:37.027 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:37.224 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:37.224 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:37.224 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:37.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:37.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:42.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:42.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:42.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:42.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:42.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:42.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:42.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:42.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:42.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:42.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:42.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:42.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:42.246 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:42.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:42.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:42.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:42.247 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:42.247 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:42.247 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:42.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:42.248 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:42.248 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:42.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:42.249 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:42.249 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:42.249 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:42.249 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:42.249 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:42.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:42.251 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:42.251 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:42.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.254 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:42.254 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:42.254 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:42.254 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:42.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:42.259 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:42.738 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:42.784 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:42.785 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:42.786 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:42.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:42.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:42.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:42.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:02:42.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:42.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:02:42.789 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:02:42.789 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:02:42.789 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:02:43.209 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:43.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:43.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:43.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:43.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:43.681 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:02:44.154 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:02:44.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:44.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:44.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:44.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:44.626 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:02:45.098 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:02:45.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:45.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:45.262 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:45.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:45.569 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:02:45.587 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:45.587 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:45.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:45.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:45.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:45.595 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:45.595 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:45.595 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:45.595 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:50.600 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:50.600 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:50.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:50.600 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:50.600 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:50.600 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:50.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:50.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:50.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:50.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:50.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:50.614 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:50.614 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:50.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:50.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:50.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:50.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:50.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:50.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:50.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:50.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:50.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:50.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:50.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:50.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:50.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:50.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:50.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:50.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:50.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:50.624 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:50.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:50.624 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:50.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:50.624 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:50.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:50.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:50.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:50.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:50.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:50.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:50.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:50.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:50.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:50.631 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:50.631 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:50.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:51.114 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:51.166 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:51.169 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:51.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:51.171 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:51.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:51.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:51.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:02:51.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:51.172 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:02:51.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:02:51.172 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:02:51.172 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:02:51.585 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:51.634 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:51.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:51.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:51.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:52.057 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:02:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:02:52.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:52.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:52.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:52.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:53.001 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:02:53.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:53.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:53.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:53.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:53.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:53.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:53.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:53.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:53.262 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:53.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:53.262 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:53.262 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:53.262 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:53.262 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:02:58.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:02:58.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:02:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:58.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:58.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:58.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:02:58.270 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:58.270 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:58.271 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:02:58.271 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:02:58.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:02:58.272 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:02:58.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:58.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:58.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:02:58.273 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:02:58.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:02:58.273 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:02:58.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:58.274 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:02:58.274 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:02:58.274 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:58.274 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:58.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:02:58.274 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:02:58.275 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:02:58.275 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:02:58.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:58.276 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:02:58.277 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:02:58.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:58.277 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:02:58.277 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:02:58.277 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:02:58.277 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:02:58.277 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:02:58.277 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:02:58.279 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:02:58.279 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:02:58.279 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:02:58.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:02:58.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:02:58.284 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:02:58.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:02:58.794 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:02:58.794 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:02:58.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:02:58.795 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:02:58.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:02:58.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:02:58.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:02:58.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:02:58.800 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:02:58.800 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:02:58.800 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:02:58.800 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:02:59.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:02:59.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:02:59.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:02:59.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:02:59.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:02:59.705 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:00.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:00.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:00.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:00.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:01.122 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:03:01.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:01.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:01.596 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:03:01.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:01.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:01.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:01.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:01.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:01.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:01.621 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:01.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:01.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:01.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:01.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:01.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:01.621 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:06.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:06.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:06.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:06.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:06.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:06.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:06.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:06.639 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:06.639 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:06.640 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:06.640 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:06.641 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:06.641 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:06.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:06.642 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:06.642 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:06.642 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:06.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:06.642 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:06.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:06.643 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:06.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:06.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:06.645 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:06.645 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:06.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:06.647 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:06.647 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:06.647 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:06.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:06.652 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:07.130 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:07.174 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:07.176 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:07.178 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:07.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:07.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:07.184 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:07.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:03:07.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:03:07.186 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:03:07.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:03:07.187 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:03:07.187 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:03:07.602 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:03:07.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:07.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:07.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:07.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:08.073 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:08.547 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:08.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:08.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:08.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:08.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:09.019 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:09.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:09.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:09.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:09.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:09.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:09.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:09.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:09.284 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:09.284 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:09.284 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:09.284 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:09.284 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:14.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:14.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:14.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:14.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:14.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:14.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:14.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:14.295 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:14.295 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:14.296 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:14.296 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:14.302 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:14.302 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:14.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:14.302 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:14.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:14.303 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:14.303 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:14.303 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:14.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:14.306 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:14.306 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:14.306 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:14.306 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:14.307 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:14.307 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:14.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:14.307 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:14.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:14.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:14.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:14.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:14.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:14.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:14.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:14.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:14.314 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:14.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:14.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:14.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:14.319 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:14.797 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:14.842 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:14.844 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:14.847 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:14.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:14.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:14.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:14.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:03:14.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:03:14.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:03:14.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:03:14.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:03:14.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:03:15.268 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:03:15.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:15.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:15.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:15.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:15.740 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:16.213 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:16.319 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:16.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:16.685 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:17.157 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:03:17.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:17.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:17.628 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:03:18.101 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:03:18.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:18.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:18.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:18.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:18.574 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:03:18.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:18.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:18.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:18.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:18.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:18.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:18.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:18.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:18.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:18.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:18.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:18.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:18.607 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:18.607 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:18.607 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:18.607 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:18.607 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:18.608 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:18.608 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:18.608 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=927 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:23.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:23.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:23.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:23.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:23.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:23.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:23.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:23.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:23.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:23.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:23.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:23.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:23.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:23.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:23.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:23.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:23.623 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:23.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:23.623 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:23.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:23.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:23.628 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:23.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:23.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:23.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:23.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:23.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:23.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:23.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:23.632 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:23.632 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:23.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:23.632 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:23.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:23.633 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:23.633 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:23.633 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:23.633 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:23.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:23.639 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:23.639 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:23.639 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.639 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:23.644 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:24.122 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:24.161 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:24.162 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:24.163 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:24.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:24.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:24.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:24.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:03:24.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:03:24.168 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:03:24.168 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:03:24.169 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:03:24.169 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:03:24.594 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:03:24.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:24.643 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:24.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:24.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:25.065 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:25.536 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:25.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:25.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:25.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:25.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:26.007 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:26.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:03:26.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:26.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:26.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:26.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:26.953 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:03:27.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:03:27.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:27.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:27.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:27.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:27.896 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:03:28.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:28.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:28.157 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:28.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:28.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:28.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:28.161 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:28.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:28.161 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:28.162 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:28.162 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:28.162 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:28.162 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:28.162 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=977 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.162 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=977 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.162 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=977 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=977 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=978 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=978 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=978 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=978 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=978 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:28.163 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=978 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:33.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:33.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:33.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:33.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:33.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:33.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:33.172 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:33.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:33.174 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:33.174 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:33.175 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:33.178 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:33.178 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:33.178 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:33.179 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:33.179 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:33.179 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:33.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:33.180 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:33.180 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:33.181 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:33.181 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:33.181 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:33.181 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:33.181 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:33.182 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:33.182 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:33.182 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:33.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:33.184 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:33.184 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:33.184 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.187 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:33.187 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:33.187 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:33.188 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:33.192 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:33.671 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:33.714 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:33.716 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:33.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:33.718 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:34.143 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:03:34.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:34.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:34.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:34.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:34.618 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:35.090 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:35.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:35.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:35.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:35.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:35.564 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:35.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:35.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:35.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:35.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:35.733 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:35.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:35.733 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:35.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:35.733 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:35.733 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:35.733 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:40.746 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:40.746 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:40.746 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:40.747 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:40.747 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:40.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:40.754 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:40.755 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:40.755 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:40.756 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:40.756 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:40.760 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:40.760 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:40.760 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:40.761 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:40.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:40.761 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:40.762 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:40.762 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:40.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:40.764 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:40.765 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:40.765 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:40.765 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:40.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:40.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:40.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:40.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:40.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:40.768 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:40.769 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:40.769 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:40.769 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:40.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:40.770 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:40.770 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:40.770 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:40.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:40.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:40.774 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:40.774 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:40.774 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:40.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:40.779 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:41.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:41.302 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:41.304 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:41.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:41.306 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:41.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:41.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:41.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:03:41.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:41.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:41.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:03:41.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:41.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:41.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:41.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:42.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:42.675 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:42.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:42.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:42.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:42.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:43.147 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:43.622 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:03:43.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:43.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:43.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:43.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:44.094 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:03:44.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:44.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:44.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:44.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:44.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:44.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:44.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:44.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:44.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:44.366 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:44.366 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:49.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:49.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:49.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:49.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:49.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:49.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:49.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:49.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:49.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:49.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:49.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:49.384 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:49.384 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:49.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:49.385 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:49.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:49.386 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:49.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:49.386 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:49.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:49.388 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:49.389 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:49.389 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:49.389 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:49.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:49.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:49.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:49.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:49.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:49.392 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:49.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:49.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:49.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:49.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:49.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:49.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:49.393 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:49.393 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:49.399 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:49.399 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:49.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:49.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:49.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.404 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:49.931 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:49.933 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:49.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:49.935 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:49.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:49.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:49.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:03:49.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:49.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:49.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:49.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:49.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:49.976 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:49.976 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:49.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:49.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:49.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:49.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:49.978 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:49.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:49.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:54.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:54.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:54.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:54.984 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:54.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:54.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:54.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:54.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:54.991 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:54.991 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:03:54.991 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:03:54.992 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:03:54.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:03:54.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:54.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:54.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:54.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:03:54.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:03:54.993 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:03:54.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:54.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:03:54.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:03:54.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:54.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:54.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:54.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:03:54.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:03:54.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:03:54.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:55.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:03:55.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:03:55.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:55.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:03:55.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:55.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:03:55.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:03:55.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:03:55.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:55.005 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:03:55.005 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:03:55.005 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:03:55.005 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:03:55.005 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:03:55.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:03:55.006 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:03:55.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:03:55.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:03:55.535 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:03:55.537 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:03:55.538 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:55.538 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:03:55.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:03:55.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:03:55.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:03:55.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:55.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:55.962 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:03:56.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:56.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:56.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:56.011 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:56.437 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:03:56.909 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:03:57.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:57.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:57.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:57.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:57.383 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:03:57.855 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:03:58.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:58.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:58.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:58.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:58.327 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:03:58.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:03:58.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:03:58.602 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:03:58.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:03:58.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:03:58.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:03:58.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:03:58.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:03:58.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:03:58.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:03:58.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:03:58.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:03:58.603 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:03:58.603 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=776 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:03.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:03.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:03.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:03.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:03.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:03.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:03.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:03.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:03.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:03.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:03.619 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:03.624 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:03.624 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:03.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:03.625 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:03.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:03.625 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:03.625 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:03.625 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:03.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:03.629 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:03.630 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:03.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:03.630 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:03.630 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:03.630 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:03.630 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:03.631 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:03.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:03.634 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:03.634 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:03.634 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:03.634 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:03.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:03.635 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:03.635 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:03.635 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:03.635 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:03.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:03.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:03.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:03.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:03.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:03.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:03.641 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:03.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:03.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:04.125 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:04.180 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:04.182 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:04.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:04.185 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:04.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:04.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:04.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:04:04.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:04.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:04.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:04.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:04.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:04.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:04.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:04.231 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:04.231 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:04.231 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:04.231 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:04.231 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:04.231 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:04.231 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:09.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:09.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:09.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:09.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:09.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:09.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:09.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:09.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:09.244 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:09.245 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:09.245 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:09.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:09.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:09.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:09.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:09.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:09.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:09.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:09.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:09.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:09.251 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:09.251 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:09.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:09.251 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:09.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:09.251 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:09.251 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:09.251 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:09.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:09.254 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:09.254 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:09.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.257 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:09.257 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:09.257 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:09.257 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:09.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:09.262 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:09.741 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:09.783 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:09.786 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:09.788 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:09.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:09.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:09.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:09.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:09.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:09.803 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:09.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:09.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:09.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:09.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:09.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:09.804 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:14.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:14.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:14.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:14.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:14.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:14.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:14.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:14.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:14.821 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:14.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:14.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:14.822 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:14.822 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:14.822 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:14.824 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:14.824 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:14.824 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:14.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:14.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:14.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.827 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:14.827 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:14.827 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:14.828 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:14.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:14.832 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:15.309 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:15.340 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:15.341 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:15.341 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:15.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:15.343 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:15.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:15.344 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:15.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:20.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:20.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:20.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:20.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:20.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:20.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:20.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:20.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:20.358 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:20.358 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:20.359 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:20.361 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:20.361 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:20.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:20.362 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:20.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:20.362 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:20.362 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:20.362 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:20.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:20.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:20.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:20.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:20.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:20.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:20.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:20.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:20.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:20.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:20.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:20.367 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:20.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:20.367 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:20.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:20.367 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:20.367 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:20.367 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:20.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:20.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:20.370 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:20.370 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:20.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:20.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:20.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:20.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:20.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:20.893 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:20.895 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:20.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:20.897 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:20.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:20.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:20.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:20.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:20.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:20.913 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:20.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:20.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:20.913 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:20.913 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:20.913 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:20.913 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:25.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:25.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:25.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:25.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:25.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:25.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:25.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:25.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:25.925 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:25.925 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:25.925 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:25.928 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:25.928 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:25.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:25.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:25.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:25.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:25.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:25.929 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:25.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:25.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:25.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:25.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:25.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:25.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:25.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:25.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:25.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:25.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:25.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:25.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:25.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:25.937 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:25.937 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:25.937 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.937 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:25.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:25.942 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:26.420 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:26.468 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:26.470 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:26.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:26.471 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:26.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:26.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:26.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:26.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:26.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:26.485 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:26.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:26.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:26.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:26.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:26.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:26.486 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:26.486 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:26.486 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:26.486 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:31.488 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:31.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:31.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:31.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:31.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:31.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:31.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:31.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:31.499 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:31.499 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:31.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:31.500 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:31.500 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:31.500 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:31.500 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:31.500 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:31.501 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:31.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:31.505 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:31.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:31.505 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:31.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:31.505 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:31.505 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:31.505 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:31.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:31.509 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:31.509 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:31.509 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:31.509 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:31.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:31.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:31.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:31.510 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:31.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:31.514 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:31.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.515 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:31.515 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:31.515 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:31.516 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:31.520 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:31.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:32.054 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:32.055 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:32.057 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:32.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:32.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:04:32.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:32.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:32.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:32.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:32.940 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:04:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:04:33.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:33.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:33.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:33.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:33.886 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:04:34.358 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:04:34.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:34.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:34.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:34.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:34.834 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:04:35.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:35.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:35.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:04:35.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:04:35.078 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:04:35.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:04:35.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:04:35.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:04:35.306 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:04:35.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:35.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:35.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:35.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:35.779 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:04:36.252 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:04:36.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:36.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:36.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:36.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:36.724 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:04:37.197 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:04:37.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:37.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:37.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:37.324 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:37.324 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:37.325 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:37.325 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:37.328 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:37.328 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:37.328 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:37.328 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:37.328 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:37.328 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:37.328 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:37.328 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:42.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:42.332 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:42.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:42.332 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:42.332 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:42.332 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:42.339 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:42.339 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:42.340 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:42.340 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:42.340 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:42.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:42.343 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:42.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:42.343 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:42.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:42.344 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:42.344 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:42.344 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:42.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:42.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:42.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:42.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:42.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:42.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:42.346 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:42.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:42.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:42.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:42.349 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:42.349 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:42.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:42.349 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:42.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:42.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:42.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:42.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:42.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:42.353 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:42.353 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:42.354 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:42.354 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:42.354 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:42.354 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.355 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:42.359 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:42.838 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:42.881 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:42.883 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:42.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:42.885 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:42.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:42.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:42.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:04:42.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:42.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:42.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:42.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:42.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:42.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:42.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:42.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:42.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:42.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:42.916 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:47.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:47.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:47.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:47.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:47.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:47.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:47.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:47.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:47.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:47.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:47.928 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:47.932 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:47.932 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:47.932 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:47.932 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:47.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:47.933 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:47.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:47.933 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:47.933 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:47.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:47.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:47.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:47.937 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:47.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:47.937 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:47.938 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:47.938 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:47.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:47.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:47.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:47.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:47.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:47.940 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:47.940 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:47.940 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:47.940 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:47.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:47.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:47.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:47.944 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:47.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:47.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:47.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:47.948 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:48.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:48.458 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:48.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:48.459 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:48.461 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:48.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:48.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:48.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:04:48.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:48.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:48.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:48.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:48.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:48.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:48.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:48.483 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:48.483 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:48.483 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:48.483 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:48.483 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:48.483 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:48.483 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:48.483 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:48.483 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:48.483 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:48.484 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:48.484 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:48.484 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:53.490 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:53.490 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:53.490 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:53.490 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:53.490 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:53.490 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:53.498 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:53.499 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:53.499 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:53.500 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:53.500 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:53.503 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:53.504 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:53.504 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:53.504 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:53.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:53.505 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:53.505 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:53.506 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:53.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:53.507 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:53.507 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:53.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:53.508 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:53.508 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:53.508 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:53.508 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:53.508 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:53.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:53.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:53.510 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:53.510 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:53.510 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:53.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:53.510 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:53.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:53.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:53.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:53.515 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:53.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:53.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:53.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:53.515 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.516 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:53.516 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:53.516 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:53.517 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:53.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:53.521 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:53.997 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:54.043 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:54.044 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:54.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:54.047 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:54.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:54.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:54.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:04:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:54.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:54.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:54.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:54.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:54.085 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:54.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:54.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:54.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:54.085 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:54.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:54.085 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:59.089 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:59.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:59.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:59.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:59.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:59.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:59.096 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:59.097 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:59.098 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:59.098 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:04:59.098 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:04:59.103 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:04:59.104 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:04:59.104 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:59.104 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:59.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:59.105 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:04:59.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:04:59.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:04:59.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:59.108 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:04:59.108 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:04:59.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:59.109 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:59.109 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:59.109 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:04:59.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:04:59.110 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:04:59.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:59.112 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:04:59.112 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:04:59.112 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:59.112 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:04:59.112 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:59.112 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:04:59.113 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:04:59.113 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:04:59.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:59.116 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:04:59.116 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:04:59.116 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:04:59.116 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:04:59.116 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:04:59.117 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:04:59.117 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:04:59.117 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.117 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:04:59.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.122 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:04:59.601 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:04:59.647 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:04:59.650 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:04:59.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.652 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:04:59.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:04:59.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:04:59.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:04:59.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:04:59.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:04:59.697 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:04:59.697 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:04:59.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:04:59.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:04:59.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:04:59.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:04:59.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:04:59.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:04:59.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:04:59.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:04:59.702 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:04:59.702 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:59.702 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:59.702 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:59.702 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:59.702 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:04:59.702 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:04.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:04.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:04.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:04.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:04.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:04.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:04.714 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:04.716 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:04.716 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:04.717 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:04.717 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:05:04.722 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:05:04.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:05:04.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:04.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:04.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:04.723 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:05:04.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:04.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:05:04.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:04.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:05:04.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:05:04.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:04.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:04.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:04.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:05:04.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:04.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:05:04.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:04.733 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:05:04.733 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:05:04.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:04.733 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:04.733 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:04.733 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:05:04.733 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:04.733 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:05:04.734 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:04.738 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:05:04.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:05:04.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:05:04.739 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:05:04.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:04.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:05:05.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:05:05.276 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:05:05.277 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:05:05.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:05.279 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:05:05.280 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 02:05:05.280 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 200
2026-05-06 02:05:05.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 02:05:05.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:05.697 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:05:05.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:05.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:05.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:05.912 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:05.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:06.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:06.171 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:05:06.643 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:05:06.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:06.919 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 02:05:06.919 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 0
2026-05-06 02:05:06.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 02:05:06.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:06.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:06.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:06.929 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:06.929 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:06.929 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:06.930 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:06.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:06.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:06.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:06.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:06.931 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:05:06.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:06.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:11.937 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:11.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:11.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:11.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:11.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:11.946 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:11.946 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:11.947 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:11.947 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:05:11.951 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:05:11.951 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:05:11.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:11.952 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:11.952 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:11.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:05:11.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:11.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:05:11.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:11.956 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:05:11.956 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:05:11.956 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:11.957 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:11.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:11.957 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:05:11.957 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:11.958 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:05:11.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:11.960 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:05:11.960 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:05:11.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:11.961 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:11.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:11.961 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:05:11.961 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:11.961 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:05:11.961 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:05:11.965 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:05:11.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:05:11.966 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:05:11.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:11.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:05:12.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:05:12.494 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:05:12.496 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:05:12.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:12.498 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:05:12.500 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 02:05:12.500 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 200
2026-05-06 02:05:12.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 02:05:12.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:12.925 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:05:12.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:13.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:13.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:13.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:13.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:13.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:13.399 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:05:13.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:13.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:13.875 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:05:13.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.136 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 02:05:14.136 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 0
2026-05-06 02:05:14.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 02:05:14.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:14.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:14.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:14.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:14.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:14.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:14.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:14.146 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:14.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:14.146 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:14.146 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:14.146 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:14.146 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:14.146 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:14.147 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:19.150 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:19.150 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:19.150 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:19.150 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:19.150 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:19.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:19.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:19.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:19.160 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:19.161 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:19.161 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:05:19.165 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:05:19.165 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:05:19.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:19.166 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:19.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:19.166 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:05:19.166 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:19.166 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:05:19.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:19.170 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:05:19.170 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:05:19.170 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:19.170 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:19.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:19.171 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:05:19.171 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:19.171 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:05:19.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:19.174 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:05:19.174 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:05:19.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:19.175 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:19.175 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:19.175 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:05:19.175 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:19.175 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:05:19.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:19.180 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:05:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:05:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:05:19.180 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:05:19.180 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.181 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:05:19.181 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:05:19.181 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:05:19.181 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:19.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:19.186 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:05:19.664 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:05:19.711 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:05:19.713 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:05:19.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:19.714 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:05:19.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:19.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:19.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:19.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:19.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:19.752 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:19.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:19.752 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:19.752 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:19.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:19.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:19.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:19.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:19.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:19.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:19.755 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:05:19.755 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:05:24.760 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:24.760 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:24.760 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:24.760 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:24.760 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:24.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:24.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:24.763 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:24.763 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:24.764 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:24.764 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:05:24.764 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:05:24.765 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:05:24.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:24.765 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:24.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:24.765 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:05:24.765 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:24.765 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:05:24.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:24.766 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:24.766 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:05:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:24.767 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:24.767 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:05:24.767 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:05:24.770 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:05:24.770 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:05:24.770 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:24.770 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:24.774 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:05:25.253 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:05:25.301 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:05:25.303 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:05:25.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:25.304 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:05:25.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:25.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:25.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:25.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:25.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:25.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:25.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:25.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:25.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:25.357 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:25.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:25.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:25.358 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:25.358 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:25.358 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:25.358 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:05:30.362 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:05:30.362 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:05:30.362 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:30.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:30.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:30.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:30.365 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:05:30.365 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:30.366 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:30.366 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:05:30.366 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:05:30.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:05:30.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:05:30.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:30.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:30.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:05:30.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:05:30.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:05:30.367 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:05:30.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:30.368 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:05:30.368 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:05:30.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:30.369 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:05:30.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:05:30.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:05:30.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:05:30.372 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:05:30.372 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:05:30.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:05:30.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:05:30.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:05:30.855 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:05:30.897 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:05:30.899 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:05:30.900 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:05:30.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:30.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:30.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:30.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:30.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:30.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:30.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:30.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:30.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:30.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:30.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:30.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:30.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:30.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:31.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:31.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:31.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:31.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:31.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:31.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:31.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:31.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:31.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:31.037 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:31.037 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:31.037 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:31.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:31.097 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:31.097 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:31.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:31.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:31.328 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:05:31.374 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:31.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:31.375 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:31.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:31.799 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:05:32.272 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:05:32.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:32.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:32.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:32.376 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:32.745 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:05:33.217 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:05:33.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:33.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:33.377 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:33.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:33.688 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:05:34.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:34.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.103 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:34.103 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:34.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:34.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:34.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:34.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:34.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:34.125 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:34.125 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:34.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:34.161 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:05:34.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:34.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:34.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:34.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:34.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:34.244 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:34.244 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:34.244 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:34.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.246 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:34.246 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:34.246 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:34.246 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:34.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:34.305 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:34.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:34.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:34.378 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:34.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:34.379 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:34.634 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:05:35.106 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:05:35.379 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:05:35.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:05:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:05:35.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:05:35.577 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:05:36.051 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:05:36.523 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:05:36.996 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:05:37.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:37.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:37.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:37.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:37.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:37.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:37.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:37.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:37.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:37.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:37.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:37.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:37.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:37.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:37.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:37.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:37.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:37.466 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:05:37.937 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:05:38.411 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:05:38.883 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:05:39.356 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:05:39.829 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:05:40.302 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:05:40.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:40.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:40.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:40.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:40.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:40.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:40.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:40.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:40.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:40.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:40.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:40.450 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:40.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:40.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:40.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:40.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:40.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:40.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:40.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:40.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.525 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:40.525 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:40.525 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:40.525 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:40.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:40.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:40.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:40.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:40.774 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:05:41.245 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:05:41.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:41.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:41.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:41.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:41.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:41.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:41.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:41.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:41.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:41.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:41.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:41.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:41.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:41.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:41.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:41.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:41.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:41.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:41.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:41.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:41.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:41.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:41.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:41.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:41.629 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:41.629 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:41.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:41.717 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:05:42.190 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:05:42.663 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:05:43.133 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:05:43.604 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:05:44.075 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:05:44.546 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:05:44.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:44.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.635 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:44.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:44.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:44.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:44.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:44.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.656 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:44.656 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:44.656 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:44.656 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:44.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:44.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:44.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:44.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:44.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:44.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:44.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:44.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:44.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:44.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.770 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:44.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:44.770 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:44.770 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:44.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:44.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:44.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:44.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:44.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:45.017 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:05:45.490 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:05:45.962 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:05:46.435 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:05:46.905 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:05:47.379 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:05:47.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:47.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:47.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:47.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:47.803 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:47.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:47.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:47.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:47.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:47.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:47.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:47.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:47.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:47.851 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:05:47.855 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:47.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:47.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:47.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:48.323 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:05:48.796 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:05:49.269 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:05:49.741 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:05:50.212 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:05:50.686 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:05:50.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:50.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:50.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:50.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:50.883 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:50.883 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:50.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:50.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:50.884 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:50.884 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:50.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:50.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:50.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:50.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:50.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:50.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:50.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:51.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:51.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:51.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:51.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:51.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:51.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:51.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:51.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:51.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:51.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:51.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:51.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:51.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:51.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:51.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:51.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:51.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:51.156 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:05:51.629 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:05:52.101 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:05:52.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:52.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.280 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:52.280 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:52.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:52.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:52.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:52.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:52.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:52.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:52.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:52.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:52.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:52.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:52.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:52.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:52.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:52.574 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:05:52.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:52.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:52.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:52.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:52.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:52.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:52.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:52.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:52.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:52.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:52.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:52.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:53.047 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:05:53.519 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:05:53.990 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:05:54.460 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:05:54.933 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:05:55.406 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:05:55.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:55.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:55.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:55.651 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:55.651 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:55.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:55.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:55.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:55.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:55.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:55.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:55.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:55.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:55.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.869 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:55.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:55.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:55.878 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:05:55.891 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:55.891 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:55.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:55.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.893 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:55.893 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:55.893 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:55.893 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:55.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:55.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:55.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:55.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:55.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:56.349 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:05:56.820 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:05:57.293 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:05:57.766 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:05:58.238 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:05:58.709 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:05:58.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:58.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:58.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:58.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:58.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:05:58.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:05:58.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:05:58.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:58.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:58.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:58.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:05:58.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:05:58.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:05:58.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:05:58.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:05:58.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:58.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:05:59.182 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:05:59.655 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:06:00.127 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:06:00.598 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:06:01.069 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:06:01.540 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:06:01.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:02.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.002 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:02.002 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:02.012 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:06:02.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:02.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:02.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:02.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:02.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:02.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:02.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:02.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:02.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:02.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:02.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:02.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:02.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:02.258 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:02.258 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:02.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:02.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:02.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:02.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:02.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:02.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:02.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:02.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:02.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.301 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.485 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:06:02.957 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:06:02.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:02.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:02.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:02.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:03.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:03.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:03.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:03.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:03.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:03.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:03.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:03.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:03.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:03.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:03.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:03.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:03.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:03.129 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:03.129 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:03.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:03.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:03.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:03.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:03.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:03.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:03.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:03.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:03.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:03.428 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:06:03.899 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:06:04.372 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:06:04.845 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:06:05.316 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:06:05.788 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:06:06.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:06.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:06.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:06.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:06.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:06.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:06.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:06.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:06.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:06.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:06.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:06.217 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:06.217 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:06.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.260 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:06:06.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:06.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:06.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:06.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:06.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:06.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:06.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:06.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:06.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:06.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:06.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:06.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:06.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:06.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:06.732 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:06:07.204 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:06:07.677 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:06:08.150 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:06:08.622 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:06:09.094 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:06:09.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:09.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:09.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:09.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:09.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:09.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:09.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:09.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:09.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:09.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:09.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:09.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:09.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:09.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:09.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:09.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:09.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:09.565 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:06:10.036 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:06:10.509 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:06:10.982 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:06:11.454 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:06:11.925 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:06:12.399 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:06:12.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:12.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:12.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:12.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:12.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:12.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:12.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.542 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:12.542 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:12.542 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:12.542 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:12.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:12.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:12.591 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:12.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:12.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:12.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:12.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:12.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:12.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:12.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:12.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:12.808 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:12.808 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:12.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:12.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:12.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:12.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:12.870 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:06:13.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:13.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:13.339 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:13.339 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:13.342 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:06:13.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:13.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:13.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:13.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:13.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:13.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:13.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:13.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:13.355 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:06:13.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:13.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:18.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:18.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:18.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:18.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:18.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:18.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:18.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:18.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:18.368 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:18.368 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:18.368 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:06:18.371 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:06:18.371 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:06:18.371 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:18.371 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:18.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:18.372 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:06:18.373 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:18.373 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:06:18.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:18.375 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:06:18.375 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:06:18.375 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:18.375 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:18.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:18.375 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:06:18.376 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:18.376 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:06:18.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:18.379 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:06:18.379 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:06:18.379 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:18.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:18.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:18.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:06:18.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:18.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:06:18.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:06:18.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.387 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:06:18.387 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:06:18.387 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:06:18.387 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:18.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:18.392 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:06:18.870 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:06:18.919 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:06:18.922 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:06:18.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:18.925 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:06:18.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:18.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:18.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:18.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:18.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:18.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:18.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:18.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:18.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:18.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:18.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:18.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:18.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:19.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:19.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:19.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:19.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:19.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:19.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:19.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.210 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.210 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:19.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:19.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:19.212 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:19.212 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:19.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:19.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:19.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.341 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:06:19.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:19.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:19.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:19.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:19.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:19.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:19.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:19.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:19.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:19.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:19.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:19.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:19.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:19.669 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:19.670 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:19.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:19.670 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:19.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:19.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:19.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:19.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:19.672 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:06:19.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:19.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:24.676 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:24.676 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:24.676 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:24.676 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:24.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:24.676 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:24.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:24.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:24.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:24.686 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:24.686 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:06:24.689 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:06:24.690 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:06:24.690 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:24.690 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:24.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:24.691 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:06:24.691 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:24.691 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:06:24.692 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:24.693 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:06:24.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:06:24.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:24.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:24.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:24.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:06:24.694 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:24.694 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:06:24.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:24.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:24.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:06:24.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:24.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:06:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:06:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:06:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:06:24.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:06:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.701 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:06:24.701 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:06:24.701 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:06:24.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:24.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:24.706 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:06:25.185 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:06:25.233 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:06:25.235 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:06:25.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:25.237 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:06:25.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:25.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:25.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:25.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:25.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:25.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:25.257 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:25.257 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:25.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:25.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:25.290 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:25.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:25.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:25.656 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:06:25.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:25.706 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:25.706 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:25.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:26.128 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:06:26.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:26.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:26.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:26.164 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:26.164 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:26.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:26.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:26.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:26.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:26.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:26.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:26.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:26.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:26.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.599 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:06:26.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:26.707 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:26.707 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:26.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:26.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:26.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:26.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:26.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:26.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:26.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:26.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:26.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:26.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:26.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:26.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:26.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:26.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:26.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:26.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:27.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:27.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:27.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:27.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:27.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:27.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:27.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:27.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:27.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:27.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:27.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:27.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:27.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:27.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:27.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:27.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:27.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:27.072 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:06:27.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:27.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:27.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:27.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:27.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:27.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:27.473 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:27.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:27.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:27.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:27.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:27.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:27.476 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:06:27.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:27.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:27.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:32.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:32.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:32.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:32.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:32.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:32.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:32.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:32.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:32.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:32.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:32.491 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:06:32.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:06:32.497 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:06:32.497 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:32.497 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:32.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:32.497 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:06:32.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:32.498 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:06:32.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:32.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:06:32.502 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:06:32.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:32.502 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:32.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:32.502 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:06:32.502 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:32.502 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:06:32.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:32.506 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:32.506 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:06:32.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:32.510 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:06:32.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:06:32.510 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:06:32.510 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:06:32.510 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:06:32.510 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:06:32.511 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:06:32.511 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:06:32.511 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:32.512 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:32.516 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:06:32.993 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:06:33.034 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:06:33.036 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:06:33.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.038 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:06:33.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:33.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:33.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:33.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:33.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:33.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:33.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.461 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:06:33.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:33.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:33.514 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:33.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:33.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:33.627 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:33.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:33.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.932 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:06:33.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:33.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:33.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:33.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.945 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.945 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.945 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:33.945 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:33.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:33.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:33.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:33.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:33.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:34.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:34.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:34.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:34.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:34.335 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:34.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:34.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:34.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:34.337 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:34.337 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:34.337 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:34.337 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:34.337 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:06:34.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:34.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:34.338 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:39.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:39.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:39.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:39.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:39.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:39.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:39.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:39.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:39.351 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:39.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:39.351 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:06:39.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:06:39.355 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:06:39.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:39.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:39.356 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:39.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:06:39.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:39.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:06:39.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:39.359 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:06:39.359 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:06:39.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:39.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:39.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:39.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:06:39.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:39.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:06:39.360 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:39.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:39.363 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:06:39.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:39.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:06:39.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:06:39.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:06:39.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:06:39.367 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:06:39.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:39.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:39.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:06:39.851 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:06:39.902 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:06:39.904 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:06:39.907 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:06:39.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:39.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:39.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:39.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:39.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:39.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:39.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:39.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:39.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:39.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:39.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:39.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:39.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:39.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:40.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:40.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:40.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:40.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:40.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:40.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:40.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:40.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:40.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:40.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:40.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:40.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:40.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.322 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:06:40.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:40.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:40.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:40.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:40.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:40.469 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:40.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:40.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:40.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:40.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:40.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:40.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:40.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:40.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:40.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:40.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:40.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:40.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:40.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:40.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:40.794 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:06:40.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:40.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:40.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:40.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.805 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:40.805 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:40.805 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:40.805 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:40.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:40.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:40.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:40.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:40.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:41.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:41.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:41.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:41.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:41.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:41.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:41.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:41.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:41.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:41.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:41.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:41.198 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:06:41.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:46.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:46.203 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:46.203 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:46.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:46.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:46.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:46.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:46.211 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:46.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:46.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:46.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:06:46.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:06:46.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:06:46.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:46.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:46.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:46.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:06:46.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:46.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:06:46.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:46.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:06:46.218 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:06:46.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:46.219 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:46.219 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:46.219 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:06:46.219 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:46.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:06:46.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:46.221 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:06:46.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:06:46.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:46.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:46.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:46.222 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:06:46.222 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:46.222 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:06:46.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:46.224 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:06:46.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:06:46.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:06:46.225 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:06:46.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:46.230 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:06:46.709 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:06:46.750 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:06:46.752 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:06:46.754 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:06:46.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:46.776 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:46.776 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:46.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:46.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:46.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:46.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:46.779 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:46.779 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:46.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:46.810 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:46.810 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:46.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:46.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:47.181 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:06:47.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:47.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:47.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:47.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:47.652 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:06:48.123 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:06:48.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:48.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:48.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:48.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:48.597 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:06:48.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:48.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:48.641 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:48.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:48.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:48.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:48.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:48.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:48.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:48.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:48.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:48.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:48.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:48.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:48.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:48.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:48.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:49.069 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:06:49.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:49.230 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:49.230 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:49.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:49.541 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:06:50.012 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:06:50.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:50.232 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:50.232 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:50.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:50.485 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:06:50.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:50.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:50.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:50.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:50.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:50.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:50.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:50.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:50.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:50.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:50.833 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:50.833 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:50.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:50.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:50.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:50.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:50.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:50.958 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:06:51.232 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:51.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:51.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:51.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:51.430 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:06:51.901 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:06:52.374 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:06:52.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:52.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:52.413 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:52.413 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:52.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:52.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:52.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:52.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:52.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:52.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:52.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:52.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:52.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:52.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:52.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:52.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:52.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:52.846 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:06:53.318 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:06:53.789 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:06:54.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:54.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:54.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:54.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:54.263 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:06:54.264 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:54.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:54.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:54.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:54.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:54.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:54.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:54.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:54.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:54.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:54.270 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:06:54.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:54.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:54.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:54.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:54.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:54.271 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:54.271 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:06:59.271 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:06:59.271 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:06:59.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:59.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:59.271 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:59.271 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:59.279 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:06:59.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:59.281 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:59.281 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:06:59.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:06:59.286 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:06:59.286 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:06:59.287 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:59.287 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:59.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:06:59.287 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:06:59.288 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:06:59.288 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:06:59.288 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:06:59.290 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:06:59.290 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:06:59.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:59.290 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:59.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:06:59.290 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:06:59.290 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:06:59.291 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:06:59.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:06:59.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:06:59.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:06:59.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:59.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:06:59.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:06:59.293 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:06:59.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:06:59.293 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:06:59.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:06:59.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:06:59.297 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:06:59.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:06:59.302 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:06:59.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:06:59.824 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:06:59.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:59.827 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:06:59.829 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:06:59.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:06:59.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:06:59.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:06:59.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:59.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:59.859 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:59.859 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:06:59.859 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:06:59.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:06:59.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:06:59.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:06:59.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:06:59.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:00.253 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:07:00.299 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:00.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:00.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:00.727 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:07:01.199 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:07:01.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:01.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:01.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:01.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:01.672 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:07:01.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:01.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:01.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:01.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:01.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:01.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:01.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:01.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:01.736 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:01.736 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:01.736 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:01.737 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:01.765 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:01.772 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:01.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:01.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:01.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:02.145 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:07:02.303 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:02.303 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:02.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:02.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:02.618 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:07:03.089 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:07:03.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:03.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:03.305 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:03.305 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:03.561 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:07:03.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:03.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:03.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:03.890 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:03.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:03.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:03.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:03.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:03.906 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:03.906 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:03.906 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:03.906 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:03.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:03.938 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:03.938 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:03.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:03.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:04.031 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:07:04.306 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:04.306 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:04.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:04.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:04.505 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:07:04.977 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:07:05.449 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:07:05.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:05.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:05.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:05.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:05.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:05.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:05.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:05.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:05.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:05.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:05.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:05.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:05.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:05.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:05.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:05.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:05.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:05.920 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:07:06.391 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:07:06.865 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:07:07.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:07.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:07.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:07.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:07.337 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:07:07.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:07.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:07.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:07.338 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:07.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:07.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:07.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:07.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:07.341 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:07:07.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:07.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:07.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:12.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:12.344 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:12.344 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:12.344 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:12.344 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:12.344 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:12.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:12.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:12.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:12.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:12.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:07:12.356 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:07:12.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:07:12.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:12.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:12.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:12.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:07:12.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:12.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:07:12.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:12.358 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:07:12.358 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:07:12.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:12.358 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:12.358 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:12.358 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:07:12.358 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:12.358 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:07:12.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:12.360 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:12.360 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:07:12.360 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:07:12.362 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:07:12.362 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:07:12.362 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.362 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.363 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:12.367 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:07:12.846 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:07:12.887 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:07:12.889 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:07:12.892 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:07:12.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:12.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:12.917 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:12.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:12.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:12.920 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:12.920 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:12.920 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:12.920 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:12.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:12.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:12.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:12.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:12.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:13.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:13.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:13.127 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:13.127 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:13.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:13.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:13.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:13.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:13.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:13.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:13.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:13.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:13.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:13.184 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:13.184 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:13.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:13.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:13.318 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:07:13.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:13.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:13.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:13.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:13.789 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:07:14.260 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:07:14.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:14.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:14.731 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:07:15.204 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:07:15.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:15.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:15.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:15.260 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:15.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:15.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:15.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:15.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:15.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:15.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:15.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:15.302 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:15.302 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:15.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:15.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:15.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:15.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:15.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:15.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:15.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:15.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:15.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:15.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:15.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.489 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:15.489 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:15.489 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:15.489 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:15.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:15.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:15.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:15.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:15.677 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:07:16.149 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:07:16.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:16.620 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:07:17.091 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:07:17.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:17.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:17.564 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:07:17.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:17.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:17.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:17.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:17.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:17.673 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:17.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:17.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:17.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:17.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:17.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:17.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:17.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:17.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:17.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:17.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:17.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:17.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:17.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:17.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:17.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:17.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:17.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:17.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:17.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:17.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:17.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:17.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:17.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:18.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:18.036 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:07:18.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:18.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:18.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:18.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:18.508 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:07:18.979 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:07:19.451 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:07:19.925 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:07:20.303 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:20.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:20.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:20.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:20.322 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:20.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:20.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:20.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:20.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:20.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:20.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:20.350 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:20.351 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:20.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.397 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:07:20.622 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:20.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.625 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:20.625 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:20.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:20.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:20.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:20.645 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:20.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:20.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:20.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:20.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:20.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:20.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:20.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.687 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:20.867 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:07:21.339 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:07:21.811 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:07:22.284 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:07:22.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:22.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:22.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:22.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:22.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:22.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:22.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:22.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:22.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:22.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:22.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:22.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:22.756 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:07:22.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:22.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:22.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:22.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:22.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:23.227 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:07:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:23.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:23.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:23.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:23.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:23.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:23.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:23.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:23.404 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:23.404 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:23.404 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:23.404 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:23.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:23.409 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:23.409 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:23.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:23.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:23.698 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:07:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:07:24.640 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:07:25.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:25.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:25.080 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:25.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:25.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:25.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:25.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:25.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:25.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:25.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:25.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:25.108 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:25.108 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:25.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.110 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:07:25.581 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:07:25.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:25.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:25.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:25.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:25.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:25.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:25.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.760 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:25.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:25.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:25.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:25.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:25.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:25.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:25.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:25.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:26.052 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:07:26.523 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:07:26.994 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:07:27.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:27.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:27.435 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:27.435 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:27.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:27.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:27.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:27.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:27.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:27.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:27.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:27.457 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:27.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:27.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:27.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:27.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:27.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:27.466 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:07:27.939 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:07:28.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:28.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:28.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:28.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:28.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:28.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:28.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:28.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:28.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:28.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:28.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:28.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:28.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:28.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:28.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:28.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:28.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:28.411 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:07:28.882 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:07:29.356 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:07:29.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:29.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:29.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:29.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:29.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:29.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:29.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:29.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:29.768 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:29.768 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:29.768 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:29.768 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:29.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:29.828 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:07:29.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:29.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:29.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:29.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:30.300 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:07:30.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:30.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:30.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:30.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:30.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:30.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:30.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:30.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:30.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:30.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:30.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:30.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:30.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:30.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:30.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:30.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:30.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:30.771 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:07:31.244 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:07:31.716 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:07:32.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:32.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:32.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:32.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:32.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:32.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:32.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:32.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:32.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:32.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:32.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:32.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:32.122 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:07:32.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:32.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:37.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:37.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:37.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:37.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:37.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:37.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:37.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:37.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:37.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:37.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:37.138 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:07:37.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:07:37.143 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:07:37.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:37.143 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:37.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:37.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:07:37.144 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:37.144 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:07:37.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:37.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:07:37.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:07:37.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:37.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:37.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:37.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:07:37.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:37.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:07:37.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:37.152 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:07:37.153 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:07:37.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:37.153 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:37.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:37.153 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:07:37.153 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:37.153 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:07:37.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.159 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:07:37.160 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:07:37.160 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:07:37.160 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.160 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:37.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:37.165 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:07:37.643 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:07:37.684 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:07:37.686 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:07:37.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:37.687 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:07:37.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:37.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:37.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:37.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.699 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:37.699 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:37.699 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:37.699 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:37.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:37.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:37.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:37.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:37.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:37.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:37.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:37.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:37.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:37.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:37.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:37.823 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:37.823 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:37.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:37.827 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:37.827 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:37.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.827 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:37.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:37.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:37.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:37.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:37.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:37.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.901 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:37.902 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:37.902 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:37.902 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:37.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:37.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:37.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:37.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:37.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:38.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:38.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:38.113 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:07:38.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.124 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.124 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.125 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.163 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:38.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:38.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:38.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:38.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.220 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:38.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.221 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.221 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.221 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:38.221 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:38.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:38.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:38.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:38.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.584 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.584 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.584 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:07:38.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:38.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.759 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:38.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:38.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:38.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:38.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:38.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.923 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.923 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:38.923 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:38.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:38.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:38.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:38.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:38.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:39.057 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:07:39.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:39.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:39.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:39.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:39.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:39.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:39.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:39.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:39.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:39.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:39.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:39.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:39.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:39.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:39.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:07:44.165 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:44.165 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:44.165 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:44.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:44.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:44.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:44.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:44.175 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:44.176 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:44.176 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:44.176 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:07:44.179 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:07:44.180 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:07:44.180 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:44.180 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:44.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:44.181 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:07:44.181 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:44.181 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:07:44.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:44.183 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:07:44.183 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:07:44.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:44.184 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:44.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:44.184 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:07:44.184 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:44.184 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:07:44.184 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:44.185 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:07:44.185 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:07:44.185 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:44.185 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:44.186 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:44.186 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:07:44.186 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:44.186 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:07:44.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.188 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:07:44.189 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:07:44.189 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:07:44.189 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:44.189 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.190 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:44.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.190 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:44.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:44.193 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:07:44.672 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:07:44.708 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:07:44.709 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:07:44.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:44.710 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:07:44.719 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:44.719 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:44.719 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:44.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:44.722 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:44.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:44.722 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:44.722 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:44.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:44.776 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:44.776 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:44.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:44.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:45.144 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:07:45.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:45.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:45.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:45.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:45.615 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:07:45.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:45.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:45.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:45.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:45.650 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:45.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:45.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:45.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:45.652 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:45.652 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:45.652 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:45.652 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:45.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:45.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:45.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:45.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:45.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.086 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:07:46.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:46.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:46.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:46.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:46.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:46.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:46.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.155 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:46.155 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:46.155 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:46.155 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:46.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:46.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:46.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:46.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:46.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:46.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:46.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:46.557 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:07:46.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:46.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:46.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:46.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:46.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:46.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:46.854 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.854 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:46.854 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:46.854 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:46.854 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:46.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:46.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:46.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:46.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:46.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.030 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:07:47.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:47.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:47.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:47.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:47.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:47.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:47.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:47.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:47.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:47.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:47.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:47.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:47.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:47.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:47.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:47.353 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:47.353 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:47.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:47.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.468 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:47.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:47.486 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:47.486 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:47.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:47.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:47.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:47.488 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:47.488 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:47.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:47.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:47.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:47.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.501 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:07:47.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:47.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:47.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:47.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:47.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:47.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:47.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:47.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:47.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:47.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:47.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:47.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:47.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:47.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:47.973 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:07:48.194 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:48.194 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:48.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:48.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:48.369 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:48.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:48.388 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:48.388 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:48.388 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:48.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:48.389 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:48.389 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:48.389 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:48.389 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:48.439 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:07:48.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:48.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:48.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:48.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:48.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:48.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:48.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:48.838 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:48.838 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:48.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:48.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:48.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:48.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:48.853 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:48.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:48.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:48.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:48.853 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:48.853 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:48.854 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:07:48.854 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1009 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:48.854 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1009 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:48.854 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1009 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:48.854 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1009 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:48.854 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1009 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:48.854 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1009 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:07:53.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:53.854 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:53.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:53.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:53.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:53.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:53.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:53.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:53.863 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:53.863 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:07:53.863 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:07:53.867 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:07:53.868 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:07:53.868 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:53.868 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:53.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:53.869 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:07:53.869 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:07:53.870 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:07:53.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:53.871 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:07:53.871 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:07:53.871 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:53.872 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:53.872 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:53.872 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:07:53.872 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:07:53.872 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:07:53.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:53.874 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:07:53.875 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:07:53.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:53.875 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:07:53.875 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:07:53.875 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:07:53.875 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:07:53.875 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:07:53.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:53.878 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:07:53.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:07:53.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:07:53.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:07:53.878 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:07:53.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:07:53.879 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:07:53.879 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:07:53.879 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.879 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:07:53.884 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:07:54.362 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:07:54.408 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:07:54.410 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:07:54.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.414 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:07:54.439 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:54.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.443 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.443 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.443 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:54.443 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:54.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.463 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:54.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.549 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.549 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.549 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:54.549 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:54.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:54.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.683 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:54.683 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:54.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:54.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:54.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:54.833 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:07:54.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:54.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:54.882 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:54.882 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:54.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:54.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:54.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:54.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:54.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:54.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:54.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:54.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:54.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:54.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:55.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.077 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:55.077 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:55.078 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:55.078 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:55.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:55.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:55.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.305 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:07:55.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:55.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:55.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:55.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:55.315 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:55.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:55.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:55.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:07:55.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:55.480 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:55.480 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:07:55.480 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:07:55.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:07:55.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:07:55.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:07:55.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:07:55.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:07:55.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:07:55.707 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:07:55.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:07:55.708 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:07:55.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:07:55.710 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:07:55.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:07:55.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:07:55.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:07:55.710 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:07:55.710 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:07:55.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:00.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:00.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:00.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:00.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:00.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:00.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:00.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:00.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:00.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:00.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:00.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:00.720 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:00.720 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:00.720 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:00.720 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:00.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:00.720 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:00.721 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:00.721 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:00.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:00.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:00.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:00.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:00.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:00.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:00.725 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:00.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:00.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:00.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:00.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:01.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:01.248 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:01.249 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:01.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:01.252 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:01.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:01.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:01.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:01.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:01.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:01.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:01.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:01.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:01.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:01.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:01.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:01.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:01.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:01.681 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:01.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:01.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:01.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:01.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:02.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:02.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:02.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:02.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:02.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:02.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:02.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:02.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:02.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:02.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:02.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:02.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:02.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:02.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:02.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:02.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:02.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:02.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:02.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:08:02.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:02.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:02.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:02.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:03.098 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:08:03.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:03.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:03.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:03.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:03.151 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:03.151 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:03.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:03.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:03.152 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:03.152 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:03.152 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:03.152 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:03.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:03.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:03.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:03.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:03.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:03.570 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:08:03.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:03.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:04.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:08:04.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:04.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:04.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:04.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:04.357 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:04.357 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:04.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:04.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:04.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:04.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:04.358 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:04.358 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:04.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:04.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:04.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:04.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:04.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:04.514 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:08:04.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:04.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:04.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:04.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:04.987 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:08:05.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:05.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:05.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:05.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:05.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:05.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:05.327 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:05.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:05.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:05.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:05.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:05.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:05.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:05.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:05.371 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:05.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:05.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:05.458 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:08:05.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:05.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:05.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:05.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:05.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:08:05.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:05.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:05.971 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:05.971 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:05.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:05.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:05.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:05.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:05.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:05.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:05.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:05.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:06.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:06.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:06.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:06.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:06.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:06.400 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:08:06.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:08:06.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:06.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:06.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:06.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:06.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:06.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:06.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:06.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:06.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:06.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:06.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:06.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:06.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:06.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:06.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:06.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:06.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:07.346 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:08:07.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:07.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:07.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:07.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:07.818 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:08:07.831 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:07.831 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:07.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:07.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:07.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:07.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:07.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:07.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:07.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:07.871 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:07.871 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:07.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:07.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:08.289 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:08:08.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:08.755 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:08.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:08.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:08.760 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:08:08.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:08.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:08.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:08.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:08.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:08.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:08.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:08.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:08.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:08.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:08.772 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.773 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.774 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:08.774 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:13.773 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:13.773 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:13.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:13.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:13.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:13.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:13.777 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:13.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:13.777 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:13.777 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:13.777 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:13.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:13.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:13.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:13.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:13.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:13.778 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:13.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:13.778 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:13.779 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:13.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:13.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:13.780 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:13.780 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:13.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:13.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:13.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:13.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:13.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:13.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:13.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:13.783 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:13.783 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:13.783 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.783 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:13.788 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:14.267 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:14.307 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:14.310 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:14.312 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:14.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.327 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:14.330 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.330 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:14.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:14.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:14.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:14.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:14.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.560 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.560 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.739 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:14.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:14.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:14.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:14.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:14.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:14.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:14.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:14.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:14.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:14.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:14.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:14.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:14.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:14.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:14.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:14.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:15.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:15.031 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:15.031 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:15.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:15.210 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:15.363 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:15.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:15.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:15.369 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:15.377 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:15.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:15.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:15.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:15.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:15.382 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:15.382 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:15.382 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:15.382 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:15.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:15.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:15.383 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:15.383 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:15.383 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:15.383 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:15.383 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:15.384 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:15.384 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:20.383 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:20.383 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:20.383 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:20.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:20.383 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:20.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:20.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:20.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:20.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:20.394 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:20.394 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:20.397 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:20.397 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:20.397 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:20.397 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:20.398 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:20.398 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:20.399 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:20.399 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:20.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:20.400 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:20.400 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:20.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:20.401 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:20.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:20.401 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:20.401 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:20.401 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:20.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:20.403 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:20.403 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:20.403 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:20.403 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:20.403 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:20.404 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:20.404 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:20.404 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:20.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.407 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:20.407 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:20.407 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:20.408 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:20.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:20.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:20.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:20.891 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:20.938 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:20.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:20.942 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:20.945 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:20.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:20.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:20.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:20.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:20.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:20.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:20.972 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:20.972 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:20.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:20.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:20.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:20.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:20.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:21.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:21.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:21.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:21.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:21.125 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.128 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:21.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:21.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.296 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:21.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.298 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:21.298 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:21.298 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:21.298 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:21.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:21.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:21.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.363 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:21.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:21.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:21.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:21.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:21.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:21.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:21.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:21.616 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:21.616 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:21.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:21.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:21.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.656 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.834 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:21.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:21.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:21.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:21.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:21.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:21.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:21.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:21.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:22.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:22.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:22.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:22.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:22.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:22.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:22.002 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:22.002 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:27.006 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:27.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:27.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:27.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:27.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:27.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:27.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:27.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:27.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:27.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:27.015 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:27.017 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:27.018 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:27.018 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:27.018 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:27.018 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:27.019 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:27.019 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:27.019 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:27.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:27.020 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:27.020 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:27.020 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:27.020 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:27.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:27.020 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:27.021 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:27.021 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:27.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:27.022 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:27.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:27.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:27.023 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:27.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:27.023 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:27.023 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:27.023 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:27.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:27.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:27.026 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:27.026 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:27.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:27.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:27.030 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:27.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:27.547 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:27.549 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:27.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:27.551 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:27.571 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:27.571 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:27.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:27.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:27.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:27.578 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:27.578 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:27.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:27.616 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:27.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:27.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.617 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:27.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:27.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:27.733 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=152 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:27.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:27.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:27.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:27.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:27.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:27.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:27.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:27.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:27.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:27.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:27.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:27.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:27.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:27.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:27.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:27.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:27.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:27.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:27.991 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:27.991 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:27.991 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:28.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:28.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:28.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:28.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:28.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:28.037 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:28.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:28.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:28.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:28.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:28.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:28.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:28.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:28.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:28.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:28.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:28.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:28.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:28.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:28.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:28.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:28.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:28.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:28.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:28.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:28.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:28.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:28.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:28.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:28.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:28.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:28.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:28.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:28.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:28.385 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:33.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:33.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:33.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:33.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:33.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:33.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:33.402 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:33.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:33.403 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:33.403 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:33.403 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:33.405 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:33.405 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:33.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:33.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:33.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:33.406 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:33.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:33.406 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:33.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:33.407 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:33.408 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:33.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:33.408 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:33.408 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:33.408 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:33.408 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:33.408 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:33.408 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:33.409 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:33.409 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:33.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:33.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:33.412 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:33.412 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:33.412 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:33.412 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:33.416 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:33.895 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:33.935 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:33.937 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:33.939 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:33.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:33.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:33.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:33.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:33.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:33.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:33.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:33.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:33.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.002 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:34.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:34.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:34.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:34.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:34.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.356 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:34.367 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:34.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:34.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:34.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.378 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.378 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:34.378 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:34.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:34.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:34.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:34.415 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:34.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.423 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.423 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:34.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:34.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:34.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:34.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:34.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:34.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:34.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:34.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:34.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:34.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:34.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:35.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:35.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:35.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:35.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:35.001 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:35.001 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:35.001 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:35.001 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:35.001 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:35.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:35.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:40.008 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:40.008 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:40.008 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:40.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:40.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:40.008 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:40.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:40.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:40.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:40.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:40.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:40.024 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:40.024 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:40.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:40.025 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:40.025 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:40.026 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:40.026 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:40.026 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:40.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:40.029 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:40.029 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:40.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:40.029 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:40.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:40.029 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:40.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:40.030 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:40.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:40.033 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:40.033 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:40.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:40.033 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:40.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:40.033 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:40.033 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:40.033 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:40.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:40.038 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:40.038 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:40.038 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:40.038 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:40.038 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.039 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:40.039 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:40.039 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:40.040 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:40.044 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:40.523 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:40.575 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:40.577 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:40.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:40.579 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:40.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:40.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:40.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:40.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:40.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:40.607 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:40.607 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:40.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:40.623 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:40.623 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:40.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:40.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:40.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:40.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:40.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:40.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:40.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:40.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:40.986 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:40.986 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:40.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:40.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:40.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:40.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:40.995 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:41.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:41.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:41.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:41.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:41.466 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:41.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:41.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:41.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:41.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:41.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:41.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:41.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:41.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:41.502 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:41.502 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:41.502 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:41.502 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:41.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:41.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:41.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:41.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:41.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:41.939 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:08:42.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:42.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:42.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:42.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:42.412 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:08:42.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:42.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:42.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:42.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:42.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:42.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:42.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:42.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:42.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:42.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:42.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:42.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:42.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:42.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:42.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:42.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:42.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:42.884 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:08:43.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:43.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:43.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:43.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:43.355 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:08:43.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:43.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:43.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:43.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:43.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:43.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:43.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:43.685 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:43.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:43.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:43.687 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:43.687 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:43.687 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:43.687 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:43.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:43.687 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:43.687 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:43.687 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:43.687 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:43.687 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:43.688 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:43.688 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:48.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:48.693 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:48.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:48.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:48.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:48.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:48.703 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:48.703 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:48.703 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:48.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:48.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:48.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:48.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:48.708 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:48.708 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:48.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:48.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:48.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:48.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:48.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:48.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:48.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:48.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:48.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:48.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:48.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:48.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:48.714 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:48.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:48.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:48.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:48.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:48.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:48.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:48.715 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:48.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.718 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:48.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:48.719 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:48.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:48.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:48.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:48.723 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:49.202 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:49.246 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:49.248 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:49.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:49.250 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:49.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:49.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:49.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:49.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:49.271 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:49.271 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:49.271 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:49.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:49.306 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:49.306 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:49.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:49.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.621 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:49.621 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:49.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:49.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:49.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:49.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.640 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:49.640 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:49.640 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:49.640 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:49.675 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:49.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:49.684 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:49.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:49.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:49.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:49.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:49.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:49.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:50.146 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:50.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:50.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:50.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:50.163 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:50.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:50.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:50.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:50.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:50.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:50.181 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:50.181 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:50.181 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:50.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:50.188 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:50.188 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:50.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:50.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:50.616 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:08:50.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:50.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:50.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:50.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:51.090 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:08:51.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:51.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:51.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:51.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:51.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:51.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:51.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:51.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:51.273 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:51.273 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:51.273 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:51.273 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:51.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:51.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:51.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:51.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:51.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:08:51.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:51.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:51.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:51.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:52.034 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:08:52.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:52.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:52.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:52.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:52.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:52.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:52.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:52.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:52.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:52.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:52.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:52.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:52.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:52.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:52.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:52.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:08:57.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:08:57.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:08:57.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:57.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:57.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:57.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:57.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:08:57.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:57.376 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:57.376 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:08:57.376 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:08:57.378 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:08:57.379 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:08:57.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:57.379 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:57.379 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:08:57.379 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:08:57.379 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:08:57.379 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:08:57.379 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:57.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:08:57.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:08:57.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:57.384 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:57.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:08:57.384 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:08:57.384 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:08:57.384 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:08:57.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:57.387 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:08:57.387 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:08:57.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:57.387 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:08:57.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:08:57.388 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:08:57.388 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:08:57.388 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:08:57.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:08:57.393 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:08:57.393 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:08:57.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:08:57.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:08:57.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:08:57.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:08:57.920 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:08:57.921 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:08:57.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:57.924 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:08:57.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:57.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:57.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:57.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:57.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:57.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:57.952 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:57.952 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:57.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:57.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:57.980 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:57.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:57.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:58.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:58.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:58.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:58.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:58.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:58.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:58.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:58.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:58.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:58.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:08:58.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:58.358 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:58.358 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:58.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:58.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:58.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:58.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:58.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:08:58.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:58.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:58.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:58.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:58.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:58.855 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:58.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.857 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:58.857 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:58.857 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:58.857 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:58.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:58.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:58.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:58.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:58.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:59.290 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:08:59.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:08:59.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:08:59.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:08:59.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:08:59.764 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:08:59.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:59.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:59.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:59.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:59.938 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:08:59.938 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:08:59.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:08:59.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:59.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:59.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:59.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:08:59.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:08:59.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:08:59.999 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:08:59.999 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:08:59.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:08:59.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:00.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:09:00.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:00.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:00.708 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:09:01.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:01.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:01.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:01.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:01.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:01.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:01.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:01.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:01.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:01.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:01.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:01.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:01.033 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:01.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:01.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:06.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:06.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:06.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:06.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:06.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:06.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:06.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:06.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:06.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:06.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:06.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:06.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:06.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:06.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:06.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:06.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:06.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:06.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:06.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:06.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:06.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:06.059 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:06.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:06.059 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:06.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:06.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:06.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:06.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:06.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:06.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:06.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:06.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:06.065 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:06.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:06.065 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:06.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:06.065 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:06.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:06.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:06.073 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:06.073 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:06.073 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:06.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:06.078 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:09:06.556 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:09:06.606 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:09:06.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:06.610 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:09:06.613 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:09:06.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:06.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:06.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:06.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:06.643 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:06.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:06.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:06.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:06.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:06.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:06.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:06.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:06.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:06.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:06.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:06.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:06.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:06.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:06.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:06.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:06.977 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:06.978 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:06.978 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:06.978 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:07.029 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:09:07.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:07.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:07.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:07.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:07.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:07.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:07.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:07.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:07.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:07.500 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:09:07.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:07.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:07.515 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:07.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:07.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:07.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:07.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:07.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:07.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:07.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:07.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:07.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:07.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:07.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:07.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:07.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:07.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:07.971 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:09:08.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:08.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:08.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:08.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:08.441 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:09:08.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:08.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:08.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:08.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:08.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:08.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:08.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:08.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:08.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:08.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:08.621 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:08.621 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:08.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:08.685 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:08.685 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:08.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:08.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:08.912 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:09:09.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:09.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:09.385 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:09:09.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:09.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:09.704 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:09.704 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:09.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:09.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:09.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:09.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:09.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:09.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:09.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:09.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:09.711 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:09.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:09.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:14.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:14.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:14.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:14.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:14.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:14.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:14.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:14.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:14.728 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:14.728 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:14.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:14.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:14.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:14.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:14.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:14.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:14.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:14.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:14.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:14.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:14.736 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:14.736 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:14.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:14.738 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:14.739 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:14.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:14.739 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:14.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:14.739 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:14.739 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:14.739 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:14.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:14.743 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:14.743 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:14.743 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.743 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:14.747 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:09:15.225 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:09:15.270 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:09:15.272 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:09:15.274 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:09:15.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:15.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:15.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:15.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:15.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:15.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:15.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:15.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:15.318 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:15.318 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:15.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:15.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:15.318 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:15.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:15.319 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:15.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:15.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:15.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:15.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:15.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:15.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.322 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:20.322 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:20.322 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:20.322 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:20.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:20.322 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:20.330 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:20.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:20.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:20.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:20.332 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:20.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:20.334 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:20.334 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:20.334 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:20.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:20.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:20.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:20.335 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:20.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:20.336 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:20.337 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:20.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:20.337 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:20.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:20.337 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:20.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:20.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:20.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:20.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:20.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:20.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:20.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:20.342 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:20.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:20.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:20.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:09:20.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:09:20.868 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:09:20.870 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:09:20.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:20.873 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:09:20.900 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:20.900 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:20.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:20.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:20.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:20.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:20.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:20.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:20.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:20.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:20.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:20.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:20.924 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:20.924 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:20.924 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:20.924 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:20.924 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:25.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:25.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:25.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:25.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:25.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:25.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:25.936 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:25.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:25.937 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:25.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:25.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:25.940 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:25.940 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:25.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:25.940 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:25.941 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:25.941 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:25.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:25.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:25.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:25.944 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:25.944 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:25.945 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:25.945 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:25.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:25.945 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:25.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:25.946 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:25.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:25.948 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:25.948 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:25.948 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:25.948 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:25.948 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:25.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:25.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:25.949 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:25.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:25.954 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:25.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:25.954 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:25.954 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:25.954 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:25.954 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.955 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:25.955 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:25.955 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:25.955 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:25.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:25.960 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:09:26.439 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:09:26.492 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:09:26.495 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:09:26.497 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:09:26.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:26.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:26.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:26.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:26.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:26.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:26.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:26.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:26.531 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:26.532 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:26.532 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:26.532 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:26.532 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:26.532 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:26.532 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:26.532 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:26.532 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:26.533 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:26.533 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:26.533 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:26.533 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:26.533 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:09:31.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:31.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:31.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:31.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:31.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:31.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:31.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:31.543 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:31.544 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:31.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:31.544 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:31.546 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:31.546 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:31.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:31.547 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:31.547 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:31.547 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:31.547 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:31.548 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:31.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:31.548 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:31.549 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:31.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:31.549 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:31.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:31.549 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:31.549 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:31.549 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:31.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:31.551 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:31.551 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:31.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:31.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:31.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:31.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:31.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:31.554 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:31.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:31.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:31.555 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:31.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:36.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:36.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:36.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:36.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:36.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:36.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:36.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:36.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:36.573 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:36.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:36.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:36.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:36.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:36.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:36.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:36.577 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:36.577 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:36.577 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:36.577 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:36.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:36.578 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:36.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:36.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:36.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:36.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:36.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:36.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:36.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:36.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:36.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:36.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:36.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:36.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:36.584 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:36.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:36.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:36.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:09:37.067 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:09:37.105 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:09:37.109 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:09:37.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:37.110 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:09:37.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:37.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:37.124 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:37.129 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:37.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:37.129 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:37.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:37.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:37.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:37.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:37.171 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:37.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:37.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:37.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:09:37.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:37.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:37.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:37.587 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:38.011 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:09:38.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:38.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:38.124 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:38.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:38.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:38.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:38.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:38.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:38.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:38.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:38.142 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:38.142 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:38.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:38.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:38.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:38.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:38.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:38.482 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:09:38.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:38.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:38.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:38.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:38.954 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:09:39.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:39.083 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:39.083 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:39.083 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:39.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:39.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:39.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:39.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:39.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:39.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:39.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:39.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:39.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:39.148 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:39.148 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:39.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:39.149 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:39.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:09:39.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:39.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:39.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:39.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:39.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:09:40.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:40.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:40.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:40.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:40.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:40.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:40.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:40.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:40.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:40.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:40.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:40.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:40.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:40.082 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:40.082 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:40.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:40.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:40.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:09:40.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:40.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:40.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:40.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:40.842 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:09:41.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:41.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:41.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:41.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:41.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:41.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:41.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:41.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:41.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:41.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:41.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:41.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:41.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:41.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.315 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:09:41.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:41.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:41.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:41.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:41.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:41.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:41.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:41.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:41.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:41.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:41.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:41.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:41.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:41.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:41.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:41.688 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:41.688 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:41.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:41.788 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:09:42.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:42.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:42.238 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:42.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:42.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:42.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:42.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:42.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:42.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:42.259 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:42.260 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:09:42.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:42.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:42.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:42.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.731 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:09:42.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:42.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.861 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:42.861 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:42.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:42.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:42.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:42.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:42.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:42.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:42.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:42.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:42.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:42.925 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:42.925 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:42.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:42.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:43.204 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:09:43.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:43.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:43.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:43.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:43.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:43.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:43.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:43.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:43.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:43.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:43.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:43.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:43.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:43.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:43.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:43.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:43.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:43.676 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:09:44.149 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:09:44.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:44.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:44.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:44.224 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:44.224 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:44.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:44.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:44.226 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:44.226 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:44.226 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:44.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:44.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:44.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.619 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:09:44.783 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:44.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:44.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:44.806 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:44.806 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:44.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:44.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.808 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:44.808 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:44.809 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:44.809 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:44.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:44.865 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:44.865 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:44.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:44.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:45.092 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:09:45.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:45.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:45.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:45.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:45.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:45.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:45.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:45.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:45.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:45.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:45.495 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:45.495 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:45.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:45.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:45.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:45.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:45.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:45.564 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:09:46.036 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:09:46.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:46.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:46.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:46.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:46.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:46.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:46.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:46.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:46.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:46.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:46.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:46.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:46.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:46.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:46.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:46.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:46.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:46.508 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:09:46.979 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:09:46.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:46.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:46.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:46.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:46.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:46.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:46.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:46.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:47.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:47.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:47.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:47.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:47.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:47.034 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:47.034 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:47.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:47.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:47.452 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:09:47.925 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:09:47.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:47.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:47.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:47.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:47.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:47.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:47.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:47.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:47.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:47.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:47.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:47.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:48.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:48.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:48.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:48.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:48.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:48.397 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:09:48.868 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:09:48.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:48.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:48.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:48.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:48.934 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:48.934 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:48.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:48.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:48.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:48.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:48.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:48.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:48.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:48.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:48.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:48.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:48.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:49.339 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:09:49.809 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:09:49.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:49.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:49.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:49.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:49.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:49.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:49.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:49.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:49.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:49.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:49.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:49.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:49.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:49.956 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:49.957 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:49.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:49.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:50.282 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:09:50.755 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:09:50.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:50.840 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:50.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:50.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:50.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:50.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:50.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:50.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:50.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:50.861 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:50.861 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:50.861 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:50.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:50.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:50.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:50.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:50.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:51.227 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:09:51.698 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:09:51.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:51.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:51.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:51.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:51.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:51.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:51.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:51.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:51.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:51.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:51.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:51.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:51.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:51.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:51.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:51.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:51.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:52.169 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:09:52.640 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:09:52.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:52.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:52.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:52.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:52.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:52.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:52.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:52.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:52.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:52.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:52.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:52.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:52.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:52.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:52.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:52.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:52.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:53.113 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:09:53.585 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:09:53.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:53.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:53.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:53.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:53.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:53.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:53.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:53.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:53.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:53.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:53.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:53.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:09:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:53.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:58.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:09:58.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:09:58.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:58.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:58.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:58.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:58.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:09:58.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:58.748 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:58.748 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:09:58.748 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:09:58.750 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:09:58.751 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:09:58.751 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:58.751 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:58.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:09:58.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:09:58.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:09:58.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:09:58.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:58.753 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:09:58.753 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:09:58.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:58.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:09:58.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:09:58.755 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:58.755 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:09:58.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:09:58.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:09:58.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:09:58.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:09:58.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:09:58.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:09:58.758 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:09:58.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:09:58.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:09:59.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:09:59.283 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:09:59.286 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:09:59.287 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:09:59.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:59.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:59.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:59.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:59.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:59.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:59.315 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:59.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:59.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:59.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:59.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:59.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:59.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:59.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:59.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:59.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:59.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:59.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.609 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:59.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:59.609 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:59.609 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:59.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:59.614 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:59.614 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:59.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:09:59.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:09:59.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:09:59.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:09:59.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:09:59.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:59.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:59.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:59.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:09:59.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:09:59.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:09:59.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:59.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:59.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:09:59.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:09:59.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:09:59.850 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:09:59.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:09:59.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:09:59.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:10:00.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:10:00.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:10:00.107 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:10:00.108 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:10:00.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:10:00.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:10:00.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:10:00.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:10:00.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:10:00.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:10:00.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:10:00.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:10:00.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:10:00.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:10:00.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:10:00.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:10:00.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:10:00.184 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:10:00.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:10:00.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:10:00.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:10:00.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:10:00.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:10:00.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:10:00.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:10:00.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:10:00.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:10:00.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:10:00.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:10:00.370 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:10:00.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:10:00.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:10:00.370 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:10:05.376 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:10:05.376 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:10:05.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:10:05.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:10:05.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:10:05.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:10:05.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:10:05.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:10:05.379 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:05.379 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:10:05.379 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:10:05.380 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:10:05.380 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:10:05.380 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:10:05.380 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:05.380 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:10:05.381 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:10:05.381 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:10:05.381 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:10:05.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:10:05.383 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:10:05.383 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:10:05.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:10:05.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:10:05.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:10:05.385 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:10:05.385 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:05.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:10:05.385 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:10:05.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:10:05.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:10:05.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:10:05.388 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:10:05.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:10:05.388 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:10:05.388 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:10:05.388 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:10:05.388 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:10:05.389 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:10:05.389 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:10:05.389 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.389 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:05.390 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:05.394 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:10:05.872 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:10:06.344 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:10:06.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:10:07.292 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:10:07.767 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:10:08.239 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:10:08.714 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:10:09.186 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:10:09.661 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:10:10.133 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:10:10.604 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:10:11.080 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:10:11.552 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:10:12.027 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:10:12.499 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:10:12.974 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:10:13.446 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:10:13.922 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:10:14.394 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:10:14.869 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:10:15.341 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:10:15.816 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:10:16.288 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:10:16.764 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:10:17.235 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:10:17.711 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:10:18.183 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:10:18.658 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:10:19.130 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:10:19.606 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:10:20.078 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:10:20.553 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:10:21.025 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:10:21.500 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:10:21.972 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:10:22.448 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:10:22.921 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:10:23.395 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:10:23.867 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:10:24.342 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:10:24.814 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:10:25.290 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:10:25.762 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:10:26.237 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:10:26.709 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:10:27.184 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:10:27.656 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:10:28.132 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:10:28.604 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:10:29.079 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:10:29.422 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:10:29.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:10:29.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:10:29.422 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:10:29.422 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:10:29.422 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:10:29.422 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:29.422 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:10:34.428 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:10:34.428 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:10:34.428 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:10:34.428 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:10:34.428 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:10:34.428 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:10:34.436 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:10:34.436 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:10:34.436 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:34.437 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:10:34.437 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:10:34.440 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:10:34.440 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:10:34.441 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:10:34.441 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:34.441 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:10:34.441 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:10:34.442 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:10:34.442 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:10:34.442 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:10:34.444 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:10:34.444 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:10:34.444 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:10:34.444 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:34.444 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:10:34.445 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:10:34.445 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:10:34.445 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:10:34.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:10:34.447 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:10:34.447 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:10:34.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:10:34.447 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:10:34.447 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:10:34.447 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:10:34.447 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:10:34.447 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:10:34.448 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.451 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:10:34.451 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:10:34.451 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:10:34.452 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:10:34.456 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:10:34.935 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:10:35.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:10:35.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:10:36.352 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:10:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:10:37.296 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:10:37.770 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:10:38.242 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:10:38.714 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:10:39.188 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:10:39.660 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:10:40.132 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:10:40.607 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:10:41.079 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:10:41.553 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:10:42.034 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:10:42.506 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:10:42.979 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:10:43.452 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:10:43.924 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:10:44.398 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:10:44.870 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:10:45.342 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:10:45.817 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:10:46.289 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:10:46.765 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:10:47.236 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:10:47.707 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:10:48.182 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:10:48.654 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:10:49.129 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:10:49.601 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:10:50.077 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:10:50.549 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:10:51.024 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:10:51.496 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:10:51.971 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:10:52.443 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:10:52.917 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:10:53.389 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:10:53.861 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:10:54.336 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:10:54.808 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:10:55.282 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:10:55.754 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:10:56.226 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:10:56.697 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:10:57.172 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:10:57.644 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:10:58.120 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:10:58.594 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:10:59.067 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:10:59.539 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:11:00.014 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:11:00.486 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:11:00.962 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:11:01.434 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:11:01.909 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:11:02.381 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:11:02.856 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:11:03.328 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:11:03.804 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:11:04.276 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:11:04.751 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:11:05.223 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:11:05.698 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:11:06.170 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:11:06.646 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:11:07.118 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:11:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:11:08.065 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:11:08.540 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:11:09.012 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:11:09.488 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:11:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:11:10.433 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:11:10.905 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:11:11.377 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:11:11.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:11.852 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:11:12.324 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:11:12.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:12.800 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:11:13.272 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:11:13.488 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:13.747 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:11:14.219 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:11:14.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:14.694 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:11:15.166 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:11:15.492 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:15.642 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:11:16.114 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:11:16.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:16.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:11:16.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:11:16.489 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:11:16.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:11:16.489 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:11:16.489 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:11:16.489 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:11:21.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:11:21.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:11:21.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:11:21.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:11:21.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:11:21.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:11:21.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:11:21.505 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:11:21.505 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:21.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:11:21.506 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:11:21.509 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:11:21.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:11:21.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:11:21.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:21.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:11:21.510 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:11:21.510 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:11:21.510 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:11:21.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:21.511 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:11:21.512 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:11:21.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:11:21.512 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:21.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:11:21.512 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:11:21.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:11:21.512 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:11:21.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:21.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:11:21.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:11:21.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:11:21.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:21.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:11:21.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:11:21.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:11:21.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:11:21.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:11:21.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:11:21.518 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:11:21.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:21.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:21.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:11:22.001 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:11:22.041 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:11:22.042 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:22.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:22.043 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:11:22.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:22.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:22.075 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:22.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:22.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:22.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:22.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:22.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:22.094 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:22.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:22.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:22.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:22.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:22.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:22.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:11:22.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:22.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:22.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:22.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:22.945 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:11:22.959 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:23.418 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:11:23.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:23.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:23.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:23.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:23.891 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:11:24.363 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:11:24.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:24.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:24.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:24.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:24.834 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:11:25.308 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:11:25.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:25.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:25.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:25.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:25.780 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:11:25.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:25.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:25.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:25.857 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:25.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:25.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:25.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:25.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:25.876 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:25.876 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:25.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:25.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:25.919 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:25.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:25.932 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:25.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:25.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:25.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:26.252 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:11:26.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:26.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:26.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:26.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:26.723 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:11:27.052 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:27.194 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:11:27.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:11:28.135 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:11:28.606 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:11:29.080 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:11:29.551 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:11:29.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:29.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:29.943 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:29.943 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:29.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:29.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:29.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:29.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:29.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:29.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:29.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:29.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:29.968 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:29.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:29.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:29.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:29.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:29.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:30.023 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:11:30.458 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:30.494 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:11:30.967 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:11:31.440 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:11:31.912 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:11:32.383 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:11:32.854 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:11:33.325 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:11:33.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:33.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:33.765 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:33.765 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:33.783 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:33.783 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:33.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:33.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:33.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:33.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:33.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:33.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:33.790 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:33.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:33.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:33.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:33.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:33.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:33.797 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:11:34.270 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:11:34.660 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:34.742 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:11:35.131 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:35.215 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:11:35.688 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:11:36.078 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:36.160 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:11:36.631 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:11:37.104 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:11:37.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:37.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:37.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:37.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:37.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:37.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:37.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:37.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:37.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:11:37.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:11:37.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:11:37.513 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:11:37.513 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:11:37.513 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:11:37.513 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:11:37.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:37.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:37.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:37.514 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:37.514 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:37.514 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:37.514 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:42.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:11:42.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:11:42.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:11:42.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:11:42.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:11:42.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:11:42.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:11:42.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:11:42.527 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:42.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:11:42.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:11:42.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:11:42.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:11:42.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:11:42.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:42.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:11:42.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:11:42.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:11:42.533 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:11:42.533 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:42.538 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:11:42.538 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:11:42.538 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:11:42.538 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:42.538 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:11:42.539 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:11:42.539 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:11:42.539 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:11:42.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:11:42.542 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:11:42.542 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:11:42.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:11:42.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:11:42.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:11:42.547 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:11:42.547 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:11:42.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:11:43.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:11:43.071 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:11:43.072 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:43.073 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:11:43.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:43.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:43.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:43.097 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:43.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:43.105 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:43.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:43.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:43.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:43.124 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:43.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:43.141 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:43.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:43.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:43.142 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:43.503 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:11:43.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:43.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:43.974 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:11:43.989 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:43.992 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:44.445 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:11:44.468 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:44.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:44.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:44.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:44.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:44.918 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:11:44.948 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:45.391 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:11:45.435 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:45.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:45.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:45.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:45.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:45.863 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:11:45.915 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:46.334 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:11:46.395 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:46.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:46.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:46.805 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:11:46.875 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:47.278 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:11:47.355 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:47.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:11:47.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:11:47.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:11:47.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:11:47.751 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:11:47.841 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:48.224 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:11:48.321 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:48.694 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:11:48.801 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:49.168 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:11:49.281 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:49.640 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:11:49.767 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:50.113 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:11:50.247 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:50.584 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:11:50.727 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:51.057 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:11:51.207 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:51.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:51.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:51.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:51.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:51.216 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=1873 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:51.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:51.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:51.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:51.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:51.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:51.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:51.231 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:51.231 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:51.234 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:51.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:51.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:51.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:51.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:51.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:51.536 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:11:51.941 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:52.009 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:11:52.420 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:52.423 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:11:52.479 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:11:52.900 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:52.950 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:11:53.380 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:53.421 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:11:53.860 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:53.892 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:11:54.340 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:54.363 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:11:54.820 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:54.833 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:11:55.300 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:55.304 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:11:55.775 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:11:55.781 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:56.248 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:11:56.260 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:56.721 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:11:56.746 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:57.192 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:11:57.226 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:57.664 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:11:57.706 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:58.137 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:11:58.186 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:58.610 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:11:58.672 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:59.081 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:11:59.152 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:59.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:59.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:59.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:59.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:59.160 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=3589 tn=2 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:59.161 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=3589 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:11:59.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:11:59.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:11:59.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:11:59.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:59.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:59.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:59.177 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:11:59.177 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:11:59.219 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:59.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:11:59.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:11:59.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:11:59.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:59.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:11:59.516 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:59.553 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:11:59.987 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:11:59.991 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:12:00.026 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:12:00.457 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:00.498 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:12:00.934 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:00.970 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:12:01.405 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:01.441 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:12:01.875 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:01.912 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:12:02.346 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:02.385 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:12:02.817 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:02.858 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:12:03.293 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:03.330 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:12:03.764 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:03.801 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:12:04.235 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:04.272 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:12:04.705 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:04.745 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:12:05.176 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:05.217 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:12:05.653 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:05.690 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:12:06.124 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:06.160 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:12:06.594 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:06.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:06.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:06.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:06.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:06.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:06.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:06.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:06.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:06.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:06.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:06.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:06.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:06.628 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:06.631 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:12:06.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:06.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:06.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:06.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:06.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:07.021 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:07.102 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:12:07.491 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:07.493 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:12:07.573 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:12:07.962 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:07.964 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:12:08.046 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:12:08.432 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:08.519 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:12:08.909 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:08.913 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:12:08.991 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:12:09.380 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:09.462 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:12:09.850 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:09.935 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:12:10.321 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:10.407 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:12:10.798 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:10.880 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:12:11.268 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:11.353 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:12:11.739 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:11.826 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:12:12.216 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:12.297 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:12:12.686 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:12.768 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:12:13.157 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:13.239 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:12:13.628 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:13.713 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:12:14.099 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:14.104 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:14.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:14.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:14.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:14.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:14.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:14.106 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:14.106 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:14.107 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:14.107 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:14.107 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:14.107 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:14.107 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:12:14.107 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:14.107 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:19.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:19.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:19.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:19.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:19.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:19.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:19.118 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:19.118 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:19.118 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:19.119 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:19.119 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:12:19.121 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:12:19.121 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:12:19.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:19.122 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:19.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:19.122 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:12:19.122 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:19.123 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:12:19.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:19.124 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:12:19.124 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:12:19.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:19.124 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:19.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:19.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:12:19.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:19.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:12:19.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:19.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:12:19.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:12:19.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:19.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:19.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:19.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:12:19.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:19.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:12:19.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:19.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:12:19.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:12:19.131 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:12:19.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:19.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:19.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:19.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:12:19.615 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:12:19.661 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:12:19.662 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:19.663 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:12:19.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:19.680 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:19.680 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:19.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:19.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:19.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:19.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:19.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:19.686 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:19.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:19.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:19.720 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:19.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:19.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:20.086 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:12:20.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:20.134 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:20.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:20.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:20.558 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:12:21.032 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:12:21.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:21.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:21.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:21.135 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:21.504 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:12:21.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:21.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:21.825 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:21.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:21.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:21.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:21.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:21.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:21.845 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:21.845 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:21.845 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:21.845 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:21.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:21.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:21.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:21.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:21.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:21.976 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:12:22.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:22.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:22.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:22.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:22.447 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:12:22.921 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:12:23.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:23.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:23.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:23.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:23.393 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:12:23.865 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:12:23.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:23.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:23.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:23.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:24.007 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:24.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:24.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:24.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:24.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:24.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:24.008 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:24.008 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:24.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:24.061 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:24.062 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:24.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:24.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:24.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:24.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:24.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:24.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:24.338 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:12:24.811 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:12:25.284 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:12:25.757 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:12:26.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:26.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:26.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:26.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:26.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:26.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:26.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:26.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:26.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:26.180 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:26.180 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:26.180 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:26.180 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:26.180 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:26.181 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:12:26.181 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:26.181 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:26.181 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:26.181 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:26.181 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:26.181 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:26.182 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1522 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:31.181 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:31.181 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:31.181 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:31.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:31.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:31.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:31.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:31.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:31.193 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:31.193 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:31.193 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:12:31.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:12:31.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:12:31.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:31.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:31.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:31.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:12:31.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:31.198 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:12:31.198 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:31.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:12:31.199 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:12:31.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:31.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:31.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:31.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:12:31.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:31.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:12:31.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:31.202 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:31.202 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:12:31.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:12:31.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:12:31.205 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:12:31.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:12:31.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:31.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:31.210 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:12:31.688 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:12:31.727 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:12:31.728 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:31.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:31.729 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:12:31.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:31.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:31.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:31.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:31.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:31.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:31.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:31.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:31.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:31.794 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:31.794 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:31.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:31.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:32.161 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:12:32.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:32.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:32.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:32.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:32.632 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:12:33.105 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:12:33.208 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:33.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:33.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:33.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:33.578 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:12:33.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:33.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:33.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:33.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:33.911 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:33.911 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:33.911 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:33.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:33.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:33.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:33.913 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:33.913 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:33.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:33.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:33.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:33.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:33.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:34.050 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:12:34.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:34.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:34.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:34.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:34.521 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:12:34.992 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:12:35.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:35.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:35.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:35.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:35.465 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:12:35.937 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:12:36.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:36.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:36.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:36.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:36.066 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:36.066 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:36.066 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:36.067 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:36.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:36.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:36.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:36.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:36.067 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:12:36.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:36.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:36.068 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1050 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:12:41.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:41.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:41.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:41.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:41.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:41.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:41.083 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:41.085 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:41.085 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:41.086 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:41.086 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:12:41.092 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:12:41.092 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:12:41.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:41.093 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:41.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:41.093 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:12:41.093 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:41.093 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:12:41.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:41.098 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:12:41.098 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:12:41.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:41.098 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:41.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:41.098 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:12:41.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:41.099 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:12:41.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:41.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:12:41.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:12:41.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:41.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:41.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:41.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:12:41.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:41.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:12:41.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:41.108 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:12:41.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:12:41.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:12:41.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:12:41.108 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:12:41.109 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:12:41.109 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:12:41.109 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:41.110 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.111 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:41.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:41.111 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:41.114 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:12:41.592 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:12:41.642 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:12:41.645 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:41.647 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:12:41.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:41.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:41.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:41.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:41.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:41.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:41.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:41.675 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:41.675 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:41.686 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:41.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:41.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:42.064 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:12:42.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:42.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:42.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:42.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:42.536 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:12:43.009 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:12:43.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:43.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:43.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:43.115 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:43.482 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:12:43.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:43.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:43.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:43.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:43.779 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:43.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:43.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:43.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:43.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:43.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:43.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:43.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:43.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:43.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:43.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:43.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:43.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:43.954 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:12:44.115 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:44.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:44.116 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:44.116 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:44.425 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:12:44.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:12:45.116 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:45.117 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:45.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:45.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:45.366 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:12:45.840 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:12:45.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:45.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:45.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:45.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:45.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:45.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:45.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:45.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:45.922 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:45.922 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:45.922 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:45.922 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:45.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:45.927 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:45.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:45.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:45.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:46.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:46.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:46.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:46.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:46.312 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:12:46.785 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:12:47.256 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:12:47.726 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:12:47.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:47.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:47.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:47.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:47.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:47.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:47.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:47.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:47.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:47.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:47.999 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:47.999 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:47.999 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:12:47.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:47.999 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:53.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:53.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:53.003 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:53.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:53.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:53.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:53.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:53.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:53.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:53.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:12:53.007 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:12:53.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:12:53.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:12:53.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:53.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:53.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:53.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:12:53.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:12:53.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:12:53.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:53.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:12:53.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:12:53.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:53.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:53.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:53.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:12:53.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:12:53.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:12:53.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:53.019 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:12:53.019 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:12:53.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:53.024 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:12:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:12:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:12:53.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:12:53.024 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.025 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:12:53.025 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:12:53.025 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:12:53.026 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:12:53.030 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:12:53.509 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:12:53.555 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:12:53.557 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:12:53.559 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:12:53.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:53.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:53.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:53.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:53.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:53.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:53.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:53.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:53.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:53.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:53.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:53.609 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:53.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:53.609 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:53.981 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:12:54.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:54.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:54.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:54.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:54.452 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:12:54.923 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:12:55.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:55.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:55.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:55.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:55.394 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:12:55.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:55.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:55.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:55.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:55.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:55.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:55.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:12:55.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:55.730 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:55.730 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:55.730 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:12:55.730 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:12:55.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:55.778 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:12:55.778 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:12:55.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:55.778 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:55.864 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:12:56.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:56.033 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:56.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:56.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:56.335 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:12:56.806 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:12:57.034 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:57.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:57.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:57.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:57.280 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:12:57.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:12:57.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:12:57.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:12:57.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:12:57.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:12:57.885 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:12:57.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:12:57.885 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:12:57.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:12:57.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:12:57.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:12:57.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:12:57.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:12:57.886 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:12:57.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:12:57.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:02.893 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:02.893 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:02.893 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:02.893 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:02.893 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:02.894 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:02.902 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:02.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:02.904 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:02.904 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:02.904 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:02.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:02.909 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:02.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:02.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:02.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:02.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:02.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:02.911 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:02.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:02.913 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:02.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:02.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:02.913 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:02.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:02.914 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:02.914 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:02.914 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:02.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:02.916 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:02.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:02.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:02.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:02.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:02.920 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:02.920 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:02.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:03.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:03.449 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:03.450 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:03.451 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:03.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:03.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:03.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:03.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:03.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:03.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:03.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:03.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:03.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:03.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:03.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:03.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:03.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:03.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:03.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:03.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:03.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:03.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:04.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:04.817 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:13:04.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:04.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:04.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:04.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:05.291 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:13:05.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:05.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:05.686 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:05.686 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:05.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:05.695 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:05.698 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:05.698 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:05.698 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:05.698 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:05.698 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:05.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:05.698 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:05.698 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:10.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:10.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:10.703 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:10.703 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:10.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:10.703 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:10.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:10.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:10.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:10.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:10.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:10.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:10.717 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:10.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:10.717 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:10.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:10.717 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:10.717 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:10.717 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:10.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:10.720 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:10.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:10.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:10.720 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:10.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:10.721 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:10.721 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:10.721 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:10.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:10.722 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:10.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:10.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:10.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:10.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:10.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:10.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:10.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:10.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:10.726 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:10.726 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:10.726 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:10.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:10.731 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:11.208 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:11.249 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:11.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:11.251 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:11.255 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:11.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:11.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:11.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:11.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:11.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:11.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:11.283 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:11.283 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:11.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:11.315 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:11.315 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:11.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:11.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:11.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:11.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:11.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:11.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:11.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:12.147 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:12.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:13:12.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:12.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:12.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:12.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:13.089 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:13:13.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:13.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:13.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:13.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:13.510 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:13.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:13.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:13.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:13.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:13.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:13.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:13.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:13.511 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:13.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:13.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:18.518 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:18.518 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:18.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:18.518 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:18.518 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:18.518 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:18.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:18.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:18.530 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:18.530 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:18.530 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:18.536 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:18.536 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:18.537 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:18.537 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:18.537 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:18.538 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:18.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:18.538 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:18.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:18.541 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:18.541 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:18.541 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:18.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:18.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:18.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:18.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:18.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:18.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:18.545 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:18.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:18.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:18.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:18.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:18.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:18.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:18.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:18.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:18.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:18.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:18.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:18.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:18.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:18.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:18.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:18.551 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:18.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:18.556 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:19.034 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:19.078 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:19.080 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:19.082 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:19.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:19.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:19.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:19.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.142 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:19.142 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:19.143 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:19.143 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:19.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:19.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:19.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:19.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.506 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:19.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:19.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:19.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:19.555 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:19.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:19.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:19.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:19.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:19.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:19.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:19.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.588 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:19.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:19.588 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:19.588 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:19.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:19.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:19.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:19.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:19.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:19.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:19.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:19.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:19.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:19.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:19.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:19.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:19.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:19.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:19.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:19.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:19.993 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:24.997 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:24.997 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:24.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:24.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:24.997 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:24.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:25.004 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:25.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:25.005 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:25.005 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:25.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:25.009 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:25.010 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:25.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:25.010 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:25.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:25.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:25.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:25.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:25.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:25.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:25.015 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:25.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:25.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:25.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:25.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:25.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:25.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:25.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:25.019 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:25.020 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:25.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:25.020 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:25.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:25.020 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:25.020 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:25.020 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:25.020 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.026 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:25.027 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:25.027 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:25.027 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.027 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:25.028 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:25.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:25.032 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:25.510 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:25.555 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:25.557 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:25.558 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:25.560 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:25.577 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:25.577 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:25.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:25.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:25.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:25.619 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:25.619 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:25.619 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:25.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:25.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:25.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:25.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:25.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:25.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:26.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:26.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:26.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:26.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:26.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:26.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:26.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:26.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:26.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:26.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:26.049 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:26.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:26.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:26.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:26.059 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:26.059 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:26.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:26.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:26.070 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:26.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:26.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:26.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:26.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:26.452 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:26.452 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:26.453 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:26.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:26.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:26.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:26.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:26.464 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:26.464 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:26.464 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:26.464 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:26.464 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:26.464 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:26.464 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:26.464 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:31.469 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:31.469 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:31.469 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:31.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:31.469 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:31.469 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:31.477 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:31.478 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:31.478 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:31.479 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:31.479 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:31.482 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:31.482 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:31.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:31.482 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:31.482 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:31.482 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:31.482 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:31.482 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:31.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:31.485 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:31.485 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:31.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:31.486 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:31.486 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:31.486 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:31.486 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:31.486 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:31.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:31.489 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:31.489 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:31.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:31.493 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:31.493 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:31.493 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.494 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:31.494 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:31.494 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:31.494 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:31.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:31.499 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:32.021 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:32.024 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:32.024 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:32.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:32.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:32.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:32.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:32.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:32.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:32.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:32.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:32.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:32.119 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:32.119 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:32.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:32.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:32.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:32.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:32.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:32.500 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:32.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:32.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:32.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:32.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:32.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:32.528 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.528 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:32.528 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:32.528 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:32.528 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:32.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:32.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:32.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:32.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.921 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:32.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:32.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:32.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:32.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:32.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:32.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:32.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:32.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:32.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:32.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:32.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:32.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:32.971 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:32.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:32.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:37.978 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:37.978 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:37.978 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:37.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:37.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:37.978 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:37.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:37.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:37.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:37.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:37.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:37.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:37.993 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:37.993 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:37.993 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:37.993 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:37.993 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:37.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:37.994 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:37.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:37.997 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:37.997 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:37.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:37.997 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:37.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:37.998 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:37.998 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:37.998 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:37.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:38.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:38.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:38.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:38.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:38.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:38.002 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:38.002 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:38.002 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:38.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:38.007 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:38.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:38.008 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:38.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:38.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:38.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:38.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:38.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:38.537 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:38.539 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:38.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:38.541 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:38.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:38.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:38.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:38.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:38.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:38.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:38.595 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:38.595 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:38.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:38.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:38.638 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:38.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:38.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:38.962 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:39.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:39.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:39.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:39.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:39.434 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:39.907 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:13:40.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:40.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:40.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:40.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:40.377 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:13:40.848 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:13:41.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:41.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:41.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:41.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:41.319 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:13:41.792 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:13:42.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:42.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:42.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:42.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:42.265 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:13:42.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:42.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:42.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:42.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:42.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:42.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:42.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:42.649 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:42.649 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:42.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:42.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:42.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:42.649 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:42.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1003 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:47.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:47.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:47.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:47.655 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:47.655 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:47.655 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:47.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:47.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:47.665 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:47.665 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:47.665 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:47.667 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:47.668 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:47.668 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:47.668 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:47.668 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:47.668 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:47.669 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:47.669 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:47.669 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:47.670 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:47.670 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:47.670 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:47.672 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:47.672 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:47.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.675 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:47.675 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:47.675 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:47.676 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:47.680 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:48.159 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:48.198 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:48.200 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:48.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:48.203 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:48.216 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:48.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:48.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:48.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.244 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:48.244 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:48.244 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:48.244 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:48.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:48.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:48.255 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:48.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:48.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:48.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:48.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:48.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:48.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:48.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.490 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:48.490 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:48.490 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:48.490 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:48.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:48.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:48.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:48.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.629 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:48.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:48.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:48.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:48.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:48.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:48.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:48.755 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:48.755 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:48.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:48.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:48.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:48.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:48.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:48.767 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:48.767 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:48.767 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:48.767 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:13:48.767 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:48.767 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:48.767 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=236 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:13:53.770 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:53.770 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:53.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:53.770 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:53.770 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:53.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:53.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:53.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:53.773 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:53.773 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:13:53.773 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:13:53.774 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:13:53.774 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:13:53.774 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:53.774 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:53.775 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:53.775 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:13:53.775 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:13:53.775 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:13:53.775 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:53.775 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:13:53.775 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:13:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:53.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:53.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:53.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:13:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:13:53.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:13:53.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:53.777 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:13:53.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:13:53.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:13:53.779 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:13:53.779 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:13:53.779 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:13:53.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:13:53.784 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:13:54.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:13:54.304 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:13:54.307 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:13:54.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:54.309 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:13:54.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:54.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:54.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:13:54.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:54.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:54.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:54.386 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:13:54.386 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:13:54.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:13:54.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:13:54.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:13:54.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:54.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:13:54.735 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:13:54.782 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:54.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:54.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:54.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:55.206 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:13:55.677 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:13:55.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:55.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:55.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:55.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:56.147 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:13:56.621 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:13:56.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:56.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:56.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:56.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:57.093 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:13:57.566 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:13:57.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:57.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:58.039 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:13:58.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:13:58.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:13:58.418 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:13:58.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:13:58.419 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:13:58.419 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:13:58.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:13:58.420 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:13:58.420 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:13:58.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:13:58.420 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:13:58.420 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:13:58.420 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:03.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:03.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:03.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:03.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:03.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:03.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:03.432 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:03.433 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:03.433 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:03.434 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:03.434 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:03.437 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:03.437 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:03.437 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:03.437 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:03.437 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:03.437 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:03.438 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:03.438 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:03.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:03.441 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:03.441 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:03.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:03.441 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:03.441 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:03.441 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:03.441 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:03.441 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:03.442 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:03.444 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:03.444 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:03.444 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:03.444 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:03.445 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:03.445 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:03.445 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:03.445 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:03.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:03.449 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:03.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:03.449 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:03.449 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:03.449 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:03.449 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:03.450 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:03.450 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:03.450 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.450 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.451 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:03.452 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:03.455 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:03.934 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:03.983 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:03.986 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:03.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:03.989 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:04.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:04.006 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:04.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:04.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:04.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:04.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:04.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:04.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:04.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:04.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:04.083 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:04.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:04.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:04.407 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:04.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:04.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:04.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:04.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:04.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:04.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:04.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:04.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:04.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:04.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:04.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:04.810 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:04.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:04.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:04.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:04.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:04.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:04.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:04.813 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:04.814 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:09.818 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:09.818 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:09.818 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:09.818 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:09.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:09.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:09.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:09.827 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:09.827 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:09.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:09.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:09.830 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:09.830 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:09.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:09.831 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:09.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:09.831 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:09.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:09.832 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:09.832 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:09.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:09.834 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:09.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:09.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:09.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:09.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:09.835 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:09.835 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:09.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:09.837 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:09.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:09.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:09.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:09.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:09.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:09.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:09.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:09.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:09.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:09.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:09.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:09.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.844 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:09.844 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:09.844 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:09.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:09.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:09.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:09.849 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:10.328 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:10.375 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:10.377 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:10.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:10.379 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:10.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:10.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:10.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:10.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:10.444 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:10.444 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:10.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:10.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:10.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:10.476 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:10.476 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:10.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:10.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:10.801 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:10.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:10.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:10.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:10.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:11.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:11.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:11.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:11.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:11.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:11.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:11.206 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:11.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:11.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:11.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:11.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:11.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:11.208 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:11.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:11.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:16.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:16.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:16.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:16.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:16.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:16.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:16.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:16.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:16.222 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:16.222 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:16.222 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:16.224 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:16.225 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:16.225 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:16.225 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:16.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:16.226 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:16.226 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:16.226 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:16.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:16.227 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:16.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:16.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:16.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:16.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:16.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:16.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:16.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:16.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:16.230 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:16.230 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:16.230 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.233 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:16.233 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:16.233 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:16.234 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:16.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:16.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:16.238 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:16.717 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:16.755 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:16.756 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:16.758 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:16.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:16.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:16.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:16.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:16.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:16.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:16.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:16.816 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:16.816 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:16.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:16.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:16.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:16.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:16.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:17.187 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:17.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:17.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:17.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:17.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:17.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:17.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:17.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:17.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:17.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:17.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:17.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:17.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:17.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:17.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:17.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:17.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:17.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:17.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:17.596 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:17.597 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:22.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:22.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:22.599 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:22.599 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:22.599 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:22.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:22.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:22.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:22.610 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:22.610 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:22.610 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:22.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:22.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:22.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:22.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:22.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:22.616 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:22.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:22.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:22.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:22.619 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:22.620 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:22.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:22.620 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:22.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:22.620 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:22.620 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:22.620 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:22.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:22.624 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:22.625 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:22.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:22.625 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:22.625 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:22.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:22.625 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:22.625 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:22.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:22.630 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.631 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:22.631 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:22.631 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:22.632 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:22.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:22.636 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:23.115 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:23.161 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:23.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:23.164 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:23.167 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:23.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:23.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:23.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:23.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:23.238 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:23.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:23.239 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:23.239 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:23.262 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:23.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:23.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:23.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:23.587 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:23.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:23.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:23.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:23.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:24.058 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:14:24.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:24.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:24.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:24.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:24.125 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:24.126 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:24.126 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:24.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:24.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:24.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:24.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:24.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:24.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:24.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:24.129 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:24.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:24.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:24.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:24.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:29.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:29.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:29.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:29.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:29.134 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:29.134 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:29.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:29.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:29.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:29.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:29.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:29.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:29.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:29.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:29.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:29.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:29.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:29.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:29.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:29.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:29.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:29.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:29.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:29.140 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:29.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:29.141 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:29.141 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:29.141 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:29.141 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:29.141 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:29.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:29.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:29.143 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:29.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:29.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:29.148 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:29.627 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:29.668 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:29.672 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:29.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:29.675 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:29.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:29.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:29.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:29.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:29.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:29.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:29.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:29.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:29.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:29.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:29.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:29.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:29.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:30.099 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:30.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:30.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:30.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:30.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:30.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:30.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:30.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:30.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:30.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:30.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:30.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:30.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:30.503 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:30.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:30.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:30.503 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:30.503 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:30.503 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:30.503 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:35.509 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:35.509 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:35.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:35.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:35.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:35.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:35.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:35.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:35.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:35.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:35.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:35.523 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:35.523 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:35.524 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:35.524 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:35.524 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:35.525 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:35.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:35.525 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:35.527 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:35.527 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:35.527 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:35.528 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:35.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:35.528 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:35.528 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:35.528 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:35.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:35.530 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:35.530 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:35.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:35.531 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:35.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:35.531 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:35.531 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:35.531 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:35.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:35.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:35.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:35.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:35.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:35.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:35.535 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:35.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:35.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:35.540 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:36.018 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:36.068 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:36.071 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:36.073 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:36.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:36.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:36.091 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:36.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:36.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:36.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:36.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:36.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:36.134 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:36.160 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:36.167 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:36.167 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:36.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:36.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:36.491 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:36.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:36.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:36.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:36.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:36.962 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:14:37.011 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:37.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:37.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:37.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:37.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:37.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:37.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:37.029 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:37.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:37.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:37.030 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:37.030 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:37.030 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:37.030 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:37.030 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:37.030 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:14:42.037 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:42.037 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:42.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:42.038 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:42.038 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:42.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:42.046 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:42.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:42.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:42.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:42.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:42.054 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:42.054 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:42.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:42.055 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:42.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:42.055 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:42.055 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:42.055 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:42.055 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:42.059 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:42.060 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:42.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:42.060 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:42.060 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:42.060 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:42.060 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:42.060 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:42.061 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:42.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:42.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:42.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:42.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:42.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:42.065 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:42.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:42.065 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:42.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:42.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:42.071 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:42.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:42.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:42.553 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:42.605 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:42.607 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:42.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:42.609 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:42.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:42.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:42.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:42.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:42.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:42.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:42.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:42.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:43.025 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:43.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:43.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:43.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:43.076 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:43.496 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:14:43.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:43.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:43.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:43.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:43.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:43.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:43.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:43.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:43.789 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:43.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:43.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:43.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:43.967 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:14:44.077 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:44.077 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:44.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:44.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:44.441 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:14:44.835 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:14:44.913 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:14:44.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:14:44.953 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:44.953 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:44.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:44.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:44.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:44.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:44.961 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:44.961 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:44.961 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:44.961 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:44.961 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:14:44.961 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:44.961 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:49.968 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:14:49.968 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:14:49.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:49.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:49.968 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:49.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:49.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:14:49.975 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:49.975 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:49.976 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:14:49.976 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:14:49.979 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:14:49.979 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:14:49.980 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:49.980 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:49.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:14:49.981 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:14:49.981 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:14:49.981 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:14:49.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:49.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:14:49.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:14:49.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:49.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:49.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:14:49.984 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:14:49.984 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:14:49.984 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:14:49.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:49.986 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:14:49.986 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:14:49.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:49.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:14:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:14:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:14:49.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:14:49.989 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:14:49.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:14:49.990 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:14:49.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:14:49.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:14:49.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:14:49.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:14:50.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:14:50.517 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:14:50.519 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:14:50.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:14:50.521 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:14:50.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:14:50.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:14:50.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:14:50.551 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:50.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:50.552 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:50.552 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:14:50.552 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:14:50.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:14:50.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:50.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:50.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:50.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:51.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:14:51.890 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:14:51.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:51.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:51.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:51.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:52.362 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:14:52.834 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:14:52.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:52.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:52.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:52.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:53.305 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:14:53.779 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:14:53.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:53.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:53.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:53.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:54.251 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:14:54.723 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:14:54.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:14:54.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:14:54.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:14:54.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:14:55.194 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:14:55.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:14:55.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:14:55.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:14:55.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:55.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:14:55.666 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:14:56.140 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:14:56.612 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:14:57.086 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:14:57.558 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:14:58.030 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:14:58.503 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:14:58.976 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:14:59.448 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:14:59.921 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:15:00.394 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:15:00.866 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:15:01.339 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:15:01.812 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:15:02.284 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:15:02.757 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:15:03.230 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:15:03.702 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:15:04.176 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:15:04.649 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:15:05.117 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:15:05.582 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:15:06.052 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:15:06.524 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:15:06.996 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:15:07.470 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:15:07.942 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:15:08.414 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:15:08.888 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:15:09.360 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:15:09.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:09.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:09.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:09.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:09.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:09.681 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:09.681 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:09.681 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:09.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:09.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:09.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:09.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:09.682 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:15:09.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:09.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:14.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:14.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:14.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:14.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:14.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:14.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:14.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:14.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:15:14.704 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:14.704 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:15:14.704 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:15:14.708 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:15:14.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:15:14.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:15:14.709 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:14.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:14.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:15:14.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:15:14.710 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:15:14.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:14.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:15:14.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:15:14.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:15:14.715 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:14.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:14.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:15:14.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:15:14.716 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:15:14.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:14.721 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:15:14.721 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:15:14.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:15:14.722 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:14.722 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:14.722 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:15:14.722 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:15:14.722 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:15:14.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:14.730 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:15:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:15:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:15:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:15:14.730 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.731 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:15:14.731 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:15:14.731 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:15:14.732 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:14.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:14.736 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:15:15.215 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:15:15.268 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:15:15.270 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:15:15.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:15:15.272 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:15:15.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:15.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:15.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:15:15.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:15.295 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:15:15.295 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:15:15.295 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:15:15.295 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:15:15.687 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:15:15.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:15.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:15.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:15.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:16.158 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:15:16.632 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:15:16.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:16.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:16.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:16.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:17.104 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:15:17.576 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:15:17.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:17.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:17.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:17.740 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:18.047 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:15:18.521 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:15:18.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:18.741 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:18.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:18.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:18.993 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:15:19.465 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:15:19.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:19.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:19.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:19.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:19.936 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:15:20.191 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:20.196 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:15:20.196 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:15:20.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:20.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:20.408 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:15:20.882 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:15:21.354 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:15:21.827 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:15:22.300 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:15:22.772 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:15:23.245 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:15:23.718 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:15:24.183 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:15:24.652 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:15:25.126 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:15:25.595 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:15:26.060 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:15:26.528 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:15:27.001 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:15:27.171 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:27.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:27.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:27.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:27.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:27.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:27.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:27.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:27.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:27.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:27.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:27.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:27.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:27.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:27.190 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:15:32.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:32.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:32.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:32.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:32.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:32.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:32.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:32.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:15:32.201 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:32.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:15:32.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:15:32.205 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:15:32.205 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:15:32.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:15:32.206 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:32.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:32.206 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:15:32.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:15:32.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:15:32.207 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:32.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:15:32.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:15:32.208 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:15:32.208 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:32.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:32.209 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:15:32.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:15:32.209 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:15:32.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:15:32.211 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:15:32.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:15:32.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:32.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:15:32.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:15:32.215 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:15:32.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:32.219 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:15:32.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:15:32.736 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:15:32.738 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:15:32.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:15:32.739 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:15:32.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:32.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:32.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:15:32.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:32.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:15:32.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:15:32.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:15:32.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:15:33.170 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:15:33.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:33.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:33.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:33.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:33.641 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:15:34.114 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:15:34.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:34.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:34.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:34.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:34.587 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:15:35.059 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:15:35.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:35.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:35.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:35.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:35.530 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:15:36.001 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:15:36.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:36.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:36.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:36.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:36.474 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:15:36.946 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:15:37.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:37.222 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:37.222 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:37.222 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:37.418 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:15:37.678 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:37.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:15:37.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:15:37.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:37.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:37.889 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:15:38.363 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:15:38.835 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:15:39.307 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:15:39.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:15:40.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:15:40.726 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:15:41.199 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:15:41.672 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:15:42.144 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:15:42.267 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:42.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:42.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:42.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:42.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:42.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:42.287 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:42.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:42.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:42.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:42.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:42.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:42.287 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:42.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2175 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:15:47.290 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:47.290 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:47.290 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:47.290 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:47.290 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:47.290 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:47.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:47.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:15:47.300 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:47.300 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:15:47.300 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:15:47.303 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:15:47.303 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:15:47.304 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:15:47.304 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:47.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:47.305 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:15:47.305 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:15:47.305 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:15:47.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:47.307 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:15:47.307 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:15:47.307 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:15:47.307 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:47.308 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:47.308 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:15:47.308 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:15:47.308 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:15:47.308 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:15:47.310 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:15:47.310 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:15:47.310 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:15:47.313 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:15:47.314 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:15:47.314 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:15:47.314 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:15:47.318 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:15:47.798 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:15:47.839 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:15:47.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:15:47.842 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:15:47.845 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:15:47.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:47.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:47.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:15:47.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:47.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:15:47.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:15:47.876 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:15:47.876 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:15:48.270 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:15:48.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:48.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:48.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:48.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:48.741 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:15:49.215 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:15:49.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:49.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:49.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:49.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:49.687 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:15:50.159 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:15:50.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:50.318 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:50.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:50.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:50.630 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:15:51.100 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:15:51.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:51.320 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:51.320 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:51.320 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:51.573 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:15:52.046 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:15:52.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:52.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:52.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:52.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:52.518 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:15:52.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:52.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:15:52.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:15:52.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:52.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:52.992 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:15:53.464 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:15:53.936 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:15:54.410 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:15:54.882 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:15:55.354 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:15:55.828 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:15:56.301 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:15:56.773 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:15:57.246 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:15:57.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:15:57.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:15:57.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:15:57.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:15:57.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:15:57.381 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:15:57.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:15:57.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:15:57.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:15:57.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:15:57.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:15:57.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:15:57.385 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:15:57.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:15:57.385 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:02.388 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:02.388 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:02.388 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:02.388 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:02.388 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:02.388 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:02.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:02.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:02.392 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:02.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:02.392 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:02.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:02.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:16:02.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:02.394 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:02.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:16:02.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:02.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:16:02.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:16:02.395 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:02.395 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:02.395 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:02.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:16:02.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:02.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:16:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:02.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:16:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:16:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:16:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:16:02.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:16:02.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:16:02.398 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:16:02.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:02.402 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:16:02.881 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:16:02.923 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:16:02.925 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:16:02.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:16:02.928 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:16:02.950 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:16:02.950 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:16:02.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:16:02.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:16:02.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:16:02.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:16:02.955 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:16:02.955 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:16:03.353 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:16:03.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:03.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:03.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:03.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:03.824 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:16:04.298 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:16:04.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:04.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:04.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:04.403 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:04.770 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:16:05.242 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:16:05.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:05.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:05.713 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:16:06.186 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:16:06.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:06.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:06.658 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:16:07.130 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:16:07.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:07.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:07.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:07.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:07.601 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:16:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:16:07.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:16:07.863 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:16:07.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:16:07.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:16:08.075 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:16:08.548 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:16:09.022 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:16:09.492 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:16:09.959 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:16:10.431 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:16:10.895 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:16:11.364 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:16:11.838 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:16:12.310 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:16:12.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:16:12.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:16:12.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:16:12.439 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:16:12.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:12.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:12.445 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:12.445 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:12.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:12.446 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:12.446 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:12.446 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:12.446 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:16:12.446 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:12.446 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:17.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:17.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:17.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:17.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:17.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:17.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:17.462 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:17.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:17.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:17.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:17.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:16:17.467 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:16:17.467 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:16:17.468 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:17.468 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:17.468 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:17.469 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:16:17.469 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:17.469 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:16:17.469 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:17.470 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:16:17.470 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:16:17.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:17.471 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:17.471 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:17.471 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:16:17.471 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:17.471 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:16:17.471 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:17.473 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:17.473 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:16:17.473 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.476 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:16:17.477 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:16:17.477 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:16:17.477 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:17.478 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:17.481 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:16:17.960 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:16:18.000 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:16:18.001 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:16:18.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:16:18.002 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:16:18.432 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:16:18.480 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:18.481 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:18.481 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:18.481 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:18.907 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:16:19.379 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:16:19.482 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:19.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:19.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:19.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:19.854 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:16:20.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:16:20.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:20.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:20.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:20.484 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:20.801 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:16:21.286 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:16:21.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:21.485 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:21.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:21.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:21.757 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:16:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:16:22.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:22.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:22.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:22.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:22.705 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:16:23.180 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:16:23.652 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:16:24.127 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:16:24.599 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:16:25.075 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:16:25.547 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:16:26.022 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:16:26.494 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:16:26.968 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:16:27.440 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:16:27.912 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:16:28.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:28.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:28.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:28.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:28.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:28.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:28.016 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:16:28.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:28.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:33.021 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:33.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:33.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:33.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:33.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:33.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:33.030 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:33.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:33.032 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:33.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:33.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:16:33.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:16:33.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:16:33.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:33.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:33.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:33.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:16:33.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:33.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:16:33.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:33.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:16:33.044 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:16:33.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:33.044 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:33.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:33.044 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:16:33.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:33.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:16:33.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:33.048 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:16:33.048 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:16:33.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:33.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:33.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:33.049 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:16:33.049 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:33.049 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:16:33.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:16:33.056 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:16:33.056 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:16:33.056 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.056 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:16:33.057 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.057 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.057 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.058 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.058 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:33.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:33.059 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:16:33.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:38.066 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:38.066 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:38.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:38.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:38.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:38.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:38.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:38.075 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:38.076 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:38.076 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:38.076 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:16:38.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:16:38.079 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:16:38.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:38.079 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:38.079 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:38.079 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:16:38.080 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:38.080 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:16:38.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:38.081 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:16:38.081 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:16:38.081 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:38.081 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:38.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:38.082 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:16:38.082 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:38.082 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:16:38.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:38.083 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:16:38.083 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:16:38.083 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:38.083 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:38.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:38.083 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:16:38.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:38.084 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:16:38.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:38.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:16:38.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:16:38.087 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:16:38.087 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:38.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:16:38.570 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:16:38.605 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:16:38.607 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:16:38.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:16:38.609 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:16:38.611 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:16:38.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:16:38.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:16:38.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:16:38.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:16:38.613 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:16:38.613 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:16:38.613 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:16:39.042 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:16:39.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:39.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:39.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:39.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:39.513 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:16:39.984 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:16:40.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:40.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:40.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:40.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:40.457 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:16:40.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:16:41.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:41.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:41.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:41.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:41.402 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:16:41.872 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:16:42.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:42.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:42.092 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:42.092 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:42.346 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:16:42.818 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:16:43.093 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:43.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:43.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:43.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:43.290 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:16:43.761 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:16:44.232 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:16:44.705 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:16:45.177 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:16:45.650 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:16:46.123 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:16:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:16:46.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:16:46.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:16:46.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:46.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:46.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:46.672 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:46.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:46.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:46.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:46.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:46.674 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:16:46.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:46.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:46.674 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:16:51.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:51.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:51.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:51.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:51.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:51.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:51.687 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:51.688 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:51.689 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:51.689 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:51.689 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:16:51.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:16:51.695 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:16:51.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:51.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:51.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:51.695 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:16:51.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:51.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:16:51.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:51.699 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:16:51.699 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:16:51.699 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:51.699 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:51.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:51.700 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:16:51.700 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:51.700 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:16:51.700 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:51.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:16:51.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:16:51.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:51.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:51.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:51.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:16:51.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:51.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:16:51.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:16:51.708 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:16:51.708 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:16:51.708 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.708 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:51.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:51.710 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:51.710 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:51.710 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:16:51.710 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:56.716 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:16:56.716 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:16:56.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:56.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:56.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:56.716 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:56.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:16:56.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:56.726 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:56.726 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:16:56.726 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:16:56.730 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:16:56.730 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:16:56.730 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:56.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:56.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:16:56.731 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:16:56.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:16:56.731 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:16:56.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:56.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:16:56.733 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:16:56.733 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:56.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:56.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:16:56.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:16:56.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:16:56.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:16:56.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:56.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:16:56.736 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:16:56.736 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:56.736 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:16:56.736 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:16:56.736 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:16:56.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:16:56.737 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:16:56.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.739 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:16:56.739 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:16:56.739 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:16:56.740 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:16:56.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:16:56.744 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:16:57.223 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:16:57.262 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:16:57.264 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:16:57.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:16:57.266 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:16:57.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:16:57.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:16:57.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:16:57.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:16:57.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:16:57.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:16:57.269 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:16:57.269 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:16:57.694 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:16:57.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:57.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:57.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:57.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:58.166 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:16:58.639 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:16:58.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:58.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:58.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:58.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:16:59.112 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:16:59.584 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:16:59.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:16:59.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:16:59.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:16:59.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:00.057 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:17:00.530 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:17:00.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:00.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:00.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:00.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:01.002 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:17:01.473 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:17:01.745 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:01.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:01.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:01.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:01.943 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:17:02.417 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:17:02.889 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:17:03.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:17:03.832 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:17:04.305 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:17:04.777 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:17:05.249 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:17:05.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:17:05.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:17:05.321 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:05.321 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:05.321 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:05.321 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:05.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:05.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:05.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:05.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:05.323 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:17:05.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:05.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:05.324 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:17:10.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:10.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:10.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:10.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:10.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:10.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:10.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:10.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:10.331 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:10.331 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:10.331 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:17:10.332 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:17:10.332 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:17:10.332 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:10.332 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:10.332 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:10.332 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:17:10.333 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:10.333 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:17:10.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:10.334 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:10.334 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:17:10.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:10.335 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:10.335 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:17:10.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:17:10.337 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:17:10.337 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:17:10.337 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:10.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:10.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:10.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:17:10.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:15.347 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:15.347 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:15.347 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:15.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:15.354 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:15.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:15.355 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:15.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:15.356 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:17:15.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:17:15.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:17:15.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:15.358 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:15.358 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:15.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:17:15.359 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:15.359 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:17:15.359 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:15.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:17:15.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:17:15.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:15.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:15.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:15.360 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:17:15.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:15.360 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:17:15.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:15.362 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:17:15.362 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:17:15.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:15.362 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:15.362 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:15.362 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:17:15.362 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:15.362 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:17:15.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:17:15.365 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:17:15.365 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:17:15.365 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.365 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:15.366 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:15.370 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:17:15.848 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:17:15.890 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:17:15.892 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:17:15.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:17:15.894 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:17:15.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:17:15.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:17:15.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:17:15.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:17:15.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:17:15.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:17:15.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:17:15.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:17:16.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:17:16.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:16.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:16.791 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:17:17.262 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:17:17.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:17.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:17.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:17.736 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:17:18.208 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:17:18.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:18.369 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:18.680 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:17:19.151 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:17:19.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:19.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:19.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:19.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:19.625 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:17:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:17:20.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:20.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:20.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:20.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:20.569 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:17:21.040 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:17:21.513 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:17:21.986 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:17:22.457 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:17:22.929 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:17:23.402 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:17:23.874 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:17:23.942 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:17:23.942 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:17:23.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:23.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:23.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:23.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:23.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:23.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:23.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:23.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:23.947 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:17:23.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:23.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:28.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:28.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:28.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:28.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:28.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:28.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:28.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:28.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:28.964 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:28.964 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:28.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:17:28.967 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:17:28.968 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:17:28.968 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:28.968 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:28.968 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:28.969 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:17:28.969 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:28.969 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:17:28.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:28.971 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:17:28.971 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:17:28.971 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:28.971 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:28.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:28.972 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:17:28.972 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:28.972 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:17:28.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:28.974 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:17:28.975 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:17:28.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:28.975 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:28.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:28.975 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:17:28.975 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:28.975 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:17:28.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:28.979 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:17:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:17:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:17:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:17:28.979 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:17:28.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:17:28.980 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:17:28.980 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:17:28.980 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:17:28.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:28.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:28.982 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:17:28.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:33.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:33.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:33.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:33.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:33.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:33.991 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:33.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:34.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:34.000 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:34.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:34.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:17:34.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:17:34.005 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:17:34.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:34.005 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:34.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:34.006 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:17:34.007 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:34.007 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:17:34.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:34.009 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:17:34.009 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:17:34.010 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:34.010 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:34.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:34.011 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:17:34.011 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:34.011 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:17:34.011 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:34.013 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:34.013 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:17:34.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:17:34.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:17:34.018 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:17:34.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:34.022 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:17:34.501 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:17:34.544 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:17:34.545 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:17:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:17:34.546 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:17:34.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:17:34.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:17:34.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:17:34.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:17:34.551 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:17:34.551 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:17:34.551 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:17:34.551 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:17:34.973 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:17:35.021 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:35.021 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:35.021 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:35.021 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:35.444 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:17:35.917 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:17:36.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:36.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:36.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:36.023 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:36.390 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:17:36.862 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:17:37.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:37.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:37.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:37.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:37.333 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:17:37.806 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:17:38.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:38.024 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:38.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:38.024 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:38.278 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:17:38.750 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:17:39.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:39.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:39.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:39.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:39.221 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:17:39.695 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:17:40.167 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:17:40.639 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:17:41.110 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:17:41.581 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:17:42.052 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:17:42.525 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:17:42.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:17:42.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:17:42.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:42.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:42.598 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:42.598 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:42.598 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:42.598 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:17:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:42.598 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:47.604 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:47.604 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:47.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:47.604 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:47.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:47.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:47.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:47.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:47.612 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:17:47.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:17:47.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:17:47.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:47.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:47.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:17:47.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:47.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:47.616 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:17:47.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:47.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:17:47.618 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:17:47.618 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:47.618 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:47.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:47.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:17:47.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:47.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:17:47.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:47.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:17:47.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:17:47.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:47.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:47.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:47.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:17:47.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:47.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:17:47.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:47.623 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:17:47.623 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:17:47.623 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:17:47.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:47.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:47.624 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:47.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.633 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:17:52.633 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:17:52.633 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:52.633 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:52.633 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:52.633 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:52.640 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:17:52.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:52.641 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:52.641 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:17:52.641 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:17:52.643 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:17:52.644 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:17:52.644 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:52.644 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:52.644 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:17:52.645 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:17:52.645 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:17:52.645 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:17:52.645 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:52.646 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:17:52.646 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:17:52.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:52.646 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:52.646 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:17:52.646 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:17:52.646 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:17:52.646 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:17:52.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:52.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:17:52.648 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:17:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:17:52.651 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:17:52.651 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:17:52.651 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.651 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:17:52.656 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:17:53.134 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:17:53.171 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:17:53.172 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:17:53.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:17:53.173 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:17:53.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:17:53.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:17:53.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:17:53.176 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:17:53.176 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:17:53.176 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:17:53.176 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:17:53.176 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:17:53.606 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:17:53.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:53.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:53.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:53.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:54.077 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:17:54.551 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:17:54.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:54.654 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:54.654 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:54.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:55.023 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:17:55.495 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:17:55.654 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:55.655 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:55.655 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:55.655 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:55.966 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:17:56.439 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:17:56.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:56.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:56.656 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:56.656 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:56.912 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:17:57.384 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:17:57.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:17:57.657 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:17:57.657 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:17:57.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:17:57.855 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:17:58.325 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:17:58.799 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:17:59.271 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:17:59.744 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:18:00.214 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:18:00.688 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:18:01.160 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:18:01.632 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:18:02.103 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:18:02.577 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:18:03.049 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:18:03.521 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:18:03.994 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:18:04.467 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:18:04.939 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:18:05.413 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:18:05.885 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:18:06.357 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:18:06.828 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:18:07.230 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:18:07.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:18:07.235 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:07.235 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:07.235 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:07.235 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:07.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:07.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:07.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:07.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:07.240 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:18:07.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:07.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:07.241 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:12.242 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:12.242 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:12.242 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:12.243 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:12.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:12.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:12.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:12.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:12.251 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:12.251 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:12.251 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:18:12.253 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:18:12.254 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:18:12.254 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:12.254 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:12.254 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:12.254 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:18:12.255 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:12.255 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:18:12.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:12.256 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:12.256 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:18:12.256 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:12.258 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:12.258 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:18:12.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:18:12.261 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:18:12.261 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:18:12.261 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:12.263 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:12.263 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:18:12.263 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:17.269 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:17.269 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:17.269 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:17.269 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:17.269 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:17.269 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:17.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:17.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:17.275 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:17.275 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:17.275 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:18:17.278 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:18:17.278 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:18:17.278 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:17.278 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:17.279 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:17.279 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:18:17.279 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:17.279 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:18:17.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:17.280 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:18:17.281 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:18:17.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:17.281 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:17.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:17.281 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:18:17.281 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:17.281 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:18:17.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:17.283 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:18:17.283 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:18:17.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:17.283 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:17.283 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:17.283 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:18:17.283 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:17.283 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:18:17.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:17.286 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:18:17.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:18:17.287 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:18:17.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:17.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:17.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:17.291 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:18:17.770 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:18:17.815 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:18:17.818 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:18:17.818 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:18:17.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:18:17.819 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:18:17.819 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:18:17.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:18:17.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:18:17.819 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:18:17.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:18:17.820 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:18:17.820 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:18:18.242 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:18:18.289 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:18.289 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:18.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:18.290 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:18:19.187 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:18:19.290 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:19.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:19.290 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:19.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:19.660 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:18:20.132 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:18:20.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:20.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:20.292 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:20.603 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:18:21.076 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:18:21.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:21.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:21.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:21.293 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:21.548 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:18:22.020 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:18:22.294 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:22.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:22.294 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:22.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:22.491 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:18:22.964 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:18:23.436 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:18:23.908 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:18:24.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:18:24.853 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:18:25.325 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:18:25.797 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:18:25.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:18:25.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:18:25.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:25.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:25.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:25.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:25.872 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:25.872 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:25.872 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:25.872 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:25.872 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:18:25.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:25.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:25.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:18:30.877 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:30.877 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:30.877 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:30.877 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:30.877 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:30.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:30.884 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:30.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:30.885 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:30.885 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:30.886 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:18:30.889 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:18:30.890 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:18:30.890 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:30.890 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:30.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:30.891 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:18:30.892 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:30.892 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:18:30.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:30.894 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:18:30.894 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:18:30.894 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:30.894 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:30.894 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:30.894 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:18:30.895 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:30.895 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:18:30.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:30.897 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:18:30.897 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:18:30.897 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:30.897 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:30.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:30.897 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:18:30.898 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:30.898 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:18:30.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:18:30.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:18:30.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:18:30.902 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:18:30.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:30.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:30.904 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:18:30.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:35.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:35.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:35.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:35.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:35.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:35.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:35.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:35.922 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:35.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:35.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:35.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:18:35.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:18:35.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:18:35.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:35.930 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:35.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:35.931 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:18:35.931 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:35.931 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:18:35.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:35.934 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:18:35.934 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:18:35.935 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:35.935 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:35.935 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:35.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:18:35.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:35.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:18:35.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:35.938 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:18:35.938 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:18:35.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:35.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:35.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:35.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:18:35.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:35.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:18:35.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:35.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:18:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:18:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:18:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:18:35.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:18:35.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:18:35.944 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:18:35.944 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:18:35.944 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:35.949 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:18:36.428 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:18:36.473 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:18:36.475 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:18:36.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:18:36.478 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:18:36.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:18:36.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:18:36.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:18:36.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:18:36.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:18:36.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:18:36.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:18:36.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:18:36.900 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:18:36.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:36.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:36.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:36.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:37.371 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:18:37.844 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:18:37.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:37.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:37.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:37.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:38.316 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:18:38.788 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:18:38.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:38.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:38.950 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:38.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:39.259 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:18:39.733 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:18:39.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:39.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:39.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:39.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:18:40.677 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:18:40.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:40.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:40.953 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:40.953 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:41.148 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:18:41.622 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:18:42.094 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:18:42.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:18:43.037 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:18:43.510 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:18:43.983 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:18:44.455 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:18:44.926 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:18:45.399 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:18:45.871 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:18:46.343 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:18:46.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:18:46.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:46.530 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:46.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:46.531 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:18:46.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:46.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:51.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:51.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:51.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:51.537 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:51.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:51.537 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:51.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:51.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:51.545 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:51.546 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:51.546 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:18:51.549 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:18:51.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:18:51.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:51.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:51.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:51.550 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:18:51.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:51.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:18:51.550 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:51.551 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:18:51.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:18:51.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:51.552 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:51.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:51.552 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:18:51.552 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:51.552 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:18:51.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:51.554 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:18:51.554 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:18:51.554 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:51.554 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:51.554 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:51.555 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:18:51.555 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:51.555 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:18:51.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:51.557 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:18:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:18:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:18:51.557 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:18:51.558 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:18:51.558 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:18:51.558 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.558 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:51.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:51.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:51.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:51.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:51.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:51.560 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:18:56.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:18:56.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:18:56.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:56.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:56.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:56.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:56.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:18:56.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:56.576 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:56.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:18:56.576 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:18:56.580 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:18:56.580 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:18:56.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:56.580 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:56.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:18:56.581 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:18:56.581 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:18:56.581 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:18:56.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:56.583 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:18:56.583 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:18:56.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:56.585 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:18:56.585 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:18:56.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:56.585 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:18:56.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:18:56.585 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:18:56.585 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:18:56.585 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:18:56.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:18:56.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:18:56.589 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:18:56.589 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:18:56.589 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.589 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.590 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:18:56.590 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:18:56.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:18:56.593 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:18:57.072 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:18:57.105 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:18:57.107 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:18:57.108 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:18:57.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:18:57.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:18:57.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:18:57.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:18:57.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:18:57.110 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:18:57.110 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:18:57.111 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:18:57.111 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:18:57.544 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:18:57.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:57.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:57.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:57.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:58.020 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:18:58.492 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:18:58.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:58.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:58.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:58.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:58.963 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:18:59.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:18:59.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:18:59.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:18:59.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:18:59.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:18:59.907 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:19:00.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:19:00.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:00.595 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:00.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:00.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:00.851 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:19:01.322 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:19:01.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:01.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:01.597 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:01.597 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:01.796 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:19:02.268 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:19:02.740 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:19:03.211 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:19:03.685 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:19:04.157 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:19:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:19:05.100 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:19:05.574 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:19:06.046 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:19:06.518 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:19:06.989 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:19:07.463 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:19:07.935 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:19:08.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:19:08.123 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:19:08.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:08.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:08.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:08.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:08.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:08.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:08.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:08.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:08.130 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:19:08.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:08.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:08.130 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:13.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:13.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:13.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:13.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:13.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:13.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:13.143 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:13.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:13.144 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:13.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:13.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:19:13.146 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:19:13.146 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:19:13.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:13.147 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:13.147 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:13.147 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:19:13.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:13.148 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:19:13.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:13.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:13.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:19:13.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:13.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:13.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:19:13.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:19:13.154 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:19:13.154 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:19:13.154 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:13.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:13.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:13.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:19:18.163 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:18.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:18.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:18.164 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:18.164 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:18.164 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:18.171 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:18.171 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:18.172 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:18.172 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:18.172 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:19:18.174 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:19:18.174 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:19:18.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:18.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:18.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:18.175 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:19:18.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:18.176 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:19:18.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:18.177 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:18.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:19:18.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:18.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:18.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:19:18.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:19:18.182 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:19:18.182 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:19:18.182 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.182 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:18.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:18.187 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:19:18.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:19:18.704 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:19:18.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:19:18.705 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:19:18.707 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:19:18.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:19:18.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:19:18.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:19:18.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:19:18.713 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:19:18.713 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:19:18.713 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:19:18.713 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:19:19.138 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:19:19.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:19.184 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:19.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:19.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:19.609 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:19:20.082 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:19:20.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:20.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:20.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:20.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:20.554 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:19:21.026 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:19:21.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:21.186 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:21.497 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:19:21.970 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:19:22.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:22.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:22.188 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:22.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:22.443 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:19:22.915 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:19:23.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:23.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:23.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:23.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:23.386 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:19:23.860 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:19:24.332 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:19:24.804 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:19:25.275 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:19:25.748 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:19:26.221 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:19:26.692 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:19:27.164 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:19:27.637 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:19:28.109 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:19:28.581 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:19:29.052 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:19:29.526 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:19:29.998 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:19:30.470 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:19:30.941 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:19:31.414 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:19:31.887 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:19:32.359 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:19:32.830 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:19:33.300 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:19:33.774 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:19:34.246 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:19:34.719 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:19:35.192 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:19:35.664 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:19:36.136 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:19:36.607 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:19:37.081 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:19:37.553 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:19:38.025 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:19:38.496 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:19:38.768 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:19:38.768 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:19:38.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:38.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:38.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:38.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:38.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:38.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:38.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:38.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:38.778 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:38.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:38.778 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:19:38.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4449 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:38.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4449 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:38.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4449 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:38.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4449 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:38.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4449 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:38.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4449 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:19:43.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:43.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:43.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:43.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:43.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:43.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:43.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:43.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:43.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:43.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:43.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:19:43.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:19:43.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:19:43.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:43.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:43.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:43.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:19:43.793 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:43.793 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:19:43.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:43.794 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:19:43.794 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:19:43.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:43.795 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:43.795 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:43.795 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:19:43.795 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:43.795 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:19:43.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:43.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:19:43.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:19:43.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:43.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:43.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:43.798 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:19:43.798 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:43.798 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:19:43.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.801 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:19:43.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:19:43.802 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:19:43.802 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:43.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:43.804 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:43.804 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:43.804 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:19:48.810 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:48.810 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:48.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:48.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:48.810 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:48.810 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:48.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:48.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:48.822 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:48.822 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:19:48.822 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:19:48.828 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:19:48.828 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:19:48.829 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:48.829 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:48.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:48.830 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:19:48.830 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:19:48.830 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:19:48.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:48.833 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:19:48.833 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:19:48.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:48.834 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:48.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:48.834 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:19:48.834 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:19:48.834 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:19:48.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:48.837 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:19:48.838 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:19:48.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:48.838 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:19:48.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:48.838 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:19:48.838 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:19:48.838 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:19:48.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:48.842 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:19:48.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:19:48.842 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:19:48.842 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:19:48.842 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:19:48.842 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:19:48.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:19:48.843 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:19:48.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:19:48.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:19:48.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:19:49.326 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:19:49.374 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:19:49.376 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:19:49.379 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:19:49.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:19:49.798 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:19:49.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:49.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:49.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:50.268 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:19:50.742 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:19:50.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:50.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:50.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:50.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:51.215 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:19:51.686 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:19:51.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:51.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:51.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:51.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:52.157 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:19:52.631 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:19:52.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:52.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:52.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:52.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:53.103 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:19:53.575 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:19:53.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:53.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:53.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:53.853 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:54.049 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:19:54.521 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:19:54.993 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:19:55.467 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:19:55.939 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:19:56.411 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:19:56.887 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:19:57.359 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:19:57.834 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:19:58.306 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:19:58.780 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:19:59.250 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:19:59.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:19:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:19:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:19:59.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:19:59.384 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:19:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:19:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:19:59.384 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:19:59.384 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:19:59.384 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:19:59.384 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:20:04.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:04.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:04.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:04.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:04.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:04.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:04.399 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:04.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:04.401 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:04.401 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:04.401 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:20:04.406 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:20:04.406 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:20:04.406 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:04.406 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:04.407 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:04.407 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:20:04.407 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:04.407 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:20:04.407 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:04.411 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:20:04.411 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:20:04.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:04.412 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:04.412 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:04.412 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:20:04.412 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:04.412 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:20:04.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:04.415 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:20:04.415 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:20:04.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:04.416 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:04.416 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:04.416 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:20:04.416 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:04.416 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:20:04.416 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:04.420 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:20:04.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:20:04.420 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:20:04.420 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:20:04.420 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:20:04.420 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:20:04.421 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:20:04.421 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:20:04.421 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:20:04.421 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.422 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.422 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.422 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:04.423 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:04.423 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:20:04.423 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:09.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:09.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:09.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:09.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:09.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:09.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:09.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:09.440 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:09.440 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:09.441 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:09.441 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:20:09.444 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:20:09.444 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:20:09.444 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:09.445 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:09.445 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:09.445 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:20:09.446 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:09.446 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:20:09.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:09.447 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:20:09.447 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:20:09.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:09.448 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:09.448 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:09.448 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:20:09.448 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:09.448 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:20:09.449 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:09.450 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:20:09.450 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:20:09.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:09.450 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:09.450 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:09.450 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:20:09.450 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:09.450 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:20:09.451 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:09.453 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:20:09.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:20:09.453 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:20:09.453 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:20:09.453 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:20:09.453 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:20:09.454 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:20:09.454 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:20:09.454 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.454 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:09.459 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:20:09.937 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:20:09.983 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:20:09.985 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:20:09.988 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:20:09.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:20:10.409 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:20:10.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:10.458 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:10.458 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:10.458 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:10.882 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:20:11.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:20:11.459 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:11.459 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:11.827 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:20:12.302 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:20:12.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:12.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:12.461 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:12.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:12.774 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:20:13.249 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:20:13.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:13.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:13.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:13.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:13.725 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:20:14.197 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:20:14.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:14.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:14.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:14.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:14.672 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:20:15.144 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:20:15.619 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:20:16.091 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:20:16.566 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:20:17.039 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:20:17.514 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:20:17.985 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:20:18.459 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:20:18.932 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:20:19.403 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:20:19.877 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:20:20.350 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:20:20.821 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:20:21.295 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:20:21.768 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:20:22.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:22.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:22.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:22.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:22.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:22.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:22.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:22.007 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:20:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:27.013 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:27.013 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:27.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:27.013 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:27.013 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:27.013 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:27.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:27.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:27.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:27.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:27.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:20:27.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:20:27.028 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:20:27.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:27.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:27.029 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:27.029 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:20:27.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:27.029 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:20:27.030 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:27.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:20:27.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:20:27.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:27.034 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:27.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:27.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:20:27.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:27.034 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:20:27.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:27.037 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:20:27.037 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:20:27.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:27.038 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:27.038 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:27.038 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:20:27.038 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:27.038 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:20:27.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:20:27.043 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:20:27.043 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:20:27.043 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.043 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:27.044 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:27.045 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:27.045 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:20:27.045 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:32.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:32.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:32.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:32.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:32.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:32.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:32.056 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:32.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:32.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:32.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:32.057 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:20:32.059 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:20:32.059 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:20:32.060 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:32.060 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:32.060 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:32.060 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:20:32.061 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:32.061 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:20:32.061 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:32.062 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:20:32.062 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:20:32.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:32.062 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:32.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:32.062 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:20:32.062 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:32.062 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:20:32.063 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:32.064 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:20:32.064 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:20:32.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:32.064 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:32.064 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:32.064 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:20:32.065 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:32.065 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:20:32.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:20:32.067 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:20:32.068 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:20:32.068 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:20:32.068 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:32.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:32.072 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:20:32.551 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:20:32.603 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:20:32.607 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:20:32.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:20:32.610 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:20:32.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:20:32.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:20:32.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:20:32.614 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:20:32.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:20:32.615 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:20:32.615 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:20:32.615 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:20:32.641 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:20:32.641 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:20:32.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:20:32.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:20:33.023 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:20:33.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:33.070 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:33.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:33.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:33.494 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:20:33.965 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:20:34.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:34.071 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:34.071 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:34.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:34.438 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:20:34.910 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:20:35.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:35.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:35.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:35.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:35.382 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:20:35.853 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:20:36.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:36.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:36.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:36.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:36.327 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:20:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:20:37.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:37.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:37.075 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:37.075 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:37.271 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:20:37.742 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:20:38.215 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:20:38.687 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:20:39.159 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:20:39.630 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:20:40.101 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:20:40.575 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:20:40.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:20:40.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:20:40.653 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:40.653 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:40.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:40.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:40.656 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:40.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:40.656 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:40.656 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:40.656 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:20:40.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:40.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:40.656 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:20:45.664 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:45.664 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:45.664 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:45.664 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:45.664 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:45.664 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:45.671 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:45.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:45.672 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:45.672 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:45.672 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:45.673 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:45.673 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:20:45.673 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:45.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:20:45.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:20:45.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:45.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:45.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:45.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:20:45.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:45.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:20:45.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:45.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:20:45.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:20:45.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:45.678 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:45.678 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:45.678 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:20:45.678 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:45.678 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:20:45.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:20:45.683 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:20:45.683 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:20:45.683 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:45.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:45.685 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:45.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:45.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:45.685 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:20:50.692 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:50.692 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:50.692 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:50.692 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:50.693 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:50.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:50.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:50.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:50.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:50.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:20:50.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:20:50.705 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:20:50.706 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:20:50.706 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:50.706 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:50.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:50.707 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:20:50.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:20:50.708 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:20:50.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:50.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:20:50.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:20:50.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:50.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:50.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:50.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:20:50.713 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:20:50.713 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:20:50.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:50.715 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:20:50.715 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:20:50.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:50.715 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:20:50.715 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:50.715 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:20:50.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:20:50.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:20:50.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:50.719 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:20:50.720 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:20:50.720 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:20:50.720 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:20:50.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:20:50.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.722 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:20:50.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:20:50.722 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:20:50.725 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:20:51.204 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:20:51.251 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:20:51.254 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:20:51.256 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:20:51.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:20:51.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:20:51.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:20:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:20:51.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:20:51.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:20:51.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:20:51.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:20:51.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:20:51.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:20:51.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:20:51.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:20:51.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:20:51.676 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:20:51.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:51.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:51.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:51.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:52.147 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:20:52.621 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:20:52.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:52.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:52.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:52.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:53.093 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:20:53.564 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:20:53.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:53.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:53.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:53.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:54.036 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:20:54.509 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:20:54.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:54.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:54.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:54.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:54.981 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:20:55.453 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:20:55.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:55.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:55.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:55.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:55.924 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:20:56.397 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:20:56.870 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:20:57.342 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:20:57.816 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:20:58.288 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:20:58.760 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:20:59.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:20:59.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:20:59.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:20:59.301 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:20:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:20:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:20:59.301 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:20:59.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:20:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:20:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:20:59.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:20:59.302 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:20:59.302 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:20:59.302 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:21:04.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:04.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:04.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:04.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:04.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:04.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:04.316 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:04.318 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:04.318 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:04.319 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:04.319 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:21:04.323 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:21:04.323 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:21:04.323 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:04.323 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:04.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:04.324 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:21:04.324 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:04.324 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:21:04.325 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:04.327 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:21:04.328 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:21:04.328 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:04.328 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:04.329 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:04.329 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:21:04.329 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:04.329 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:21:04.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:04.331 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:21:04.331 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:21:04.331 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:04.331 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:04.331 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:04.332 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:21:04.332 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:04.332 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:21:04.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:04.335 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:21:04.335 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:21:04.336 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:21:04.336 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:21:04.336 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.336 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.337 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:04.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:04.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:04.338 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:09.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:09.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:09.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:09.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:09.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:09.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:09.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:09.354 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:09.355 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:09.355 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:21:09.358 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:21:09.358 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:21:09.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:09.359 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:09.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:09.359 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:21:09.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:09.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:21:09.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:09.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:09.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:21:09.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:09.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:21:09.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:21:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:09.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:09.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:09.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:21:09.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:09.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:21:09.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:09.366 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:21:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:21:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:21:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:21:09.366 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:21:09.366 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:21:09.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:21:09.367 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:21:09.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:09.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:21:09.850 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:21:09.891 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:21:09.894 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:21:09.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:21:09.896 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:21:09.899 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:21:09.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:21:09.899 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:21:09.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:09.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:21:09.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:21:09.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:21:09.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:21:09.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:21:09.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:21:09.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:09.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:10.322 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:21:10.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:10.369 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:10.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:10.794 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:21:11.264 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:21:11.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:11.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:11.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:11.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:11.738 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:21:12.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:21:12.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:12.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:12.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:12.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:12.682 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:21:13.153 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:21:13.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:13.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:13.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:13.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:13.627 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:21:14.099 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:21:14.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:14.373 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:14.373 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:14.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:14.570 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:21:15.041 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:21:15.515 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:21:15.987 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:21:16.459 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:21:16.930 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:21:17.401 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:21:17.874 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:21:17.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:21:17.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:21:17.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:17.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:17.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:17.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:17.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:17.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:17.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:17.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:17.953 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:21:17.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:17.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:22.959 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:22.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:22.959 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:22.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:22.959 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:22.959 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:22.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:22.967 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:22.967 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:22.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:22.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:21:22.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:21:22.972 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:21:22.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:22.972 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:22.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:22.973 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:21:22.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:22.973 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:21:22.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:22.977 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:21:22.977 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:21:22.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:22.978 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:22.978 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:22.978 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:21:22.978 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:22.978 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:21:22.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:22.982 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:21:22.982 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:21:22.982 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:22.982 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:22.982 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:22.983 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:21:22.983 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:22.983 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:21:22.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:22.988 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:21:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:21:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:21:22.988 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:21:22.988 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.989 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:21:22.989 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:21:22.990 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:21:22.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:22.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:22.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:22.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:22.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:22.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:22.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:22.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:22.993 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:21:28.000 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:28.000 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:28.000 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:28.000 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:28.000 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:28.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:28.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:28.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:28.009 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:28.009 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:28.009 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:21:28.012 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:21:28.012 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:21:28.012 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:28.012 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:28.013 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:28.013 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:21:28.013 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:28.013 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:21:28.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:28.014 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:21:28.014 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:21:28.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:28.015 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:28.015 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:28.015 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:21:28.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:28.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:21:28.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:28.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:28.017 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:21:28.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:21:28.020 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:21:28.020 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:21:28.020 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.020 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:28.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:28.025 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:21:28.504 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:21:28.546 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:21:28.547 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:21:28.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:21:28.550 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:21:28.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:21:28.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:21:28.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:21:28.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:28.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:21:28.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:21:28.554 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:21:28.554 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:21:28.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:21:28.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:21:28.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:28.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:28.975 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:21:29.022 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:29.022 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:29.023 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:29.025 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:29.447 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:21:29.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:21:30.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:30.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:30.024 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:30.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:30.393 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:21:30.865 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:21:31.024 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:31.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:31.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:31.026 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:31.336 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:21:31.806 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:21:32.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:32.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:32.026 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:32.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:32.277 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:21:32.751 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:21:33.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:33.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:33.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:33.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:33.223 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:21:33.695 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:21:34.166 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:21:34.639 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:21:35.111 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:21:35.583 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:21:36.054 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:21:36.528 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:21:36.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:21:36.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:21:36.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:36.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:36.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:36.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:36.605 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:36.605 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:36.605 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:36.605 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:36.605 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:21:36.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:36.605 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:41.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:41.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:41.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:41.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:41.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:41.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:41.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:41.619 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:41.619 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:41.620 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:41.620 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:21:41.622 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:21:41.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:21:41.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:41.623 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:41.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:41.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:21:41.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:41.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:21:41.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:41.625 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:21:41.625 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:21:41.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:41.625 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:41.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:41.626 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:21:41.626 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:41.626 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:21:41.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:41.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:21:41.627 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:21:41.627 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:41.627 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:41.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:41.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:21:41.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:41.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:21:41.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:41.631 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.632 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:21:41.632 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:21:41.632 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:21:41.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:41.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:41.635 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:21:41.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:46.641 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:21:46.641 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:21:46.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:46.641 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:46.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:46.641 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:46.649 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:21:46.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:46.650 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:46.650 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:21:46.651 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:21:46.654 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:21:46.654 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:21:46.654 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:46.655 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:46.655 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:21:46.655 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:21:46.656 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:21:46.656 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:21:46.656 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:46.658 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:21:46.658 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:21:46.658 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:46.658 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:46.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:21:46.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:21:46.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:21:46.660 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:21:46.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:46.662 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:21:46.662 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:21:46.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:21:46.667 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:21:46.668 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:21:46.668 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:21:46.668 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.668 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:21:46.669 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:21:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:21:46.673 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:21:47.152 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:21:47.200 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:21:47.202 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:21:47.204 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:21:47.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:21:47.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:21:47.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:21:47.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:21:47.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:47.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:21:47.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:21:47.208 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:21:47.208 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:21:47.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:21:47.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:21:47.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:47.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:21:47.624 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:21:47.672 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:47.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:47.674 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:47.674 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:48.095 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:21:48.568 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:21:48.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:48.675 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:48.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:48.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:49.041 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:21:49.512 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:21:49.676 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:49.676 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:49.676 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:49.676 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:49.984 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:21:50.457 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:21:50.677 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:50.678 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:50.929 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:21:51.401 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:21:51.678 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:21:51.678 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:21:51.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:21:51.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:21:51.872 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:21:52.345 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:21:52.817 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:21:53.289 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:21:53.760 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:21:54.233 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:21:54.706 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:21:55.178 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:21:55.652 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:21:56.124 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:21:56.596 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:21:57.067 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:21:57.538 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:21:58.009 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:21:58.482 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:21:58.954 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:21:59.426 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:21:59.899 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:22:00.372 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:22:00.843 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:22:01.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:22:01.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:22:01.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:01.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:01.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:01.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:01.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:01.252 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:01.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:01.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:01.252 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:22:01.252 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:01.252 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:06.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:06.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:06.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:06.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:06.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:06.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:06.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:06.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:06.269 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:06.269 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:06.269 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:22:06.272 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:22:06.273 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:22:06.273 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:06.273 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:06.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:06.274 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:22:06.274 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:06.274 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:22:06.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:06.276 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:22:06.276 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:22:06.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:06.277 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:06.277 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:06.277 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:22:06.277 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:06.277 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:22:06.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:06.279 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:06.279 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:22:06.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:06.282 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:22:06.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:22:06.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:22:06.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:22:06.282 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:22:06.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:22:06.283 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:22:06.283 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:22:06.283 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:06.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:06.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:22:06.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:11.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:11.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:11.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:11.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:11.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:11.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:11.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:11.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:11.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:11.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:11.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:22:11.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:22:11.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:22:11.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:11.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:11.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:11.311 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:22:11.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:11.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:22:11.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:11.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:22:11.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:22:11.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:11.315 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:11.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:11.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:22:11.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:11.316 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:22:11.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:11.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:22:11.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:22:11.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:11.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:11.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:11.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:22:11.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:11.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:22:11.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:11.323 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:22:11.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:22:11.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:22:11.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:22:11.323 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:22:11.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:22:11.324 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:22:11.324 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:22:11.324 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:11.329 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:22:11.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:22:11.855 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:22:11.858 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:22:11.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:22:11.860 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:22:11.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:22:11.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:22:11.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:22:11.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:11.864 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:22:11.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:22:11.865 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:22:11.865 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:22:11.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:22:11.898 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:22:11.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:11.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:12.279 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:22:12.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:12.328 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:12.328 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:12.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:12.751 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:22:13.224 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:22:13.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:13.329 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:13.329 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:13.697 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:22:14.168 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:22:14.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:14.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:14.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:14.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:14.640 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:22:15.113 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:22:15.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:15.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:15.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:15.331 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:15.585 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:22:16.057 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:22:16.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:16.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:16.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:16.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:16.528 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:22:17.001 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:22:17.474 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:22:17.946 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:22:18.417 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:22:18.891 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:22:19.363 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:22:19.835 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:22:19.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:22:19.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:22:19.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:19.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:19.909 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:19.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:19.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:19.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:19.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:19.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:19.910 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:22:19.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:19.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:24.916 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:24.916 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:24.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:24.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:24.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:24.920 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:24.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:24.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:24.923 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:24.923 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:24.923 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:22:24.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:22:24.926 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:22:24.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:24.926 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:24.926 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:24.926 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:22:24.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:24.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:22:24.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:24.930 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:22:24.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:22:24.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:24.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:24.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:24.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:22:24.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:24.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:22:24.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:24.934 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:24.934 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:22:24.934 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:24.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:22:24.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:22:24.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:22:24.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:22:24.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:22:24.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:22:24.940 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:22:24.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:24.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:24.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:24.943 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:22:29.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:29.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:29.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:29.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:29.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:29.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:29.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:29.977 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:29.977 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:29.978 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:29.978 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:22:29.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:22:29.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:22:29.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:29.987 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:29.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:29.988 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:22:29.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:29.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:22:29.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:29.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:22:29.993 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:22:29.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:29.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:29.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:29.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:22:29.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:29.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:22:29.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:29.997 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:22:29.997 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:22:29.997 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:29.997 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:29.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:29.998 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:22:29.998 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:29.998 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:22:29.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.002 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:22:30.002 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:22:30.002 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:22:30.002 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:30.003 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:30.007 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:22:30.486 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:22:30.533 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:22:30.536 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:22:30.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:22:30.538 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:22:30.542 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:22:30.542 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:22:30.542 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:22:30.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:30.543 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:22:30.543 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:22:30.544 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:22:30.544 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:22:30.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:22:30.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:22:30.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:30.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:30.958 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:22:31.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:31.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:31.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:31.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:31.429 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:22:31.902 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:22:32.007 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:32.007 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:32.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:32.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:32.375 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:22:32.847 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:22:33.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:33.008 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:33.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:33.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:33.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:22:33.791 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:22:34.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:34.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:34.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:34.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:34.263 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:22:34.736 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:22:35.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:35.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:35.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:35.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:35.206 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:22:35.677 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:22:36.151 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:22:36.623 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:22:37.095 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:22:37.566 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:22:38.037 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:22:38.510 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:22:38.982 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:22:39.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:22:39.925 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:22:40.399 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:22:40.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:22:40.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:22:40.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:40.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:40.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:40.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:40.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:40.590 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:40.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:40.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:40.591 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:22:40.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:40.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:40.591 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:40.591 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:40.592 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:40.592 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:40.592 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:40.592 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:40.592 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2288 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:22:45.591 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:45.591 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:45.591 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:45.591 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:45.591 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:45.591 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:45.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:45.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:45.603 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:45.603 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:45.603 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:22:45.610 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:22:45.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:22:45.611 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:45.611 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:45.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:45.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:22:45.613 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:45.613 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:22:45.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:45.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:22:45.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:22:45.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:45.617 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:45.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:45.617 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:22:45.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:45.617 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:22:45.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:45.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:45.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:22:45.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:45.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:22:45.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:22:45.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:22:45.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:22:45.626 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:22:45.626 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:22:45.626 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:22:45.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:22:45.627 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.627 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:45.628 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:45.628 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:45.628 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:22:50.635 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:22:50.635 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:22:50.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:50.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:50.635 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:50.635 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:50.642 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:22:50.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:50.643 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:50.643 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:22:50.643 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:22:50.648 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:22:50.648 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:22:50.648 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:50.648 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:50.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:22:50.648 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:22:50.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:22:50.649 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:22:50.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:50.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:22:50.653 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:22:50.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:50.653 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:50.653 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:22:50.653 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:22:50.653 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:22:50.653 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:22:50.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:50.656 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:22:50.656 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:22:50.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:50.656 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:22:50.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:22:50.656 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:22:50.656 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:22:50.656 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:22:50.657 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:50.660 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:22:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:22:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:22:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:22:50.660 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:22:50.660 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:22:50.661 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:22:50.661 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:22:50.661 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.661 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:22:50.662 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:22:50.666 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:22:51.144 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:22:51.189 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:22:51.191 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:22:51.193 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:22:51.194 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:22:51.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:22:51.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:22:51.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:22:51.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:51.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:22:51.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:22:51.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:22:51.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:22:51.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:22:51.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:22:51.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:51.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:22:51.617 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:22:51.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:51.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:51.664 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:51.664 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:52.088 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:22:52.561 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:22:52.664 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:52.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:52.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:52.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:53.033 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:22:53.505 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:22:53.665 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:53.665 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:53.666 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:53.666 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:53.976 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:22:54.450 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:22:54.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:54.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:54.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:54.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:54.922 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:22:55.394 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:22:55.668 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:22:55.668 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:22:55.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:22:55.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:22:55.865 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:22:56.338 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:22:56.811 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:22:57.283 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:22:57.754 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:22:58.227 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:22:58.699 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:22:59.172 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:22:59.642 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:23:00.116 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:23:00.588 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:23:01.060 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:23:01.531 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:23:02.004 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:23:02.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:23:02.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:23:02.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:02.245 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:02.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:02.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:02.248 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:02.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:02.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:02.248 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:02.248 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:02.248 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:02.248 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:23:02.248 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:02.248 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:07.252 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:07.252 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:07.253 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:07.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:07.253 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:07.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:07.260 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:07.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:07.261 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:07.261 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:07.261 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:23:07.265 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:23:07.265 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:23:07.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:07.266 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:07.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:07.266 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:23:07.266 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:07.266 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:23:07.267 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:07.270 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:23:07.270 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:23:07.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:07.271 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:07.271 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:07.271 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:23:07.271 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:07.271 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:23:07.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:07.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:07.275 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:23:07.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:23:07.282 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:23:07.282 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:23:07.282 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:23:07.283 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.283 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.283 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:07.284 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:07.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:07.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:07.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:23:12.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:12.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:12.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:12.293 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:12.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:12.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:12.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:12.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:12.304 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:12.304 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:12.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:23:12.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:23:12.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:23:12.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:12.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:12.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:12.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:23:12.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:12.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:23:12.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:12.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:23:12.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:23:12.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:12.315 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:12.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:12.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:23:12.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:12.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:23:12.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:12.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:23:12.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:23:12.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:12.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:12.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:12.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:23:12.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:12.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:23:12.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:12.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:23:12.325 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:23:12.325 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:23:12.325 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:23:12.325 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:12.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:12.330 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:23:12.808 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:23:12.852 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:23:12.854 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:23:12.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:23:12.855 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:23:13.280 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:23:13.329 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:13.330 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:13.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:23:14.226 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:23:14.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:14.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:14.698 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:23:15.174 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:23:15.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:15.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:15.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:15.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:15.645 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:23:16.116 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:23:16.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:16.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:16.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:16.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:16.587 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:23:17.061 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:23:17.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:17.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:17.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:17.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:23:18.006 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:23:18.470 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:23:18.942 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:23:19.414 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:23:19.889 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:23:20.361 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:23:20.837 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:23:21.309 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:23:21.782 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:23:22.255 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:23:22.723 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:23:22.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:22.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:22.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:22.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:22.870 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:22.870 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:22.870 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:22.870 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:22.870 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:23:22.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:22.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:22.871 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:27.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:27.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:27.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:27.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:27.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:27.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:27.879 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:27.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:27.880 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:27.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:27.880 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:23:27.883 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:23:27.883 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:23:27.884 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:27.884 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:27.884 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:27.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:23:27.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:27.885 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:23:27.885 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:27.887 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:23:27.888 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:23:27.888 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:27.888 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:27.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:27.889 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:23:27.889 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:27.889 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:23:27.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:27.891 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:23:27.891 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:23:27.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:27.891 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:27.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:27.891 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:23:27.891 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:27.891 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:23:27.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:27.895 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:23:27.896 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:23:27.896 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:23:27.896 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.896 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:27.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:27.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:27.898 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:27.898 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:27.898 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:23:27.898 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.905 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:32.905 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:32.905 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:32.905 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:32.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:32.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:32.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:32.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:32.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:23:32.918 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:23:32.918 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:23:32.919 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:32.919 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:32.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:32.920 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:23:32.921 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:32.921 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:23:32.921 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:32.922 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:23:32.923 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:23:32.923 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:32.923 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:32.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:32.924 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:23:32.924 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:32.924 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:23:32.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:32.926 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:23:32.926 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:23:32.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:32.926 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:32.926 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:32.926 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:23:32.926 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:32.926 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:23:32.927 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.930 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:23:32.931 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:23:32.931 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:23:32.931 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.931 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.932 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:32.935 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:23:33.414 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:23:33.455 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:23:33.457 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:23:33.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:23:33.459 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:23:33.886 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:23:33.934 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:33.934 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:33.935 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:33.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:34.361 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:23:34.833 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:23:34.936 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:34.936 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:34.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:34.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:35.309 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:23:35.781 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:23:35.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:35.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:35.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:35.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:36.255 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:23:36.727 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:23:36.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:36.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:36.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:36.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:37.198 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:23:37.672 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:23:37.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:37.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:37.941 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:37.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:38.145 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:23:38.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:23:39.090 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:23:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:23:40.035 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:23:40.510 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:23:40.982 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:23:41.457 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:23:41.929 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:23:42.405 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:23:42.875 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:23:43.338 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:23:43.801 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:23:44.265 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:23:44.728 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:23:45.191 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:23:45.473 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:45.473 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:45.474 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:45.474 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:45.476 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:45.476 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:45.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:45.476 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:45.476 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:45.476 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:45.476 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:45.476 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2716 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:23:50.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:23:50.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:23:50.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:50.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:50.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:50.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:50.489 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:23:50.491 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:50.491 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:50.492 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:23:50.492 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:23:50.497 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:23:50.498 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:23:50.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:50.498 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:50.498 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:23:50.498 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:23:50.498 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:23:50.499 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:23:50.499 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:50.502 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:23:50.503 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:23:50.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:50.503 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:50.503 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:23:50.503 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:23:50.503 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:23:50.503 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:23:50.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:50.507 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:23:50.507 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:23:50.507 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:50.507 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:23:50.508 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:23:50.508 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:23:50.508 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:23:50.508 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:23:50.508 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:50.513 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:23:50.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:23:50.513 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:23:50.513 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:23:50.513 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:23:50.513 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.514 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:23:50.514 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:23:50.514 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:23:50.515 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:23:50.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:23:50.519 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:23:50.998 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:23:51.050 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:23:51.052 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:23:51.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:23:51.054 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:23:51.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:23:51.056 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:23:51.056 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:23:51.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:23:51.057 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:23:51.057 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:23:51.057 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:23:51.057 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:23:51.469 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:23:51.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:51.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:51.520 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:51.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:51.941 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:23:52.414 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:23:52.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:52.520 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:52.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:52.521 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:52.887 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:23:53.359 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:23:53.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:53.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:53.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:53.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:53.830 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:23:54.301 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:23:54.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:54.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:54.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:54.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:54.774 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:23:55.246 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:23:55.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:23:55.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:23:55.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:23:55.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:23:55.719 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:23:56.192 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:23:56.665 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:23:57.137 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:23:57.608 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:23:58.081 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:23:58.553 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:23:59.025 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:23:59.496 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:23:59.967 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:24:00.440 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:24:00.913 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:24:01.385 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:24:01.856 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:24:02.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:02.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:02.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:02.098 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:02.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:02.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:02.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:02.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:02.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:02.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:02.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:02.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:02.100 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:02.100 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2503 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:07.105 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:07.105 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:07.105 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:07.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:07.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:07.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:07.113 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:07.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:07.114 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:07.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:07.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:24:07.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:24:07.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:24:07.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:07.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:07.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:07.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:24:07.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:07.118 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:24:07.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:07.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:24:07.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:24:07.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:07.122 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:07.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:07.123 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:24:07.123 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:07.123 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:24:07.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:07.127 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:24:07.127 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:24:07.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:07.127 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:07.127 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:07.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:24:07.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:07.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:24:07.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:24:07.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:24:07.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:24:07.134 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:24:07.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:07.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:24:07.618 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:24:07.665 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:24:07.667 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:24:07.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:07.669 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:24:07.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:07.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:07.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:07.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:07.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:07.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:07.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:07.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:08.090 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:24:08.138 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:08.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:08.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:08.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:08.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:24:09.034 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:24:09.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:09.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:09.507 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:24:09.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:24:10.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:10.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:10.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:10.141 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:10.450 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:24:10.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:24:11.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:11.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:11.141 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:11.142 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:11.396 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:24:11.867 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:24:12.141 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:12.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:12.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:12.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:12.339 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:24:12.812 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:24:13.285 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:24:13.757 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:24:14.228 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:24:14.701 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:24:15.173 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:24:15.646 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:24:16.119 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:24:16.591 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:24:17.063 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:24:17.534 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:24:18.008 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:24:18.480 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:24:18.952 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:24:19.423 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:24:19.896 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:24:20.369 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:24:20.841 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:24:21.312 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:24:21.785 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:24:22.258 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:24:22.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:22.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:22.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:22.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:22.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:22.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:22.720 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:22.720 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:22.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:22.720 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:22.720 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:22.720 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:22.720 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:24:22.720 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:22.720 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:22.720 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:22.720 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:22.720 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:22.721 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:22.721 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3366 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:27.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:27.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:27.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:27.724 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:27.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:27.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:27.732 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:27.732 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:27.733 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:24:27.736 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:24:27.736 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:24:27.736 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:27.737 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:27.737 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:27.737 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:24:27.738 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:27.738 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:24:27.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:27.739 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:24:27.740 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:24:27.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:27.740 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:27.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:27.740 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:24:27.740 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:27.740 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:24:27.740 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:27.742 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:24:27.743 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:24:27.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:27.743 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:27.743 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:27.743 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:24:27.743 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:27.743 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:24:27.743 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:24:27.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:24:27.747 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:24:27.747 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:24:27.747 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:27.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:27.752 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:24:28.231 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:24:28.268 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:24:28.270 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:24:28.272 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:24:28.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:28.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:28.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:28.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:28.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:28.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:28.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:28.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:28.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:28.327 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:28.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:28.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:28.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:28.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:28.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:28.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:28.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:28.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:28.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:28.335 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:28.335 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:28.335 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:24:28.335 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:28.335 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:28.335 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:28.335 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:33.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:33.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:33.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:33.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:33.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:33.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:33.347 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:33.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:33.348 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:33.348 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:33.348 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:24:33.351 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:24:33.351 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:24:33.352 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:33.352 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:33.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:33.352 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:24:33.353 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:33.353 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:24:33.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:33.354 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:24:33.354 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:24:33.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:33.354 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:33.354 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:33.354 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:24:33.354 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:33.354 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:24:33.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:33.356 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:24:33.356 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:24:33.356 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:33.356 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:33.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:33.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:24:33.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:33.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:24:33.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:33.359 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:24:33.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:24:33.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:24:33.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:24:33.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:24:33.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:24:33.360 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:24:33.360 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:24:33.360 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:33.361 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:33.365 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:24:33.843 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:24:33.880 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:24:33.882 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:24:33.883 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:24:33.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:33.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:33.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:33.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:33.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:33.924 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:33.924 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:33.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:33.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:33.931 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:33.931 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:33.931 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:33.931 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:33.980 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:33.981 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:33.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:33.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:34.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:34.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:34.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:34.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.123 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:34.123 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:34.123 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:34.123 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:34.170 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:34.170 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:34.170 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.313 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:24:34.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:34.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:34.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:34.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:34.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:34.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:34.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:34.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:34.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:34.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:34.385 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:34.385 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:34.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:34.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:34.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:34.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:34.729 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:34.729 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:34.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:34.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:34.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.731 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:34.731 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:34.731 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:34.731 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:34.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:34.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:34.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:34.784 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:24:35.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:35.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:35.102 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:35.102 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:35.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:35.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:35.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:35.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:35.116 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:35.116 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:35.116 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:35.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:35.117 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:35.117 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:35.117 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:24:35.117 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.117 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.117 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.118 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.118 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.118 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.118 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.118 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:35.118 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:24:40.119 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:24:40.119 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:24:40.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:40.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:40.119 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:40.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:40.126 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:24:40.127 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:40.128 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:40.128 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:24:40.128 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:24:40.131 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:24:40.131 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:24:40.131 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:40.131 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:40.131 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:24:40.132 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:24:40.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:24:40.132 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:24:40.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:40.135 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:24:40.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:24:40.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:40.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:40.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:24:40.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:24:40.136 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:24:40.136 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:24:40.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:40.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:24:40.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:24:40.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:40.140 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:24:40.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:24:40.140 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:24:40.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:24:40.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:24:40.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:40.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:40.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:24:40.147 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:24:40.147 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:24:40.147 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.148 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:24:40.149 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:24:40.152 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:24:40.630 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:24:40.684 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:24:40.686 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:24:40.689 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:24:40.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:40.712 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:40.712 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:40.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:40.734 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:40.734 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:40.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:40.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:40.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:40.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:40.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:40.745 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:40.745 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:40.769 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:40.770 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:40.770 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:40.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:41.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:24:41.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:41.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:41.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:41.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:41.574 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:24:42.047 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:24:42.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:42.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:42.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:42.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:42.520 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:24:42.992 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:24:43.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:43.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:43.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:43.156 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:43.466 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:24:43.938 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:24:44.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:44.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:44.157 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:44.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:44.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:24:44.882 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:24:45.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:24:45.157 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:24:45.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:24:45.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:24:45.355 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:24:45.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:45.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:45.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:45.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:45.796 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:45.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:45.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:45.802 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:45.802 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:45.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:45.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:45.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:45.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:45.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:45.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:45.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:45.820 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:45.820 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:45.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:45.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:45.827 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:24:46.299 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:24:46.770 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:24:47.241 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:24:47.714 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:24:48.187 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:24:48.659 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:24:49.133 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:24:49.605 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:24:50.077 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:24:50.548 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:24:50.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:50.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:50.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:50.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:50.843 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:50.843 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:50.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:50.848 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:50.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:50.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:50.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:50.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:50.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:50.850 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:50.850 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:50.850 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:50.872 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:50.872 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:50.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:50.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:51.018 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:24:51.489 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:24:51.960 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:24:52.433 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:24:52.906 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:24:53.378 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:24:53.849 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:24:54.320 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:24:54.793 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:24:55.265 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:24:55.737 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:24:55.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:55.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:55.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:55.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:55.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:55.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:55.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:55.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:24:55.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:24:55.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:24:55.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:24:55.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:55.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:55.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:55.909 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:24:55.909 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:24:55.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:24:55.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:24:55.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:55.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:24:56.208 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:24:56.679 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:24:57.153 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:24:57.625 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:24:58.097 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:24:58.568 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:24:59.041 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:24:59.514 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:24:59.986 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:25:00.457 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:25:00.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:00.923 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:00.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:00.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:00.930 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:25:00.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:00.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:00.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:00.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:00.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:00.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:00.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:00.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:00.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:25:00.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:25:00.943 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:25:00.943 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:05.947 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:25:05.947 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:25:05.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:05.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:05.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:05.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:05.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:05.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:25:05.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:05.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:25:05.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:25:05.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:25:05.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:25:05.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:25:05.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:05.962 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:05.962 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:25:05.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:25:05.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:25:05.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:05.966 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:25:05.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:25:05.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:25:05.967 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:05.967 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:05.967 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:25:05.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:25:05.967 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:25:05.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:05.970 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:25:05.971 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:25:05.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:25:05.971 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:05.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:05.971 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:25:05.971 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:25:05.971 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:25:05.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:05.975 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:25:05.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:25:05.975 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:25:05.975 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:25:05.975 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:25:05.975 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:25:05.976 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:25:05.976 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:25:05.976 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:05.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:05.981 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:25:06.459 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:25:06.507 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:25:06.509 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:25:06.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:06.512 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:25:06.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:06.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:06.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:06.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:06.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:06.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:06.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:06.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:06.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:06.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:06.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:06.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:06.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:06.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:06.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:06.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:06.932 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:25:06.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:06.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:06.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:07.403 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:25:07.873 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:25:07.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:07.981 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:07.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:07.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:08.344 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:25:08.815 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:25:08.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:08.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:08.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:08.983 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:09.288 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:25:09.761 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:25:09.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:09.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:09.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:09.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:10.234 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:25:10.707 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:25:10.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:10.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:10.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:10.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:11.179 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:25:11.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:11.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:11.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:11.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:11.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:11.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:11.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:11.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:11.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:11.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:11.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:11.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:11.634 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:11.634 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:11.634 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:11.634 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:11.648 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:11.648 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:11.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:11.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:11.651 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:25:12.123 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:25:12.593 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:25:13.067 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:25:13.539 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:25:14.011 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:25:14.482 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:25:14.955 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:25:15.428 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:25:15.900 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:25:16.371 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:25:16.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:16.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:16.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:16.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:16.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:16.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:16.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:16.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:16.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:16.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:16.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:16.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:16.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:16.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:16.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:16.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:16.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:16.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:16.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:16.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:16.841 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:25:17.312 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:25:17.783 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:25:18.254 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:25:18.725 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:25:19.198 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:25:19.670 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:25:20.143 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:25:20.616 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:25:21.088 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:25:21.560 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:25:21.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:21.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:21.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:21.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:21.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:21.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:21.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:21.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:21.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:21.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:21.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:21.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:21.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:21.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:21.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:21.724 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:21.741 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:21.741 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:21.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:21.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:22.031 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:25:22.502 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:25:22.975 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:25:23.448 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:25:23.920 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:25:24.393 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:25:24.865 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:25:25.337 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:25:25.808 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:25:26.282 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:25:26.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:26.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:26.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:26.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:26.754 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:25:26.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:26.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:26.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:26.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:26.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:26.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:26.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:25:26.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:25:26.763 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:25:26.763 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:26.764 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:31.768 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:25:31.768 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:25:31.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:31.768 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:31.768 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:31.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:31.775 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:31.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:25:31.775 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:31.775 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:25:31.776 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:25:31.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:25:31.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:25:31.778 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:25:31.778 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:31.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:31.779 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:25:31.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:25:31.779 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:25:31.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:25:31.781 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:25:31.781 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:25:31.781 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:31.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:25:31.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:25:31.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:25:31.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:31.783 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:31.783 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:25:31.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:25:31.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:25:31.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:25:31.787 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:25:31.787 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:25:31.787 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:31.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:31.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:25:32.270 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:25:32.312 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:25:32.315 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:25:32.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:32.317 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:25:32.334 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:32.334 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:32.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:32.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:32.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:32.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:32.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:32.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:32.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:32.356 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:32.356 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:32.356 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:32.362 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:32.362 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:32.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:32.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:32.741 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:25:32.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:32.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:32.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:32.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:33.213 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:25:33.684 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:25:33.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:33.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:33.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:33.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:34.158 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:25:34.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:25:34.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:34.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:34.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:35.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:25:35.573 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:25:35.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:35.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:35.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:35.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:36.044 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:25:36.517 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:25:36.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:36.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:36.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:36.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:36.990 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:25:37.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:37.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:37.372 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:37.372 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:37.390 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:37.390 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:37.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:37.396 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:37.396 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:37.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:37.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:37.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:37.398 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:37.398 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:37.398 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:37.398 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:37.407 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:37.407 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:37.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:37.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:37.462 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:25:37.933 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:25:38.404 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:25:38.877 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:25:39.350 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:25:39.822 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:25:40.293 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:25:40.767 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:25:41.239 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:25:41.711 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:25:42.182 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:25:42.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:42.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:42.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:42.415 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:42.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:42.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:42.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:42.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:42.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:42.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:42.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:42.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:42.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:42.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:42.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:42.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:42.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:42.461 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:42.461 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:42.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:42.653 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:25:43.126 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:25:43.599 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:25:44.071 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:25:44.542 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:25:45.013 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:25:45.486 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:25:45.958 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:25:46.430 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:25:46.901 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:25:47.372 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:25:47.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:47.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:47.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:47.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:47.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:47.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:47.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:47.493 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:47.493 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:47.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:47.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:47.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:47.494 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:47.494 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:47.494 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:47.494 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:47.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:47.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:47.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:47.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:47.843 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:25:48.316 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:25:48.788 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:25:49.260 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:25:49.732 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:25:50.206 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:25:50.678 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:25:51.149 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:25:51.622 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:25:52.094 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:25:52.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:52.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:52.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:52.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:52.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:52.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:52.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:52.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:52.530 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:52.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:52.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:52.531 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:52.531 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:25:52.531 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:25:52.531 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:25:52.531 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:52.531 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:52.531 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:25:57.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:25:57.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:25:57.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:57.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:57.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:57.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:57.543 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:25:57.544 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:25:57.544 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:57.545 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:25:57.545 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:25:57.548 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:25:57.549 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:25:57.549 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:25:57.549 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:57.550 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:25:57.550 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:25:57.550 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:25:57.550 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:25:57.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:57.552 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:25:57.552 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:25:57.553 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:25:57.553 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:57.553 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:25:57.553 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:25:57.554 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:25:57.554 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:25:57.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:57.555 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:25:57.555 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:25:57.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:25:57.556 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:25:57.556 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:25:57.556 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:25:57.556 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:25:57.556 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:25:57.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:25:57.559 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:25:57.560 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:25:57.560 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:25:57.560 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.560 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:25:57.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:25:57.565 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:25:58.043 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:25:58.083 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:25:58.086 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:25:58.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:58.089 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:25:58.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:58.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:58.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:58.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:25:58.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:25:58.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:25:58.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:25:58.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:58.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:58.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:58.144 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:25:58.144 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:25:58.181 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:25:58.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:25:58.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:58.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:25:58.516 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:25:58.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:58.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:58.564 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:58.566 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:58.987 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:25:59.460 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:25:59.565 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:25:59.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:25:59.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:25:59.567 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:25:59.931 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:26:00.404 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:26:00.566 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:00.566 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:00.566 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:00.568 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:00.875 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:26:01.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:26:01.567 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:01.567 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:01.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:01.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:01.816 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:26:02.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:26:02.568 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:02.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:02.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:02.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:02.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:26:03.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:03.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:03.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:03.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:03.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:03.206 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:03.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:03.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:03.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:03.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:03.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:03.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:03.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:03.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:03.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:03.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:03.231 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:03.231 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:03.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:03.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:03.234 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:26:03.706 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:26:04.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:26:04.652 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:26:05.124 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:26:05.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:26:06.068 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:26:06.540 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:26:07.012 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:26:07.483 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:26:07.954 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:26:08.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:08.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:08.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:08.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:08.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:08.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:08.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:08.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:08.260 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:08.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:08.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:08.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:08.261 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:08.261 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:08.261 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:08.261 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:08.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:08.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:08.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:08.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:08.425 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:26:08.896 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:26:09.369 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:26:09.841 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:26:10.314 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:26:10.784 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:26:11.257 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:26:11.730 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:26:12.202 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:26:12.673 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:26:13.146 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:26:13.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:13.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:13.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:13.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:13.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:13.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:13.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:13.310 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:13.310 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:13.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:13.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:13.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:13.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:13.312 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:13.312 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:13.312 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:13.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:13.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:13.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:13.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:13.619 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:26:14.091 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:26:14.561 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:26:15.035 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:26:15.507 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:26:15.980 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:26:16.453 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:26:16.925 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:26:17.397 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:26:17.871 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:26:18.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:18.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:18.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:18.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:18.343 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:26:18.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:18.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:18.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:18.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:18.348 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:26:18.348 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:26:18.348 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:26:18.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:26:18.348 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:26:18.348 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:26:18.348 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:18.348 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4492 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:23.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:26:23.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:26:23.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:26:23.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:26:23.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:26:23.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:26:23.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:26:23.360 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:26:23.360 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:23.361 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:26:23.361 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:26:23.365 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:26:23.365 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:26:23.365 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:26:23.365 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:23.365 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:26:23.365 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:26:23.366 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:26:23.366 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:26:23.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:23.370 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:26:23.370 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:26:23.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:26:23.370 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:23.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:26:23.371 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:26:23.371 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:26:23.371 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:26:23.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:26:23.375 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:26:23.375 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:26:23.375 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:26:23.380 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:26:23.381 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:26:23.381 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:26:23.381 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:23.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:23.386 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:26:23.863 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:26:23.911 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:26:23.913 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:26:23.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:23.915 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:26:23.939 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:23.939 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:23.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:23.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:23.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:23.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:23.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:23.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:23.961 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:23.961 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:23.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:23.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:24.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:24.002 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:24.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:24.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:24.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:24.262 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:24.262 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:24.262 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:24.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:24.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:24.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:24.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:24.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:24.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:24.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:24.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:24.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:24.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:24.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.335 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:26:24.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:24.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:24.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:24.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:24.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:24.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:24.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:24.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:24.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:24.684 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:24.690 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:24.690 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:24.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:24.690 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:24.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:24.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:24.692 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:24.692 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:24.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:24.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:24.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:24.806 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:26:25.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:26:25.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:25.386 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:25.386 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:25.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:25.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:25.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:25.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:25.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:25.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:25.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:25.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:25.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:25.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:25.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:25.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:25.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:25.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:25.456 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:25.456 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:25.456 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:25.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:25.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:25.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:25.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:25.748 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:26:26.219 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:26:26.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:26.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:26.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:26.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:26.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:26.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:26.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:26.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:26.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:26:26.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:26:26.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:26:26.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:26:26.319 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:26:26.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:26:26.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:26:26.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=636 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:26.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:26.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:26.319 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:26:31.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:26:31.324 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:26:31.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:26:31.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:26:31.324 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:26:31.324 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:26:31.331 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:26:31.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:26:31.332 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:31.332 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:26:31.332 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:26:31.334 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:26:31.335 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:26:31.335 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:26:31.335 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:31.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:26:31.335 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:26:31.336 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:26:31.336 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:26:31.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:26:31.337 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:26:31.337 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:26:31.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:26:31.339 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:26:31.339 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:26:31.339 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:26:31.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:26:31.342 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:26:31.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:26:31.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:26:31.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:26:31.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:26:31.868 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:26:31.871 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:26:31.872 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:26:31.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:31.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:31.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:31.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:31.917 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:31.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:31.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:31.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:31.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:31.926 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:31.927 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:31.927 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:31.927 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:31.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:31.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:31.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:31.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:32.298 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:26:32.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:32.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:32.345 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:32.345 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:32.772 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:26:33.244 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:26:33.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:33.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:33.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:33.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:33.717 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:26:34.188 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:26:34.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:34.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:34.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:34.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:34.661 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:26:35.134 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:26:35.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:35.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:35.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:35.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:35.606 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:26:36.077 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:26:36.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:26:36.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:26:36.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:26:36.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:26:36.548 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:26:37.021 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:26:37.494 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:26:37.966 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:26:38.437 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:26:38.910 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:26:39.383 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:26:39.855 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:26:40.326 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:26:40.799 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:26:41.272 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:26:41.744 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:26:42.217 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:26:42.690 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:26:43.163 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:26:43.633 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:26:44.107 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:26:44.579 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:26:45.052 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:26:45.525 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:26:45.998 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:26:46.470 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:26:46.944 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:26:47.416 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:26:47.889 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:26:48.362 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:26:48.835 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:26:49.307 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:26:49.778 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:26:50.249 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:26:50.722 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:26:51.194 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:26:51.667 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:26:51.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:51.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:51.972 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:51.972 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:51.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:51.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:51.989 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:51.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:26:51.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:26:51.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:26:51.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:26:51.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:51.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:51.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:51.997 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:26:51.997 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:26:52.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:26:52.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:26:52.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:52.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:26:52.137 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:26:52.608 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:26:53.082 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:26:53.554 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:26:54.026 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:26:54.498 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:26:54.971 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:26:55.443 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:26:55.916 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:26:56.389 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:26:56.861 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:26:57.334 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:26:57.807 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:26:58.279 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:26:58.751 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:26:59.223 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:26:59.696 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:27:00.168 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:27:00.641 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:27:01.111 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:27:01.582 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:27:02.055 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:27:02.528 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:27:03.000 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:27:03.471 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:27:03.945 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:27:04.417 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:27:04.889 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:27:05.360 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:27:05.833 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:27:06.306 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:27:06.778 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:27:07.249 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:27:07.720 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:27:08.190 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:27:08.661 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:27:09.135 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:27:09.607 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:27:10.079 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:27:10.550 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:27:11.023 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:27:11.496 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:27:11.968 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:27:12.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:12.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:27:12.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:12.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:12.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:12.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:12.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:27:12.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:12.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:12.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:27:12.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:27:12.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:12.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:27:12.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:27:12.071 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:27:12.071 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:27:12.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:27:12.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:27:12.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:12.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:12.439 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:27:12.909 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:27:13.380 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:27:13.853 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:27:14.326 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:27:14.798 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:27:15.269 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:27:15.742 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:27:16.215 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:27:16.687 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:27:17.160 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:27:17.633 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:27:18.105 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:27:18.576 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:27:19.050 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:27:19.522 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:27:19.994 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:27:20.465 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:27:20.938 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:27:21.410 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:27:21.882 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:27:22.353 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:27:22.824 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:27:23.295 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:27:23.768 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:27:24.241 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:27:24.713 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:27:25.183 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:27:25.654 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:27:26.125 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:27:26.598 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:27:27.071 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:27:27.543 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:27:28.014 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:27:28.485 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:27:28.958 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:27:29.430 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:27:29.902 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:27:30.373 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:27:30.844 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:27:31.315 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 02:27:31.786 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 02:27:32.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:32.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:27:32.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:32.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:32.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:32.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:32.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:27:32.136 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:32.136 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:32.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:27:32.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:27:32.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:32.138 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:27:32.138 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:27:32.138 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:27:32.138 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:27:32.156 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:27:32.157 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:27:32.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:32.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:32.256 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 02:27:32.727 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 02:27:33.198 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 02:27:33.671 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 02:27:34.144 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 02:27:34.616 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 02:27:35.087 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 02:27:35.560 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 02:27:36.033 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 02:27:36.504 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 02:27:36.976 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 02:27:37.449 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 02:27:37.921 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 02:27:38.393 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 02:27:38.864 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 02:27:39.338 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 02:27:39.810 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 02:27:40.282 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 02:27:40.753 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 02:27:41.226 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 02:27:41.699 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 02:27:42.171 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 02:27:42.642 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 02:27:43.115 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 02:27:43.588 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 02:27:44.060 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 02:27:44.531 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 02:27:45.004 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 02:27:45.476 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 02:27:45.948 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 02:27:46.419 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 02:27:46.893 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 02:27:47.365 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 02:27:47.837 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 02:27:48.308 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 02:27:48.781 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 02:27:49.253 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 02:27:49.725 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 02:27:50.196 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 02:27:50.670 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 02:27:51.142 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 02:27:51.614 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 02:27:52.085 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 02:27:52.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:27:52.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:27:52.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:27:52.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:27:52.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:27:52.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:27:52.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:27:52.187 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:27:52.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:27:52.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:27:52.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:27:52.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:27:52.190 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:27:52.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:27:52.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:52.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=17467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:27:57.194 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:27:57.194 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:27:57.194 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:27:57.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:27:57.194 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:27:57.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:27:57.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:27:57.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:27:57.203 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:27:57.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:27:57.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:27:57.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:27:57.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:27:57.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:27:57.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:27:57.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:27:57.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:27:57.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:27:57.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:27:57.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:27:57.209 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:27:57.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:27:57.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:27:57.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:27:57.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:27:57.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:27:57.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:27:57.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:27:57.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:27:57.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:27:57.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:27:57.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:27:57.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:27:57.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:27:57.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:27:57.213 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:27:57.213 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:27:57.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:27:57.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:27:57.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:27:57.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:27:57.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:27:57.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:27:57.216 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:27:57.216 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:27:57.216 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:27:57.217 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:27:57.217 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:27:57.217 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:27:57.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:02.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:02.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:02.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:02.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:02.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:02.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:02.234 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:02.234 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:02.234 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:28:02.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:28:02.236 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:28:02.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:02.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:02.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:02.237 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:28:02.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:02.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:28:02.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:02.239 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:02.239 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:28:02.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:02.241 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:02.241 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:28:02.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:28:02.244 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:28:02.244 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:28:02.244 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.244 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:02.245 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:02.249 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:28:02.727 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:28:02.770 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:28:02.771 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:28:02.771 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:28:02.771 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:02.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:02.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:02.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:02.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:02.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:02.809 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:02.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:02.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:02.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:02.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:02.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:02.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:02.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:02.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:02.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:02.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.031 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.031 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:03.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:03.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:03.052 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.052 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.192 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:28:03.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:03.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:03.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:03.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:03.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:03.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.260 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.260 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.260 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:03.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:03.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.478 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:03.502 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.502 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.502 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:03.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.504 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.504 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.504 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:03.504 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:03.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.657 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:28:03.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.786 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.786 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:03.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:03.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:03.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:03.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.792 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.792 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:03.792 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:03.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:03.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:03.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:03.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:04.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:04.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:04.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:04.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:04.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:04.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:04.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:04.120 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:04.120 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:04.120 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:04.121 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:28:04.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:04.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:04.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:04.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:04.247 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:04.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:04.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:04.420 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:04.420 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:04.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:04.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:04.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:04.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:04.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:04.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:04.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:04.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:04.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:04.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:04.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:04.488 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:04.488 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:04.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.488 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:04.585 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:28:05.050 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:28:05.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:05.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:05.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:05.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:05.514 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:28:05.979 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:28:06.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:06.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:06.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:06.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:06.441 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:28:06.905 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:28:07.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:07.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:07.066 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:07.066 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:07.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:07.084 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:07.084 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:07.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:07.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:07.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:07.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:07.087 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:07.087 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:07.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:07.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:07.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:07.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:07.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:07.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:07.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:07.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:07.376 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:28:07.847 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:28:08.321 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:28:08.793 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:28:09.262 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:28:09.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:09.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:09.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:09.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:09.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:09.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:09.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:09.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:09.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:09.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:09.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:09.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:09.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:09.676 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:09.676 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:09.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:09.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:09.728 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:28:10.201 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:28:10.673 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:28:11.144 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:28:11.618 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:28:12.090 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:28:12.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:12.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:12.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:12.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:12.268 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:12.268 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:12.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:12.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:12.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:12.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:12.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:12.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:12.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:12.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:12.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:12.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:12.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:12.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:12.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:12.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:12.562 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:28:13.030 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:28:13.503 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:28:13.975 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:28:14.446 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:28:14.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:14.764 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:14.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:14.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:14.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:14.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:14.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:14.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:14.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:14.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:14.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:14.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:14.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:14.817 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:14.818 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:14.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:14.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:14.918 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:28:15.391 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:28:15.863 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:28:16.334 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:28:16.805 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:28:17.278 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:28:17.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:17.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:17.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:17.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:17.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:17.379 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:17.379 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:17.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:17.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:17.381 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:17.381 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:17.381 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:17.381 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:17.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:17.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:17.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:17.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:17.750 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:28:18.222 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:28:18.696 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:28:19.168 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:28:19.640 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:28:19.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:19.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:19.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:19.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:19.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:19.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:19.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:19.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:19.970 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:19.970 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:19.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:19.970 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:19.970 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:28:19.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:19.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:24.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:24.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:24.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:24.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:24.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:24.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:24.987 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:24.988 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:24.988 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:28:24.993 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:28:24.994 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:28:24.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:24.994 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:24.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:24.994 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:28:24.994 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:24.995 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:28:24.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:24.998 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:28:24.999 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:28:24.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:24.999 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:24.999 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:24.999 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:28:24.999 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:24.999 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:28:25.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:25.002 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:28:25.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:28:25.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:25.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:25.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:25.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:28:25.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:25.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:28:25.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:28:25.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:28:25.008 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:28:25.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:25.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:28:25.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:28:25.536 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:28:25.537 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:28:25.539 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:25.540 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:28:25.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:25.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:25.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:25.588 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:25.588 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:25.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:25.590 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:25.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:25.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:25.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:25.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:25.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:25.630 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:25.630 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:25.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:25.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:25.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:28:26.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:26.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:26.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:26.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:26.435 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:28:26.906 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:28:27.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:27.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:27.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:27.379 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:28:27.852 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:28:28.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:28.014 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:28.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:28.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:28.324 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:28:28.741 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:28.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:28.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:28.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:28.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:28.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:28.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:28.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:28.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:28.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:28.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:28.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:28.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:28.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:28.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:28.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:28.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:28.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:28.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:28.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:28.794 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:28:29.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:29.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:29.266 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:28:29.736 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:28:30.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:30.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:30.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:30.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:30.207 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:28:30.678 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:28:31.149 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:28:31.622 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:28:31.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:31.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:31.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:31.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:32.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:32.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:32.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:32.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:32.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:32.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:32.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:32.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:32.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:32.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:32.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:32.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:32.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:32.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:32.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:32.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:32.093 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:28:32.565 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:28:33.037 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:28:33.508 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:28:33.981 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:28:34.454 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:28:34.926 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:28:35.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:35.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:35.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:35.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:35.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:35.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:35.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:35.342 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:35.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:35.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:35.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:35.344 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:35.344 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:35.344 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:35.344 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:35.344 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:35.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:35.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:35.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:35.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:35.396 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:28:35.868 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:28:36.341 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:28:36.813 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:28:37.285 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:28:37.756 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:28:38.230 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:28:38.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:38.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:38.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:38.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:38.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:38.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:38.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:38.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:38.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:38.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:38.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:38.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:38.560 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:28:43.567 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:43.567 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:43.567 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:43.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:43.567 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:43.567 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:43.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:43.576 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:43.577 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:43.577 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:43.577 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:28:43.581 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:28:43.582 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:28:43.582 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:43.582 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:43.583 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:43.583 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:28:43.583 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:43.584 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:28:43.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:43.585 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:28:43.585 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:28:43.585 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:43.585 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:43.586 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:28:43.586 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:43.586 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:28:43.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:43.588 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:28:43.588 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:28:43.588 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:43.588 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:43.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:43.588 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:28:43.589 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:43.589 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:28:43.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.592 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:28:43.592 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:28:43.592 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:28:43.593 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:43.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:43.597 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:28:44.076 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:28:44.125 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:28:44.127 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:28:44.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:44.129 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:28:44.148 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:44.148 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:44.148 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:44.170 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:44.170 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:44.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:44.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:44.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.179 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:44.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:44.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:44.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:44.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:44.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:44.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:44.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:44.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:44.548 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:28:44.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:44.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:44.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:44.560 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:44.560 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:44.560 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:44.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:44.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:44.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:44.561 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:44.561 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:44.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:44.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:44.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:44.596 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:44.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:44.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:44.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:45.019 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:28:45.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:45.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:45.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:45.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:45.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:45.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:45.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:45.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:45.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:45.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:45.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:45.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:45.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:45.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:45.101 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:45.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:45.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:45.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:45.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:45.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:45.490 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:28:45.597 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:45.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:45.598 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:45.598 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:45.961 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:28:46.434 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:28:46.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:46.599 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:46.906 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:28:47.379 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:28:47.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:47.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:47.849 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:28:48.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:48.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:48.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:48.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:48.027 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:48.027 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:48.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:48.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:48.033 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:48.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:48.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:48.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:48.035 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:48.035 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:48.035 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:48.035 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:48.083 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:48.084 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:48.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:48.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:48.320 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:28:48.601 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:48.602 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:48.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:28:49.264 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:28:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:28:50.209 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:28:50.680 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:28:50.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:50.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:51.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:51.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:51.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:51.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:51.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:51.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:51.010 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:51.010 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:51.010 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:51.010 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:51.010 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:28:51.010 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:51.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:56.017 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:28:56.017 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:28:56.017 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:56.017 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:56.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:56.017 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:56.024 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:28:56.024 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:56.024 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:56.025 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:28:56.025 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:28:56.028 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:28:56.029 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:28:56.029 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:56.029 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:56.030 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:28:56.030 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:28:56.030 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:28:56.031 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:28:56.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:56.033 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:28:56.033 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:28:56.033 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:56.033 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:56.034 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:28:56.034 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:28:56.034 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:28:56.034 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:28:56.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:56.036 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:28:56.036 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:28:56.036 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:56.036 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:28:56.036 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:28:56.036 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:28:56.037 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:28:56.037 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:28:56.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:28:56.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:28:56.041 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:28:56.041 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:28:56.041 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:28:56.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:28:56.525 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:28:56.565 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:28:56.566 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:28:56.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:56.568 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:28:56.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:56.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:56.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:56.598 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:56.598 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:56.598 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:56.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:56.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:56.601 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:56.601 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:56.601 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:56.601 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:56.615 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:56.616 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:56.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:56.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:56.997 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:28:57.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:57.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:57.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:57.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:57.468 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:28:57.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:57.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:57.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:57.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:57.922 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:57.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:57.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:57.928 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:28:57.928 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:28:57.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:28:57.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:28:57.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:57.930 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:57.930 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:57.930 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:28:57.930 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:28:57.934 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:28:57.934 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:28:57.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:57.934 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:28:57.941 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:28:58.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:58.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:58.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:58.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:58.414 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:28:58.886 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:28:59.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:28:59.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:28:59.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:28:59.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:28:59.357 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:28:59.830 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:29:00.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:00.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:00.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:00.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:00.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:00.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:00.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:00.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:00.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:00.087 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:00.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:00.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:00.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:00.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:00.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:00.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:00.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:00.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:00.094 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:00.094 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:00.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:00.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:00.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:00.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:00.302 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:29:00.774 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:29:01.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:01.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:01.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:01.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:01.245 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:29:01.718 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:29:02.191 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:29:02.663 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:29:03.134 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:29:03.607 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:29:04.080 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:29:04.552 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:29:05.012 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:05.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:05.017 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:05.017 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:29:05.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:05.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:05.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:05.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:05.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:05.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:05.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:05.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:05.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:05.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:05.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:05.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:05.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:05.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:05.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:05.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:05.494 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:29:05.967 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:29:06.439 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:29:06.911 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:29:07.382 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:29:07.855 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:29:08.328 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:29:08.804 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:29:09.275 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:29:09.747 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:29:09.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:09.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:09.902 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:09.902 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:09.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:09.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:09.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:09.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:09.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:09.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:09.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:09.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:09.915 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:29:09.915 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:09.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:14.920 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:14.920 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:14.920 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:14.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:14.921 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:14.921 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:14.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:14.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:14.928 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:14.928 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:14.929 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:29:14.933 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:29:14.933 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:29:14.933 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:14.934 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:14.934 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:14.934 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:29:14.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:14.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:29:14.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:14.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:29:14.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:29:14.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:14.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:14.937 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:14.937 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:29:14.937 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:14.937 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:29:14.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:14.939 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:29:14.939 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:29:14.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:14.939 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:14.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:14.939 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:29:14.939 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:14.939 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:29:14.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:29:14.943 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:29:14.943 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:29:14.943 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:14.948 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:29:15.426 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:29:15.466 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:29:15.467 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:29:15.470 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:29:15.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:15.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:15.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:15.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:15.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:15.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:15.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:15.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:15.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:15.519 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:15.519 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:15.519 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:15.520 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:15.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:15.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:15.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:15.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:15.899 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:29:15.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:15.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:15.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:15.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:16.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:16.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:16.186 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:16.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:16.205 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:16.205 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:16.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:16.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:16.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:16.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:16.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:16.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:16.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:16.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:16.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:16.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:16.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:16.222 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:16.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:16.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:16.370 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:29:16.843 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:29:16.948 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:16.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:17.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:17.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:17.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:17.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:17.167 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:17.167 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:17.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:17.172 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:17.172 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:17.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:17.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:17.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:17.174 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:17.174 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:17.174 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:17.174 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:17.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:17.212 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:17.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:17.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:17.314 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:29:17.786 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:29:17.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:17.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:17.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:17.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:18.258 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:29:18.729 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:29:18.950 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:18.950 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:18.951 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:18.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:19.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:19.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:19.123 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:19.124 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:19.140 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:19.140 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:19.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:19.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:19.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:19.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:19.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:19.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:19.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:19.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:19.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:19.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:19.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:19.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:19.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:19.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:19.202 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:29:19.675 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:29:19.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:19.951 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:19.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:19.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:20.147 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:29:20.618 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:29:21.091 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:29:21.169 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:21.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:21.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:21.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:21.182 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:21.182 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:21.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:21.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:21.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:21.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:21.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:21.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:21.183 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:29:21.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:21.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:26.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:26.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:26.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:26.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:26.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:26.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:26.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:26.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:26.201 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:26.202 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:26.202 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:29:26.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:29:26.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:29:26.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:26.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:26.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:26.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:29:26.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:26.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:29:26.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:26.212 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:29:26.212 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:29:26.212 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:26.212 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:26.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:26.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:29:26.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:26.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:29:26.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:26.216 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:29:26.216 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:29:26.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:26.216 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:26.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:26.217 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:29:26.217 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:26.217 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:29:26.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:29:26.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:29:26.222 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:29:26.222 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:26.226 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:29:26.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:29:26.745 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:29:26.746 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:29:26.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:26.748 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:29:26.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:26.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:26.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:26.778 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:26.779 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:26.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:26.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:26.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:26.784 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:26.784 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:26.784 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:26.784 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:26.795 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:26.795 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:26.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:26.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:27.177 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:29:27.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:27.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:27.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:27.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:27.650 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:29:28.122 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:29:28.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:28.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:28.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:28.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:28.595 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:29:29.068 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:29:29.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:29.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:29.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:29.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:29.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:29.227 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:29.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:29.230 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:29.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:29.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:29.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:29.251 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:29.251 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:29.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:29.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:29.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:29.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:29.252 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:29.252 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:29.252 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:29.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:29.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:29.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:29.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:29.540 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:29:30.013 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:29:30.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:30.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:30.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:30.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:30.484 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:29:30.954 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:29:31.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:31.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:31.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:31.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:31.425 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:29:31.896 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:29:31.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:31.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:31.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:31.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:32.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:32.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:32.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:32.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:32.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:32.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:32.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:32.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:32.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:32.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:32.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:32.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:32.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:32.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:32.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:32.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:32.367 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:29:32.840 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:29:33.312 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:29:33.784 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:29:34.255 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:29:34.729 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:29:35.201 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:29:35.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:35.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:35.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:35.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:35.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:35.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:35.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:35.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:35.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:35.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:35.381 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:35.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:35.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:35.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:35.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:35.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:35.436 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:35.437 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:35.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:35.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:35.673 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:29:36.144 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:29:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:29:37.090 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:29:37.562 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:29:38.036 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:29:38.508 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:29:38.825 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:38.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:38.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:38.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:38.838 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:38.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:38.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:38.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:38.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:38.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:38.840 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:29:38.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:38.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:43.846 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:43.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:43.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:43.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:43.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:43.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:43.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:43.857 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:43.857 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:43.858 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:43.858 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:29:43.863 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:29:43.863 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:29:43.863 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:43.863 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:43.863 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:43.864 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:29:43.864 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:43.864 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:29:43.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:43.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:29:43.868 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:29:43.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:43.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:43.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:43.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:29:43.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:43.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:29:43.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:43.871 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:29:43.871 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:29:43.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:43.871 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:43.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:43.871 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:29:43.871 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:43.871 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:29:43.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:43.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:29:43.876 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:29:43.876 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:29:43.876 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.876 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:43.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:43.880 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:29:44.359 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:29:44.406 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:29:44.407 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:29:44.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:44.409 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:29:44.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:44.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:44.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:44.449 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:44.449 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:44.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:44.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:44.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.454 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:44.454 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:44.454 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:44.454 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:44.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:44.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:44.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:44.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:44.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:44.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:44.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:44.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:44.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:44.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:44.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:44.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:44.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:44.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:44.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:44.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:44.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:44.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:44.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:44.830 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:29:44.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:44.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:44.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:44.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:45.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:45.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:45.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:45.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:45.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:45.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:45.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:45.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:45.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:45.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:45.140 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:45.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:45.141 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:45.141 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:45.151 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:45.151 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:45.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.302 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:29:45.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:45.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:45.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:45.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:45.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:45.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:45.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:45.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:45.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:45.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:45.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.723 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:45.723 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:45.723 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:45.723 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:45.773 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:29:45.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:45.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:45.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:45.879 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:45.879 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:45.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:45.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:46.244 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:29:46.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:46.326 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:46.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:46.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:46.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:46.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:46.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:46.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:46.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:46.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:46.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:46.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:46.340 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:29:46.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:46.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:46.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:46.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:46.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:46.341 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:46.342 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:46.342 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:46.342 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:29:51.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:29:51.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:29:51.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:51.346 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:51.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:51.346 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:51.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:29:51.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:51.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:51.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:29:51.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:29:51.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:29:51.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:29:51.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:51.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:51.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:29:51.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:29:51.361 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:29:51.361 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:29:51.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:51.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:29:51.364 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:29:51.364 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:51.364 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:51.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:29:51.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:29:51.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:29:51.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:29:51.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:51.369 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:29:51.369 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:29:51.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:51.369 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:29:51.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:29:51.369 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:29:51.369 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:29:51.369 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:29:51.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:51.375 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:29:51.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:29:51.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:29:51.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:29:51.375 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:29:51.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:29:51.376 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:29:51.376 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:29:51.376 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:29:51.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.377 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:29:51.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:29:51.381 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:29:51.860 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:29:51.914 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:29:51.916 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:29:51.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:51.918 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:29:51.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:51.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:51.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:51.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:29:51.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:29:51.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:29:51.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:29:51.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:51.973 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:51.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:51.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:29:51.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:29:51.998 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:29:51.998 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:29:51.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:51.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:29:52.332 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:29:52.380 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:52.380 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:52.381 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:52.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:52.803 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:29:53.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:29:53.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:53.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:53.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:53.382 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:53.749 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:29:54.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:29:54.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:54.383 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:54.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:54.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:54.695 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:29:55.168 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:29:55.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:55.384 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:55.384 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:55.384 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:55.640 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:29:56.114 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:29:56.385 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:29:56.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:29:56.385 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:29:56.385 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:29:56.586 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:29:57.059 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:29:57.532 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:29:58.005 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:29:58.477 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:29:58.948 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:29:59.422 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:29:59.894 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:30:00.366 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:30:00.837 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:30:01.311 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:30:01.783 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:30:02.256 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:30:02.729 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:30:03.202 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:30:03.674 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:30:04.148 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:30:04.620 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:30:05.093 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:30:05.564 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:30:06.037 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:30:06.510 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:30:06.982 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:30:07.453 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:30:07.924 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:30:08.397 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:30:08.870 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:30:09.342 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:30:09.813 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:30:10.286 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:30:10.759 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:30:11.231 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:30:11.702 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:30:12.175 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:30:12.648 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:30:13.121 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:30:13.591 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:30:14.062 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:30:14.536 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:30:15.008 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:30:15.481 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:30:15.953 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:30:16.427 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:30:16.899 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:30:17.372 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:30:17.845 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:30:18.318 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:30:18.791 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:30:19.264 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:30:19.736 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:30:20.207 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:30:20.680 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:30:21.153 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:30:21.625 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:30:22.098 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:30:22.571 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:30:23.043 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:30:23.514 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:30:23.985 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:30:24.456 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:30:24.926 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:30:24.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:24.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:30:24.989 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:30:24.989 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:30:25.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:30:25.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:30:25.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:30:25.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:30:25.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:30:25.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:30:25.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:30:25.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:25.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:30:25.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:30:25.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:30:25.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:30:25.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:30:25.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:30:25.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:25.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:25.397 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:30:25.868 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:30:26.339 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:30:26.809 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:30:27.280 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:30:27.751 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:30:28.224 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:30:28.697 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:30:29.169 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:30:29.640 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:30:30.113 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:30:30.586 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:30:31.057 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:30:31.529 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:30:32.003 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:30:32.475 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:30:32.947 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:30:33.418 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:30:33.889 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:30:34.360 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:30:34.830 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:30:35.301 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:30:35.774 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:30:36.247 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:30:36.719 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:30:37.190 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:30:37.660 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:30:38.132 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:30:38.602 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:30:39.073 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:30:39.544 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:30:40.015 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:30:40.486 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:30:40.959 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:30:41.432 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:30:41.904 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:30:42.378 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:30:42.850 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:30:43.322 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:30:43.793 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:30:44.267 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:30:44.739 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:30:45.211 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:30:45.682 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:30:46.153 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:30:46.624 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:30:47.095 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:30:47.565 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:30:48.039 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:30:48.511 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:30:48.983 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:30:49.454 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:30:49.928 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:30:50.400 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:30:50.872 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:30:51.343 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 02:30:51.814 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 02:30:52.284 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 02:30:52.754 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 02:30:53.226 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 02:30:53.697 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 02:30:54.170 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 02:30:54.642 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 02:30:55.115 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 02:30:55.586 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 02:30:56.059 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 02:30:56.532 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 02:30:57.003 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 02:30:57.475 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 02:30:57.945 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 02:30:58.416 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 02:30:58.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:58.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:30:58.569 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:30:58.569 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:30:58.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:30:58.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:30:58.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:30:58.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:30:58.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:30:58.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:30:58.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:30:58.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:58.593 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:30:58.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:30:58.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:30:58.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:30:58.595 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:30:58.595 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:30:58.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:58.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:30:58.887 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 02:30:59.358 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 02:30:59.831 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 02:31:00.303 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 02:31:00.776 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 02:31:01.246 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 02:31:01.717 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 02:31:02.190 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 02:31:02.663 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 02:31:03.134 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 02:31:03.606 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 02:31:04.079 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 02:31:04.552 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 02:31:05.024 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 02:31:05.497 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 02:31:05.970 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 02:31:06.442 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 02:31:06.913 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 02:31:07.384 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 02:31:07.857 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 02:31:08.329 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 02:31:08.801 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 02:31:09.272 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 02:31:09.746 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 02:31:10.218 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 02:31:10.690 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 02:31:11.161 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 02:31:11.632 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 02:31:12.106 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 02:31:12.578 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 02:31:13.050 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 02:31:13.521 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 02:31:13.994 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 02:31:14.467 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 02:31:14.939 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 02:31:15.410 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 02:31:15.881 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 02:31:16.351 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 02:31:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 02:31:17.297 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-06 02:31:17.769 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-06 02:31:18.240 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-06 02:31:18.711 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-06 02:31:19.184 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-06 02:31:19.657 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-06 02:31:20.129 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-06 02:31:20.600 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-06 02:31:21.073 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-06 02:31:21.545 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-06 02:31:22.017 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-05-06 02:31:22.488 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-05-06 02:31:22.961 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-05-06 02:31:23.434 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-05-06 02:31:23.906 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-05-06 02:31:24.377 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-05-06 02:31:24.850 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-05-06 02:31:25.323 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-05-06 02:31:25.795 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-05-06 02:31:26.266 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-05-06 02:31:26.737 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-05-06 02:31:27.208 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-05-06 02:31:27.681 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-05-06 02:31:28.153 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-05-06 02:31:28.625 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-05-06 02:31:29.096 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-05-06 02:31:29.570 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-05-06 02:31:30.042 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-05-06 02:31:30.514 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-05-06 02:31:30.985 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-05-06 02:31:31.458 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-05-06 02:31:31.930 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-05-06 02:31:32.402 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-05-06 02:31:32.873 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-05-06 02:31:33.346 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-05-06 02:31:33.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:31:33.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:31:33.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:31:33.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:31:33.720 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:31:33.720 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:31:33.720 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:31:33.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:31:33.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:31:33.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:31:33.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:31:33.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:31:33.726 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:31:33.727 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:31:33.727 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:31:33.727 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:31:33.764 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:31:33.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:31:33.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:31:33.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:31:33.817 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-05-06 02:31:34.290 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-05-06 02:31:34.762 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-05-06 02:31:35.233 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-05-06 02:31:35.706 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-05-06 02:31:36.178 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-05-06 02:31:36.650 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-05-06 02:31:37.121 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-05-06 02:31:37.594 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-05-06 02:31:38.067 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-05-06 02:31:38.539 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-05-06 02:31:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-05-06 02:31:39.490 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-05-06 02:31:39.962 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-05-06 02:31:40.435 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-05-06 02:31:40.908 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-05-06 02:31:41.380 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-05-06 02:31:41.851 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-05-06 02:31:42.324 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-05-06 02:31:42.796 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-05-06 02:31:43.269 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-05-06 02:31:43.740 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-05-06 02:31:44.213 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-05-06 02:31:44.685 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-05-06 02:31:45.157 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-05-06 02:31:45.628 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-05-06 02:31:46.101 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-05-06 02:31:46.574 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-05-06 02:31:47.046 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-05-06 02:31:47.520 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-05-06 02:31:47.992 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-05-06 02:31:48.464 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-05-06 02:31:48.935 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-05-06 02:31:49.408 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-05-06 02:31:49.881 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-05-06 02:31:50.353 [DEBUG] clck_gen.py:113 IND CLOCK 25704
2026-05-06 02:31:50.824 [DEBUG] clck_gen.py:113 IND CLOCK 25806
2026-05-06 02:31:51.298 [DEBUG] clck_gen.py:113 IND CLOCK 25908
2026-05-06 02:31:51.770 [DEBUG] clck_gen.py:113 IND CLOCK 26010
2026-05-06 02:31:52.242 [DEBUG] clck_gen.py:113 IND CLOCK 26112
2026-05-06 02:31:52.713 [DEBUG] clck_gen.py:113 IND CLOCK 26214
2026-05-06 02:31:53.187 [DEBUG] clck_gen.py:113 IND CLOCK 26316
2026-05-06 02:31:53.659 [DEBUG] clck_gen.py:113 IND CLOCK 26418
2026-05-06 02:31:54.131 [DEBUG] clck_gen.py:113 IND CLOCK 26520
2026-05-06 02:31:54.604 [DEBUG] clck_gen.py:113 IND CLOCK 26622
2026-05-06 02:31:55.077 [DEBUG] clck_gen.py:113 IND CLOCK 26724
2026-05-06 02:31:55.549 [DEBUG] clck_gen.py:113 IND CLOCK 26826
2026-05-06 02:31:56.020 [DEBUG] clck_gen.py:113 IND CLOCK 26928
2026-05-06 02:31:56.492 [DEBUG] clck_gen.py:113 IND CLOCK 27030
2026-05-06 02:31:56.965 [DEBUG] clck_gen.py:113 IND CLOCK 27132
2026-05-06 02:31:57.437 [DEBUG] clck_gen.py:113 IND CLOCK 27234
2026-05-06 02:31:57.908 [DEBUG] clck_gen.py:113 IND CLOCK 27336
2026-05-06 02:31:58.379 [DEBUG] clck_gen.py:113 IND CLOCK 27438
2026-05-06 02:31:58.852 [DEBUG] clck_gen.py:113 IND CLOCK 27540
2026-05-06 02:31:59.325 [DEBUG] clck_gen.py:113 IND CLOCK 27642
2026-05-06 02:31:59.797 [DEBUG] clck_gen.py:113 IND CLOCK 27744
2026-05-06 02:32:00.268 [DEBUG] clck_gen.py:113 IND CLOCK 27846
2026-05-06 02:32:00.741 [DEBUG] clck_gen.py:113 IND CLOCK 27948
2026-05-06 02:32:01.213 [DEBUG] clck_gen.py:113 IND CLOCK 28050
2026-05-06 02:32:01.685 [DEBUG] clck_gen.py:113 IND CLOCK 28152
2026-05-06 02:32:02.156 [DEBUG] clck_gen.py:113 IND CLOCK 28254
2026-05-06 02:32:02.630 [DEBUG] clck_gen.py:113 IND CLOCK 28356
2026-05-06 02:32:03.102 [DEBUG] clck_gen.py:113 IND CLOCK 28458
2026-05-06 02:32:03.574 [DEBUG] clck_gen.py:113 IND CLOCK 28560
2026-05-06 02:32:04.045 [DEBUG] clck_gen.py:113 IND CLOCK 28662
2026-05-06 02:32:04.516 [DEBUG] clck_gen.py:113 IND CLOCK 28764
2026-05-06 02:32:04.989 [DEBUG] clck_gen.py:113 IND CLOCK 28866
2026-05-06 02:32:05.462 [DEBUG] clck_gen.py:113 IND CLOCK 28968
2026-05-06 02:32:05.934 [DEBUG] clck_gen.py:113 IND CLOCK 29070
2026-05-06 02:32:06.405 [DEBUG] clck_gen.py:113 IND CLOCK 29172
2026-05-06 02:32:06.878 [DEBUG] clck_gen.py:113 IND CLOCK 29274
2026-05-06 02:32:07.350 [DEBUG] clck_gen.py:113 IND CLOCK 29376
2026-05-06 02:32:07.822 [DEBUG] clck_gen.py:113 IND CLOCK 29478
2026-05-06 02:32:08.294 [DEBUG] clck_gen.py:113 IND CLOCK 29580
2026-05-06 02:32:08.767 [DEBUG] clck_gen.py:113 IND CLOCK 29682
2026-05-06 02:32:09.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:09.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:09.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:09.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:09.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:09.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:09.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:09.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:09.057 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:09.057 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:09.057 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:09.057 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:09.057 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:32:09.057 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:32:09.057 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:32:09.057 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=29747 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:32:09.057 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=29747 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:32:09.057 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=29747 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:32:14.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:32:14.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:32:14.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:14.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:14.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:14.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:14.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:14.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:32:14.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:14.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:32:14.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:32:14.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:32:14.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:32:14.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:32:14.073 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:14.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:14.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:32:14.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:32:14.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:32:14.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:14.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:32:14.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:32:14.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:32:14.078 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:14.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:14.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:32:14.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:32:14.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:32:14.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:14.082 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:32:14.082 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:32:14.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:32:14.082 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:14.082 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:14.082 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:32:14.082 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:32:14.082 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:32:14.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.087 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:32:14.087 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:32:14.087 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:32:14.088 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:14.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:14.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:14.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:14.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:14.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:32:14.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:32:14.090 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:32:14.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:19.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:32:19.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:32:19.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:19.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:19.097 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:19.097 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:19.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:19.105 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:32:19.105 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:19.106 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:32:19.106 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:32:19.109 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:32:19.110 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:32:19.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:32:19.110 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:19.111 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:19.111 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:32:19.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:32:19.111 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:32:19.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:19.113 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:32:19.113 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:32:19.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:32:19.114 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:19.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:19.114 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:32:19.114 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:32:19.114 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:32:19.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:19.116 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:32:19.117 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:32:19.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:32:19.117 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:19.117 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:19.117 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:32:19.117 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:32:19.117 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:32:19.117 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:19.120 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:32:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:32:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:32:19.120 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:32:19.121 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:32:19.121 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:32:19.121 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.121 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:19.126 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:32:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:32:19.642 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:32:19.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:19.646 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:32:19.649 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:32:19.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:19.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:19.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:19.695 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:19.695 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:19.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:19.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:19.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:19.706 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:19.706 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:19.706 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:32:19.706 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:32:19.744 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:19.744 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:19.744 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:19.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:20.078 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:32:20.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:20.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:20.549 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:32:21.019 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:32:21.124 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:21.125 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:21.125 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:21.126 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:21.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:21.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:21.187 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:21.187 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:21.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:21.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:21.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:21.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:21.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:21.207 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:21.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:21.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:21.209 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:21.209 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:21.209 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:32:21.209 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:32:21.252 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:21.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:21.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:21.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:21.492 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:32:21.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:32:22.126 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:22.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:22.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:22.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:22.438 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:32:22.911 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:32:23.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:23.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:23.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:23.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:23.383 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:32:23.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:23.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:23.541 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:23.541 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:23.559 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:23.559 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:23.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:23.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:23.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:23.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:23.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:23.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:23.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:23.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:23.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:32:23.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:32:23.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:23.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:23.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:23.619 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:23.855 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:32:24.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:24.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:24.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:24.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:24.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:32:24.799 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:32:25.272 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:32:25.744 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:32:26.217 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:32:26.690 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:32:27.081 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:27.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:27.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:27.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:27.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:27.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:27.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:27.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:27.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:27.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:27.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:27.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:27.106 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:27.106 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:27.106 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:32:27.106 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:32:27.160 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:27.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:27.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:27.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:27.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:32:27.633 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:32:28.103 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:32:28.577 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:32:29.049 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:32:29.521 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:32:29.992 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:32:30.463 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:32:30.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:30.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:30.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:30.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:30.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:30.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:30.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:30.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:30.562 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:30.562 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:30.562 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:32:30.562 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:32:30.562 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:32:30.563 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:30.563 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:35.568 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:32:35.568 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:32:35.568 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:35.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:35.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:35.568 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:35.571 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:32:35.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:32:35.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:35.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:32:35.573 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:32:35.575 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:32:35.575 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:32:35.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:32:35.575 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:35.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:32:35.576 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:32:35.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:32:35.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:32:35.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:35.578 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:32:35.579 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:32:35.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:32:35.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:35.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:32:35.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:32:35.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:32:35.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:32:35.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:35.581 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:32:35.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:32:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:32:35.582 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:32:35.582 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:32:35.582 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:32:35.582 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:32:35.582 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:32:35.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:32:35.587 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:32:35.587 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:32:35.587 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:32:35.592 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:32:36.070 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:32:36.118 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:32:36.120 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:32:36.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:36.123 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:32:36.141 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:36.141 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:36.141 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:36.158 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:36.158 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:36.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:36.159 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:36.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:36.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:36.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:36.161 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:32:36.161 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:32:36.208 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:36.208 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:36.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:36.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:36.542 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:32:36.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:36.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:36.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:36.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:37.013 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:32:37.484 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:32:37.591 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:37.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:37.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:37.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:37.957 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:32:38.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:32:38.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:38.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:38.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:38.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:38.902 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:32:39.376 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:32:39.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:39.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:39.594 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:39.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:39.848 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:32:40.321 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:32:40.595 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:32:40.596 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:32:40.596 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:32:40.596 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:32:40.791 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:32:41.262 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:32:41.733 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:32:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:32:42.679 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:32:43.151 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:32:43.622 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:32:44.096 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:32:44.568 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:32:45.041 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:32:45.514 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:32:45.987 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:32:46.459 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:32:46.930 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:32:47.401 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:32:47.874 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:32:48.347 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:32:48.819 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:32:49.292 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:32:49.765 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:32:50.237 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:32:50.711 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:32:51.184 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:32:51.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:51.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:51.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:51.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:51.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:51.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:51.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:51.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:32:51.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:32:51.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:32:51.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:32:51.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:51.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:51.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:51.515 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:32:51.515 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:32:51.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:32:51.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:32:51.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:51.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:32:51.656 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:32:52.127 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:32:52.598 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:32:53.068 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:32:53.539 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:32:54.010 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:32:54.483 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:32:54.956 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:32:55.428 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:32:55.899 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:32:56.372 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:32:56.844 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:32:57.316 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:32:57.788 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:32:58.258 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:32:58.729 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:32:59.200 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:32:59.671 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:33:00.141 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:33:00.612 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:33:01.083 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:33:01.557 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:33:02.029 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:33:02.501 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:33:02.972 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:33:03.446 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:33:03.918 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:33:04.389 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:33:04.860 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:33:05.331 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:33:05.801 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:33:06.275 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:33:06.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:06.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:06.627 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:06.627 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:06.643 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:06.643 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:06.643 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:06.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:06.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:06.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:06.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:06.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:06.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:06.651 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:33:06.651 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:33:06.690 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:06.690 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:06.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:06.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:06.747 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:33:07.219 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:33:07.690 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:33:08.161 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:33:08.634 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:33:09.106 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:33:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:33:10.049 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:33:10.522 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:33:10.995 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:33:11.467 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:33:11.938 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:33:12.409 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:33:12.882 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:33:13.355 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:33:13.827 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:33:14.297 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:33:14.768 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:33:15.242 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:33:15.714 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:33:16.186 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:33:16.657 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:33:17.131 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:33:17.603 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:33:18.075 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:33:18.546 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:33:19.019 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:33:19.492 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:33:19.964 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:33:20.435 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:33:20.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:20.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:20.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:20.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:20.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:20.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:20.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:20.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:20.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:20.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:20.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:20.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:20.900 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:20.900 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:20.900 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:33:20.900 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:33:20.905 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:33:20.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:20.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:20.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:20.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:21.376 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:33:21.847 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:33:22.320 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:33:22.793 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:33:23.265 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:33:23.738 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:33:24.211 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:33:24.682 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:33:25.154 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:33:25.627 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:33:26.099 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:33:26.571 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:33:27.042 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:33:27.513 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:33:27.986 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:33:28.459 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:33:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:33:29.402 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:33:29.875 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:33:30.348 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:33:30.820 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:33:31.293 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:33:31.765 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:33:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:33:32.708 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:33:33.182 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:33:33.654 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:33:34.126 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:33:34.597 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:33:35.071 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:33:35.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:35.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:35.463 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:35.463 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:35.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:35.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:35.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:33:35.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:33:35.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:33:35.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:33:35.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:33:35.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:33:35.485 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:33:35.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=12944 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:33:35.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=12944 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:33:35.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=12944 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:33:35.485 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=12944 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:33:40.492 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:33:40.492 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:33:40.492 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:33:40.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:33:40.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:33:40.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:33:40.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:33:40.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:33:40.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:40.502 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:33:40.502 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:33:40.506 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:33:40.506 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:33:40.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:33:40.507 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:40.507 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:33:40.507 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:33:40.507 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:33:40.507 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:33:40.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:33:40.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:33:40.511 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:33:40.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:40.514 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:33:40.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:33:40.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:33:40.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:40.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:33:40.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:33:40.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:33:40.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:33:40.515 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:33:40.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:33:40.518 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:33:40.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:33:40.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:33:40.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:33:40.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:33:40.520 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:33:40.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:33:45.527 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:33:45.527 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:33:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:33:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:33:45.527 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:33:45.527 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:33:45.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:33:45.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:33:45.537 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:45.537 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:33:45.537 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:33:45.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:33:45.541 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:33:45.541 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:33:45.541 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:45.541 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:33:45.542 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:33:45.542 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:33:45.542 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:33:45.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:45.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:33:45.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:33:45.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:33:45.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:45.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:33:45.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:33:45.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:33:45.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:33:45.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:33:45.547 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:33:45.547 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:33:45.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:33:45.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:33:45.551 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:33:45.551 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:33:45.551 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.551 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:33:45.552 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:33:45.556 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:33:46.033 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:33:46.081 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:33:46.083 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:33:46.085 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:33:46.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:46.110 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:46.110 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:46.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:46.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:46.132 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:46.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:46.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:46.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:46.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:46.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:46.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:33:46.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:33:46.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:46.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:46.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:46.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:46.505 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:33:46.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:46.554 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:46.555 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:46.977 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:33:47.451 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:33:47.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:47.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:47.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:47.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:47.923 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:33:48.396 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:33:48.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:48.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:48.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:48.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:48.866 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:33:49.340 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:33:49.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:49.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:49.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:49.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:49.812 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:33:50.285 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:33:50.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:33:50.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:33:50.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:33:50.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:33:50.756 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:33:51.226 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:33:51.700 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:33:52.173 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:33:52.645 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:33:53.119 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:33:53.591 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:33:54.063 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:33:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:33:55.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:33:55.479 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:33:55.951 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:33:56.423 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:33:56.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:56.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:56.632 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:56.632 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:56.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:56.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:56.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:56.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:33:56.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:33:56.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:33:56.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:33:56.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:56.655 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:56.655 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:56.655 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:33:56.655 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:33:56.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:33:56.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:33:56.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:56.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:33:56.895 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:33:57.369 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:33:57.841 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:33:58.312 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:33:58.783 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:33:59.254 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:33:59.727 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:34:00.199 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:34:00.671 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:34:01.144 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:34:01.617 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:34:02.089 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:34:02.560 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:34:03.031 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:34:03.502 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:34:03.973 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:34:04.443 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:34:04.914 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:34:05.385 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:34:05.858 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:34:06.331 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:34:06.803 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:34:06.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:06.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:06.975 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:06.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:06.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:06.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:06.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:06.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:06.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:06.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:06.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:06.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:06.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:06.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:06.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:06.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:07.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:07.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:07.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:07.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:07.273 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:34:07.744 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:34:08.215 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:34:08.689 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:34:09.161 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:34:09.633 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:34:10.106 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:34:10.579 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:34:11.051 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:34:11.522 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:34:11.995 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:34:12.468 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:34:12.940 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:34:13.411 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:34:13.881 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:34:13.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:13.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:13.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:13.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:13.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:13.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:13.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:13.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:13.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:13.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:13.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:13.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:13.948 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:13.948 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:13.948 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:13.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:13.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:13.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:13.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:14.352 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:34:14.825 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:34:15.298 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:34:15.770 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:34:16.241 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:34:16.715 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:34:17.187 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:34:17.659 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:34:18.130 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:34:18.604 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:34:19.076 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:34:19.547 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:34:20.019 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:34:20.492 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:34:20.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:20.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:20.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:20.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:20.964 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:34:20.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:20.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:20.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:20.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:20.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:20.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:20.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:20.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:20.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:20.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:20.974 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:34:20.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:20.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:20.975 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:20.975 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:20.975 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:20.975 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:20.975 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7654 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:34:25.976 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:25.976 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:25.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:25.976 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:25.976 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:25.976 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:25.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:25.983 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:34:25.983 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:25.984 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:34:25.984 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:34:25.987 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:34:25.988 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:34:25.988 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:34:25.988 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:25.988 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:25.989 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:34:25.989 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:34:25.989 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:34:25.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:25.992 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:34:25.992 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:34:25.993 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:34:25.993 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:25.993 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:25.994 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:34:25.994 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:34:25.994 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:34:25.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:34:25.996 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:34:25.996 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:34:25.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:34:26.001 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:34:26.001 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:34:26.001 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:26.006 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:34:26.484 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:34:26.528 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:34:26.530 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:34:26.532 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:34:26.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:26.551 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:26.551 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:26.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:26.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:26.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:26.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:26.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:26.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:26.578 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:26.579 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:26.579 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:26.579 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:26.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:26.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:26.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:26.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:26.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:26.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:26.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:26.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:26.955 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:34:26.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:26.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:26.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:26.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:26.968 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:26.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:26.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:26.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:26.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:26.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:26.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:26.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:27.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:27.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:27.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:27.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:27.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:27.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:27.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:27.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:27.427 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:34:27.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:27.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:27.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:27.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:27.503 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:27.503 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:27.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:27.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:27.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:27.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:27.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:27.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:27.510 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:27.510 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:27.510 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:27.510 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:27.514 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:27.514 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:27.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:27.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:27.898 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:34:28.004 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:28.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:28.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:28.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:28.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:28.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:28.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:28.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:28.302 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:28.302 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:28.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:28.307 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:28.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:28.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:28.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:28.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:28.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:28.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:28.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:28.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:28.313 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:28.313 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:28.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:28.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:28.368 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:34:28.840 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:34:29.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:29.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:29.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:29.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:29.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:29.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:29.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:29.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:29.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:29.172 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:29.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:29.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:29.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:29.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:29.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:29.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:29.173 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:34:29.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:29.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:34.178 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:34.178 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:34.178 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:34.178 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:34.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:34.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:34.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:34.190 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:34:34.190 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:34.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:34:34.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:34:34.196 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:34:34.197 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:34:34.197 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:34:34.197 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:34.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:34.198 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:34:34.198 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:34:34.199 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:34:34.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:34.201 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:34:34.202 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:34:34.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:34:34.202 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:34.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:34.202 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:34:34.202 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:34:34.202 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:34:34.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:34.205 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:34:34.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:34:34.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:34:34.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:34.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:34.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:34:34.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:34:34.206 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:34:34.206 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:34.210 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:34:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:34:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:34:34.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:34:34.210 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:34:34.211 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:34:34.211 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:34:34.211 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.211 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:34.216 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:34:34.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:34:34.744 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:34:34.746 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:34:34.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:34.748 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:34:34.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:34.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:34.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:34.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:34.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:34.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:34.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:34.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:34.801 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:34.801 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:34.801 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:34.801 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:34.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:34.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:34.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:34.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:35.164 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:34:35.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:35.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:35.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:35.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:35.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:34:36.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:34:36.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:36.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:36.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:36.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:36.580 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:34:37.051 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:34:37.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:37.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:37.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:37.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:37.522 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:34:37.993 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:34:38.050 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:38.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:38.054 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:38.054 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:38.072 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:38.072 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:38.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:38.078 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:38.078 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:38.078 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:38.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:38.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:38.080 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:38.080 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:38.080 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:38.080 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:38.129 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:38.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:38.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:38.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:38.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:38.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:38.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:38.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:38.463 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:34:38.937 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:34:39.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:39.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:39.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:39.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:39.409 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:34:39.881 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:34:40.353 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:34:40.826 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:34:41.298 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:34:41.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:41.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:41.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:41.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:41.485 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:41.485 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:41.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:41.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:41.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:41.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:41.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:41.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:41.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:41.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:41.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:41.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:41.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:41.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:41.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:41.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:41.769 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:34:42.240 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:34:42.714 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:34:43.186 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:34:43.658 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:34:44.128 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:34:44.600 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:34:45.073 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:34:45.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:45.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:45.228 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:45.228 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:45.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:45.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:45.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:45.254 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:45.254 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:45.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:45.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:45.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:45.255 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:45.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:45.256 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:45.256 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:45.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:45.305 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:45.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:45.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:45.545 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:34:46.017 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:34:46.488 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:34:46.962 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:34:47.434 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:34:47.906 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:34:48.377 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:34:48.848 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:34:48.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:48.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:48.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:48.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:48.940 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:48.940 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:48.941 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:34:48.941 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:48.941 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:53.946 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:53.946 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:53.946 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:53.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:53.946 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:53.946 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:53.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:53.956 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:34:53.956 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:53.957 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:34:53.957 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:34:53.962 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:34:53.962 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:34:53.962 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:34:53.962 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:53.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:53.963 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:34:53.963 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:34:53.963 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:34:53.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:53.967 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:34:53.967 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:34:53.967 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:34:53.968 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:53.968 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:53.968 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:34:53.968 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:34:53.968 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:34:53.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:53.971 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:34:53.972 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:34:53.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:34:53.972 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:34:53.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:34:53.972 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:34:53.972 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:34:53.972 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:34:53.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:34:53.979 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:34:53.979 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:34:53.979 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.980 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:34:53.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:34:53.984 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:34:54.462 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:34:54.511 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:34:54.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:54.514 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:34:54.518 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:34:54.543 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:54.543 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:54.543 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:54.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:54.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:54.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:54.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:54.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:54.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:54.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:54.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:54.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:54.600 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:54.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:54.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:54.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:54.935 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:34:54.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:54.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:54.982 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:54.982 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:54.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:54.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:54.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:54.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:55.000 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:55.000 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:55.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:55.006 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:55.007 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:55.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:55.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:55.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.009 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:55.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:55.009 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:55.009 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:55.023 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:55.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:55.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.405 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:34:55.578 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:55.583 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:55.583 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:55.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:55.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:55.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:55.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:55.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:55.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:55.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:55.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:55.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:55.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:55.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:55.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:55.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:55.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:55.876 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:34:55.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:55.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:55.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:55.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:56.347 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:34:56.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:56.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:56.741 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:56.741 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:56.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:56.756 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:56.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:56.762 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:56.762 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:56.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:34:56.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:56.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:56.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:56.764 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:56.764 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:34:56.764 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:34:56.816 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:34:56.816 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:34:56.816 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:56.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:56.819 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:34:56.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:56.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:56.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:56.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:57.292 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:34:57.764 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:34:57.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:34:57.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:34:57.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:34:57.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:34:57.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:34:57.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:34:57.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:34:57.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:34:57.859 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:34:57.859 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:34:57.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:34:57.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:34:57.859 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:34:57.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:34:57.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:02.865 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:02.866 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:02.866 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:02.866 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:02.866 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:02.866 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:02.876 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:02.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:02.877 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:02.877 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:02.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:35:02.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:35:02.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:35:02.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:02.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:02.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:02.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:35:02.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:02.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:35:02.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:02.882 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:35:02.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:35:02.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:02.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:02.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:02.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:35:02.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:02.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:35:02.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:02.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:02.885 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:35:02.885 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:35:02.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:35:02.889 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:35:02.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:02.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:02.894 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:35:03.374 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:35:03.417 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:35:03.419 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:35:03.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:03.421 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:35:03.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:03.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:03.441 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:03.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:03.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:03.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:03.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:03.480 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:03.480 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:03.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:03.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:03.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:03.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:03.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:03.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:03.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:03.846 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:35:03.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:03.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:03.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:03.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:04.338 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:35:04.811 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:35:04.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:04.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:04.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:04.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:05.282 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:35:05.755 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:35:05.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:05.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:06.228 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:35:06.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:06.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:06.382 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:06.382 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:06.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:06.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:06.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:06.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:06.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:06.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:06.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:06.414 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:06.414 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:06.414 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:06.414 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:06.414 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:06.461 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:06.462 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:06.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:06.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:06.699 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:35:06.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:06.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:07.170 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:35:07.640 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:35:07.898 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:07.898 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:08.111 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:35:08.582 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:35:09.053 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:35:09.541 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:35:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:35:10.484 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:35:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:35:11.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:11.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:11.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:11.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:11.033 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:11.034 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:11.034 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:11.040 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:11.040 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:11.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:11.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:11.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:11.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:11.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:11.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:11.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:11.091 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:11.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:11.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:11.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:11.428 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:35:11.901 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:35:12.373 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:35:12.844 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:35:13.317 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:35:13.790 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:35:14.262 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:35:14.733 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:35:15.206 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:35:15.679 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:35:16.151 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:35:16.622 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:35:17.093 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:35:17.566 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:35:17.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:17.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:17.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:17.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:17.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:17.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:17.740 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:17.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:17.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:17.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:17.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:17.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:17.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:17.748 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:17.748 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:17.748 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:17.797 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:17.797 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:17.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:17.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:18.038 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:35:18.510 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:35:18.981 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:35:19.454 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:35:19.926 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:35:20.398 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:35:20.869 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:35:21.343 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:35:21.815 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:35:22.287 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:35:22.761 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:35:23.233 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:35:23.705 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:35:24.176 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:35:24.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:24.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:24.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:24.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:24.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:24.508 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:24.508 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:24.509 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:24.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:24.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:24.511 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:24.511 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:24.511 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:35:24.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:24.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:29.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:29.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:29.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:29.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:29.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:29.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:29.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:29.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:29.528 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:29.528 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:29.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:35:29.537 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:35:29.538 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:35:29.538 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:29.538 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:29.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:29.539 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:35:29.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:29.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:35:29.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:29.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:35:29.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:35:29.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:29.544 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:29.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:29.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:35:29.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:29.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:35:29.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:29.548 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:35:29.548 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:35:29.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:29.549 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:29.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:29.549 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:35:29.549 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:29.549 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:35:29.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:35:29.554 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:35:29.554 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:35:29.554 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:29.555 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:29.559 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:35:30.038 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:35:30.086 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:35:30.088 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:35:30.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:30.090 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:35:30.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:30.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:30.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:30.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:30.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:30.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:30.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:30.136 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:30.136 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:30.136 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:30.136 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:30.136 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:30.177 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:30.177 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:30.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:30.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:30.511 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:35:30.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:30.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:30.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:30.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:30.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:35:31.453 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:35:31.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:31.559 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:31.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:31.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:31.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:31.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:31.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:31.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:31.926 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:35:31.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:31.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:31.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:31.947 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:31.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:31.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:31.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:31.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:31.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:31.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:31.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:31.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:31.966 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:31.966 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:31.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:31.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:32.398 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:35:32.559 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:32.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:32.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:32.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:32.870 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:35:33.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:35:33.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:33.561 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:33.561 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:33.561 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:33.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:35:34.289 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:35:34.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:34.562 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:34.562 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:34.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:34.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:34.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:34.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:34.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:34.748 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:34.748 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:34.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:34.754 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:34.754 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:34.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:34.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:34.756 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:34.756 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:34.756 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:34.756 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:34.756 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:34.759 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:35:34.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:34.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:34.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:34.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:35.231 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:35:35.701 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:35:36.172 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:35:36.645 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:35:37.118 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:35:37.590 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:35:38.061 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:35:38.532 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:35:39.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:35:39.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:39.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:39.162 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:39.162 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:39.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:39.181 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:39.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:39.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:39.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:39.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:35:39.188 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:39.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:39.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:39.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:39.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:35:39.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:35:39.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:35:39.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:35:39.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:39.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:39.477 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:35:39.949 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:35:40.421 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:35:40.892 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:35:41.365 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:35:41.837 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:35:42.309 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:35:42.780 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:35:43.254 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:35:43.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:35:43.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:43.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:35:43.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:35:43.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:43.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:43.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:43.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:43.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:43.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:43.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:43.586 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:35:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:48.593 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:48.594 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:48.594 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:48.594 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:48.594 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:48.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:48.602 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:48.604 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:48.604 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:48.605 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:48.605 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:35:48.611 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:35:48.611 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:35:48.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:48.612 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:48.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:48.612 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:35:48.612 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:48.612 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:35:48.613 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:48.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:35:48.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:35:48.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:48.617 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:48.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:48.617 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:35:48.617 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:48.617 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:35:48.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:48.620 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:35:48.620 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:35:48.620 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:48.620 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:48.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:48.620 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:35:48.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:48.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:35:48.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:35:48.626 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:35:48.626 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:35:48.626 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.626 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:48.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:48.627 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:48.631 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:35:49.109 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:35:49.152 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:35:49.153 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:35:49.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.154 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:35:49.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.581 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:35:49.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:49.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:49.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:49.630 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:49.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:49.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.052 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:35:50.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.453 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:50.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:50.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:50.468 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:50.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:50.472 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:50.472 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:50.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:50.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:50.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:50.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:50.473 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:35:50.473 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:35:50.473 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:35:50.474 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:35:50.474 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:35:50.474 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:35:50.474 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:35:55.474 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:55.474 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:55.474 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:55.474 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:55.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:55.474 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:55.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:55.486 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:55.486 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:55.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:35:55.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:35:55.488 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:35:55.489 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:35:55.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:55.489 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:55.489 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:55.489 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:35:55.489 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:35:55.489 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:35:55.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:55.490 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:35:55.490 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:35:55.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:55.491 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:55.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:55.491 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:35:55.491 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:35:55.491 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:35:55.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:55.493 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:35:55.493 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:35:55.493 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:55.494 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:35:55.494 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:35:55.495 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:35:55.495 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:35:55.495 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:35:55.500 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:35:55.978 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:35:56.020 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:35:56.022 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:35:56.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.025 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:35:56.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.365 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:35:56.497 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:56.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:56.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:56.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:56.689 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:56.911 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:35:57.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:35:57.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:35:57.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:35:57.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:35:57.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:35:57.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:35:57.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:35:57.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:35:57.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:35:57.367 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:35:57.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:35:57.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:02.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:02.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:02.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:02.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:02.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:02.381 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:02.381 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:02.381 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:02.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:02.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:02.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:02.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:02.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:02.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:02.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:02.387 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:02.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:02.391 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:02.391 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:02.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:02.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:02.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:02.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:02.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:02.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:02.392 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:02.395 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:02.395 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:02.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:02.396 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:02.396 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:02.396 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:02.396 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:02.396 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:02.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:02.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:02.401 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:02.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:02.405 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:02.883 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:02.932 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:02.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:02.936 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:02.939 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:02.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:02.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:02.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.299 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.354 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:36:03.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:03.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:03.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:03.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:03.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:36:03.934 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:03.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:04.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:04.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:04.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:04.269 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:04.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:04.270 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:04.270 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:04.270 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:04.270 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:04.270 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:04.270 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:04.270 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:04.270 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:09.276 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:09.276 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:09.276 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:09.276 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:09.276 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:09.276 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:09.284 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:09.285 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:09.285 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:09.286 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:09.286 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:09.288 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:09.289 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:09.289 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:09.289 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:09.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:09.290 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:09.290 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:09.290 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:09.290 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:09.291 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:09.291 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:09.291 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:09.291 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:09.291 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:09.291 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:09.292 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:09.292 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:09.292 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:09.293 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:09.293 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:09.293 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:09.293 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:09.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:09.294 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:09.294 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:09.294 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:09.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.296 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:09.297 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:09.297 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:09.297 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:09.297 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:09.301 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:09.780 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:09.817 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:09.819 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:09.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:09.821 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:09.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:09.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.252 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:36:10.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:10.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:10.300 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:10.300 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:10.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.724 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:36:10.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:10.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:11.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:11.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:11.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:11.123 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:11.123 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:11.123 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:11.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:11.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:11.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:11.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:11.124 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:11.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:11.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:11.124 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:16.130 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:16.130 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:16.130 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:16.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:16.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:16.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:16.141 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:16.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:16.142 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:16.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:16.142 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:16.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:16.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:16.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:16.146 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:16.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:16.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:16.147 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:16.147 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:16.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:16.148 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:16.148 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:16.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:16.149 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:16.149 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:16.149 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:16.149 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:16.149 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:16.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:16.151 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:16.151 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:16.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:16.154 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:16.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:16.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:16.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:16.154 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:16.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:16.155 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:16.155 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:16.155 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.156 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:16.160 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:16.638 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:16.683 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:16.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:16.686 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:16.689 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:16.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:16.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:16.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.109 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:36:17.158 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:17.158 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:17.158 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:17.158 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:17.354 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.577 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:36:17.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:17.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:18.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:18.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:18.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:18.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:18.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:18.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:18.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:18.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:18.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:18.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:18.016 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:18.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:23.023 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:23.023 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:23.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:23.023 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:23.023 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:23.023 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:23.031 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:23.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:23.033 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:23.033 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:23.033 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:23.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:23.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:23.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:23.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:23.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:23.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:23.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:23.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:23.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:23.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:23.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:23.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:23.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:23.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:23.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:23.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:23.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:23.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:23.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:23.045 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:23.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:23.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:23.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:23.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:23.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:23.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:23.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.050 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:23.050 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:23.050 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:23.050 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:23.055 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:23.534 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:23.573 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:23.574 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:23.575 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:23.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:23.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:23.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.005 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:36:24.054 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:24.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:24.054 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:24.054 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:24.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.477 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:36:24.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.567 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:24.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:24.917 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:24.917 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:24.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:24.918 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:24.918 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:24.918 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:24.918 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:24.918 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:29.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:29.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:29.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:29.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:29.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:29.925 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:29.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:29.934 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:29.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:29.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:29.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:29.939 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:29.939 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:29.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:29.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:29.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:29.940 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:29.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:29.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:29.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:29.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:29.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:29.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:29.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:29.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:29.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:29.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:29.945 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:29.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:29.946 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:29.946 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:29.946 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:29.947 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:29.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:29.947 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:29.947 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:29.947 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:29.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.950 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:29.951 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:29.951 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:29.951 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:29.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:29.955 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:30.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:30.474 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:30.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.476 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:30.477 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:30.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:30.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:30.905 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:36:30.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:30.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:30.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:30.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:31.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.379 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:36:31.465 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:31.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:31.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:31.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:31.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:31.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:31.807 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:31.807 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:31.807 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:31.807 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:31.807 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:31.807 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:36.815 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:36.815 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:36.815 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:36.815 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:36.815 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:36.815 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:36.827 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:36.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:36.828 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:36.828 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:36.828 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:36.832 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:36.832 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:36.832 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:36.832 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:36.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:36.833 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:36.833 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:36.833 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:36.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:36.836 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:36.836 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:36.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:36.837 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:36.837 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:36.837 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:36.837 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:36.837 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:36.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:36.840 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:36.840 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:36.840 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:36.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:36.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:36.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:36.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:36.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:36.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:36.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:36.847 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:36.847 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:36.847 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.847 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:37.332 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:37.375 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:37.376 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:37.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.378 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:37.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.423 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.451 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:37.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:37.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:37.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:37.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:37.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:37.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:37.454 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:37.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:37.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:42.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:42.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:42.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:42.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:42.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:42.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:42.467 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:42.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:42.467 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:42.467 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:42.467 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:42.471 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:42.471 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:42.471 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:42.471 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:42.471 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:42.471 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:42.472 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:42.472 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:42.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:42.476 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:42.476 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:42.476 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:42.476 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:42.476 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:42.477 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:42.477 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:42.477 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:42.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:42.480 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:42.480 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:42.480 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:42.484 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:42.485 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:42.485 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:42.485 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:42.490 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:42.968 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:43.011 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:43.013 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:43.015 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:43.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.051 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.109 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.117 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:43.121 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:43.121 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:43.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:43.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:43.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:43.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:43.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:43.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:43.122 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:43.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:43.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:48.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:48.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:48.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:48.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:48.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:48.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:48.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:48.138 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:48.138 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:48.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:48.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:48.142 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:48.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:48.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:48.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:48.143 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:48.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:48.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:48.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:48.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:48.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:48.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:48.145 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:48.147 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:48.147 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:48.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:48.151 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:48.151 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:48.151 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.151 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:48.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:48.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:48.155 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:48.633 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:48.672 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:48.674 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:48.675 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:48.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.703 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:48.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:48.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:48.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:48.755 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:48.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:48.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:48.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:48.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:48.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:48.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:48.756 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:53.763 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:53.763 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:53.763 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:53.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:53.770 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:53.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:53.771 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:53.771 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:53.771 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:53.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:53.772 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:53.772 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:53.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:53.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:53.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:53.775 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:53.775 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:53.776 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:53.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:53.776 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:53.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:53.776 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:53.776 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:53.778 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:53.778 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:53.778 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:53.778 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:53.783 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:54.261 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:54.303 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:54.305 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:54.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.308 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:54.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.358 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.400 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:54.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:54.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:54.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:54.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:54.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:54.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:54.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:54.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:54.406 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:54.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:36:59.412 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:36:59.412 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:36:59.412 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:59.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:59.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:59.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:59.420 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:36:59.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:59.422 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:59.422 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:36:59.422 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:36:59.425 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:36:59.426 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:36:59.426 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:59.426 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:59.427 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:36:59.427 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:36:59.427 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:36:59.427 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:36:59.427 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:36:59.428 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:36:59.429 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:36:59.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:59.429 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:59.429 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:36:59.429 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:36:59.429 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:36:59.429 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:36:59.429 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:36:59.431 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:36:59.431 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:36:59.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:59.431 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:36:59.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:36:59.431 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:36:59.431 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:36:59.431 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:36:59.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.434 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:36:59.435 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:36:59.435 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:36:59.435 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.435 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:36:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.436 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:36:59.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.439 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:36:59.918 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:36:59.959 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:36:59.961 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:36:59.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:59.963 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:36:59.983 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:36:59.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:59.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:59.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:59.989 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:59.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:36:59.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:00.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:00.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:00.032 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:00.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:00.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:00.033 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:00.033 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:00.033 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:00.033 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:00.033 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:00.033 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:05.040 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:05.040 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:05.040 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:05.040 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:05.040 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:05.040 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:05.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:05.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:05.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:05.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:05.048 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:05.050 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:05.050 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:05.050 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:05.050 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:05.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:05.051 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:05.051 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:05.051 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:05.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:05.053 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:05.053 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:05.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:05.055 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:05.055 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:05.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:05.056 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:05.056 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:05.056 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:05.056 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:05.056 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:05.056 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.059 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:05.060 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:05.060 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:05.060 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.060 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.065 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:05.543 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:05.592 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:05.594 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:05.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.597 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:05.626 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:05.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.654 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.684 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.694 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:05.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:05.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:05.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:05.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:05.711 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:05.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:05.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:05.711 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:05.711 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:05.711 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:05.711 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:05.711 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:10.718 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:10.718 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:10.718 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:10.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:10.718 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:10.718 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:10.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:10.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:10.727 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:10.727 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:10.728 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:10.730 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:10.731 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:10.731 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:10.731 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:10.731 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:10.732 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:10.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:10.732 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:10.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:10.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:10.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:10.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:10.736 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:10.737 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:10.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:10.737 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:10.737 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:10.737 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:10.737 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:10.737 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:10.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:10.740 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:10.741 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:10.741 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:10.741 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.741 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:10.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:10.746 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:11.224 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:11.257 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:11.258 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:11.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.259 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:11.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:11.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.282 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.290 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.295 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.297 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.313 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:11.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:11.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:11.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:11.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:11.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:11.334 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:11.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:11.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:11.334 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:11.334 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:11.334 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:16.341 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:16.341 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:16.341 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:16.341 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:16.341 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:16.341 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:16.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:16.350 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:16.350 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:16.351 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:16.351 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:16.355 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:16.356 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:16.356 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:16.356 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:16.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:16.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:16.358 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:16.358 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:16.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:16.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:16.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:16.360 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:16.360 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:16.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:16.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:16.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:16.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:16.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:16.363 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:16.363 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:16.363 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:16.363 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:16.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:16.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:16.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:16.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:16.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:16.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:16.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:16.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:16.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:16.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:16.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:16.368 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:16.368 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:16.368 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:16.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:16.373 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:16.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:16.894 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:16.896 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:16.897 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:16.899 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:16.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:16.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:16.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:16.902 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:16.902 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:16.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:16.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:16.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:17.324 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:37:17.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:17.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:17.371 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:17.371 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:17.795 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:37:18.268 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:37:18.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:18.371 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:18.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:18.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:18.740 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:37:19.212 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:37:19.372 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:19.372 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:19.372 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:19.373 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:19.683 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:37:20.157 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:37:20.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:20.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:20.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:20.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:20.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:20.367 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:20.369 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:20.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:20.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:20.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:20.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:20.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:20.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:25.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:25.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:25.373 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:25.373 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:25.373 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:25.373 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:25.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:25.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:25.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:25.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:25.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:25.386 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:25.386 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:25.386 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:25.386 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:25.386 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:25.387 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:25.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:25.387 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:25.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:25.390 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:25.390 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:25.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:25.393 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:25.393 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:25.393 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:25.393 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:25.393 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:25.393 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:25.394 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:25.394 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:25.394 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:25.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:25.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:25.398 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:25.398 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:25.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:25.403 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:25.882 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:25.927 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:25.929 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:25.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:25.931 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:25.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:25.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:25.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:25.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:25.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:25.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:25.964 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:25.964 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:25.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:37:25.984 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:25.984 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:25.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:25.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:26.355 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:37:26.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:26.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:26.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:26.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:26.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:26.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:26.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:26.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:26.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:26.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:26.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:26.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:26.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:26.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:26.503 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:26.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:26.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:26.504 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:26.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:26.506 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:26.506 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:26.507 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:26.507 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:26.507 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:26.507 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:26.507 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:31.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:31.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:31.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:31.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:31.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:31.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:31.513 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:31.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:31.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:31.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:31.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:31.515 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:31.515 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:31.515 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:31.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:31.516 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:31.516 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:31.517 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:31.517 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:31.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:31.517 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:31.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:31.517 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:31.517 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:31.517 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:31.518 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:31.519 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:31.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:31.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:31.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:31.519 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:31.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:31.520 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:31.520 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:31.520 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:31.524 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:32.002 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:32.045 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:32.048 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:32.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:32.048 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:32.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:32.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:32.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:32.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:32.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:32.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:32.073 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:32.073 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:32.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:37:32.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:32.105 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:32.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:32.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:32.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:32.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:32.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:32.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:32.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:32.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:32.220 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:32.220 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:32.220 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:32.220 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:32.474 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:37:32.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:32.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:32.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:32.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:32.946 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:37:33.419 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:37:33.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:33.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:33.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:33.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:33.892 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:37:34.364 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:37:34.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:34.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:34.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:34.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:34.837 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:37:35.310 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:37:35.526 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:35.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:35.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:35.782 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:37:36.253 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:37:36.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:36.528 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:36.528 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:36.528 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:36.726 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:37:37.199 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:37:37.671 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:37:38.142 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:37:38.613 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:37:39.084 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:37:39.557 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:37:40.029 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:37:40.502 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:37:40.973 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:37:41.446 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:37:41.918 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:37:42.391 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:37:42.861 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:37:43.332 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:37:43.805 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:37:44.278 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:37:44.750 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:37:45.223 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:37:45.696 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:37:46.168 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:37:46.642 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:37:47.114 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:37:47.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:47.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:47.412 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:47.412 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=3432 tn=4 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.412 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:47.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:47.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:47.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:47.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:47.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:47.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:47.441 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:47.441 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:47.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:47.445 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:47.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:47.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:47.449 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:47.449 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:47.449 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:47.449 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:47.449 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:47.449 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:47.449 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:47.449 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:52.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:52.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:52.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:52.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:52.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:52.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:52.459 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:52.459 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:52.459 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:52.460 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:52.460 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:52.460 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:52.460 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:52.461 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:52.461 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:52.461 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:52.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:52.462 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:52.462 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:52.462 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:52.462 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:52.462 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:52.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:52.463 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:52.463 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:52.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:52.466 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:52.466 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:52.466 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:52.466 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.467 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:52.467 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:52.467 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:52.468 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.468 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:52.469 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:52.472 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:53.005 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:53.008 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:53.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:53.010 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:53.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:53.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:53.035 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:53.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:53.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:53.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:53.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:53.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:53.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:37:53.045 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:53.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:53.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:53.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:53.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:53.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:37:53.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:53.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:53.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:53.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:53.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:53.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:53.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:53.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:53.348 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:53.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:53.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:53.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:53.382 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:53.382 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:53.383 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:53.383 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:53.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:53.385 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:53.385 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:53.385 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:53.385 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:37:53.385 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:53.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:53.386 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=198 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:37:58.389 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:37:58.389 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:37:58.390 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:58.390 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:58.390 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:58.390 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:58.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:37:58.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:58.399 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:58.399 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:37:58.399 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:37:58.402 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:37:58.402 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:37:58.402 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:58.402 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:58.403 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:37:58.403 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:37:58.403 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:37:58.403 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:37:58.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:58.404 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:37:58.404 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:37:58.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:58.405 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:58.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:37:58.405 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:37:58.405 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:37:58.405 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:37:58.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:58.407 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:37:58.407 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:37:58.407 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:58.409 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:37:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:37:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:37:58.409 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:37:58.409 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:37:58.410 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:37:58.410 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:37:58.410 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.410 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:37:58.411 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:37:58.415 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:37:58.893 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:37:58.935 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:37:58.937 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:37:58.939 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:37:58.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:37:58.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:37:58.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:37:58.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:37:58.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:58.965 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:58.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:58.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:37:58.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:37:59.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:37:59.012 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:37:59.013 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:37:59.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:59.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:37:59.365 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:37:59.413 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:37:59.413 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:37:59.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:37:59.413 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:37:59.839 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:38:00.311 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:38:00.414 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:38:00.414 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:38:00.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:38:00.414 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:38:00.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:38:01.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:38:01.020 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:38:01.020 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:38:01.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:38:01.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:38:01.028 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:38:01.028 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:38:01.028 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:38:01.028 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:38:01.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:38:01.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:38:01.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:38:01.072 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:38:01.072 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:38:01.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:38:01.072 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:38:01.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:01.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:01.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:01.073 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:38:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:01.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:01.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=575 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:38:06.077 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:06.077 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:06.077 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:06.077 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:06.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:06.077 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:06.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:06.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:38:06.081 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:06.081 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:38:06.081 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:38:06.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:38:06.082 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:38:06.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:38:06.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:38:06.083 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:38:06.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:38:06.084 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:38:06.084 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:38:06.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:38:06.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:38:06.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:38:06.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:38:06.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:38:06.086 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:38:06.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:38:06.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:06.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:06.087 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:06.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.090 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:11.090 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:11.090 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:11.090 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:11.090 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:11.090 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:11.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:11.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:38:11.093 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:11.093 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:38:11.093 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:38:11.094 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:38:11.094 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:38:11.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:38:11.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:11.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:11.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:38:11.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:38:11.094 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:38:11.095 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:38:11.095 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:38:11.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:38:11.096 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:38:11.096 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:38:11.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:38:11.098 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:38:11.098 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:38:11.098 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.098 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:11.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:11.099 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:11.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:15.862 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.248.20:5700'
2026-05-06 02:38:15.862 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.248.20:5802)
2026-05-06 02:38:15.862 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.248.20:5801)
2026-05-06 02:38:15.862 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.248.22:6700'
2026-05-06 02:38:15.862 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.248.22:6802)
2026-05-06 02:38:15.862 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.248.22:6801)
2026-05-06 02:38:15.862 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.248.20:5700/1'
2026-05-06 02:38:15.862 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.248.20:5804)
2026-05-06 02:38:15.862 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.248.20:5803)
2026-05-06 02:38:15.862 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.248.20:5700/2'
2026-05-06 02:38:15.862 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.248.20:5806)
2026-05-06 02:38:15.862 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.248.20:5805)
2026-05-06 02:38:15.862 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.248.20:5700/3'
2026-05-06 02:38:15.862 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.248.20:5808)
2026-05-06 02:38:15.862 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.248.20:5807)
2026-05-06 02:38:15.862 [INFO] fake_trx.py:429 Init complete
2026-05-06 02:38:15.862 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-06 02:38:16.419 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:16.419 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:16.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:16.419 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:16.419 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:16.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:33.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:33.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:33.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:33.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:33.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:33.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:38.617 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:38.617 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:38.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:38.617 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:38.617 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:38.617 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:43.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:43.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:43.673 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:43.673 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:43.673 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:43.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:48.717 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:48.717 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:48.717 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:48.717 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:48.717 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:48.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:53.772 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:53.772 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:53.772 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:53.772 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:38:58.826 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:38:58.826 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:38:58.826 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:38:58.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:38:58.826 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:38:58.826 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:03.881 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:03.881 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:03.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:03.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:03.881 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:03.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:08.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:08.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:08.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:08.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:08.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:08.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:14.005 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:14.006 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:14.006 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:14.006 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:19.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:19.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:19.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:19.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:19.109 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:39:19.109 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:39:19.109 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:39:19.109 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:39:19.109 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:39:19.109 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:39:19.109 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:39:19.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:39:19.110 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:39:19.110 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:39:19.110 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 0 -> 1
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:39:19.110 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:39:19.111 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 0 -> 1
2026-05-06 02:39:19.111 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:39:19.111 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 0 -> 1
2026-05-06 02:39:19.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:39:19.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 0 -> 1
2026-05-06 02:39:19.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:39:24.158 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:24.158 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:24.159 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:24.159 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:24.159 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:24.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:29.210 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:39:29.210 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:39:29.210 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:39:29.210 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:39:34.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:34.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:34.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:34.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:34.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:34.267 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:39.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:39.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:39.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:39.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:44.374 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:44.374 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:44.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:44.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:49.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:49.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:49.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:49.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:49.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:49.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:39:55.567 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.248.20:5700'
2026-05-06 02:39:55.567 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.248.20:5802)
2026-05-06 02:39:55.567 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.248.20:5801)
2026-05-06 02:39:55.567 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.248.22:6700'
2026-05-06 02:39:55.567 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.248.22:6802)
2026-05-06 02:39:55.567 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.248.22:6801)
2026-05-06 02:39:55.567 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.248.20:5700/1'
2026-05-06 02:39:55.567 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.248.20:5804)
2026-05-06 02:39:55.567 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.248.20:5803)
2026-05-06 02:39:55.567 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.248.20:5700/2'
2026-05-06 02:39:55.567 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.248.20:5806)
2026-05-06 02:39:55.567 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.248.20:5805)
2026-05-06 02:39:55.567 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.248.20:5700/3'
2026-05-06 02:39:55.567 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.248.20:5808)
2026-05-06 02:39:55.567 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.248.20:5807)
2026-05-06 02:39:55.567 [INFO] fake_trx.py:429 Init complete
2026-05-06 02:39:55.567 [INFO] fake_trx.py:460 Setting real time process scheduler to SCHED_RR, priority 30
2026-05-06 02:39:56.100 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:39:56.100 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:39:56.100 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:39:56.100 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:39:56.100 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:39:56.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:00.101 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:00.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:00.104 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:00.104 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:00.105 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 0 -> 1
2026-05-06 02:40:00.110 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:40:00.111 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:40:00.111 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:00.111 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:00.112 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:00.112 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:40:00.112 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:00.113 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 0 -> 1
2026-05-06 02:40:00.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:00.116 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:40:00.116 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:40:00.116 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:00.116 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:00.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:00.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:40:00.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:00.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 0 -> 1
2026-05-06 02:40:00.117 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:00.120 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:40:00.120 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:40:00.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:00.120 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:00.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:00.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:40:00.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:00.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 0 -> 1
2026-05-06 02:40:00.121 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:40:00.123 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:40:00.123 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:40:00.123 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:40:00.123 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:00.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.125 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:00.128 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:40:00.607 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:40:00.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:00.666 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:40:00.668 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:40:00.669 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:40:00.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:00.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:00.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:00.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:00.679 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:00.679 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:00.679 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:00.679 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:00.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:00.879 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:00.879 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:00.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:00.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.079 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:40:01.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:01.128 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:01.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:01.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:01.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:01.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:01.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:01.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:01.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:01.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:01.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:01.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:01.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:01.377 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:01.377 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:01.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.550 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:40:01.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:01.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:01.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:01.781 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:01.781 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:01.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:01.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:01.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:01.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:01.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:01.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:01.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:02.021 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:40:02.056 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:02.056 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:02.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.129 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:02.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:02.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:02.460 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:02.460 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:02.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:02.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:02.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:02.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.477 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:02.477 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:02.477 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:02.477 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:02.494 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:40:02.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:02.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:02.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:02.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:02.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:02.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:02.966 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:40:02.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:02.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:02.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:02.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:02.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:02.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:02.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:02.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:03.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:03.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:03.131 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:03.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:03.238 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:03.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:03.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:03.438 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:40:03.909 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:40:03.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:03.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:03.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:03.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:03.990 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:03.990 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:03.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:03.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:03.992 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:03.992 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:03.992 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:03.992 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:04.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:04.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:04.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:04.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:04.180 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:04.180 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:40:04.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:04.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:04.380 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:40:04.854 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:40:04.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:04.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:04.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:04.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:04.999 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:05.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:05.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:05.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:05.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:05.017 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:05.017 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:05.018 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:05.018 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:05.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:05.126 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:05.126 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:40:05.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:05.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:05.326 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:40:05.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:05.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:05.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:05.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:05.539 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:05.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:05.554 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:05.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:05.556 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:05.556 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:05.556 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:05.556 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:05.556 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:05.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:05.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:05.798 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:40:05.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:05.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:05.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:05.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:06.272 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:40:06.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:06.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:06.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:06.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:06.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:06.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:06.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:06.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:06.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:06.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:06.582 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:06.582 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:06.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:06.744 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:40:06.779 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:06.779 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:06.779 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:06.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:07.215 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:40:07.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:07.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:07.586 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:07.586 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:07.602 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:07.602 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:07.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:07.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:07.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:07.604 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:07.604 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:07.604 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:07.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:07.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:07.688 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:40:07.720 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:07.721 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:07.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:07.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:08.161 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:40:08.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:08.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:08.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:08.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:08.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:08.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:08.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:08.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:08.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:08.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:08.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:08.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:08.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:08.633 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:40:08.668 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:08.668 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:40:08.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:08.669 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:09.106 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:40:09.446 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:09.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:09.451 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:09.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:09.451 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:09.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:09.470 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:09.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:09.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:09.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:09.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:09.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:09.472 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:09.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:09.578 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:40:09.615 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:09.615 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:40:09.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:09.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:09.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:09.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:09.996 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:09.996 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:09.996 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:10.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:10.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:10.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:10.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:10.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:10.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:10.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:10.050 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:40:10.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:10.113 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:10.113 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:10.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:10.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:10.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:10.209 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:10.218 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:10.218 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:10.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:10.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.219 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:10.219 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:10.219 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:10.219 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:10.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:10.321 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:10.321 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:10.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.521 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:40:10.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:10.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:10.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:10.698 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:10.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:10.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:10.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:10.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:10.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:10.717 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:10.717 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:10.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:10.819 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:10.819 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:10.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:10.994 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:40:11.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:11.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:11.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:11.188 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:11.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:11.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:11.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:11.205 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.205 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:11.205 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:11.205 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:11.205 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:11.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:11.290 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:11.290 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:11.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.467 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:40:11.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:11.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:11.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:11.682 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:11.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:11.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:11.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:11.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.692 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:11.692 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:11.693 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:11.693 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:11.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:11.767 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:11.767 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:11.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:11.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:11.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:11.864 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:11.872 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:11.872 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:11.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:11.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:11.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:11.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:11.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:11.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:11.939 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:40:11.975 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:11.975 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:11.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:11.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:12.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:12.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:12.352 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:12.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:12.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:12.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:12.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:12.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:12.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:12.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:12.410 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:40:12.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:12.473 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:12.473 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:12.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:12.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:12.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:12.841 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:12.850 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:12.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:12.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:12.851 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.851 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:12.851 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:12.851 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:12.851 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:12.881 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:40:12.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:12.944 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:40:12.944 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:40:12.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:12.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:13.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:13.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:13.330 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:13.330 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:13.331 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:40:13.337 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:13.337 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:13.337 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:13.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:13.338 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:13.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:13.338 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:13.338 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:13.338 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:40:13.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:13.338 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:18.345 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:18.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:18.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:18.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:18.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:18.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:18.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:18.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:18.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:18.354 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:18.354 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:18.357 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:18.357 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:40:18.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:18.360 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:40:18.360 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:40:18.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:18.361 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:18.361 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:40:18.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:18.361 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:18.361 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:40:18.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:18.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:40:18.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:40:18.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:18.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:18.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:18.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:40:18.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:18.364 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:40:18.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:18.370 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:40:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:40:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:40:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:40:18.370 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:40:18.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.371 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:40:18.371 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:40:18.371 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:40:18.372 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:18.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.374 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:18.376 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:40:18.854 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:40:18.906 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:40:18.908 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:40:18.910 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:40:18.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.930 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:18.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:18.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:18.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:18.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.020 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.026 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.028 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.047 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.073 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:19.320 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:40:19.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:19.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:19.375 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:19.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:19.377 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:19.378 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:19.506 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.511 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:19.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:19.785 [DEBUG] clck_gen.py:113 IND CLOCK 306
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2026-05-06 02:40:20.249 [DEBUG] clck_gen.py:113 IND CLOCK 408
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2026-05-06 02:40:20.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.376 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:20.376 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:20.376 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:20.377 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.378 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:20.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:20.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:20.714 [DEBUG] clck_gen.py:113 IND CLOCK 510
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2026-05-06 02:40:20.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
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2026-05-06 02:40:20.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.818 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.837 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.852 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:20.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:20.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:20.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:20.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:20.862 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:20.862 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:20.862 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:20.862 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:40:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:20.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:25.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:25.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:25.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:25.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:25.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:25.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:25.877 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:25.879 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:25.879 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:25.880 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:25.880 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:40:25.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:40:25.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:40:25.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:25.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:25.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:25.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:40:25.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:25.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:40:25.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:25.890 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:40:25.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:40:25.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:25.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:25.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:25.891 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:40:25.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:25.891 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:40:25.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:25.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:40:25.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:40:25.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:25.895 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:25.895 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:25.895 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:40:25.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:25.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:40:25.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:25.899 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:40:25.900 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:40:25.900 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:40:25.900 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:25.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:25.905 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:40:26.384 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:40:26.430 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:40:26.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:26.433 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:40:26.436 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:40:26.457 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:26.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:26.458 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:26.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:26.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:26.483 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:26.483 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:26.484 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:26.484 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:26.484 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:26.484 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:26.484 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:40:26.484 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:26.484 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:31.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:31.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:31.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:31.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:31.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:31.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:31.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:31.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:31.494 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:31.494 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:31.494 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:40:31.495 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:40:31.495 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:40:31.495 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:31.495 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:31.496 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:31.496 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:40:31.496 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:31.496 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:40:31.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:31.496 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:40:31.496 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:40:31.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:31.497 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:31.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:31.497 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:40:31.497 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:31.497 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:40:31.497 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:31.498 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:31.498 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:40:31.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:40:31.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:40:31.500 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:40:31.500 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:31.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:40:31.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:40:32.026 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:40:32.028 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:40:32.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:32.031 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:40:32.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:32.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:32.054 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:32.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:32.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:32.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:32.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:32.091 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:32.091 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:32.091 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:32.091 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:32.091 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:32.091 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:32.092 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:40:32.092 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:32.092 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:32.092 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:32.092 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:32.092 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:32.093 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:32.093 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:40:37.095 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:37.095 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:37.095 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:37.095 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:37.095 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:37.095 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:37.102 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:37.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:37.103 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:37.103 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:37.103 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:40:37.105 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:40:37.105 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:40:37.105 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:37.106 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:37.106 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:37.106 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:40:37.106 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:37.106 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:40:37.107 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:37.107 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:40:37.107 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:40:37.107 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:37.107 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:37.108 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:37.108 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:40:37.108 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:37.108 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:40:37.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:37.109 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:40:37.109 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:40:37.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:37.109 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:37.109 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:37.109 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:40:37.109 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:37.109 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:40:37.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:37.111 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:40:37.112 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:40:37.112 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:40:37.112 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.112 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:37.117 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:40:37.596 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:40:37.637 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:40:37.640 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:40:37.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:37.641 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:40:37.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.691 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.691 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.700 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.723 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.723 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.723 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.753 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.753 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:37.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:37.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:37.773 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:37.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:37.773 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:37.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:37.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:37.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:37.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:37.774 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:37.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:37.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:37.774 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:40:42.780 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:40:42.780 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:40:42.780 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:42.780 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:42.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:42.780 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:42.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:40:42.787 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:42.787 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:42.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:40:42.788 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:40:42.791 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:40:42.791 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:40:42.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:42.792 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:42.792 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:40:42.792 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:40:42.792 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:40:42.792 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:40:42.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:42.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:40:42.797 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:40:42.797 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:42.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:42.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:40:42.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:40:42.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:40:42.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:40:42.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:42.801 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:40:42.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:40:42.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:42.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:40:42.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:40:42.802 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:40:42.802 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:40:42.802 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:40:42.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.806 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:40:42.806 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:40:42.806 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:40:42.806 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.807 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:40:42.811 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:40:43.290 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:40:43.326 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:40:43.328 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:40:43.329 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:40:43.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:43.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:43.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:43.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:43.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:43.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:43.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:43.353 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:43.353 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:43.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:43.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:43.395 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:43.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:43.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:43.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:43.762 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:40:43.810 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:43.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:43.810 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:43.811 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:44.233 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:40:44.707 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:40:44.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:44.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:44.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:44.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:45.178 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:40:45.650 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:40:45.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:45.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:45.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:45.813 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:46.121 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:40:46.595 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:40:46.813 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:46.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:46.813 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:46.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:47.067 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:40:47.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:47.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:47.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:47.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:47.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:47.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:47.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:47.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:47.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:47.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:47.506 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:47.506 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:47.539 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:40:47.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:47.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:47.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:47.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:47.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:47.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:47.814 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:40:47.814 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:40:47.814 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:40:47.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:40:48.010 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:40:48.483 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:40:48.956 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:40:49.428 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:40:49.899 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:40:50.372 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:40:50.844 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:40:51.317 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:40:51.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:51.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:51.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:51.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:51.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:51.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:51.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:51.782 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:51.782 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:51.782 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:51.782 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:51.782 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:51.787 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:40:51.835 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:51.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:51.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:51.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:51.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:52.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:52.258 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:40:52.729 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:40:53.202 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:40:53.675 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:40:54.147 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:40:54.618 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:40:55.089 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:40:55.562 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:40:56.034 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:40:56.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:56.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:56.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:56.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:56.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:40:56.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:40:56.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:40:56.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:56.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:56.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:56.242 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:40:56.242 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:40:56.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:56.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:40:56.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:40:56.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:56.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:40:56.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:40:56.506 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:40:56.977 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:40:57.451 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:40:57.923 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:40:58.395 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:40:58.869 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:40:59.341 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:40:59.813 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:41:00.284 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:41:00.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:00.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:00.494 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:00.494 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:00.509 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:00.509 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:00.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:00.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:00.511 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:00.511 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:00.511 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:00.511 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:00.515 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:00.516 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:00.516 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:00.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:00.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:00.755 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:41:01.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:01.229 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:41:01.701 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:41:02.174 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:41:02.647 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:41:03.120 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:41:03.592 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:41:04.066 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:41:04.539 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:41:05.012 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:41:05.098 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:05.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:05.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:05.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:05.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:05.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:05.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:05.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:05.115 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:05.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:05.115 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:05.115 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:05.149 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:05.156 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:05.156 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:41:05.156 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:05.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:05.485 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:41:05.957 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:41:05.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:06.431 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:41:06.904 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:41:07.377 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:41:07.850 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:41:08.322 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:41:08.794 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:41:09.268 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:41:09.741 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:41:09.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:09.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:09.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:09.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:09.985 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:10.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:10.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:10.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:10.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:10.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:10.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:10.003 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:10.003 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:10.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:10.022 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:10.022 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:41:10.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:10.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:10.211 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:41:10.684 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:41:10.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:11.157 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:41:11.629 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:41:12.102 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:41:12.575 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:41:13.047 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:41:13.520 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:41:13.994 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:41:14.465 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:41:14.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:14.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:14.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:14.862 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:14.863 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:14.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:14.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:14.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:14.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:14.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:14.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:14.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:14.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:14.938 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:41:14.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:41:14.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:14.947 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:14.947 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:14.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:14.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:15.411 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:41:15.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:15.883 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:41:16.354 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:41:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:41:17.296 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:41:17.767 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:41:18.240 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:41:18.712 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:41:19.185 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:41:19.658 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:41:19.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:19.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:19.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:19.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:19.763 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:19.764 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:19.764 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:19.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:19.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:19.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:19.765 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:19.765 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:19.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:19.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:19.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:19.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:19.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:20.131 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:41:20.603 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:41:20.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:21.077 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:41:21.549 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:41:22.022 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:41:22.495 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:41:22.968 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:41:23.439 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:41:23.909 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:41:24.380 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:41:24.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:24.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:24.616 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:24.616 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:24.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:24.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:24.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:24.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:24.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:24.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:24.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:24.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:24.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:41:24.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:24.664 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:24.664 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:24.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:24.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:24.851 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:41:25.323 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:41:25.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:25.797 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:41:26.269 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:41:26.743 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:41:27.215 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:41:27.688 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:41:28.161 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:41:28.633 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:41:29.106 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:41:29.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:29.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:29.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:29.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:29.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:29.385 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:29.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:29.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:29.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:29.387 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:29.387 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:29.387 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:29.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:29.441 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:29.442 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:41:29.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:29.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:29.579 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:41:30.052 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:41:30.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:30.524 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:41:30.997 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:41:31.470 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:41:31.942 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:41:32.416 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:41:32.888 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:41:33.361 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:41:33.834 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:41:34.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:34.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:34.190 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:34.190 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:34.190 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:34.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:34.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:34.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:34.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:34.210 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:34.210 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:34.210 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:34.210 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:34.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:34.256 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:34.256 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:41:34.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:34.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:34.307 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:41:34.779 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:41:35.063 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:35.252 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:41:35.726 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:41:36.198 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:41:36.672 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:41:37.145 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:41:37.618 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:41:38.092 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:41:38.564 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:41:39.037 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:41:39.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:39.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:39.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:39.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:39.069 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:39.086 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:39.086 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:39.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:39.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:39.088 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:39.088 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:39.088 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:39.088 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:39.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:39.137 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:39.137 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:41:39.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:39.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:39.189 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:39.509 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:41:39.981 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:41:40.454 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:41:40.927 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:41:41.399 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:41:41.873 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:41:42.345 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:41:42.817 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 02:41:43.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:43.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:43.194 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:43.194 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:43.194 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:43.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:43.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:43.212 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:43.214 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:43.214 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:43.214 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:43.214 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:43.214 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:43.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:43.241 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:43.241 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:41:43.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:43.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:43.289 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 02:41:43.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:43.762 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 02:41:44.235 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 02:41:44.709 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 02:41:45.180 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 02:41:45.652 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 02:41:46.123 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 02:41:46.596 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 02:41:47.068 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 02:41:47.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:47.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:47.465 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:47.465 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:47.465 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:47.474 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:47.474 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:47.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:47.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:47.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:47.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:47.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:47.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:47.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:47.489 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:47.490 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:41:47.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:47.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:47.540 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 02:41:47.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:48.014 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 02:41:48.486 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 02:41:48.958 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 02:41:49.430 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 02:41:49.904 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 02:41:50.375 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 02:41:50.848 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 02:41:51.321 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 02:41:51.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:51.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:51.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:51.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:51.737 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:51.756 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:51.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:51.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:51.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:51.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:51.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:51.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:51.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:51.793 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 02:41:51.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:51.803 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:51.803 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:41:51.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:51.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:52.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:52.264 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 02:41:52.738 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 02:41:53.210 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 02:41:53.683 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 02:41:54.156 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 02:41:54.629 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 02:41:55.101 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 02:41:55.573 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 02:41:56.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:56.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:56.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:56.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:56.009 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:41:56.026 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:41:56.026 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:41:56.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:41:56.027 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:56.027 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:41:56.027 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:41:56.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:41:56.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:41:56.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:56.042 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:41:56.042 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:41:56.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:56.042 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:41:56.046 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 02:41:56.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:41:56.518 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 02:41:56.990 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 02:41:57.464 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 02:41:57.936 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 02:41:58.409 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 02:41:58.881 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 02:41:59.354 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 02:41:59.827 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 02:42:00.299 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 02:42:00.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:00.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:00.442 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:00.442 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:00.442 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:00.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:00.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:00.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:00.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:00.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:00.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:00.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:00.451 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:00.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:00.494 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:00.494 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:00.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:00.494 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:00.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:00.770 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 02:42:01.243 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 02:42:01.717 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 02:42:02.188 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 02:42:02.660 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 02:42:03.133 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 02:42:03.605 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 02:42:04.077 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 02:42:04.551 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 02:42:04.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:04.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:04.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:04.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:04.715 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:04.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:04.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:04.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:04.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:04.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:04.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:04.725 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:04.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:04.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:04.730 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:04.730 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:04.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:04.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:04.975 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 02:42:05.495 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 02:42:05.967 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 02:42:06.440 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 02:42:06.912 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 02:42:07.384 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 02:42:07.857 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 02:42:08.330 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 02:42:08.801 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-06 02:42:08.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:08.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:08.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:08.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:08.981 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:08.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:08.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:08.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:09.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:09.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:09.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:09.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:09.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:09.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:09.046 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:09.046 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:09.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:09.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:09.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:09.273 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-06 02:42:09.746 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-06 02:42:10.218 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-06 02:42:10.690 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-06 02:42:11.164 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-06 02:42:11.636 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-06 02:42:12.108 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-06 02:42:12.581 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-06 02:42:13.054 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-06 02:42:13.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:13.251 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:13.252 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:13.252 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:13.252 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:13.257 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:13.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:13.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:13.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:13.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:42:13.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:42:13.258 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:42:13.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:13.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:18.266 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:42:18.266 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:42:18.266 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:18.266 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:18.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:18.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:18.278 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:18.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:42:18.279 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:18.279 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:42:18.279 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:42:18.281 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:42:18.282 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:42:18.282 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:42:18.282 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:18.282 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:18.282 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:42:18.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:42:18.283 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:42:18.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:18.283 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:42:18.283 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:42:18.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:42:18.284 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:18.284 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:18.284 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:42:18.284 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:42:18.284 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:42:18.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:42:18.285 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:42:18.285 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:42:18.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:42:18.287 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:42:18.287 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:42:18.287 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.287 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:42:18.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:42:18.289 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:18.289 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.300 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:42:23.301 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:42:23.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:23.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:23.301 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:23.301 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:23.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:23.310 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:42:23.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:23.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:42:23.311 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:42:23.313 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:42:23.313 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:42:23.314 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:42:23.314 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:23.314 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:23.314 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:42:23.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:42:23.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:42:23.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:23.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:42:23.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:42:23.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:42:23.317 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:23.318 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:23.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:42:23.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:42:23.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:42:23.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:23.321 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:42:23.321 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:42:23.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:42:23.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:23.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:23.321 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:42:23.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:42:23.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:42:23.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:23.326 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:42:23.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:42:23.326 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:42:23.326 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:42:23.326 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:42:23.326 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.327 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:42:23.327 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:42:23.327 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:42:23.327 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:23.332 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:42:23.810 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:42:23.855 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:42:23.858 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:42:23.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:23.860 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:42:23.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:23.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:23.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:23.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:23.887 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:23.887 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:23.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:23.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:23.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:23.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:23.913 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:23.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:23.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:24.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.016 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:24.016 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:24.035 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:24.035 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:24.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:24.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.038 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:24.038 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:24.038 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:24.038 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:24.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:24.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:24.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:24.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.283 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:42:24.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:24.331 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:24.331 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:24.332 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:24.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:24.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:24.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:24.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:24.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:24.521 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:24.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:24.523 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:24.523 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:24.523 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:24.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:24.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:24.570 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:24.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:24.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:24.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:24.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:24.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:24.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:24.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:24.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:24.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:24.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:24.753 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:42:24.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:24.786 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:24.787 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:24.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:24.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:25.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:25.212 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:25.224 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:42:25.225 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:25.225 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:25.225 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:25.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.227 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:25.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:25.227 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:25.227 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:25.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:25.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:25.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:25.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.331 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:25.332 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:25.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:25.333 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:25.695 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:42:25.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:25.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.733 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:25.733 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:25.745 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:25.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:25.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:25.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:25.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:25.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:25.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:25.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:25.804 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:25.804 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:42:25.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:25.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.169 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:42:26.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:26.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:26.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:26.273 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:26.290 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:26.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:26.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:26.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:26.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:26.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:26.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:26.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:26.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:26.334 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:26.334 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:26.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:26.338 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:26.339 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:42:26.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.641 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:42:26.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:26.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:26.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:26.818 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:26.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:26.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:26.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:26.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:26.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:26.837 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:26.837 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:26.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:26.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:26.891 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:26.892 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:26.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:26.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.113 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:42:27.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:27.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:27.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:27.335 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:27.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:27.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.359 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:27.359 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:27.376 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:27.376 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:27.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:27.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.378 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:27.379 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:27.379 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:27.379 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:27.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:27.434 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:27.434 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:27.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.584 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:42:27.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:27.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:27.899 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:27.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:27.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:27.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:27.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:27.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:27.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:27.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:27.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:27.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:27.969 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:27.969 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:27.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:27.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:28.055 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:42:28.333 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:28.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:28.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:28.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:28.529 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:42:28.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:28.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:28.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:28.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:28.821 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:28.821 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:28.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:28.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:28.823 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:28.823 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:28.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:28.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:28.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:28.879 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:28.879 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:42:28.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:28.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.001 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:42:29.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:29.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:29.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:29.284 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:29.301 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:29.301 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:29.302 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:29.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:29.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:29.304 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:29.304 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:29.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:29.339 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:29.339 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:42:29.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.474 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:42:29.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:29.823 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:29.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:29.824 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:29.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:29.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:29.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:29.846 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.847 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:29.847 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:29.847 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:29.847 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:29.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:29.893 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:29.893 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:29.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:29.947 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:42:30.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:30.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:30.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:30.106 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:30.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:30.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:30.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:30.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:30.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:30.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:30.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:30.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:30.171 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:30.171 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:30.171 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.418 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:42:30.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:30.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.595 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:30.595 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:30.595 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:30.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:30.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:30.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:30.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:30.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:30.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:30.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:30.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:30.660 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:30.660 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:30.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:30.890 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:42:31.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:31.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.085 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:31.085 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:31.085 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:31.099 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:31.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:31.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:31.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:31.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:31.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:31.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:31.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:31.151 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:31.151 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:31.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.151 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.364 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:42:31.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:31.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:31.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:31.578 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:31.594 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:31.594 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:31.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:31.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:31.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:31.596 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:31.596 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:31.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:31.653 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:31.653 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:31.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:31.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:31.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:31.759 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:31.774 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:31.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:31.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:31.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.777 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:31.777 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:31.777 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:31.777 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:31.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:31.827 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:31.828 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:31.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:31.836 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:42:32.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:32.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.248 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:32.248 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:32.248 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:32.266 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:32.266 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:32.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:32.268 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.268 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:32.268 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:32.268 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:32.268 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:32.307 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:42:32.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:32.319 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:32.319 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:32.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:32.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:32.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:32.737 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:32.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:32.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:32.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:32.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.748 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:32.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:32.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:32.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:32.779 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:42:32.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:32.799 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:32.799 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:32.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:32.800 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:33.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:33.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:33.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:33.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:33.227 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:33.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:33.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:33.237 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:33.237 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:33.240 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:33.240 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:33.240 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:42:33.240 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:42:33.240 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:42:33.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:33.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:33.240 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:38.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:42:38.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:42:38.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:38.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:38.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:38.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:38.254 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:42:38.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:42:38.256 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:38.256 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:42:38.257 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:42:38.262 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:42:38.262 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:42:38.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:42:38.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:38.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:42:38.264 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:42:38.265 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:42:38.265 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:42:38.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:38.267 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:42:38.267 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:42:38.268 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:42:38.268 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:38.268 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:42:38.268 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:42:38.269 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:42:38.269 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:42:38.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:38.272 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:42:38.272 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:42:38.272 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:42:38.272 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:42:38.272 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:42:38.272 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:42:38.273 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:42:38.273 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:42:38.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:38.276 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:42:38.276 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:42:38.276 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:42:38.276 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:42:38.276 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:42:38.277 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:42:38.277 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:42:38.277 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:42:38.277 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:42:38.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:38.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:42:38.282 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:42:38.761 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:42:38.809 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:42:38.812 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:42:38.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:38.812 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:42:38.836 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:38.836 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:38.836 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:38.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:38.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:38.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:38.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:38.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:38.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:38.861 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:38.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:38.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:38.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:39.233 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:42:39.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:39.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:39.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:39.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:39.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:39.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:39.704 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:42:39.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:39.907 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:39.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:39.908 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:39.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:39.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:39.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:39.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:39.918 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:39.918 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:39.918 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:39.918 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:39.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:39.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:39.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:39.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:39.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:40.177 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:42:40.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:40.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:40.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:40.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:40.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:42:40.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:40.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:41.122 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:42:41.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:41.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:41.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:41.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:41.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:41.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:41.344 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:41.344 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:41.363 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:41.363 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:41.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:41.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:41.366 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:41.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:41.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:41.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:41.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:41.415 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:41.416 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:41.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:41.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:41.595 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:42:42.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:42.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:42.068 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:42:42.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:42.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:42.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:42.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:42.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:42.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:42.508 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:42.508 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:42.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:42.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:42.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:42.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:42.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:42.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:42.529 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:42.529 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:42.539 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:42:42.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:42.580 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:42.581 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:42.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:42.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:43.011 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:42:43.286 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:42:43.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:42:43.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:42:43.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:42:43.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:43.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:43.485 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:42:43.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:43.957 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:42:43.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:43.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:43.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:43.970 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:43.970 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:43.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:43.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:43.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:43.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:43.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:43.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:44.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:44.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:44.023 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:44.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:44.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:44.429 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:42:44.900 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:42:45.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:45.022 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:45.374 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:42:45.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:45.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:45.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:45.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:45.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:45.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:45.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:45.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:45.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:45.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:45.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:45.526 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:45.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:45.575 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:45.576 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:45.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:45.847 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:42:46.320 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:42:46.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:46.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:46.793 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:42:47.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:47.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:47.010 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:47.010 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:47.010 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:47.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:47.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:47.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:47.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:47.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:47.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:47.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:47.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:47.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:47.084 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:47.084 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:42:47.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:47.084 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:47.265 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:42:47.738 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:42:48.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:48.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:48.210 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:42:48.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:48.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:48.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:48.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:48.517 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:48.533 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:48.533 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:48.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:48.536 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:48.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:48.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:48.536 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:48.536 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:48.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:48.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:48.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:48.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:48.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:48.681 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:42:49.152 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:42:49.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:49.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:49.626 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:42:50.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:50.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:50.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:50.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:50.037 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:50.037 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:50.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:50.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:50.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:50.039 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:50.039 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:50.039 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:50.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:50.087 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:50.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:50.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:50.087 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:50.098 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:42:50.569 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:42:51.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:51.040 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:42:51.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:51.511 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:42:51.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:51.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:51.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:51.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:51.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:51.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:51.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:51.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:51.541 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:51.541 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:51.541 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:51.541 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:51.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:42:51.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:51.591 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:51.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:51.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:51.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:51.982 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:42:52.456 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:42:52.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:52.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:42:53.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:53.385 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:53.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:53.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:53.402 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:42:53.402 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:53.402 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:53.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:53.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:53.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:53.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:53.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:53.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:53.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:53.460 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:53.460 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:42:53.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:53.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:53.874 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:42:54.347 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:42:54.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:54.355 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:54.822 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:42:54.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:54.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:54.839 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:54.839 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:54.839 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:54.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:54.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:54.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:54.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:54.858 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:54.858 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:54.858 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:54.858 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:54.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:54.915 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:54.915 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:42:54.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:54.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:55.294 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:42:55.765 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:42:55.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:55.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:56.239 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:42:56.335 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:56.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:56.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:56.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:56.338 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:56.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:56.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:56.358 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:56.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:56.361 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:56.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:56.361 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:56.361 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:56.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:56.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:56.415 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:56.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:56.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:56.711 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:42:57.183 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:42:57.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:57.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:57.655 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:42:57.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:57.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:57.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:57.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:57.812 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:57.812 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=4218 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:57.830 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:57.830 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:57.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:57.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:57.832 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:57.832 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:57.832 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:57.832 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:57.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:57.887 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:57.887 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:57.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:57.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:58.128 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:42:58.600 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:42:58.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:58.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:59.072 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:42:59.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:59.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:59.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:59.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:59.248 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:42:59.248 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=4528 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:42:59.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:42:59.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:42:59.264 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:42:59.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:59.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:42:59.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:42:59.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:42:59.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:42:59.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:42:59.313 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:42:59.313 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:42:59.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:59.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:42:59.545 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:43:00.017 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:43:00.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:00.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:00.486 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:43:00.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:00.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:00.679 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:00.679 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:00.679 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:00.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:00.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:00.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:00.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:00.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:00.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:00.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:00.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:00.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:00.741 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:00.741 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:43:00.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:00.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:00.958 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:43:01.431 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:43:01.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:01.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:01.902 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:43:02.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:02.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:02.115 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:02.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:02.116 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:02.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:02.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:02.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:02.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:02.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:02.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:02.137 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:02.137 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:02.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:02.193 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:02.193 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:43:02.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:02.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:02.373 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:43:02.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:02.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:02.846 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:43:03.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:03.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:03.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:03.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:03.237 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:03.237 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=5391 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:03.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:03.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:03.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:03.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:03.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:03.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:03.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:03.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:03.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:03.299 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:03.299 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:43:03.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:03.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:03.319 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:43:03.791 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:43:04.200 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:04.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:04.265 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:43:04.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:04.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:04.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:04.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:04.674 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:04.692 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:04.692 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:04.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:04.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:04.695 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:04.695 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:04.695 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:04.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:04.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:04.737 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:43:04.743 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:04.743 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:43:04.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:04.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:05.208 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:43:05.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:05.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:05.680 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:43:06.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:06.109 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:06.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:06.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:06.110 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:06.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:06.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:06.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:06.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:06.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:06.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:06.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:06.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:06.153 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:43:06.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:06.184 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:06.184 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:43:06.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:06.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:06.625 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:43:07.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:07.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:07.097 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:43:07.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:07.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:07.547 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:07.547 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:07.547 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:07.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:07.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:07.558 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:07.558 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:07.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:43:07.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:43:07.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:43:07.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:43:07.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:43:07.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:43:07.560 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:07.560 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:12.566 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:43:12.566 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:43:12.566 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:43:12.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:43:12.566 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:43:12.566 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:43:12.574 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:43:12.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:43:12.575 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:43:12.575 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:43:12.575 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:43:12.578 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:43:12.579 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:43:12.579 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:43:12.579 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:43:12.579 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:43:12.580 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:43:12.580 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:43:12.580 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:43:12.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:12.581 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:43:12.581 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:43:12.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:43:12.581 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:43:12.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:43:12.581 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:43:12.581 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:43:12.581 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:43:12.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:12.583 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:43:12.583 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:43:12.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:43:12.583 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:43:12.583 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:43:12.583 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:43:12.583 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:43:12.584 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:43:12.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:43:12.586 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:43:12.586 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:43:12.586 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:43:12.587 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:12.591 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:43:13.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:43:13.112 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:43:13.114 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:43:13.115 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:43:13.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:13.132 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:13.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:13.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:13.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:13.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:13.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:13.139 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:13.139 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:13.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:13.171 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:13.172 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:13.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:13.172 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:13.540 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:43:13.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:13.589 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:13.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:13.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:14.012 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:43:14.485 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:43:14.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:14.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:14.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:14.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:14.958 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:43:15.430 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:43:15.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:15.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:15.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:15.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:15.904 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:43:16.376 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:43:16.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:16.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:16.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:16.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:16.848 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:43:17.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:17.051 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:17.051 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:17.052 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:17.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:17.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:17.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:17.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:17.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:17.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:17.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:17.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:17.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:17.125 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:17.125 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:17.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:17.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:17.321 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:43:17.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:43:17.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:43:17.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:43:17.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:43:17.794 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:43:18.266 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:43:18.737 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:43:19.210 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:43:19.683 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:43:20.155 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:43:20.626 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:43:21.099 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:43:21.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:21.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:21.318 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:21.318 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:21.318 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=1886 tn=3 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:43:21.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:21.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:21.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:21.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:21.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:21.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:21.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:21.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:21.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:21.388 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:21.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:21.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:21.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:21.571 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:43:22.043 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:43:22.514 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:43:22.987 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:43:23.460 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:43:23.932 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:43:24.403 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:43:24.876 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:43:25.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:25.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:25.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:25.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:25.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:25.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:25.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:25.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:25.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:25.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:25.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:25.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:25.348 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:43:25.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:25.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:25.384 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:25.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:25.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:25.820 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:43:26.294 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:43:26.766 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:43:27.238 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:43:27.709 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:43:28.183 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:43:28.655 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:43:29.127 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:43:29.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:29.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:29.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:29.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:29.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:29.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:29.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:29.600 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:43:29.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:29.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:29.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:29.602 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:29.602 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:29.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:29.651 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:29.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:29.652 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:29.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:30.073 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:43:30.546 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:43:31.019 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:43:31.492 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:43:31.965 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:43:32.438 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:43:32.911 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:43:33.383 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:43:33.856 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:43:34.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:34.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:34.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:34.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:34.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:34.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:34.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:34.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:34.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:34.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:34.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:34.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:34.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:34.329 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:43:34.331 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:34.331 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:43:34.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:34.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:34.801 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:43:35.275 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:43:35.748 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:43:36.221 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:43:36.694 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:43:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:43:37.640 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:43:38.113 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:43:38.586 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:43:38.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:38.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:38.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:38.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:38.663 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:38.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:38.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:38.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:38.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:38.681 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:38.681 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:38.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:38.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:38.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:38.731 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:38.732 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:43:38.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:38.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:39.058 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:43:39.530 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:43:40.003 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:43:40.474 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:43:40.946 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:43:41.418 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:43:41.891 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:43:42.364 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:43:42.836 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:43:43.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:43.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:43.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:43.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:43.059 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:43:43.077 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:43.077 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:43.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:43.080 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:43.081 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:43.081 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:43.081 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:43.081 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:43.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:43.132 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:43.132 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:43.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:43.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:43.308 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:43:43.781 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:43:44.253 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:43:44.725 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:43:45.196 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:43:45.667 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:43:46.138 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:43:46.609 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:43:47.079 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:43:47.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:47.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:47.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:47.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:47.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:47.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:47.462 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:47.465 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:47.465 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:47.465 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:47.465 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:47.465 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:47.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:47.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:47.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:47.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:47.552 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:43:48.025 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:43:48.497 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:43:48.968 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:43:49.439 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:43:49.912 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:43:50.385 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:43:50.858 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:43:51.331 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:43:51.804 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:43:51.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:51.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:51.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:51.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:51.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:51.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:51.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:51.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:51.866 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:51.866 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:51.866 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:51.866 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:51.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:43:51.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:51.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:51.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:51.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:51.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:52.276 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:43:52.747 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:43:53.221 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:43:53.693 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:43:54.165 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:43:54.639 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:43:55.111 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:43:55.584 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:43:56.057 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:43:56.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:56.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:56.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:56.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:56.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:43:56.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:43:56.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:43:56.133 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:56.133 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:43:56.133 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:43:56.133 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:43:56.133 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:43:56.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:43:56.184 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:43:56.184 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:43:56.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:56.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:43:56.529 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:43:57.001 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:43:57.475 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:43:57.949 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:43:58.421 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:43:58.892 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:43:59.366 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:43:59.838 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:44:00.311 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:44:00.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:00.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:00.455 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:00.455 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:00.455 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:00.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:00.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:00.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:00.475 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:00.475 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:00.475 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:00.475 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:00.475 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:00.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:00.523 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:00.523 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:44:00.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:00.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:00.782 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:44:01.256 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:44:01.730 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:44:02.201 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:44:02.674 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:44:03.148 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:44:03.622 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:44:04.095 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:44:04.569 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:44:04.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:04.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:04.859 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:04.859 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:04.859 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:04.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:04.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:04.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:04.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:04.882 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:04.882 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:04.882 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:04.882 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:04.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:04.931 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:04.931 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:04.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:04.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:05.041 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:44:05.512 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:44:05.986 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:44:06.458 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:44:06.930 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:44:07.402 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:44:07.876 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:44:08.348 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:44:08.822 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:44:08.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:08.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:08.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:08.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:08.977 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:08.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:08.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:08.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:08.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:08.995 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:08.995 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:08.995 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:08.995 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:09.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:09.045 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:09.045 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:09.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:09.046 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:09.294 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:44:09.765 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:44:10.238 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:44:10.711 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:44:11.183 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:44:11.657 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:44:12.129 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:44:12.601 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 02:44:13.075 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 02:44:13.245 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:13.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:13.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:13.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:13.249 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:13.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:13.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:13.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:13.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:13.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:13.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:13.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:13.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:13.336 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:13.345 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:13.345 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:13.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:13.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:13.547 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 02:44:14.019 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 02:44:14.491 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 02:44:14.964 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 02:44:15.437 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 02:44:15.909 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 02:44:16.382 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 02:44:16.854 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 02:44:17.327 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 02:44:17.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:17.519 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:17.520 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:17.520 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:17.520 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:17.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:17.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:17.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:17.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:17.538 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:17.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:17.538 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:17.538 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:17.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:17.589 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:17.589 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:17.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:17.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:17.799 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 02:44:18.271 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 02:44:18.743 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 02:44:19.216 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 02:44:19.688 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 02:44:20.160 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 02:44:20.634 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 02:44:21.106 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 02:44:21.580 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 02:44:21.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:21.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:21.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:21.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:21.791 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:21.808 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:21.808 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:21.808 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:21.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:21.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:21.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:21.811 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:21.811 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:21.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:21.865 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:21.866 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:21.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:21.866 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:22.052 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 02:44:22.524 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 02:44:22.997 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 02:44:23.469 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 02:44:23.941 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 02:44:24.413 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 02:44:24.887 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 02:44:25.358 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 02:44:25.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:25.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:25.752 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:25.752 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:25.752 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:25.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:25.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:25.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:25.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:25.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:25.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:25.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:25.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:25.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:25.829 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 02:44:25.836 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:25.837 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:25.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:25.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:26.301 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 02:44:26.774 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 02:44:27.247 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 02:44:27.719 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 02:44:28.193 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 02:44:28.666 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 02:44:29.138 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 02:44:29.611 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 02:44:30.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:30.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:30.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:30.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:30.021 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:30.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:30.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:30.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:30.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:30.043 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:30.043 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:30.043 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:30.043 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 02:44:30.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:30.091 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:30.091 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:30.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:30.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 02:44:31.027 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 02:44:31.500 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 02:44:31.972 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 02:44:32.444 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 02:44:32.917 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 02:44:33.390 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 02:44:33.862 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 02:44:34.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:34.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:34.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:34.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:34.292 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:34.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:34.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:34.313 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:34.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:34.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:34.317 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:34.317 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:34.317 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:34.334 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 02:44:34.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:34.374 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:44:34.374 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:44:34.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:34.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:34.807 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 02:44:35.279 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 02:44:35.751 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 02:44:36.224 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 02:44:36.696 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 02:44:37.168 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 02:44:37.639 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 02:44:38.114 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 02:44:38.561 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:38.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:38.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:38.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:38.565 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:44:38.578 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:38.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:38.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:38.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:38.580 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:44:38.580 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:44:38.580 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:44:38.580 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:44:38.580 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:44:38.580 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:44:38.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:38.580 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:44:43.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:44:43.586 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:44:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:44:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:44:43.586 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:44:43.586 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:44:43.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:44:43.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:44:43.596 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:43.596 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:44:43.596 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:44:43.601 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:44:43.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:44:43.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:44:43.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:43.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:44:43.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:44:43.604 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:44:43.604 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:44:43.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:43.606 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:44:43.606 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:44:43.606 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:44:43.606 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:43.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:44:43.607 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:44:43.607 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:44:43.607 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:44:43.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:43.609 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:44:43.609 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:44:43.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:44:43.609 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:43.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:44:43.609 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:44:43.609 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:44:43.609 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:44:43.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:44:43.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:44:43.613 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:44:43.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:43.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:44:43.614 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:44:43.614 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:43.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:44:48.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:44:48.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:44:48.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:44:48.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:44:48.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:44:48.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:44:48.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:44:48.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:48.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:44:48.631 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:44:48.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:44:48.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:44:48.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:44:48.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:48.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:44:48.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:44:48.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:44:48.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:44:48.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:48.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:44:48.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:44:48.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:44:48.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:48.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:44:48.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:44:48.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:44:48.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:44:48.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:48.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:44:48.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:44:48.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:44:48.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:44:48.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:44:48.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:44:48.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:44:48.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:44:48.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.641 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:44:48.641 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:44:48.641 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:44:48.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:44:48.646 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:44:49.124 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:44:49.169 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:44:49.171 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:44:49.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:49.173 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:44:49.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:49.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:49.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:49.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:49.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:49.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:49.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:49.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:49.219 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:49.226 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:49.227 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:49.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:49.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:49.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:44:49.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:49.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:49.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:49.645 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:50.067 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:44:50.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:44:50.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:50.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:50.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:50.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:51.011 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:44:51.484 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:44:51.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:51.647 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:51.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:51.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:51.956 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:44:52.429 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:44:52.647 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:52.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:52.901 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:44:53.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:53.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:53.272 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:53.272 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:53.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:53.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:53.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:53.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:53.284 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:53.284 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:53.284 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:53.284 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:53.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:53.335 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:53.336 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:53.336 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:53.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:53.373 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:44:53.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:44:53.664 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:44:53.665 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:44:53.665 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:44:53.844 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:44:54.318 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:44:54.790 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:44:55.262 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:44:55.733 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:44:56.207 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:44:56.679 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:44:57.151 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:44:57.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:57.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:57.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:57.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:57.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:44:57.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:44:57.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:44:57.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:57.558 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:57.558 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:57.558 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:44:57.558 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:44:57.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:44:57.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:44:57.607 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:44:57.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:57.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:44:57.624 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:44:58.097 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:44:58.569 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:44:59.040 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:44:59.511 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:44:59.981 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:45:00.452 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:45:00.926 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:45:01.398 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:45:01.870 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:45:02.005 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:02.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:02.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:02.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:02.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:02.030 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:02.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:02.033 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:02.033 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:02.033 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:02.033 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:02.033 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:02.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:02.086 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:02.087 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:02.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:02.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:02.341 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:45:02.812 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:45:03.285 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:45:03.758 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:45:04.230 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:45:04.701 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:45:05.175 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:45:05.647 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:45:06.119 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:45:06.267 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:06.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:06.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:06.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:06.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:06.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:06.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:06.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:06.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:06.278 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:06.278 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:06.278 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:06.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:06.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:06.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:06.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:06.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:06.590 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:45:07.063 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:45:07.536 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:45:08.008 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:45:08.479 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:45:08.950 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:45:09.424 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:45:09.896 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:45:10.368 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:45:10.842 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:45:10.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:10.898 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:10.898 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:10.898 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:10.916 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:10.916 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:10.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:10.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:10.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:10.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:10.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:10.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:10.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:10.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:10.967 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:45:10.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:10.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:11.315 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:45:11.787 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:45:12.261 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:45:12.733 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:45:13.206 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:45:13.680 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:45:14.152 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:45:14.625 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:45:15.097 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:45:15.570 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:45:15.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:15.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:15.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:15.778 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:15.778 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:15.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:15.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:15.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:15.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:15.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:15.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:15.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:15.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:15.836 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:15.843 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:15.844 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:45:15.844 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:15.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:16.042 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:45:16.515 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:45:16.988 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:45:17.461 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:45:17.935 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:45:18.407 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:45:18.879 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:45:19.353 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:45:19.824 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:45:20.297 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:45:20.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:20.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:20.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:20.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:20.656 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:20.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:20.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:20.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:20.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:20.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:20.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:20.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:20.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:20.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:45:20.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:20.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:20.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:20.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:20.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:20.770 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:45:21.243 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:45:21.716 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:45:22.188 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:45:22.661 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:45:23.132 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:45:23.605 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:45:24.077 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:45:24.549 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:45:25.021 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:45:25.494 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:45:25.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:25.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:25.537 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:25.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:25.537 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=7968 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:45:25.554 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:25.555 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:25.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:25.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:25.557 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:25.557 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:25.557 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:25.557 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:25.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:25.607 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:25.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:25.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:25.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:25.966 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:45:26.438 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:45:26.912 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:45:27.384 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:45:27.857 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:45:28.328 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:45:28.801 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:45:29.274 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:45:29.746 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:45:30.217 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:45:30.412 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:30.415 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:30.415 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:30.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:30.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:30.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:30.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:30.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:30.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:30.430 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:30.430 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:30.430 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:30.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:45:30.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:30.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:30.484 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:30.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:30.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:30.687 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:45:31.158 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:45:31.629 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:45:32.103 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:45:32.575 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:45:33.047 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:45:33.518 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:45:33.991 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:45:34.464 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:45:34.936 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:45:35.158 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:35.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:35.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:35.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:35.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:35.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:35.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:35.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:35.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:35.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:35.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:35.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:35.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:35.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:35.233 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:45:35.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:35.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:35.407 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:45:35.880 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:45:36.353 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:45:36.824 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:45:37.298 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:45:37.770 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:45:38.242 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:45:38.715 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:45:39.189 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:45:39.659 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:45:39.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:39.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:39.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:39.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:39.981 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:39.998 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:39.998 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:39.998 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:40.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:40.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:40.000 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:40.000 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:40.000 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:40.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:40.051 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:40.051 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:45:40.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:40.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:40.132 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:45:40.604 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:45:41.078 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:45:41.550 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:45:42.023 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:45:42.496 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:45:42.968 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:45:43.440 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:45:43.913 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:45:44.386 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:45:44.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:44.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:44.857 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:44.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:44.858 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:44.860 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:45:44.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:44.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:44.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:44.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:44.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:44.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:44.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:44.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:44.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:44.927 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:44.927 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:45:44.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:44.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:45.333 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:45:45.805 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:45:46.279 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:45:46.751 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:45:47.224 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:45:47.697 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:45:48.169 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:45:48.641 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 02:45:48.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:48.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:48.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:48.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:48.962 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:48.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:48.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:48.980 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:48.982 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:48.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:48.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:48.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:48.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:49.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:49.031 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:49.031 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:45:49.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:49.032 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:49.112 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 02:45:49.585 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 02:45:50.057 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 02:45:50.530 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 02:45:51.003 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 02:45:51.475 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 02:45:51.948 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 02:45:52.421 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 02:45:52.893 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 02:45:53.232 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:53.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:53.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:53.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:53.235 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:53.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:53.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:53.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:53.258 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:53.258 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:53.258 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:53.258 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:53.258 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:53.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:53.309 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:53.309 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:45:53.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:53.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:53.365 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 02:45:53.836 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 02:45:54.310 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 02:45:54.782 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 02:45:55.255 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 02:45:55.728 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 02:45:56.200 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 02:45:56.672 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 02:45:57.145 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 02:45:57.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:57.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:57.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:57.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:57.505 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:45:57.524 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:45:57.524 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:45:57.524 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:45:57.527 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:57.527 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:45:57.527 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:45:57.527 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:45:57.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:45:57.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:45:57.579 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:45:57.579 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:45:57.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:57.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:45:57.618 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 02:45:58.090 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 02:45:58.563 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 02:45:59.036 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 02:45:59.509 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 02:45:59.982 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 02:46:00.455 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 02:46:00.928 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 02:46:01.400 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 02:46:01.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:01.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:01.775 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:01.775 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:01.775 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:01.794 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:01.794 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:01.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:01.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:01.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:01.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:01.796 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:01.796 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:01.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:01.851 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:01.852 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:01.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:01.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:01.872 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 02:46:02.344 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 02:46:02.818 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 02:46:03.290 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 02:46:03.763 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 02:46:04.236 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 02:46:04.708 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 02:46:05.182 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 02:46:05.654 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 02:46:06.126 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 02:46:06.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:06.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:06.213 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:06.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:06.213 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:06.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:06.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:06.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:06.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:06.234 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:06.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:06.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:06.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:06.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:06.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:06.284 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:06.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:06.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:06.597 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 02:46:07.071 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 02:46:07.543 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 02:46:08.017 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 02:46:08.489 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 02:46:08.962 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 02:46:09.434 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 02:46:09.907 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 02:46:10.379 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 02:46:10.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:10.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:10.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:10.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:10.484 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:10.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:10.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:10.490 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:10.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:10.492 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:10.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:10.492 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:10.492 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:10.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:10.543 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:10.543 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:10.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:10.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:10.852 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 02:46:11.325 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 02:46:11.797 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 02:46:12.270 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 02:46:12.742 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 02:46:13.214 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 02:46:13.686 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 02:46:14.159 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 02:46:14.631 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-06 02:46:14.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:14.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:14.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:14.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:14.757 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:14.758 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=18593 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:14.777 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:14.777 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:14.777 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:14.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:14.780 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:14.780 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:14.780 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:14.780 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:14.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:14.831 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:14.831 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:14.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:14.832 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:15.103 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-06 02:46:15.575 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-06 02:46:16.049 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-06 02:46:16.521 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-06 02:46:16.994 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-06 02:46:17.466 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-06 02:46:17.938 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-06 02:46:18.410 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-06 02:46:18.883 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-06 02:46:19.021 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:19.023 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:19.023 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:19.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:19.024 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:19.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:19.037 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:19.041 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:19.042 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:46:19.042 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:46:19.042 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:46:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:19.042 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:19.042 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:19.043 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:19.043 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:19.043 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:19.043 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:19.043 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:19.043 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=19519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:24.044 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:46:24.044 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:46:24.044 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:24.044 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:24.044 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:24.044 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:24.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:24.057 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:46:24.057 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:24.058 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:46:24.058 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:46:24.062 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:46:24.063 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:46:24.063 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:46:24.063 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:24.064 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:24.064 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:46:24.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:46:24.065 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:46:24.065 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:24.067 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:46:24.067 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:46:24.067 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:46:24.067 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:24.068 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:24.068 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:46:24.068 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:46:24.069 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:46:24.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:24.070 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:46:24.070 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:46:24.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:46:24.071 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:24.071 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:24.071 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:46:24.071 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:46:24.071 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:46:24.071 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:24.074 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:46:24.074 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:46:24.074 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:46:24.074 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:46:24.074 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:46:24.075 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:46:24.075 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:46:24.075 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:24.075 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:46:24.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:46:24.076 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:24.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:46:29.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:46:29.085 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:29.105 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:29.105 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:29.105 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:29.108 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:29.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:46:29.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:29.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:46:29.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:46:29.116 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:46:29.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:46:29.117 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:46:29.117 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:29.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:29.118 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:46:29.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:46:29.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:46:29.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:29.122 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:46:29.122 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:46:29.122 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:46:29.123 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:29.123 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:29.124 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:46:29.124 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:46:29.124 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:46:29.124 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:29.126 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:46:29.126 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:46:29.126 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:46:29.126 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:29.126 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:29.127 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:46:29.127 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:46:29.127 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:46:29.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:29.130 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:46:29.130 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:46:29.130 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:46:29.130 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:46:29.130 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:46:29.131 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:46:29.131 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:46:29.131 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.131 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:29.136 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:46:29.615 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:46:29.665 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:46:29.668 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:46:29.670 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:46:29.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:29.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:29.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:29.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:29.698 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:29.698 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:29.698 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:29.698 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:29.698 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:29.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:29.721 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:29.722 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:29.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:29.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:30.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:46:30.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:30.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:30.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:30.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:30.561 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:46:30.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:30.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:30.761 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:30.761 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:30.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:30.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:30.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:30.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:30.783 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:30.783 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:30.783 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:30.783 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:30.828 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:30.837 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:30.837 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:30.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:30.838 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:46:31.135 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:31.136 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:31.136 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:31.136 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:31.505 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:46:31.979 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:46:32.136 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:32.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:32.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:32.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:32.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:32.212 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:32.213 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:32.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:32.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:32.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:32.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:32.215 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:32.215 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:32.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:32.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:32.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:32.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:32.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:32.451 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:46:32.923 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:46:33.137 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:33.137 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:33.138 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:33.138 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:33.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:33.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:33.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:33.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:33.362 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=913 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:33.362 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=913 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:33.381 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:33.381 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:33.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:33.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:33.383 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:33.383 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:33.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:33.384 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:33.394 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:46:33.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:33.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:33.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:33.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:33.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:33.865 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:46:34.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:34.139 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:34.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:34.139 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:34.336 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:46:34.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:34.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:34.793 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:34.793 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:34.809 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:46:34.812 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:34.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:34.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:34.815 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:34.815 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:34.815 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:34.815 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:34.815 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:34.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:34.863 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:34.864 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:34.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:34.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:35.282 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:46:35.754 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:46:35.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:35.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:35.875 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:35.875 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:35.875 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=1456 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:35.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:35.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:35.884 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:35.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:35.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:35.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:35.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:35.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:35.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:35.936 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:35.936 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:46:35.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:35.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:36.225 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:46:36.699 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:46:36.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:36.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:36.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:36.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:36.895 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:36.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:36.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:36.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:36.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:36.916 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:36.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:36.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:36.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:36.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:36.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:36.967 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:46:36.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:36.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:37.171 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:46:37.643 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:46:37.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:37.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:37.921 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:37.922 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:37.922 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:37.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:37.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:37.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:37.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:37.939 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:37.939 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:37.939 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:37.939 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:37.984 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:37.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:37.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:37.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:37.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:37.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:38.116 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:46:38.589 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:46:38.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:38.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:38.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:38.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:38.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:38.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:38.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:38.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:38.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:38.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:38.969 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:38.969 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:39.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:39.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:39.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:39.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:39.020 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:39.061 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:46:39.532 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:46:39.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:39.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:39.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:39.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:39.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:39.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:39.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:39.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:39.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:39.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:39.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:39.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:40.005 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:46:40.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:40.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:40.039 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:40.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:40.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:40.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:40.478 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:46:40.950 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:46:41.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:41.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:41.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:41.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:41.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:41.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:41.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:41.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:41.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:41.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:41.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:41.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:41.421 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:41.423 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:46:41.429 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:41.429 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:46:41.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:41.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:41.896 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:46:42.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:42.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:42.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:42.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:42.319 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:42.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:42.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:42.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:42.340 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:42.340 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:42.340 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:42.340 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:42.340 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:42.368 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:46:42.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:42.392 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:42.392 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:46:42.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:42.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:42.841 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:46:43.314 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:46:43.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:43.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:43.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:43.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:43.345 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:43.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:43.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:43.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:43.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:43.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:43.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:43.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:43.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:43.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:43.416 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:43.416 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:43.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:43.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:43.786 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:46:44.258 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:46:44.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:44.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:44.417 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:44.417 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:44.417 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:44.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:44.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:44.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:44.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:44.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:44.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:44.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:44.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:44.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:44.483 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:44.483 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:44.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:44.484 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:44.730 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:46:45.203 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:46:45.675 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:46:45.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:45.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:45.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:45.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:45.851 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:45.860 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:45.860 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:45.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:45.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:45.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:45.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:45.862 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:45.862 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:45.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:45.917 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:45.918 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:45.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:45.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:46.148 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:46:46.621 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:46:47.094 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:46:47.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:47.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:47.287 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:47.287 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:47.287 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:47.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:47.306 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:47.306 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:47.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:47.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:47.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:47.309 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:47.309 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:47.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:47.363 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:47.363 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:47.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:47.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:47.566 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:46:48.038 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:46:48.510 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:46:48.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:48.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:48.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:48.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:48.725 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:48.739 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:48.739 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:48.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:48.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:48.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:48.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:48.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:48.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:48.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:48.800 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:48.801 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:48.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:48.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:48.982 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:46:49.454 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:46:49.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:49.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:49.845 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:49.845 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:49.846 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:49.864 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:49.864 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:49.864 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:49.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:49.867 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:49.867 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:49.867 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:49.867 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:49.924 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:49.926 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:46:49.931 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:49.932 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:49.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:49.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:50.398 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:46:50.870 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:46:51.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:51.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:51.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:51.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:51.282 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:51.297 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:51.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:51.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:51.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:51.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:51.301 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:51.301 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:51.301 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:51.342 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:46:51.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:51.353 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:51.353 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:51.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:51.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:51.815 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:46:52.287 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:46:52.715 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:52.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:52.718 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:52.718 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:52.718 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:52.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:52.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:52.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:52.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:52.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:52.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:52.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:52.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:52.758 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:46:52.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:52.787 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:46:52.788 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:46:52.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:52.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:53.230 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:46:53.703 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:46:54.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:54.168 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:54.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:54.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:54.169 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:46:54.176 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:46:54.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:54.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:54.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:54.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:54.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:54.184 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:46:54.184 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:46:54.184 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:54.184 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:46:59.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:46:59.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:46:59.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:59.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:59.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:59.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:59.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:46:59.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:46:59.198 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:59.198 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:46:59.198 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:46:59.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:46:59.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:46:59.202 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:46:59.202 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:59.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:46:59.202 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:46:59.203 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:46:59.203 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:46:59.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:46:59.204 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:46:59.204 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:46:59.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:46:59.206 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:46:59.206 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:46:59.206 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:46:59.206 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:46:59.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:46:59.206 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:46:59.207 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:46:59.207 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:46:59.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.209 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:46:59.209 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:46:59.209 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:46:59.210 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:46:59.214 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:46:59.692 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:46:59.730 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:46:59.732 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:46:59.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:46:59.734 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:46:59.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:46:59.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:46:59.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:46:59.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:59.754 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:59.755 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:59.755 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:46:59.755 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:46:59.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:46:59.792 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:46:59.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:46:59.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:46:59.794 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:00.165 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:47:00.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:00.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:00.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:00.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:00.636 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:47:01.110 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:47:01.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:01.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:01.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:01.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:01.582 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:47:02.054 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:47:02.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:02.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:02.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:02.214 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:02.528 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:47:02.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:03.001 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:47:03.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:03.214 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:03.214 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:03.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:03.473 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:47:03.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:03.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:03.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:03.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:03.547 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=936 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:03.547 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=936 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:03.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:03.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:03.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:03.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:03.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:03.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:03.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:03.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:03.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:03.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:03.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:03.947 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:47:04.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:04.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:04.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:04.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:04.419 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:47:04.891 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:47:05.365 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:47:05.837 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:47:06.310 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:47:06.568 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:06.781 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:47:07.254 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:47:07.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:07.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:07.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:07.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:07.419 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:07.419 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:07.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:07.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:07.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:07.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:07.421 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:07.421 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:07.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:07.470 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:07.470 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:47:07.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:07.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:07.726 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:47:08.198 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:47:08.672 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:47:09.144 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:47:09.616 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:47:10.090 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:47:10.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:10.563 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:47:11.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:11.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:11.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:11.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:11.019 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:11.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:11.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:11.020 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:11.020 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:11.020 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:11.020 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:11.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:11.035 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:47:11.036 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:11.036 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:47:11.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:11.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:11.508 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:47:11.981 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:47:12.453 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:47:12.927 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:47:13.401 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:47:13.874 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:47:14.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:14.348 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:47:14.821 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:47:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:14.877 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:14.877 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:14.877 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:14.877 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:14.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:14.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:14.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:14.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:14.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:14.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:14.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:14.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:14.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:14.948 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:14.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:14.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:14.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:15.292 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:47:15.765 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:47:16.237 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:47:16.709 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:47:17.181 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:47:17.654 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:47:18.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:18.126 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:47:18.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:18.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:18.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:18.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:18.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:18.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:18.567 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:18.568 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:18.568 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:18.568 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:18.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:18.598 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:47:18.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:18.600 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:18.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:18.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:19.069 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:47:19.543 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:47:20.015 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:47:20.487 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:47:20.961 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:47:21.433 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:47:21.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:21.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:21.873 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:21.873 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:21.873 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:21.892 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:21.892 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:21.892 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:21.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:21.894 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:21.894 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:21.894 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:21.894 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:21.905 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:47:21.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:21.941 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:21.941 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:47:21.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:21.942 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:22.376 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:47:22.850 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:47:23.322 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:47:23.794 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:47:24.266 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:47:24.740 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:47:25.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:25.212 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:47:25.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:25.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:25.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:25.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:25.606 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:25.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:25.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:25.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:25.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:25.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:25.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:25.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:25.633 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:25.633 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:47:25.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:25.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:25.686 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:47:26.158 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:47:26.630 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:47:27.103 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:47:27.575 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:47:28.047 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:47:28.520 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:47:28.661 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:28.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:28.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:28.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:28.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:28.913 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:28.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:28.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:28.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:28.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:28.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:47:28.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:47:28.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:47:28.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:47:28.930 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:47:28.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:47:28.931 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:47:28.931 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:28.931 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:28.931 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:28.931 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:28.931 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:28.931 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:28.932 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:33.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:47:33.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:47:33.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:47:33.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:47:33.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:47:33.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:47:33.940 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:47:33.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:47:33.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:47:33.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:47:33.942 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:47:33.944 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:47:33.945 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:47:33.945 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:47:33.945 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:47:33.945 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:47:33.946 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:47:33.946 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:47:33.946 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:47:33.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:33.947 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:47:33.947 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:47:33.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:47:33.947 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:47:33.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:47:33.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:47:33.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:47:33.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:47:33.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:33.949 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:47:33.949 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:47:33.949 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:47:33.949 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:47:33.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:47:33.949 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:47:33.950 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:47:33.950 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:47:33.950 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:47:33.952 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:47:33.952 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:47:33.952 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.952 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:47:33.957 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:47:34.437 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:47:34.474 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:47:34.476 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:47:34.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:34.478 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:47:34.492 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:34.492 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:34.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:34.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:34.498 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:34.499 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:34.499 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:34.499 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:34.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:34.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:34.538 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:34.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:34.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:34.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:47:34.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:34.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:34.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:34.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:35.383 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:47:35.855 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:47:35.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:35.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:35.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:35.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:36.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:47:36.801 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:47:36.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:36.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:36.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:36.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:37.274 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:47:37.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:37.746 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:47:37.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:37.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:37.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:37.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:38.217 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:47:38.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:38.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:38.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:38.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:38.292 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=936 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:38.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:38.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:38.292 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:38.292 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:38.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:38.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:38.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:38.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:38.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:38.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:38.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:38.691 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:47:38.960 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:47:38.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:47:38.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:47:38.960 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:47:39.164 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:47:39.636 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:47:40.107 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:47:40.578 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:47:41.051 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:47:41.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:41.524 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:47:41.996 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:47:42.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:42.144 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:42.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:42.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:42.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:42.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:42.146 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:42.146 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:42.146 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:42.146 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:42.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:42.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:42.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:42.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:42.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:42.470 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:47:42.942 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:47:43.415 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:47:43.888 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:47:44.361 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:47:44.833 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:47:45.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:45.307 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:47:45.779 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:47:46.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:46.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:46.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:46.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:46.003 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=2600 tn=6 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:46.003 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=2600 tn=7 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:46.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:46.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:46.004 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:46.004 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:46.005 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:46.005 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:46.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:46.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:46.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:46.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:46.017 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:46.252 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:47:46.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:46.723 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:47:46.960 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:46.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:46.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:46.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:46.963 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=2808 tn=5 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:47:46.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:46.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:46.981 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:46.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:46.983 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:46.983 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:46.983 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:46.983 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:47.032 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:47.036 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:47.036 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:47:47.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:47.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:47.195 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:47:47.668 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:47:48.140 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:47:48.614 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:47:49.086 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:47:49.559 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:47:50.033 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:47:50.044 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:50.506 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:47:50.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:50.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:50.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:50.580 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:50.581 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:50.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:50.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:50.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:50.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:50.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:50.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:50.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:50.598 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:50.599 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:47:50.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:50.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:50.980 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:47:51.452 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:47:51.925 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:47:52.398 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:47:52.871 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:47:53.341 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:47:53.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:53.815 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:47:54.287 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:47:54.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:54.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:54.437 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:54.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:54.438 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:54.438 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:54.439 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:54.439 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:54.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:54.440 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:54.440 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:54.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:54.473 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:54.474 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:47:54.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:54.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:54.760 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:47:55.234 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:47:55.706 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:47:56.178 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:47:56.650 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:47:57.124 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:47:57.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:57.597 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:47:58.068 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:47:58.286 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:58.289 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:58.289 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:58.290 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:58.290 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:58.290 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:58.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:58.291 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:58.291 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:58.292 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:58.292 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:58.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:58.303 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:47:58.303 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:47:58.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:58.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:58.542 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:47:58.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:59.014 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:47:59.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:47:59.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:59.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:59.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:59.255 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:47:59.274 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:47:59.274 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:47:59.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:47:59.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:59.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:59.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:59.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:47:59.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:47:59.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:47:59.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:47:59.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:47:59.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:59.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:47:59.486 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:47:59.959 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:48:00.431 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:48:00.902 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:48:01.373 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:48:01.846 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:48:02.318 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:48:02.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:02.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:02.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:02.759 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:02.759 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:02.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:02.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:02.759 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:02.760 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:02.760 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:02.760 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:02.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:02.790 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:48:02.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:02.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:02.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:02.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:03.261 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:48:03.732 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:48:04.206 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:48:04.678 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:48:05.150 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:48:05.621 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:48:05.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:06.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:06.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:06.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:06.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:06.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:06.092 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:48:06.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:06.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:06.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:06.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:06.566 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:48:07.038 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:48:07.510 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:48:07.983 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:48:08.456 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:48:08.928 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:48:09.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:09.364 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:09.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:09.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:09.367 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:09.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:09.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:09.368 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:09.368 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:09.368 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:09.368 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:09.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:09.399 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:48:09.400 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:09.400 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:09.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:09.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:09.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:09.870 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:48:10.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:10.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:10.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:10.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:10.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:10.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:10.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:10.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:10.328 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:10.328 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:10.328 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:10.328 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:10.340 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:48:10.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:10.377 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:48:10.377 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:48:10.377 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:10.378 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:10.812 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:48:11.286 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:48:11.759 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:48:12.232 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:48:12.705 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:48:13.179 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:48:13.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:13.651 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:48:14.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:14.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:14.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:14.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:14.044 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:48:14.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:14.044 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:14.044 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:14.045 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:14.045 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:14.045 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:14.069 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:14.072 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:48:14.072 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:48:14.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:14.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:14.125 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:48:14.598 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:48:15.071 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:48:15.544 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:48:16.015 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:48:16.487 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:48:16.960 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:48:17.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:17.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:17.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:17.351 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:17.351 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:17.351 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:48:17.351 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:17.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:17.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:17.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:17.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:17.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:17.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:17.378 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:48:17.378 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:48:17.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:17.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:17.433 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:48:17.905 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:48:18.376 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:48:18.850 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:48:19.322 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:48:19.796 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:48:20.268 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:48:20.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:20.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:20.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:20.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:20.663 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:20.663 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:48:20.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:20.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:20.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:20.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:20.665 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:20.665 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:20.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:48:20.690 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:48:20.690 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:48:20.690 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:20.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:20.740 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:48:21.213 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:48:21.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:21.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:21.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:21.605 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:21.605 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:21.606 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:48:21.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:21.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:21.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:21.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:21.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:21.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:21.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:21.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:21.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:48:21.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:48:21.612 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:48:26.619 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:48:26.620 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:48:26.620 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:26.620 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:26.620 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:26.620 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:26.626 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:26.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:48:26.627 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:26.627 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:48:26.627 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:48:26.630 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:48:26.630 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:48:26.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:48:26.631 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:26.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:26.631 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:48:26.631 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:48:26.631 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:48:26.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:48:26.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:48:26.634 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:48:26.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:26.637 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:48:26.637 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:48:26.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:48:26.637 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:26.637 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:26.637 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:48:26.637 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:48:26.637 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:48:26.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:26.641 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:48:26.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:48:26.641 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:48:26.641 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:48:26.641 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:48:26.641 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:48:26.642 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:48:26.642 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:48:26.642 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:26.647 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:48:27.126 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:48:27.174 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:48:27.177 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:48:27.179 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:48:27.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:27.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:27.186 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:27.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:27.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:27.189 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:27.189 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:27.189 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:27.189 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:27.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:48:27.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:27.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:28.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:48:28.535 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:48:28.648 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:28.648 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:28.648 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:28.648 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:29.006 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:48:29.477 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:48:29.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:29.649 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:29.649 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:29.650 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:48:30.420 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:48:30.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:30.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:30.889 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:48:31.360 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:48:31.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:31.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:31.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:31.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:31.830 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:48:32.301 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:48:32.772 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:48:33.242 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:48:33.713 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:48:34.184 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:48:34.655 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:48:35.126 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:48:35.597 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:48:35.954 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:35.954 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:35.959 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:35.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:35.959 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:35.959 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:35.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:35.963 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:35.963 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:35.963 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:35.963 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:48:35.963 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:48:35.963 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:48:35.964 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:35.964 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:35.964 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:35.964 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:35.964 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:35.964 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2019 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:40.970 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:48:40.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:48:40.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:40.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:40.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:40.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:40.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:40.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:48:40.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:40.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:48:40.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:48:40.986 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:48:40.986 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:48:40.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:48:40.986 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:40.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:40.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:48:40.987 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:48:40.987 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:48:40.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:40.990 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:48:40.990 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:48:40.990 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:48:40.990 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:40.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:40.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:48:40.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:48:40.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:48:40.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:40.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:48:40.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:48:40.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:48:40.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:40.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:40.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:48:40.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:48:40.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:48:40.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.997 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:48:40.997 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:48:40.997 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:48:40.997 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:40.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:41.002 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:48:41.479 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:48:41.527 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:48:41.529 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:48:41.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:41.531 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:48:41.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:41.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:41.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:41.535 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:41.536 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:41.536 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:41.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:41.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:41.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:48:41.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:42.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:42.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:42.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:42.423 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:48:42.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:48:43.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:43.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:43.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:43.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:43.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:48:43.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:48:44.002 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:44.002 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:44.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:44.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:44.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:48:44.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:48:45.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:45.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:45.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:45.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:45.243 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:48:45.713 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:48:46.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:46.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:46.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:46.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:46.184 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:48:46.655 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:48:47.125 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:48:47.596 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:48:48.067 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:48:48.537 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:48:49.009 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:48:49.479 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:48:49.950 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:48:50.298 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:50.298 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:50.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:50.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:50.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:50.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:50.308 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:50.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:50.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:50.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:50.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:48:50.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:48:50.309 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:48:50.309 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2017 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:50.310 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2018 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:48:55.310 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:48:55.310 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:48:55.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:55.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:55.310 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:55.310 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:55.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:48:55.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:48:55.321 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:55.321 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:48:55.321 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:48:55.326 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:48:55.326 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:48:55.326 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:48:55.326 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:55.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:48:55.327 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:48:55.327 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:48:55.327 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:48:55.327 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:55.331 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:48:55.331 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:48:55.331 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:48:55.331 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:55.331 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:48:55.331 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:48:55.332 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:48:55.332 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:48:55.332 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:55.335 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:48:55.335 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:48:55.335 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:48:55.335 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:48:55.336 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:48:55.336 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:48:55.336 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:48:55.336 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:48:55.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:48:55.341 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:48:55.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:48:55.342 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:48:55.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:48:55.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:48:55.824 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:48:55.871 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:48:55.873 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:48:55.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:48:55.877 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:48:55.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:48:55.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:48:55.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:48:56.296 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:48:56.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:56.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:56.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:56.770 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:48:56.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:48:56.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:48:56.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:48:56.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:48:56.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:48:57.242 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:48:57.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:57.346 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:57.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:57.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:57.710 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:48:58.179 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:48:58.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:58.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:58.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:58.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:58.651 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:48:59.118 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:48:59.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:48:59.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:48:59.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:48:59.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:48:59.590 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:49:00.060 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:49:00.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:00.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:00.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:00.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:00.531 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:49:01.004 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:49:01.473 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:49:01.946 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:49:02.415 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:49:02.887 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:49:03.355 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:49:03.826 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:49:04.297 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:49:04.766 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:49:05.234 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:49:05.705 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:49:06.176 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:49:06.649 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:49:07.122 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:49:07.593 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:49:08.065 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:49:08.538 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:49:08.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:08.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:08.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:08.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:08.667 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:08.667 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:08.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:08.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:08.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:08.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:08.669 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:49:08.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:08.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:08.669 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2887 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:13.674 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:13.674 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:13.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:13.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:13.695 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:13.695 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:13.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:13.701 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:13.701 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:13.702 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:13.702 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:49:13.709 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:49:13.709 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:49:13.710 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:13.710 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:13.710 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:13.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:49:13.712 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:13.712 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:49:13.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:13.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:49:13.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:49:13.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:13.715 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:13.716 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:13.716 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:49:13.716 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:13.717 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:49:13.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:13.719 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:49:13.719 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:49:13.719 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:13.719 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:13.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:13.720 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:49:13.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:13.720 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:49:13.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.724 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:49:13.724 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:49:13.724 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:49:13.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:13.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:13.729 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:49:14.206 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:49:14.258 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:14.260 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:49:14.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:14.262 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:49:14.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:14.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:14.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:14.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:14.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:14.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:14.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:14.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:14.679 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:49:14.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:14.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:14.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:14.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:15.150 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:49:15.296 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:15.623 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:49:15.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:15.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:15.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:15.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:15.822 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:16.095 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:49:16.344 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:16.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:49:16.732 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:16.732 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:16.732 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:16.732 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:17.041 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:49:17.513 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:49:17.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:17.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:17.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:17.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:17.985 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:49:18.359 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:18.456 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:49:18.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:18.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:18.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:18.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:18.892 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:18.929 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:49:19.401 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:49:19.414 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:19.873 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:49:19.931 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:20.344 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:49:20.815 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:49:21.289 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:49:21.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:49:21.937 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:22.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:49:22.706 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:49:23.178 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:49:23.650 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:49:23.981 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:23.981 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:23.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:23.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:23.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:23.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:23.985 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:49:28.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:28.992 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:28.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:28.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:28.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:28.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:29.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:29.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:29.001 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:29.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:29.002 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:49:29.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:49:29.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:49:29.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:29.005 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:29.005 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:29.005 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:49:29.005 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:29.005 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:49:29.006 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:29.007 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:49:29.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:49:29.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:29.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:29.008 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:29.008 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:49:29.008 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:29.008 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:49:29.008 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:29.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:49:29.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:49:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:29.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:29.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:29.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:49:29.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:29.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:49:29.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:29.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:49:29.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:49:29.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:49:29.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:49:29.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:49:29.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:49:29.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:49:29.013 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:49:29.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:29.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:29.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:49:29.496 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:49:29.533 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:29.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:29.537 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:49:29.540 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:49:29.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:29.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:29.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:29.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.570 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:29.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:29.571 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:29.571 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:29.593 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:29.598 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:29.598 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:29.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:29.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:29.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.666 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:29.666 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:29.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:29.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:29.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:29.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:29.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:29.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:29.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:29.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:29.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:29.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:29.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:29.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:29.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:29.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:29.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:29.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:29.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:29.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:29.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:29.937 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:29.937 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:29.967 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:49:29.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:29.972 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:29.973 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:29.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:29.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:30.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:30.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.184 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.184 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.202 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.437 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.438 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.438 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.439 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:49:30.456 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.456 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.458 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.458 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.458 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.491 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.492 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.492 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.530 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:30.530 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:49:30.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.534 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.534 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.534 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:30.546 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.546 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.547 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.578 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.582 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:30.582 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:49:30.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.592 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:30.604 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.604 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.605 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.605 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:30.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.622 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.622 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.678 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.678 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.707 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.707 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.708 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.708 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.708 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:30.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.717 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.721 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.721 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.733 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.733 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.733 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.768 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:30.768 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:49:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.779 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.782 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.782 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.782 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:30.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.810 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:30.810 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:49:30.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.828 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:30.841 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.841 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.842 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.842 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:30.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:30.859 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:30.859 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:30.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.903 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:49:30.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:30.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.967 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.967 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.967 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:30.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:30.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:30.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:30.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:30.988 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:30.988 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:30.988 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:30.988 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:31.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:31.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:31.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:31.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:31.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:31.040 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:31.040 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:31.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.223 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.223 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:31.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:31.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:31.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:31.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:31.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:31.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:31.279 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:31.280 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:31.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.375 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:49:31.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.491 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:31.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:31.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:31.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:31.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:31.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:31.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:31.567 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:31.567 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:31.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.735 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:31.743 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.743 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:31.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.743 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:31.743 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:31.743 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:31.743 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:31.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:31.746 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:31.746 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:31.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:31.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.750 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:31.757 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:31.757 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:31.757 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:31.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:31.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:31.758 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:31.758 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:31.798 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:31.803 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:31.803 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:31.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:31.846 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:49:31.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:32.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:32.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.003 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:32.003 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:32.003 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:32.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:32.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:32.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:32.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:32.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:32.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:32.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:32.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.024 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:32.024 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:32.024 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:32.024 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:32.081 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:32.086 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:32.086 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:32.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:32.258 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:32.260 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:32.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:32.261 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:32.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:32.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:32.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:32.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:32.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:32.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:32.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:32.314 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:32.317 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:49:32.319 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:49:32.319 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:49:32.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:32.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:32.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:32.521 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:32.521 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:32.521 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:49:32.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:32.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:32.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:32.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:32.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:32.535 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:32.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:32.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:32.536 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:32.536 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:32.536 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:49:32.536 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=763 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:32.536 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=763 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:32.536 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:32.537 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:32.537 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:32.537 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:37.539 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:37.539 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:37.539 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:37.539 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:37.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:37.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:37.542 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:37.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:37.542 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:37.542 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:37.542 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:49:37.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:49:37.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:49:37.543 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:37.543 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:37.544 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:49:37.544 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:37.545 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:37.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:37.545 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:49:37.545 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:37.545 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:49:37.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:37.546 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:37.546 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:49:37.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:49:37.548 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:49:37.548 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:49:37.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:37.553 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:49:38.031 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:49:38.072 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:38.074 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:49:38.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:38.077 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:49:38.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:38.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:38.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:49:38.102 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:38.103 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:38.103 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:38.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:49:38.104 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:49:38.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 02:49:38.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:49:38.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:49:38.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:38.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:49:38.190 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:38.504 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:49:38.550 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:38.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:38.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:38.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:38.975 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:49:39.449 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:49:39.552 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:39.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:39.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:39.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:39.921 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:49:40.193 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:49:40.193 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:49:40.197 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:40.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:40.197 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:40.197 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:40.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:40.198 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:40.198 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:40.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:40.198 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:40.198 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:40.198 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:49:40.198 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:40.198 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:40.198 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:40.198 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:40.198 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:40.198 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:40.199 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:49:45.205 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:45.205 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:45.205 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:45.205 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:45.205 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:45.205 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:45.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:45.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:45.212 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:45.212 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:45.212 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:49:45.215 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:49:45.215 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:49:45.215 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:45.215 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:45.216 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:45.216 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:49:45.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:45.216 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:49:45.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:45.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:49:45.218 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:49:45.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:45.218 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:45.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:45.218 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:49:45.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:45.218 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:49:45.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:45.220 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:49:45.221 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:49:45.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:45.221 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:45.221 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:45.221 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:49:45.221 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:45.221 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:49:45.221 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:49:45.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:49:45.225 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:49:45.225 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:49:45.225 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:45.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:45.226 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:45.226 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:45.226 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.234 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:50.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:50.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:50.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:50.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:50.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:50.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:50.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:50.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:50.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:49:50.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:49:50.245 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:49:50.245 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:49:50.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:50.246 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:50.246 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:50.246 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:49:50.246 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:49:50.246 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:49:50.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:50.247 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:49:50.247 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:49:50.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:50.248 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:50.248 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:50.248 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:49:50.248 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:49:50.248 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:49:50.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:50.249 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:49:50.249 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:49:50.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:50.249 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:49:50.249 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:50.249 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:49:50.249 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:49:50.249 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:49:50.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:50.251 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:49:50.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:49:50.251 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:49:50.251 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:49:50.251 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:49:50.251 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:49:50.252 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:49:50.252 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:49:50.252 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:49:50.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:49:50.256 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:49:50.735 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:49:50.770 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:49:50.771 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:49:50.772 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:49:50.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:49:51.207 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:49:51.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:51.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:51.682 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:49:52.155 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:49:52.256 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:52.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:52.257 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:52.257 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:52.629 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:49:53.101 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:49:53.258 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:53.258 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:53.258 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:53.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:53.576 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:49:54.048 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:49:54.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:54.259 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:54.259 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:54.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:54.523 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:49:54.995 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:49:55.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:55.261 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:55.261 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:55.261 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:55.459 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:49:55.922 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:49:56.273 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:49:56.273 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:49:56.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:49:56.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:49:56.274 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:49:56.274 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:49:56.274 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:49:56.274 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:49:56.274 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:49:56.274 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:49:56.274 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:50:01.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:01.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:01.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:01.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:01.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:01.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:01.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:01.289 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:01.290 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:01.290 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:01.290 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:50:01.292 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:50:01.293 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:50:01.293 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:01.293 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:01.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:01.294 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:50:01.294 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:01.294 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:50:01.294 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:01.295 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:50:01.295 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:50:01.295 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:01.295 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:01.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:01.295 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:50:01.296 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:01.296 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:50:01.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:01.297 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:50:01.297 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:50:01.297 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:01.297 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:01.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:01.298 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:50:01.298 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:01.298 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:50:01.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.300 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:50:01.300 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:50:01.300 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:50:01.301 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:01.305 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:50:01.784 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:50:01.822 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:50:01.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:01.824 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:50:01.827 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:50:02.248 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:50:02.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:02.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:02.303 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:02.303 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:02.715 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:50:03.178 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:50:03.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:03.304 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:03.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:03.304 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:03.650 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:50:04.114 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:50:04.305 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:04.305 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:04.306 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:04.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:04.583 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:50:05.059 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:50:05.307 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:05.307 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:05.307 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:05.307 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:05.531 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:50:06.006 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:50:06.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:06.309 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:06.309 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:06.309 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:06.478 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:50:06.840 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:06.840 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:06.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:06.840 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:06.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:06.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:06.843 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:06.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:06.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:06.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:06.843 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:06.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:11.847 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:11.847 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:11.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:11.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:11.847 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:11.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:11.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:11.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:11.850 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:11.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:11.851 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:11.852 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:11.852 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:50:11.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:11.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:11.853 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:50:11.853 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:11.854 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:50:11.854 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:50:11.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:11.854 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:11.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:11.854 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:50:11.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:11.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:50:11.855 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:50:11.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:50:11.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:50:11.857 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:50:11.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:11.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:11.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:11.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:11.858 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:11.858 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:11.858 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:11.858 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:50:16.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:16.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:16.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:16.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:16.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:16.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:16.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:16.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:16.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:16.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:16.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:50:16.879 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:50:16.879 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:50:16.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:16.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:16.880 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:16.880 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:50:16.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:16.880 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:50:16.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:16.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:50:16.882 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:50:16.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:16.882 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:16.882 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:16.882 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:50:16.882 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:16.882 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:50:16.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:16.884 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:16.884 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:50:16.884 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:50:16.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:50:16.887 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:50:16.887 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:50:16.887 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:16.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:16.891 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:50:17.370 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:50:17.405 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:50:17.407 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:50:17.408 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:50:17.409 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:17.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:50:17.410 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:50:17.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:50:17.842 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:50:17.890 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:17.890 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:17.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:17.890 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:18.316 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:50:18.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:18.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:50:18.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:50:18.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:50:18.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:50:18.789 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:50:18.891 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:18.891 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:18.891 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:18.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:19.260 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:50:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:50:19.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:19.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:19.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:20.202 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:50:20.673 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:50:20.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:20.893 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:20.893 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:20.893 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:21.143 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:50:21.615 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:50:21.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:21.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:21.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:21.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:22.085 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:50:22.556 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:50:23.027 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:50:23.498 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:50:23.969 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:50:24.439 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:50:24.910 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:50:25.381 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:50:25.852 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:50:26.322 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:50:26.793 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:50:27.263 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:50:27.735 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:50:28.206 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:50:28.679 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:50:29.151 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:50:29.623 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:50:30.094 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:50:30.568 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:50:31.040 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:50:31.512 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:50:31.985 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:50:32.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:50:32.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:50:32.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:32.181 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:32.182 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:32.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:32.184 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:32.184 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:32.184 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:32.184 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:32.185 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:32.185 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:32.185 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:32.185 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:37.189 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:37.189 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:37.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:37.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:37.189 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:37.189 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:37.198 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:37.200 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:37.200 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:37.201 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:37.201 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:50:37.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:50:37.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:50:37.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:37.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:37.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:37.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:50:37.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:37.208 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:50:37.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:37.211 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:50:37.211 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:50:37.211 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:37.212 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:37.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:37.212 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:50:37.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:37.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:50:37.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:37.215 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:50:37.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:50:37.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:37.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:37.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:37.216 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:50:37.216 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:37.216 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:50:37.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:37.220 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:50:37.221 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:50:37.221 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:50:37.221 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.221 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:37.225 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:50:37.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:50:37.744 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:50:37.746 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:50:37.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:37.748 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:50:37.769 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:50:37.769 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:50:37.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:50:37.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:37.775 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:50:37.775 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:50:37.776 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:50:37.776 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:50:37.797 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:50:37.801 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:50:37.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:37.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:50:37.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:50:37.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:37.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:38.176 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:50:38.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:38.223 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:38.224 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:38.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:38.648 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:50:39.118 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:50:39.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:39.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:39.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:39.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:39.590 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:50:40.063 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:50:40.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:40.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:40.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:40.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:40.535 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:50:41.008 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:50:41.227 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:41.227 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:41.227 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:41.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:41.479 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:50:41.952 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:50:42.229 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:42.229 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:42.425 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:50:42.897 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:50:43.368 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:50:43.841 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:50:44.314 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:50:44.786 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:50:45.257 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:50:45.731 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:50:45.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:45.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:45.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:50:45.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:50:45.827 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:45.827 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:45.827 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:45.827 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:45.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:45.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:45.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:45.832 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:50:45.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:45.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:45.832 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:45.832 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:45.833 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:45.833 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:45.833 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:45.833 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:45.833 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:50.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:50.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:50.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:50.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:50.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:50.834 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:50.837 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:50.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:50.837 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:50.837 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:50:50.837 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:50:50.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:50:50.838 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:50:50.838 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:50.838 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:50.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:50.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:50:50.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:50:50.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:50:50.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:50.839 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:50:50.839 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:50:50.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:50.840 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:50.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:50.840 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:50:50.840 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:50:50.840 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:50:50.840 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:50.841 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:50:50.841 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:50:50.841 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:50:50.843 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:50:50.843 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:50:50.843 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.843 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:50:50.848 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:50:51.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:50:51.367 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:50:51.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:51.371 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:50:51.374 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:50:51.399 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:50:51.399 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:50:51.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:50:51.405 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:51.405 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:50:51.405 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:50:51.405 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:50:51.405 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:50:51.419 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:50:51.422 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:50:51.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:51.430 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:50:51.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:50:51.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:51.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:51.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:50:51.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:51.846 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:51.846 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:51.846 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:52.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:50:52.741 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:50:52.846 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:52.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:52.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:52.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:53.214 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:50:53.687 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:50:53.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:53.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:53.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:53.848 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:54.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:50:54.633 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:50:54.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:54.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:54.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:54.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:55.105 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:50:55.578 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:50:55.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:55.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:55.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:55.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:56.051 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:50:56.524 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:50:56.996 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:50:57.470 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:50:57.942 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:50:58.415 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:50:58.886 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:50:59.359 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:50:59.434 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:50:59.436 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:50:59.436 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:50:59.436 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:50:59.446 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:50:59.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:50:59.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:50:59.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:50:59.450 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:50:59.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:50:59.451 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:50:59.451 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:50:59.451 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:50:59.451 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:50:59.451 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:50:59.452 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:04.454 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:04.454 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:04.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:04.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:04.454 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:04.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:04.457 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:04.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:04.457 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:04.457 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:04.457 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:51:04.458 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:51:04.458 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:51:04.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:04.459 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:04.459 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:04.459 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:51:04.459 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:04.459 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:51:04.459 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:04.460 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:04.460 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:51:04.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:04.461 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:04.461 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:51:04.461 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:51:04.463 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:51:04.463 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:51:04.463 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:51:04.463 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.464 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:04.468 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:51:04.947 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:51:04.988 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:04.990 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:04.992 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:51:04.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:05.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:05.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:05.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:05.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:05.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:05.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:05.027 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:05.027 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:05.039 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:05.043 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:05.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:05.060 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:51:05.060 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:51:05.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:05.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:05.419 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:51:05.466 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:05.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:05.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:05.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:05.614 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:05.614 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:05.614 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:51:05.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:05.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:05.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:05.622 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:05.622 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:05.622 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:05.622 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:51:05.622 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:05.622 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:05.622 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:10.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:10.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:10.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:10.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:10.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:10.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:10.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:10.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:10.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:10.632 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:10.632 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:51:10.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:51:10.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:51:10.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:10.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:10.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:10.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:51:10.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:10.635 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:51:10.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:10.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:51:10.637 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:51:10.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:10.637 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:10.637 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:10.637 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:51:10.637 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:10.637 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:51:10.637 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:10.639 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:51:10.639 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:51:10.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:10.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:10.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:10.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:51:10.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:10.640 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:51:10.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:51:10.642 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:51:10.643 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:51:10.643 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:51:10.643 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.643 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:10.648 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:51:11.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:51:11.170 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:11.173 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:11.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:11.175 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:51:11.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:11.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:11.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:11.204 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:11.204 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:11.204 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:11.204 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:11.204 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:11.214 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:11.217 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:11.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:11.235 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:51:11.235 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:51:11.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:11.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:11.596 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:51:11.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:11.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:11.647 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:11.647 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:11.789 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:11.789 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:11.789 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:51:11.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:11.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:11.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:11.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:11.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:11.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:11.799 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:11.799 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:11.799 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:11.799 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:11.799 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:51:11.799 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:11.800 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:11.800 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:11.800 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:11.800 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:11.800 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:11.800 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:16.800 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:16.800 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:16.800 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:16.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:16.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:16.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:16.807 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:16.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:16.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:16.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:16.808 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:51:16.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:51:16.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:51:16.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:16.811 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:16.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:16.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:51:16.812 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:16.813 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:51:16.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:16.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:51:16.814 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:51:16.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:16.814 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:16.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:16.814 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:51:16.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:16.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:51:16.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:16.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:16.817 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:51:16.817 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.820 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:51:16.820 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:51:16.820 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:51:16.820 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:16.825 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:51:17.304 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:51:17.344 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:17.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:17.348 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:17.351 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:51:17.375 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:17.375 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:17.376 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:17.382 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:17.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:17.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:17.383 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:17.383 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:17.396 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:17.399 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:17.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:17.406 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:51:17.407 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:51:17.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:17.407 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:17.773 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:51:17.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:17.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:17.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:17.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:17.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:17.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:17.965 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:51:17.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:17.973 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:17.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:17.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:17.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:17.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:17.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:17.973 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:51:17.973 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:17.973 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:17.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:17.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:17.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:17.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:17.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:22.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:22.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:22.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:22.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:22.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:22.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:22.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:22.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:22.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:22.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:22.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:51:22.981 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:51:22.981 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:51:22.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:22.982 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:22.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:22.982 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:51:22.982 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:22.982 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:51:22.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:22.983 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:22.983 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:51:22.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:22.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:22.984 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:51:22.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.986 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:51:22.986 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:51:22.986 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:51:22.987 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:22.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:22.991 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:51:23.469 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:51:23.511 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:23.513 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:23.515 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:51:23.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:23.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:23.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:23.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:23.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:23.546 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:23.547 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:23.547 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:23.547 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:23.562 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:23.565 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:23.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:23.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:23.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:23.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:23.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:23.942 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:51:23.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:23.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:24.413 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:51:24.884 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:51:24.991 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:24.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:24.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:24.992 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:25.357 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:51:25.830 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:51:25.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:25.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:25.993 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:25.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:26.302 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:51:26.776 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:51:26.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:26.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:26.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:26.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:27.248 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:51:27.720 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:51:27.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:27.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:27.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:27.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:28.191 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:51:28.664 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:51:29.137 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:51:29.609 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:51:30.083 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:51:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:51:31.028 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:51:31.499 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:51:31.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:31.580 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:31.580 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:31.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:31.597 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:31.597 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:31.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:31.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:31.599 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:31.599 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:31.599 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:31.599 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:31.635 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:31.639 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:31.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:31.651 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:51:31.651 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:51:31.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:31.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:31.971 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:51:32.444 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:51:32.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:32.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:32.684 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:51:32.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:32.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:32.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:32.689 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:32.690 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:32.690 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:32.690 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:32.690 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:32.690 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:51:32.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:32.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:37.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:37.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:37.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:37.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:37.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:37.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:37.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:37.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:37.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:37.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:37.706 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:51:37.712 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:51:37.712 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:51:37.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:37.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:37.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:37.713 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:51:37.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:37.713 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:51:37.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:37.718 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:51:37.718 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:51:37.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:37.718 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:37.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:37.719 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:51:37.719 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:37.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:51:37.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:37.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:51:37.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:51:37.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:37.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:37.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:37.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:51:37.724 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:37.724 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:51:37.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:37.729 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:51:37.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:51:37.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:51:37.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:51:37.729 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.730 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:51:37.730 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:51:37.730 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:51:37.731 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:37.735 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:51:38.214 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:51:38.255 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:38.256 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:38.257 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:51:38.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:38.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:38.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:38.274 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:38.280 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:38.280 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:38.280 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:38.280 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:38.280 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:38.306 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:38.310 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:38.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:38.324 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:51:38.325 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:51:38.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:38.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:38.687 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:51:38.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:38.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:38.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:38.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:38.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:38.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:38.879 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:51:38.883 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:38.883 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:38.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:38.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:38.886 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:38.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:38.886 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:38.886 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:38.886 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:51:38.886 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (TRX3@172.18.248.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:38.886 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:51:43.891 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:51:43.891 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:51:43.891 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:43.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:43.891 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:43.891 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:43.898 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:51:43.899 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:43.899 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:43.900 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:51:43.900 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:51:43.902 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:51:43.902 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:51:43.902 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:43.903 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:43.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:51:43.903 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:51:43.903 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:51:43.903 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:51:43.903 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:43.905 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:51:43.905 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:51:43.905 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:43.905 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:43.905 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:51:43.905 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:51:43.906 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:51:43.906 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:51:43.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:43.907 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:51:43.907 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:51:43.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:51:43.910 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:51:43.910 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:51:43.910 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.910 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:51:43.915 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:51:44.394 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:51:44.436 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:44.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:44.440 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:44.443 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:51:44.470 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:44.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:44.471 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:44.478 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:44.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:44.479 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:44.479 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:44.479 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:44.486 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:44.488 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:44.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:44.495 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:44.495 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:44.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:44.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:44.866 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:51:44.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:44.912 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:44.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:44.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:45.337 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:51:45.810 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:51:45.912 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:45.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:46.283 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:51:46.755 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:51:46.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:46.914 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:46.914 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:46.914 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:47.226 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:51:47.699 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:51:47.915 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:47.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:47.915 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:47.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:48.172 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:51:48.643 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:51:48.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:51:48.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:51:48.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:51:48.917 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:51:49.115 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:51:49.588 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:51:50.060 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:51:50.533 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:51:51.006 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:51:51.479 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:51:51.951 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:51:52.422 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:51:52.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:52.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:52.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:52.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:52.510 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:51:52.510 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:51:52.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:51:52.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:52.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:52.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:52.512 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:51:52.512 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:51:52.559 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:51:52.563 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:51:52.569 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:51:52.571 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:51:52.571 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:51:52.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:52.571 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:51:52.892 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:51:53.363 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:51:53.837 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:51:54.309 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:51:54.782 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:51:55.255 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:51:55.727 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:51:56.200 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:51:56.670 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:51:57.141 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:51:57.615 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:51:58.087 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:51:58.559 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:51:59.030 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:51:59.504 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:51:59.976 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:52:00.448 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:52:00.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:00.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:00.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:00.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:00.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:00.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:00.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:52:00.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:00.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:00.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:00.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:52:00.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:52:00.631 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:00.635 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:00.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:00.647 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:00.647 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:00.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:00.648 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:00.921 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:52:01.394 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:52:01.866 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:52:02.337 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:52:02.808 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:52:03.279 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:52:03.750 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:52:04.220 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:52:04.694 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:52:05.166 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:52:05.638 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:52:06.109 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:52:06.583 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:52:07.055 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:52:07.527 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:52:07.998 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:52:08.469 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:52:08.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:08.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:08.654 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:08.654 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:08.663 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:08.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:08.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:52:08.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:08.665 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:08.665 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:08.666 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:52:08.666 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:52:08.703 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:08.707 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:08.714 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:08.715 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:08.715 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:08.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:08.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:08.940 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:52:09.413 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:52:09.885 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:52:10.357 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:52:10.829 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:52:11.302 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:52:11.774 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:52:12.247 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:52:12.720 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:52:13.192 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:52:13.665 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:52:14.135 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:52:14.606 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:52:15.077 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:52:15.550 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:52:16.023 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:52:16.495 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:52:16.718 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:16.721 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:16.722 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:16.722 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:16.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:16.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:16.727 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:16.727 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:16.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:16.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:16.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:16.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:16.728 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:52:16.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:16.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:21.735 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:21.735 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:21.735 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:21.735 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:21.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:21.735 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:21.743 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:21.744 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:21.744 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:21.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:21.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:52:21.748 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:52:21.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:52:21.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:21.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:21.748 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:21.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:52:21.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:21.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:52:21.749 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:21.750 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:52:21.750 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:52:21.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:21.751 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:21.751 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:21.751 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:52:21.751 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:21.751 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:52:21.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:21.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:21.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:52:21.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.755 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:52:21.756 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:52:21.756 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:52:21.756 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:21.760 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:52:22.239 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:52:22.276 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:22.277 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:22.278 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:52:22.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:22.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:22.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:22.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:52:22.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:22.304 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:22.304 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:22.305 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:52:22.305 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:52:22.331 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:22.335 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:22.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:22.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:52:22.349 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:52:22.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:22.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:52:22.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:22.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:22.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:22.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:23.183 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:52:23.657 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:52:23.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:23.759 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:23.759 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:23.759 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:23.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:23.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:23.887 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:52:23.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:23.889 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:23.889 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:23.889 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:23.890 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:23.890 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:23.890 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:23.890 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:23.890 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:52:23.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:23.890 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:28.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:28.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:28.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:28.897 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:28.897 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:28.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:28.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:28.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:28.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:28.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:28.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:52:28.908 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:52:28.908 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:52:28.908 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:28.908 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:28.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:28.909 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:52:28.909 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:28.909 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:52:28.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:28.910 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:52:28.910 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:52:28.910 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:28.910 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:28.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:28.911 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:52:28.911 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:28.911 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:52:28.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:28.912 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:52:28.913 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:52:28.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:28.913 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:28.913 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:28.913 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:52:28.913 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:28.913 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:52:28.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:52:28.915 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:52:28.916 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:52:28.916 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:52:28.916 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:28.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:28.920 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:52:29.399 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:52:29.435 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:29.436 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:29.438 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:52:29.438 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:29.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:29.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:29.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:52:29.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:29.459 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:29.459 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:29.460 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:52:29.460 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:52:29.491 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:29.495 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:29.503 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:29.509 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:52:29.509 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:52:29.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:29.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:29.872 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:52:29.917 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:29.918 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:29.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:29.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:30.064 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:30.064 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:30.064 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:52:30.068 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:30.069 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:30.073 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:30.073 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:30.073 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:30.073 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:30.073 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:30.073 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:30.073 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (TRX3@172.18.248.20:5700/3) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:30.073 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=249 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:35.076 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:35.076 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:35.076 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:35.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:35.076 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:35.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:35.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:35.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:35.087 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:35.087 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:35.087 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:52:35.091 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:52:35.091 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:52:35.091 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:35.091 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:35.092 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:35.092 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:52:35.092 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:35.092 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:52:35.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:35.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:52:35.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:52:35.097 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:35.097 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:35.097 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:35.097 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:52:35.098 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:35.098 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:52:35.098 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:35.101 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:35.101 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:52:35.101 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.105 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:52:35.105 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:52:35.105 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:52:35.105 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:35.110 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:52:35.588 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:52:35.626 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:35.627 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:35.628 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:35.628 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:52:35.648 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:35.648 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:35.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:52:35.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:35.654 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:35.654 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:35.654 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:52:35.654 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:52:35.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:35.693 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:35.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:35.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:35.695 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:36.061 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:52:36.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:36.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:36.108 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:36.108 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:36.532 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:52:37.005 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:52:37.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:37.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:37.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:37.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:37.478 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:52:37.950 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:52:38.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:38.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:38.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:38.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:38.423 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:52:38.896 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:52:39.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:39.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:39.111 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:39.369 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:52:39.842 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:52:40.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:40.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:40.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:40.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:40.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:52:40.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:52:41.261 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:52:41.733 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:52:42.206 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:52:42.677 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:52:43.150 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:52:43.623 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:52:43.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:43.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:43.703 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:43.703 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:43.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:43.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:43.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:43.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:43.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:43.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:43.723 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:43.724 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:43.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:43.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:43.724 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:52:48.728 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:48.728 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:48.728 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:48.728 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:48.731 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:48.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:48.731 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:48.731 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:52:48.731 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:52:48.732 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:52:48.732 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:52:48.732 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:48.732 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:48.733 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:48.733 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:52:48.733 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:52:48.733 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:52:48.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:48.733 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:52:48.734 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:52:48.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:48.734 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:48.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:48.734 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:52:48.734 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:52:48.734 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:52:48.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:48.735 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:52:48.735 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:52:48.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:52:48.737 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:52:48.737 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:52:48.737 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.737 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.738 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:52:48.742 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:52:49.220 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:52:49.261 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:52:49.263 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:52:49.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:49.264 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:52:49.282 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:49.282 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:49.283 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:52:49.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:49.288 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:52:49.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:52:49.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:52:49.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:52:49.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:49.325 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:52:49.325 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:52:49.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:49.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:49.692 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:52:49.740 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:49.740 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:49.741 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:49.741 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:50.163 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:52:50.637 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:52:50.742 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:50.742 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:50.742 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:50.742 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:51.109 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:52:51.582 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:52:51.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:51.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:51.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:51.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:52.056 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:52:52.528 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:52:52.746 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:52.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:53.002 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:52:53.474 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:52:53.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:53.748 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:53.748 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:53.748 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:53.947 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:52:54.421 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:52:54.893 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:52:55.366 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:52:55.840 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:52:56.313 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:52:56.787 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:52:57.259 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:52:57.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:52:57.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:52:57.333 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:52:57.333 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:52:57.333 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:52:57.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:52:57.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:52:57.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:52:57.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:52:57.351 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:52:57.351 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:52:57.351 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:52:57.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:52:57.352 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:52:57.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:52:57.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:52:57.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:02.350 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:02.350 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:02.350 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:02.350 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:02.350 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:02.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:02.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:02.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:02.353 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:02.353 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:02.353 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:02.354 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:02.354 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:53:02.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:02.355 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:53:02.355 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:53:02.355 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:02.355 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:02.356 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:02.356 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:53:02.356 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:02.356 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:53:02.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:02.357 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:02.357 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:53:02.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:02.358 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:53:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:53:02.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:53:02.359 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:53:02.359 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:53:02.359 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:02.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:02.364 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:53:02.826 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:53:02.872 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:53:02.873 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:53:02.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:53:02.874 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:53:02.882 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:53:02.882 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:53:02.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:53:02.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:53:02.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:53:02.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:53:02.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:53:02.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:53:03.289 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:53:03.361 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:03.361 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:03.361 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:03.361 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:03.751 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:53:04.215 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:53:04.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:04.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:04.678 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:53:05.141 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:53:05.362 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:05.362 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:05.362 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:05.362 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:05.604 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:53:06.067 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:53:06.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:06.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:06.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:06.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:06.530 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:53:06.993 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:53:07.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:07.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:07.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:07.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:07.455 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:53:07.918 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:53:08.383 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:53:08.846 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:53:09.309 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:53:09.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:53:09.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:53:09.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:09.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:09.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:09.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:09.491 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:09.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:09.491 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:09.491 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:09.491 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:53:09.491 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:09.491 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:09.491 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1572 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:14.500 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:14.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:14.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:14.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:14.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:14.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:14.508 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:14.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:14.509 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:14.509 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:14.509 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:53:14.510 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:53:14.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:53:14.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:14.511 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:14.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:14.511 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:53:14.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:14.511 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:53:14.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:14.512 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:53:14.513 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:53:14.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:14.513 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:14.513 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:14.513 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:53:14.513 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:14.513 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:53:14.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:14.516 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:14.516 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:53:14.516 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:53:14.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:53:14.519 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:53:14.519 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:53:14.519 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:14.523 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:53:14.986 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:53:15.032 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:53:15.032 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:53:15.033 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:53:15.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:53:15.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:53:15.038 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:53:15.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:53:15.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:53:15.041 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:53:15.041 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:53:15.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:53:15.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:53:15.449 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:53:15.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:15.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:15.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:15.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:15.912 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:53:16.375 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:53:16.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:16.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:16.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:16.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:16.838 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:53:17.301 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:53:17.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:17.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:17.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:17.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:17.765 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:53:18.228 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:53:18.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:18.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:18.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:18.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:18.692 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:53:19.156 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:53:19.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:19.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:19.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:19.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:19.623 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:53:19.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:19.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:19.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:19.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:19.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:19.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:19.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:19.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:19.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:19.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:20.087 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:53:20.554 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:53:21.021 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:53:21.488 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:53:21.953 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:53:22.419 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:53:22.883 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:53:23.347 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:53:23.810 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:53:24.274 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:53:24.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:53:24.650 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:53:24.650 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:53:24.655 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:24.655 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:24.656 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:24.656 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:24.656 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:24.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:24.673 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:24.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:24.675 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:24.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:24.675 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:53:24.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:53:24.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:53:24.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:24.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:24.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:24.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:53:24.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:24.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:53:24.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:24.689 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:53:24.689 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:53:24.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:24.690 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:24.690 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:24.690 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:53:24.690 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:24.691 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:53:24.691 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:24.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:53:24.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:53:24.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:24.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:24.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:24.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:53:24.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:24.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:53:24.698 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:53:24.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:53:24.700 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:53:24.701 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:24.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:24.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:24.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:24.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:24.702 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:53:24.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:24.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:29.705 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:29.705 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:29.705 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:29.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:29.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:29.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:29.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:29.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:29.710 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:29.710 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:29.710 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:29.711 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:29.711 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:53:29.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:29.712 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:29.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:53:29.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:29.713 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:53:29.713 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:53:29.713 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:29.713 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:29.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:29.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:53:29.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:29.714 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:53:29.714 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:29.715 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:53:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:53:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:53:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:53:29.715 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:53:29.715 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:53:29.716 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:53:29.716 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:53:29.716 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:29.716 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:29.720 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:53:30.186 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:53:30.236 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:53:30.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:53:30.238 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:53:30.239 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:53:30.255 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:53:30.255 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:53:30.255 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:53:30.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:53:30.259 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:53:30.259 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:53:30.259 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:53:30.260 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:53:30.649 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:53:30.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:30.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:30.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:30.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:31.112 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:53:31.574 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:53:31.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:31.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:31.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:31.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:32.037 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:53:32.502 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:53:32.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:32.719 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:32.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:32.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:32.969 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:53:33.436 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:53:33.720 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:33.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:33.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:33.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:33.902 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:53:34.368 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:53:34.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:34.721 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:34.721 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:34.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:34.834 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:53:35.299 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:53:35.764 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:53:35.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:36.227 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:53:36.689 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:53:36.853 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:37.152 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:53:37.615 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:53:37.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:38.078 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:53:38.541 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:53:38.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:39.005 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:53:39.468 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:53:39.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:39.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:39.931 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:53:40.394 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:53:40.858 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:53:41.322 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:53:41.788 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:53:42.254 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:53:42.721 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:53:43.187 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:53:43.654 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:53:43.856 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:44.120 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:53:44.588 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:53:44.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:45.054 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:53:45.521 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:53:45.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:45.989 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:53:46.455 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:53:46.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:46.923 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:53:47.390 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:53:47.857 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:53:47.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:48.324 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:53:48.791 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:53:48.858 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:49.258 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:53:49.726 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:53:50.193 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:53:50.659 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:53:51.044 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:53:51.044 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:53:51.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:51.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:51.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:51.050 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:51.050 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:51.050 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:51.050 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:53:51.050 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:51.050 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:51.050 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4677 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:51.050 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4677 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:51.050 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4677 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:51.050 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4677 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:53:56.052 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:56.053 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:56.053 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:56.053 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:56.053 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:56.053 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:56.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:56.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:56.062 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:56.062 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:53:56.062 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:53:56.066 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:53:56.066 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:53:56.066 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:56.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:56.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:56.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:53:56.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:53:56.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:53:56.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:53:56.071 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:53:56.071 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:53:56.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:56.072 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:56.072 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:56.072 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:53:56.072 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:53:56.072 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:53:56.072 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:53:56.080 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:53:56.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:53:56.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:56.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:53:56.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:56.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:53:56.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:53:56.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:53:56.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.088 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:53:56.088 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:53:56.088 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:53:56.089 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:53:56.093 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:53:56.093 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:53:56.093 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:53:56.093 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:53:56.093 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:53:56.093 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:53:56.093 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:54:01.097 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:54:01.097 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:54:01.098 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:01.098 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:01.098 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:01.098 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:01.110 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:01.110 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:54:01.110 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:01.111 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:54:01.111 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:54:01.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:54:01.114 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:54:01.114 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:54:01.114 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:01.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:01.114 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:54:01.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:54:01.115 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:54:01.115 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:01.120 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:54:01.120 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:54:01.120 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:54:01.120 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:01.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:01.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:54:01.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:54:01.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:54:01.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:01.124 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:54:01.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:54:01.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:54:01.125 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:01.125 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:01.125 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:54:01.125 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:54:01.125 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:54:01.125 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:54:01.133 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:54:01.134 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:54:01.134 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:54:01.134 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.134 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.135 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:01.139 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:54:01.606 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:54:01.684 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:54:01.685 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:54:01.686 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:54:01.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:01.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:01.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:01.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:54:01.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:01.724 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:01.724 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:01.724 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:54:01.725 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:54:01.747 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:54:01.751 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:54:01.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:54:01.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:01.765 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:01.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:01.765 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:02.072 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:54:02.140 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:02.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:02.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:02.162 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:02.539 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:54:02.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:54:02.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:02.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:02.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:02.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:02.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:02.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:02.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:02.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:02.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:54:02.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:54:02.987 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:54:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:02.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:02.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:07.989 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:54:07.989 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:54:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:07.989 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:07.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:07.999 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:07.999 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:54:08.000 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:08.000 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:54:08.000 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:54:08.002 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:54:08.002 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:54:08.002 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:54:08.002 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:08.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:08.002 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:54:08.003 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:54:08.003 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:54:08.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:08.005 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:54:08.005 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:54:08.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:54:08.005 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:08.005 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:08.005 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:54:08.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:54:08.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:54:08.006 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:54:08.008 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:54:08.008 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:54:08.008 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:08.012 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:54:08.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:54:08.013 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:54:08.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:08.017 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:54:08.482 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:54:08.542 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:54:08.543 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:54:08.544 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:54:08.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:08.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:08.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:08.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:54:08.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:08.562 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:08.562 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:08.562 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:54:08.562 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:54:08.572 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:54:08.574 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:54:08.578 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:54:08.582 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:08.582 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:08.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:08.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:08.948 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:54:09.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:09.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:09.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:09.412 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:54:09.847 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 02:54:09.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:09.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:09.849 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:09.852 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:09.852 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:09.852 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:09.852 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:09.854 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:09.854 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:09.854 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:09.854 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:09.854 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:54:09.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:54:09.855 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:54:09.855 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:09.855 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:09.855 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:09.855 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:09.855 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:09.855 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=404 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:54:14.855 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:54:14.855 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:54:14.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:14.855 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:14.855 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:14.855 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:14.861 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:54:14.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:54:14.862 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:14.862 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:54:14.862 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:54:14.865 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:54:14.865 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:54:14.865 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:54:14.865 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:14.865 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:54:14.866 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:54:14.866 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:54:14.866 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:54:14.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:14.867 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:54:14.867 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:54:14.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:54:14.868 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:14.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:54:14.868 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:54:14.868 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:54:14.868 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:54:14.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:54:14.870 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:54:14.870 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:54:14.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:14.873 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:54:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:54:14.873 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:54:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:54:14.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:54:14.874 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:54:14.874 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:54:14.874 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:54:14.879 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:54:15.343 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:54:15.395 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:54:15.396 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:54:15.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:15.397 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:54:15.409 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:15.409 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:15.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:54:15.412 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:15.412 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:15.412 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:15.412 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:54:15.412 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:54:15.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:15.440 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:15.440 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:15.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:15.440 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:15.807 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:54:15.876 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:15.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:15.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:15.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:16.271 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:54:16.736 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:54:16.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:16.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:16.878 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:16.878 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:17.200 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:54:17.664 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:54:17.877 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:17.877 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:17.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:17.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:18.128 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:54:18.591 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:54:18.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:18.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:18.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:19.055 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:54:19.519 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:54:19.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:54:19.878 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:54:19.879 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:54:19.879 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:54:19.983 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:54:20.447 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:54:20.911 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:54:21.375 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:54:21.839 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:54:22.304 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:54:22.769 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:54:23.234 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:54:23.698 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:54:24.161 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:54:24.626 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:54:25.091 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:54:25.555 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:54:26.020 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:54:26.484 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:54:26.949 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:54:27.413 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:54:27.878 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:54:28.342 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:54:28.806 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:54:29.271 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:54:29.735 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:54:30.200 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:54:30.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:30.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:30.489 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:30.489 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:30.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:30.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:30.500 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:54:30.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:30.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:30.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:30.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:54:30.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:54:30.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:30.526 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:54:30.526 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 02:54:30.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:30.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:30.665 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:54:31.129 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:54:31.593 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:54:32.057 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:54:32.522 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:54:32.986 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:54:33.451 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:54:33.915 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:54:34.379 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:54:34.843 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:54:35.308 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:54:35.772 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:54:36.237 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:54:36.701 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:54:37.164 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:54:37.628 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:54:38.092 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:54:38.555 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:54:39.019 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:54:39.483 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:54:39.946 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 02:54:40.409 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 02:54:40.872 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 02:54:41.335 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 02:54:41.799 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 02:54:42.262 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 02:54:42.727 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 02:54:43.190 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 02:54:43.654 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 02:54:44.116 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 02:54:44.579 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 02:54:45.042 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 02:54:45.505 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 02:54:45.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:45.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:45.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:45.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:45.682 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:54:45.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:54:45.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:54:45.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:54:45.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:45.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:54:45.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:54:45.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:54:45.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:54:45.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:54:45.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:54:45.739 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 02:54:45.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:45.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:54:45.968 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 02:54:46.431 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 02:54:46.894 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 02:54:47.357 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 02:54:47.821 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 02:54:48.284 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 02:54:48.747 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 02:54:49.210 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 02:54:49.673 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 02:54:50.137 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 02:54:50.600 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 02:54:51.063 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 02:54:51.526 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 02:54:51.989 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 02:54:52.452 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 02:54:52.915 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 02:54:53.378 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 02:54:53.840 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 02:54:54.303 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 02:54:54.765 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 02:54:55.227 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 02:54:55.690 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 02:54:56.152 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 02:54:56.619 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 02:54:57.086 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 02:54:57.559 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 02:54:58.032 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 02:54:58.504 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 02:54:58.976 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 02:54:59.449 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 02:54:59.921 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 02:55:00.392 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 02:55:00.863 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 02:55:00.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:00.931 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:00.932 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:00.932 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:00.932 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:55:00.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:00.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:00.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:55:00.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:00.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:00.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:00.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:55:00.946 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:55:00.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:00.951 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:00.952 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:00.952 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:00.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:00.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:01.334 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 02:55:01.803 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 02:55:02.275 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 02:55:02.745 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 02:55:03.216 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 02:55:03.686 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 02:55:04.158 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 02:55:04.629 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 02:55:05.101 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 02:55:05.575 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 02:55:06.046 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 02:55:06.519 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 02:55:06.992 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 02:55:07.464 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 02:55:07.936 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 02:55:08.408 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 02:55:08.880 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 02:55:09.353 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 02:55:09.825 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 02:55:10.296 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 02:55:10.767 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 02:55:11.240 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 02:55:11.712 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 02:55:12.185 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 02:55:12.658 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 02:55:13.129 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 02:55:13.601 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 02:55:14.073 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 02:55:14.543 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 02:55:15.014 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 02:55:15.488 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 02:55:15.960 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 02:55:16.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:16.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:16.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:16.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:16.386 [WARNING] transceiver.py:257 (MS@172.18.248.22:6700) RX TRXD message (fn=13456 tn=1 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:16.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:16.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:16.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:16.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:16.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:16.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:16.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:16.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:16.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:16.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:16.397 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:55:21.403 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:21.403 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:21.404 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:21.404 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:21.404 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:21.404 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:21.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:21.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:21.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:21.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:21.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:55:21.422 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:55:21.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:55:21.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:21.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:21.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:21.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:55:21.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:21.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:55:21.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:21.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:21.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:55:21.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:21.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:55:21.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:55:21.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:21.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:21.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:21.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:55:21.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:21.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:55:21.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:55:21.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:55:21.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:55:21.429 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:55:21.429 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:21.430 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:21.430 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:21.430 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:21.430 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:21.430 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:21.430 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:21.430 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:55:26.439 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:26.439 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:26.439 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:26.439 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:26.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:26.439 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:26.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:26.447 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:26.447 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:26.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:26.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:55:26.451 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:55:26.451 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:55:26.451 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:26.451 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:26.451 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:26.451 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:55:26.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:26.452 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:55:26.452 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:26.453 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:55:26.453 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:55:26.453 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:26.453 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:26.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:26.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:55:26.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:26.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:55:26.454 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:26.455 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:26.455 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:55:26.455 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:55:26.457 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:55:26.457 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:55:26.457 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.457 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:26.458 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:26.462 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:55:26.940 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:55:26.983 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:55:26.986 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:55:26.987 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:26.988 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:55:27.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:27.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:27.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:55:27.028 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:55:27.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:27.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:27.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:27.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:55:27.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:55:27.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:27.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:27.091 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:27.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:27.091 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:27.408 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:55:27.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:27.460 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:27.460 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:27.460 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:27.878 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:55:28.352 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:55:28.461 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:28.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:28.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:28.462 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:28.824 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:55:29.296 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:55:29.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:29.463 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:29.463 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:29.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:29.767 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:55:30.238 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:55:30.463 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:30.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:30.709 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:55:31.179 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:55:31.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:31.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:31.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:31.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:31.650 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:55:32.121 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:55:32.592 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:55:33.062 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:55:33.533 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:55:34.002 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:55:34.469 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:55:34.936 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:55:35.401 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:55:35.868 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:55:36.334 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:55:36.799 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:55:37.266 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:55:37.734 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:55:37.895 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:37.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:37.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:37.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:37.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:37.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:37.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:37.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:37.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:37.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:37.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:37.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:37.908 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:55:37.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:37.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:37.908 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2488 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:42.915 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:42.915 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:42.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:42.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:42.916 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:42.916 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:42.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:42.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:42.927 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:42.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:42.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:55:42.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:55:42.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:55:42.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:42.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:42.929 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:42.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:55:42.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:42.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:55:42.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:42.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:42.931 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:55:42.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:42.932 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:55:42.933 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:55:42.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:42.933 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:42.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:42.933 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:55:42.933 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:42.933 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:55:42.933 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:42.934 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:55:42.935 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:55:42.935 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:55:42.935 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.935 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:42.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:42.940 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:55:43.410 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:55:43.460 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:55:43.462 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:55:43.463 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:55:43.463 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:43.478 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:43.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:43.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:55:43.481 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:55:43.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:43.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:43.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:43.482 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:55:43.482 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:55:43.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:43.506 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:43.506 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:43.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:43.506 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:43.877 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:55:43.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:43.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:43.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:43.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:44.345 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:55:44.810 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:55:44.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:44.939 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:44.939 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:44.939 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:45.276 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:55:45.747 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:55:45.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:45.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:45.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:45.941 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:46.220 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:55:46.693 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:55:46.942 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:46.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:46.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:46.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:47.165 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:55:47.639 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:55:47.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:47.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:47.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:47.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:48.111 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:55:48.583 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:55:49.054 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:55:49.528 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:55:50.000 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:55:50.473 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:55:50.946 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:55:51.419 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:55:51.891 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:55:52.364 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:55:52.837 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:55:53.310 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:55:53.783 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:55:53.885 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:53.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:53.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:53.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:53.899 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:53.900 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:53.900 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:53.900 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:53.903 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:53.903 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:53.903 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:53.903 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:53.903 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:55:53.903 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2375 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:53.903 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2375 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:53.903 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2375 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:53.903 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2375 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:53.903 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2375 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:53.903 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2375 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:55:58.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:55:58.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:55:58.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:58.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:58.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:58.908 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:58.917 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:55:58.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:58.919 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:58.919 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:55:58.919 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:55:58.925 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:55:58.925 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:55:58.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:58.925 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:58.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:55:58.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:55:58.926 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:55:58.926 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:55:58.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:58.931 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:55:58.931 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:55:58.931 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:58.931 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:58.931 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:55:58.931 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:55:58.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:55:58.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:55:58.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:58.935 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:55:58.935 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:55:58.935 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:58.939 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:55:58.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:55:58.940 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:55:58.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:55:58.944 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:55:59.423 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:55:59.476 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:55:59.478 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:55:59.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:59.480 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:55:59.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:55:59.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:55:59.514 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:55:59.521 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:55:59.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:59.523 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:59.524 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:59.524 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:55:59.524 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:55:59.566 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:55:59.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:55:59.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:55:59.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:59.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:55:59.896 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:55:59.943 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:55:59.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:55:59.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:55:59.944 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:00.369 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:56:00.842 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:56:00.867 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:00.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:00.945 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:00.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:00.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:01.314 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:56:01.788 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:56:01.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:01.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:01.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:01.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:02.260 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:56:02.732 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:56:02.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:02.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:02.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:02.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:03.203 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:56:03.677 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:56:03.949 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:03.949 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:03.949 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:03.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:04.150 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:56:04.622 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:56:05.093 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:56:05.566 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:56:06.039 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:56:06.511 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:56:06.985 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:56:07.458 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:56:07.930 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:56:08.403 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:56:08.876 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:56:09.348 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:56:09.819 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:56:10.293 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:56:10.765 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:56:11.238 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:56:11.711 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:56:12.184 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:56:12.656 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:56:13.127 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:56:13.601 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:56:14.073 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:56:14.546 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:56:15.019 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:56:15.492 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:56:15.964 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:56:16.438 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:56:16.910 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:56:17.382 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:56:17.853 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:56:18.327 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:56:18.799 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:56:19.272 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:56:19.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:19.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:19.592 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:56:19.592 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:56:19.603 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:19.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:19.603 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:19.603 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:19.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:19.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:19.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:56:19.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:56:19.608 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:56:19.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:19.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:19.608 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:19.608 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:19.608 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:19.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:19.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:19.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:19.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:24.610 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:56:24.610 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:56:24.610 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:24.610 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:24.610 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:24.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:24.613 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:24.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:56:24.614 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:24.614 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:56:24.614 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:56:24.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:56:24.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:56:24.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:56:24.616 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:56:24.616 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:56:24.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:24.617 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:56:24.617 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:56:24.617 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:56:24.617 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:24.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:24.618 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:56:24.618 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:56:24.618 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:56:24.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:24.619 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:56:24.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:56:24.619 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:56:24.619 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:56:24.619 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:56:24.619 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:56:24.620 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:56:24.620 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:56:24.620 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.620 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:24.624 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:56:25.102 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:56:25.146 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:56:25.149 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:56:25.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:25.151 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:56:25.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:56:25.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:56:25.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:56:25.196 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:56:25.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:25.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:56:25.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:56:25.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:56:25.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:56:25.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:25.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:56:25.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:56:25.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:25.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:25.575 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:56:25.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:25.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:25.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:25.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:26.046 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:56:26.519 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:56:26.540 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:26.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:26.625 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:26.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:26.625 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:26.992 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:56:27.464 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:56:27.506 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:27.625 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:27.626 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:27.626 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:27.626 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:27.935 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:56:28.408 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:56:28.466 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:28.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:28.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:28.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:28.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:28.881 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:56:29.353 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:56:29.432 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:29.628 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:29.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:29.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:29.827 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:56:30.299 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:56:30.398 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:30.772 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:56:31.245 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:56:31.358 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:31.718 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:56:32.190 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:56:32.325 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:32.661 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:56:33.132 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:56:33.285 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:33.605 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:56:34.078 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:56:34.251 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:34.550 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:56:35.021 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:56:35.211 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:35.494 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:56:35.967 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:56:36.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:36.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:36.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:56:36.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:56:36.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:36.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:36.079 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:36.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:36.082 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:36.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:36.082 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:56:36.082 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:56:36.082 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:56:36.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:36.083 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:36.083 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:41.086 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:56:41.086 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:56:41.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:41.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:41.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:41.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:41.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:41.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:56:41.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:41.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:56:41.095 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:56:41.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:56:41.098 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:56:41.098 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:56:41.098 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:41.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:41.099 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:56:41.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:56:41.099 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:56:41.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:41.100 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:56:41.101 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:56:41.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:56:41.101 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:41.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:41.101 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:56:41.101 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:56:41.101 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:56:41.101 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:56:41.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:56:41.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:56:41.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:41.105 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:56:41.105 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:56:41.105 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:56:41.105 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:56:41.105 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:56:41.106 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:56:41.106 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:56:41.106 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:56:41.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:56:41.590 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:56:41.633 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:56:41.635 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:56:41.637 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:56:41.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:41.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:56:41.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:56:41.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:56:41.669 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:56:41.672 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:56:41.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:41.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:56:41.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:56:41.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:56:41.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:56:41.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:41.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:56:41.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:56:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:41.689 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:56:41.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:42.061 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:56:42.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:42.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:42.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:56:42.549 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:56:43.006 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:56:43.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:43.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:43.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:43.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:43.477 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:56:43.950 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:56:44.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:44.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:44.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:44.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:44.423 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:56:44.895 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:56:45.112 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:45.112 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:45.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:45.113 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:45.366 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:56:45.841 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:56:46.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:46.113 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:46.113 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:46.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:56:46.784 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:56:47.257 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:56:47.730 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:56:48.202 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:56:48.675 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:56:49.148 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:56:49.621 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:56:50.094 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:56:50.567 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:56:51.039 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:56:51.510 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:56:51.983 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:56:52.180 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:56:52.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:56:52.928 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:56:53.399 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:56:53.872 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:56:54.345 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:56:54.817 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:56:55.288 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:56:55.762 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:56:56.234 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:56:56.707 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:56:57.180 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:56:57.653 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:56:57.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:56:57.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:56:57.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:56:57.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:56:57.983 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:56:57.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:56:57.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:56:57.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:56:57.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:56:57.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:56:57.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:56:57.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:56:57.986 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:56:57.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:56:57.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:56:57.987 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3644 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:02.993 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:02.994 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:02.994 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:02.994 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:02.994 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:02.994 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:03.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:03.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:03.004 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:03.004 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:03.005 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:57:03.008 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:57:03.008 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:57:03.009 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:03.009 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:03.009 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:03.010 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:57:03.010 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:03.010 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:57:03.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:03.013 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:57:03.013 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:57:03.013 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:03.013 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:03.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:03.014 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:57:03.015 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:03.015 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:57:03.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:03.017 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:57:03.017 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:57:03.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:03.017 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:03.017 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:03.017 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:57:03.017 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:03.018 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:57:03.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:03.022 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:57:03.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:57:03.022 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:57:03.022 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:57:03.022 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:57:03.022 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:57:03.023 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:57:03.023 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.023 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.024 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:03.025 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:03.028 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:57:03.507 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:57:03.553 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:57:03.555 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:57:03.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:03.557 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:57:03.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:03.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:03.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:03.592 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:57:03.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:03.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:03.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:03.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:03.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:03.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:03.602 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:03.602 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:03.602 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:03.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:03.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:57:04.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:04.026 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:04.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:04.028 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:04.451 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:57:04.465 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:57:04.922 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:57:05.027 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:05.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:05.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:05.030 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:05.392 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:57:05.863 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:57:06.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:06.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:06.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:06.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:06.337 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:57:06.809 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:57:07.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:07.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:07.030 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:07.032 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:07.282 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:57:07.752 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:57:08.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:08.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:08.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:08.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:08.225 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:57:08.698 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:57:09.171 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:57:09.644 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:57:10.117 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:57:10.589 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:57:11.060 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:57:11.533 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:57:12.006 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:57:12.478 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:57:12.951 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:57:13.424 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:57:13.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:13.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:13.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:13.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:13.620 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:13.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:13.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:13.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:13.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:13.623 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:13.623 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:13.623 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:13.623 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:57:13.623 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:13.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:13.623 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2289 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:18.627 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:18.627 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:18.627 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:18.627 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:18.627 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:18.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:18.635 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:18.636 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:18.637 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:18.637 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:18.637 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:57:18.640 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:57:18.640 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:57:18.640 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:18.641 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:18.641 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:18.641 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:57:18.642 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:18.642 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:57:18.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:18.643 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:57:18.644 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:57:18.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:18.644 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:18.644 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:18.644 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:57:18.644 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:18.644 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:57:18.645 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:18.646 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:18.646 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:57:18.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:57:18.649 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:57:18.649 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:57:18.649 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:18.654 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:57:19.132 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:57:19.171 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:57:19.172 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:57:19.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:19.175 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:57:19.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:19.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:19.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:19.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:19.193 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:19.193 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:19.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:19.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:19.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:19.237 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:19.237 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:19.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:19.238 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:19.605 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:57:19.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:19.616 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:19.617 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:19.617 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:19.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:19.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:19.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:19.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:19.636 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:19.636 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:19.636 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:19.636 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:19.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:19.651 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:19.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:19.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:19.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:19.655 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:57:19.655 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:57:19.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:19.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.078 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:57:20.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:20.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:20.336 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:20.336 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:57:20.353 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:20.353 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:20.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:20.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.355 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:20.355 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:20.355 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:20.355 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:20.420 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:20.428 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:20.428 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:20.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:20.515 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.516 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:20.516 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:20.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:20.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:20.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:20.533 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.533 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:20.533 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:20.533 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:20.533 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:20.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:20.545 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:57:20.545 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:57:20.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.545 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.550 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:57:20.652 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:20.652 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:20.653 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:20.653 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:20.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:20.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:20.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:20.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:20.945 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:57:20.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:20.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:20.958 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:20.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:20.958 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:20.958 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:20.958 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:20.959 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:20.959 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:57:20.959 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:20.959 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:20.959 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:20.959 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:20.960 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:20.960 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:20.960 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:25.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:25.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:25.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:25.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:25.963 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:25.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:25.963 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:25.963 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:25.963 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:57:25.964 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:57:25.964 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:57:25.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:25.965 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:25.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:25.965 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:57:25.965 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:25.965 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:57:25.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:25.965 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:57:25.966 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:57:25.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:25.966 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:25.966 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:25.966 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:57:25.966 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:25.966 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:57:25.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:25.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:25.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:57:25.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:57:25.969 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:57:25.969 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:57:25.969 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.969 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:25.974 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:57:26.449 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:57:26.492 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:57:26.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:26.494 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:57:26.496 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:57:26.518 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:26.518 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:26.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:26.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:26.526 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:26.526 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:26.526 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:26.527 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:26.541 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:57:26.546 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 02:57:26.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:26.553 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:26.553 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:26.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:26.554 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:26.919 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:57:26.925 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:26.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:26.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:26.929 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:26.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:26.940 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:26.944 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:26.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:26.945 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:26.945 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:26.945 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:57:26.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:26.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:26.945 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:26.946 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:26.946 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:26.946 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:26.946 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:26.946 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:26.946 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=212 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:31.950 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:31.950 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:31.950 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:31.950 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:31.950 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:31.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:31.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:31.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:31.958 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:31.958 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:31.958 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:57:31.959 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:57:31.960 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:57:31.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:31.960 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:31.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:31.960 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:57:31.960 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:31.960 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:57:31.960 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:31.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:31.962 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:57:31.962 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:31.964 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:31.964 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:57:31.964 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:57:31.967 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:57:31.967 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:57:31.967 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.968 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:31.972 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:57:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:57:32.490 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:57:32.491 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:57:32.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:32.494 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:57:32.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:32.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:32.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:32.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:32.517 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:32.517 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:32.517 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:32.517 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:32.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:32.554 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:32.555 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:32.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:32.555 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:32.670 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:32.922 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:57:32.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:32.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:32.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:32.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:33.393 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:57:33.864 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:57:33.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:33.971 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:33.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:33.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:34.338 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:57:34.810 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:57:34.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:34.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:34.972 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:34.972 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:35.283 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:57:35.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:35.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:35.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:35.681 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:35.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:35.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:35.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:35.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:35.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:35.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:35.702 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:35.702 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:35.754 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:35.756 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:57:35.759 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:57:35.759 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 02:57:35.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:35.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:35.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:35.973 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:35.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:35.974 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:35.974 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:36.227 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:57:36.700 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:57:36.974 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:36.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:36.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:36.975 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:37.172 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:57:37.645 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:57:38.118 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:57:38.590 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:57:38.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:38.925 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:38.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:38.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:38.926 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:57:38.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:38.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:38.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:38.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:38.946 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:38.946 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:38.946 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:38.947 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:38.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:38.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:38.964 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:38.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:38.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:39.062 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:57:39.288 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:39.535 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:57:40.007 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:57:40.480 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:57:40.953 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:57:41.426 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:57:41.898 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:57:42.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:42.295 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:42.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:42.297 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:42.314 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:42.315 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:42.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:42.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:42.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:42.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:42.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:42.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:42.369 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:57:42.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:42.379 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:57:42.379 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:57:42.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:42.379 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:42.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:42.842 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:57:43.315 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:57:43.786 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:57:44.259 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:57:44.732 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:57:45.204 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:57:45.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:45.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:45.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:45.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:45.532 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:57:45.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:45.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:45.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:45.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:45.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:45.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:45.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:45.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:45.545 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:57:45.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:45.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:45.545 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2932 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:57:50.549 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:57:50.549 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:57:50.549 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:50.549 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:50.549 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:50.549 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:50.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:57:50.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:50.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:50.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:57:50.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:57:50.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:57:50.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:57:50.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:50.564 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:50.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:57:50.564 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:57:50.565 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:57:50.565 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:57:50.565 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:50.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:57:50.567 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:57:50.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:50.567 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:50.567 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:57:50.567 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:57:50.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:57:50.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:57:50.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:50.570 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:57:50.570 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:57:50.570 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:50.570 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:57:50.571 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:57:50.571 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:57:50.571 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:57:50.571 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:57:50.571 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.574 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:57:50.575 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:57:50.575 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:57:50.575 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.576 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:57:50.576 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:57:50.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:57:50.579 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:57:51.056 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:57:51.091 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:57:51.092 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:57:51.092 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:57:51.093 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:57:51.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:57:51.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:57:51.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:57:51.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:57:51.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:57:51.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:57:51.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:57:51.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:57:51.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:57:51.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:51.578 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:51.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:51.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:52.000 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:57:52.473 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:57:52.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:52.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:52.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:52.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:52.945 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:57:53.417 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:57:53.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:53.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:53.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:53.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:53.891 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:57:54.364 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:57:54.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:54.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:54.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:54.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:54.836 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:57:55.307 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:57:55.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:57:55.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:57:55.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:57:55.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:57:55.780 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:57:56.252 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:57:56.724 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:57:57.195 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:57:57.669 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:57:58.141 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:57:58.613 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:57:59.084 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:57:59.557 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:58:00.030 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:58:00.502 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:58:00.981 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:58:01.453 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:58:01.924 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:58:02.397 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:58:02.870 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:58:03.342 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:58:03.813 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:58:04.287 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:58:04.759 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:58:05.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:58:05.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:58:05.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:58:05.051 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:58:05.051 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:58:10.059 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:58:10.059 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:58:10.059 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:58:10.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:58:10.059 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:58:10.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:58:10.072 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:58:10.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:58:10.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:10.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:58:10.073 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:58:10.074 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:58:10.074 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:58:10.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:58:10.075 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:10.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:58:10.075 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:58:10.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:58:10.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:58:10.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:58:10.076 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:58:10.076 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:58:10.076 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:58:10.078 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:58:10.078 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:58:10.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:58:10.080 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:58:10.080 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:58:10.080 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:10.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:10.085 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:58:10.561 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:58:10.610 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:58:10.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:58:10.614 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:58:10.617 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:58:10.639 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:58:10.639 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:58:10.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:58:10.644 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:58:10.645 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:58:10.645 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:58:10.645 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:58:10.645 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:58:10.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:58:10.663 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 02:58:10.663 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 02:58:10.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:58:10.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:58:11.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:58:11.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:11.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:11.505 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:58:11.979 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:58:12.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:12.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:12.451 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:58:12.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:58:12.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:58:12.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:58:12.664 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 02:58:12.665 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:58:12.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:58:12.667 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:58:12.667 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:58:12.668 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:58:12.668 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:58:12.925 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:58:13.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:13.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:13.087 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:13.397 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:58:13.869 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:58:14.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:14.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:14.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:14.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:14.343 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:58:14.815 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:58:15.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:15.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:15.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:15.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:15.287 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:58:15.758 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:58:16.231 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:58:16.704 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:58:17.176 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:58:17.647 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:58:18.121 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:58:18.593 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:58:19.065 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:58:19.538 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:58:20.011 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:58:20.483 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:58:20.954 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:58:21.427 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:58:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:58:22.372 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:58:22.843 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:58:23.313 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:58:23.787 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:58:24.260 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:58:24.732 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:58:25.203 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:58:25.676 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:58:26.148 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:58:26.621 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:58:27.094 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:58:27.567 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:58:28.039 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:58:28.510 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:58:28.983 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:58:29.456 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:58:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:58:30.399 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:58:30.872 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:58:31.344 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:58:31.816 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:58:32.287 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:58:32.758 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:58:33.232 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:58:33.704 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:58:34.176 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:58:34.647 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:58:35.120 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 02:58:35.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:58:35.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:58:35.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:58:35.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:35.406 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:35.406 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:35.406 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:35.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:58:35.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:58:35.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:58:35.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:58:35.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:58:35.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:58:35.411 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:58:35.411 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5471 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:35.412 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:58:40.413 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:58:40.413 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:58:40.413 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:58:40.413 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:58:40.413 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:58:40.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:58:40.419 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:58:40.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:58:40.420 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:40.420 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:58:40.420 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:58:40.422 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:58:40.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:58:40.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:58:40.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:40.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:58:40.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:58:40.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:58:40.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:58:40.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:40.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:58:40.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:58:40.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:58:40.425 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:40.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:58:40.425 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:58:40.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:58:40.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:58:40.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:40.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:58:40.427 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:58:40.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:58:40.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:58:40.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:58:40.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:58:40.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:58:40.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:58:40.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.429 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:58:40.429 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:58:40.429 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:58:40.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:58:40.434 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:58:40.912 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:58:40.957 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:58:40.959 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:58:40.961 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:58:40.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:58:40.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:58:40.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:58:40.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:58:40.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:58:40.964 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:58:40.965 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:58:40.965 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:58:40.965 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:58:41.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:58:41.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:41.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:41.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:41.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:41.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:58:42.328 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:58:42.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:42.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:42.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:42.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:42.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:58:43.273 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:58:43.436 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:43.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:43.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:43.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:43.746 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:58:44.218 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:58:44.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:44.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:44.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:44.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:44.690 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:58:45.161 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:58:45.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:58:45.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:58:45.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:58:45.438 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:58:45.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:58:46.107 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:58:46.579 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:58:47.053 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:58:47.525 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:58:47.997 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:58:48.468 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:58:48.942 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:58:49.414 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:58:49.886 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:58:50.360 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:58:50.832 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:58:51.304 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:58:51.775 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:58:52.248 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:58:52.721 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:58:53.192 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:58:53.664 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:58:54.137 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:58:54.610 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:58:55.082 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:58:55.553 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:58:56.026 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:58:56.498 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:58:56.971 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:58:57.444 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:58:57.917 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:58:58.389 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:58:58.860 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:58:59.333 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:58:59.806 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:59:00.277 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:59:00.749 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:59:01.222 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:59:01.694 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:59:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:59:02.445 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:59:02.445 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:59:02.450 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:02.450 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:02.450 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:02.450 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:02.453 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:59:02.453 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:59:02.453 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:59:02.453 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:59:02.453 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:59:02.453 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:59:02.453 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:02.453 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4756 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:07.456 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:59:07.456 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:59:07.456 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:59:07.456 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:59:07.456 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:59:07.456 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:59:07.463 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:59:07.463 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:59:07.463 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:07.464 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:59:07.464 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:59:07.466 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:59:07.466 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:59:07.466 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:59:07.466 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:07.467 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:59:07.467 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:59:07.467 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:59:07.467 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:59:07.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:07.469 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:59:07.469 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:59:07.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:59:07.470 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:07.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:59:07.470 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:59:07.470 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:59:07.470 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:59:07.470 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:07.474 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:59:07.474 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:59:07.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:59:07.474 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:07.474 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:59:07.474 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:59:07.474 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:59:07.474 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:59:07.475 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.480 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:59:07.481 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:59:07.481 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:59:07.481 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.481 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:07.486 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:59:07.964 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:59:08.012 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:59:08.012 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:59:08.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:59:08.015 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:59:08.018 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:59:08.018 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:59:08.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:59:08.018 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:59:08.019 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:59:08.019 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:59:08.019 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:59:08.019 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:59:08.437 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:59:08.485 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:08.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:08.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:08.487 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:08.910 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:59:09.383 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:59:09.487 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:09.487 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:09.487 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:09.488 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:09.855 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:59:10.326 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:59:10.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:10.489 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:10.799 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:59:11.272 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:59:11.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:11.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:11.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:11.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:11.744 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:59:12.215 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:59:12.490 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:12.685 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:59:13.159 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:59:13.631 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:59:14.103 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:59:14.574 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:59:15.048 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:59:15.521 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:59:15.992 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:59:16.463 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:59:16.934 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:59:17.405 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:59:17.879 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:59:18.351 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:59:18.823 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:59:19.296 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:59:19.769 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:59:20.241 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:59:20.715 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:59:21.187 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:59:21.659 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:59:22.131 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:59:22.601 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:59:23.075 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:59:23.547 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:59:24.019 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:59:24.490 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:59:24.964 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:59:25.436 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:59:25.908 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:59:26.381 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:59:26.854 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:59:27.326 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:59:27.797 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:59:28.270 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:59:28.743 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:59:29.215 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:59:29.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:59:29.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:59:29.506 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:29.506 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:29.506 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:29.506 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:29.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:59:29.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:59:29.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:59:29.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:59:29.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:59:29.511 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 02:59:29.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:59:29.511 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:29.511 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:29.511 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:29.511 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:29.512 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:29.512 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:29.512 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4758 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 02:59:34.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 02:59:34.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 02:59:34.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:59:34.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:59:34.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:59:34.512 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:59:34.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 02:59:34.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:59:34.519 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:34.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 02:59:34.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 02:59:34.521 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 02:59:34.522 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 02:59:34.522 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:59:34.522 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:34.523 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 02:59:34.523 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 02:59:34.523 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 02:59:34.523 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 02:59:34.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:34.525 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 02:59:34.525 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 02:59:34.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:59:34.526 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:34.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 02:59:34.526 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 02:59:34.526 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 02:59:34.526 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 02:59:34.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:34.528 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 02:59:34.528 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 02:59:34.528 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:59:34.528 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 02:59:34.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 02:59:34.528 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 02:59:34.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 02:59:34.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 02:59:34.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.532 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 02:59:34.532 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 02:59:34.532 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 02:59:34.532 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 02:59:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 02:59:34.537 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 02:59:35.014 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 02:59:35.059 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 02:59:35.061 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 02:59:35.064 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 02:59:35.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 02:59:35.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 02:59:35.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 02:59:35.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 02:59:35.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 02:59:35.068 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 02:59:35.068 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 02:59:35.068 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 02:59:35.068 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 02:59:35.486 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 02:59:35.534 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:35.535 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:35.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:35.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:35.958 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 02:59:36.431 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 02:59:36.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:36.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:36.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:36.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:36.904 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 02:59:37.376 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 02:59:37.537 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:37.537 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:37.538 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:37.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:37.847 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 02:59:38.320 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 02:59:38.538 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:38.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:38.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:38.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:38.791 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 02:59:39.263 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 02:59:39.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 02:59:39.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 02:59:39.539 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 02:59:39.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 02:59:39.734 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 02:59:40.205 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 02:59:40.676 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 02:59:41.150 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 02:59:41.622 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 02:59:42.094 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 02:59:42.565 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 02:59:43.039 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 02:59:43.511 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 02:59:43.983 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 02:59:44.454 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 02:59:44.927 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 02:59:45.400 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 02:59:45.872 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 02:59:46.343 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 02:59:46.816 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 02:59:47.288 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 02:59:47.760 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 02:59:48.231 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 02:59:48.699 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 02:59:49.172 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 02:59:49.644 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 02:59:50.115 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 02:59:50.589 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 02:59:51.061 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 02:59:51.533 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 02:59:52.006 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 02:59:52.479 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 02:59:52.951 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 02:59:53.422 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 02:59:53.893 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 02:59:54.366 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 02:59:54.839 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 02:59:55.310 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 02:59:55.782 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 02:59:56.255 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 02:59:56.727 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 02:59:57.200 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 02:59:57.671 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 02:59:58.144 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 02:59:58.616 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 02:59:59.088 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 02:59:59.559 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:00:00.033 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:00:00.505 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:00:00.977 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:00:01.451 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:00:01.918 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:00:02.388 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:00:02.859 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:00:03.331 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:00:03.802 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:00:04.272 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:00:04.743 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:00:05.217 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:00:05.689 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:00:06.161 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:00:06.632 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:00:07.105 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:00:07.578 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:00:08.050 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:00:08.521 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:00:08.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:00:08.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:00:08.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:08.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:08.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:08.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:08.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:08.561 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:08.561 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:08.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:08.561 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:08.561 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:08.561 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:08.562 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7355 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:13.565 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:13.565 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:13.565 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:13.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:13.565 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:13.565 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:13.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:13.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:13.572 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:13.572 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:13.572 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:00:13.574 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:00:13.574 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:00:13.575 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:13.575 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:13.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:13.575 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:00:13.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:13.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:00:13.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:13.577 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:13.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:00:13.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:13.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:00:13.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:00:13.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:13.579 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:13.579 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:13.579 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:00:13.579 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:13.579 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:00:13.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:13.581 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:00:13.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:00:13.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:00:13.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:00:13.581 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:00:13.582 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:00:13.582 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:00:13.582 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:13.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:13.583 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:13.587 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:00:14.066 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:00:14.107 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:00:14.109 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:00:14.110 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:00:14.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:00:14.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:00:14.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:00:14.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:00:14.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:00:14.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:00:14.113 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:00:14.113 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:00:14.113 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:00:14.538 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:00:14.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:14.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:14.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:14.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:15.009 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:00:15.483 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:00:15.585 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:15.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:15.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:15.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:15.955 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:00:16.427 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:00:16.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:16.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:16.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:16.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:16.898 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:00:17.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:00:17.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:17.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:17.587 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:17.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:17.844 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:00:18.315 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:00:18.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:18.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:18.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:18.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:18.787 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:00:19.260 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:00:19.732 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:00:20.205 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:00:20.678 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:00:21.151 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:00:21.623 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:00:22.094 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:00:22.567 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:00:23.039 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:00:23.512 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:00:23.982 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:00:24.453 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:00:24.926 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:00:25.399 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:00:25.871 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:00:26.342 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:00:26.815 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:00:27.288 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:00:27.759 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:00:28.231 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:00:28.704 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:00:29.176 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:00:29.648 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:00:30.119 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:00:30.593 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:00:31.065 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:00:31.537 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:00:32.008 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:00:32.482 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:00:32.954 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:00:33.426 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:00:33.897 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:00:34.370 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:00:34.843 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:00:35.315 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:00:35.786 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:00:36.259 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:00:36.732 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:00:37.203 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:00:37.675 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:00:38.148 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:00:38.620 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:00:39.092 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:00:39.563 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:00:40.036 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:00:40.509 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:00:40.981 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:00:41.452 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:00:41.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:00:41.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:00:41.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:41.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:41.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:41.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:41.609 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:41.609 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:41.609 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:41.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:41.609 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:41.609 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:41.609 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:41.609 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6054 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:46.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:46.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:46.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:46.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:46.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:46.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:46.627 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:46.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:46.629 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:46.629 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:46.630 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:00:46.633 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:00:46.634 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:00:46.634 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:46.634 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:46.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:46.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:00:46.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:46.636 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:00:46.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:46.638 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:00:46.638 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:00:46.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:46.638 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:46.638 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:46.638 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:00:46.638 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:46.638 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:00:46.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:46.641 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:00:46.641 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:00:46.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:46.641 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:46.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:46.641 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:00:46.642 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:46.642 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:00:46.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.645 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:00:46.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:00:46.646 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:00:46.646 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:46.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:46.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:46.650 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:00:47.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:00:47.176 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:00:47.178 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:00:47.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:00:47.180 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:00:47.192 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:47.192 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:47.192 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:47.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:47.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:47.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:47.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:47.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:47.197 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:00:47.197 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:47.197 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:47.197 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:47.197 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.199 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:52.199 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:52.200 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:52.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:52.200 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:52.200 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:52.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:52.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:52.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:52.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:52.208 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:00:52.212 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:00:52.212 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:00:52.213 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:52.213 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:52.213 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:52.214 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:00:52.214 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:52.214 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:00:52.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:52.216 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:00:52.217 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:00:52.217 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:52.217 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:52.217 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:52.218 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:00:52.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:52.218 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:00:52.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:52.220 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:52.220 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:00:52.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:52.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:00:52.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:00:52.224 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:00:52.224 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:00:52.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:52.229 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:00:52.707 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:00:52.754 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:00:52.756 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:00:52.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:00:52.758 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:00:52.769 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:52.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:52.770 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:52.770 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:52.774 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:52.774 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:52.774 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:52.774 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:52.774 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:00:52.775 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:52.775 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:52.775 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:57.777 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:57.778 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:57.778 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:57.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:57.778 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:57.778 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:57.786 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:57.788 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:57.788 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:57.789 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:00:57.789 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:00:57.793 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:00:57.794 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:00:57.794 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:57.794 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:57.795 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:57.795 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:00:57.796 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:00:57.796 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:00:57.796 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:57.797 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:00:57.798 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:00:57.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:57.798 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:57.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:57.798 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:00:57.798 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:00:57.798 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:00:57.798 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:57.800 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:00:57.801 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:00:57.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:57.801 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:00:57.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:57.801 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:00:57.801 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:00:57.801 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:00:57.801 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:57.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:00:57.805 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:00:57.805 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:00:57.805 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.805 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.806 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:00:57.809 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:00:58.287 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:00:58.335 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:00:58.337 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:00:58.339 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:00:58.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:00:58.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:00:58.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:00:58.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:00:58.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:00:58.361 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:00:58.361 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:00:58.361 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:00:58.361 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:00:58.361 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:00:58.361 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:00:58.361 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.362 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:00:58.363 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:03.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:03.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:03.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:03.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:03.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:03.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:03.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:03.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:03.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:03.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:03.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:01:03.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:01:03.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:01:03.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:03.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:03.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:03.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:01:03.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:03.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:01:03.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:03.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:01:03.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:01:03.381 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:03.381 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:03.381 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:03.381 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:01:03.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:03.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:01:03.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:03.385 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:01:03.385 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:01:03.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:03.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:03.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:03.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:01:03.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:03.386 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:01:03.386 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:03.391 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:01:03.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:01:03.391 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:01:03.391 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:01:03.391 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:01:03.391 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.392 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:01:03.392 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:01:03.392 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:01:03.392 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:03.397 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:01:03.875 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:01:03.924 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:01:03.926 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:01:03.927 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:01:03.927 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:01:03.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:03.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:03.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:01:03.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:01:03.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:01:03.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:01:03.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:01:03.928 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:01:04.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:01:04.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:04.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:04.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:04.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:04.818 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:01:05.291 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:01:05.397 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:05.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:05.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:05.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:05.764 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:01:06.236 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:01:06.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:06.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:06.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:06.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:06.707 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:01:07.180 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:01:07.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:07.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:07.401 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:07.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:07.652 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:01:08.124 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:01:08.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:08.402 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:08.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:08.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:08.595 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:01:09.069 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:01:09.541 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:01:10.013 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:01:10.484 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:01:10.958 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:01:11.430 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:01:11.902 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:01:11.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:11.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:11.978 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:11.978 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:11.978 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:11.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:11.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:11.981 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:11.981 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:11.981 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:11.981 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:01:11.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:11.981 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:11.981 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:16.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:16.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:16.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:16.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:16.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:16.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:16.988 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:16.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:16.989 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:16.989 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:16.989 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:16.990 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:16.990 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:01:16.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:16.991 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:16.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:01:16.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:16.992 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:01:16.992 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:01:16.992 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:16.992 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:16.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:16.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:01:16.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:16.993 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:01:16.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:16.994 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:01:16.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:01:16.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:01:16.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:01:16.994 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:01:16.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:01:16.995 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:01:16.995 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:01:16.995 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:16.995 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:16.999 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:01:17.477 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:01:17.522 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:01:17.524 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:01:17.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:01:17.526 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:01:17.528 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:17.528 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:17.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:01:17.529 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:01:17.529 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:01:17.529 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:01:17.530 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:01:17.530 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:01:17.949 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:01:17.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:17.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:17.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:17.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:18.420 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:01:18.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:01:18.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:19.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:19.366 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:01:19.838 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:01:20.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:20.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:20.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:20.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:20.309 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:01:20.783 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:01:21.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:21.003 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:21.255 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:01:21.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:01:22.003 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:22.004 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:22.004 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:22.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:22.198 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:01:22.671 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:01:23.144 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:01:23.615 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:01:24.087 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:01:24.560 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:01:25.032 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:01:25.504 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:01:25.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:25.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:25.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:25.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:25.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:25.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:25.588 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:25.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:25.588 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:25.588 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:25.588 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:25.588 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:25.588 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:25.589 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:30.592 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:30.592 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:30.592 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:30.592 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:30.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:30.592 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:30.599 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:30.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:30.599 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:30.599 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:30.600 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:01:30.602 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:01:30.602 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:01:30.602 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:30.602 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:30.602 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:30.603 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:01:30.603 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:30.603 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:01:30.603 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:30.605 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:01:30.605 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:01:30.605 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:30.605 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:30.605 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:30.606 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:01:30.606 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:30.606 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:01:30.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:30.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:30.608 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:01:30.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.612 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:01:30.613 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:01:30.613 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:01:30.613 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:30.617 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:01:31.095 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:01:31.141 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:01:31.143 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:01:31.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:01:31.146 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:01:31.149 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:31.149 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:01:31.150 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:01:31.150 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:01:31.150 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:01:31.151 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:01:31.151 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:01:31.567 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:01:31.615 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:31.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:31.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:31.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:32.038 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:01:32.509 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:01:32.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:32.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:32.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:32.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:32.983 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:01:33.455 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:01:33.617 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:33.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:33.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:33.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:33.926 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:01:34.397 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:01:34.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:34.619 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:34.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:34.619 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:34.871 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:01:35.343 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:01:35.619 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:35.620 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:35.620 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:35.620 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:35.815 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:01:36.286 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:01:36.757 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:01:37.230 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:01:37.703 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:01:38.175 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:01:38.646 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:01:39.119 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:01:39.197 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:39.197 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:39.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:39.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:39.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:39.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:39.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:39.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:39.206 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:01:39.207 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:39.207 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:39.207 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:44.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:44.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:44.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:44.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:44.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:44.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:44.217 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:44.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:44.218 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:44.218 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:44.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:01:44.223 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:01:44.223 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:01:44.223 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:44.223 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:44.223 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:44.223 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:01:44.224 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:44.224 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:01:44.224 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:44.228 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:01:44.228 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:01:44.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:44.228 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:44.228 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:44.228 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:01:44.228 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:44.228 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:01:44.229 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:44.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:01:44.232 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:01:44.232 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:44.232 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:44.232 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:44.232 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:01:44.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:44.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:01:44.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:44.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:01:44.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.237 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:01:44.237 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:01:44.237 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:01:44.237 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:44.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:44.242 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:01:44.722 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:01:44.764 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:01:44.766 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:01:44.768 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:01:44.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:01:44.771 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:44.771 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:44.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:01:44.772 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:01:44.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:01:44.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:01:44.773 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:01:44.773 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:01:45.194 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:01:45.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:45.240 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:45.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:45.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:45.665 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:01:46.138 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:01:46.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:46.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:46.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:46.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:46.611 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:01:47.083 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:01:47.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:47.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:47.554 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:01:48.027 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:01:48.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:48.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:48.244 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:48.244 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:48.500 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:01:48.972 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:01:49.244 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:49.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:49.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:49.245 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:49.443 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:01:49.917 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:01:50.389 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:01:50.861 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:01:51.332 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:01:51.806 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:01:52.278 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:01:52.750 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:01:52.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:52.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:52.826 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:52.826 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:52.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:52.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:52.828 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:52.828 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:52.828 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:52.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:52.828 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:52.828 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:52.828 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:01:52.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:52.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:52.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:52.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:52.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:52.828 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:01:57.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:01:57.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:01:57.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:57.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:57.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:57.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:57.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:01:57.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:57.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:57.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:01:57.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:01:57.840 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:01:57.840 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:57.841 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:01:57.841 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:01:57.841 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:57.842 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:57.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:01:57.842 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:01:57.842 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:01:57.842 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:01:57.842 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:57.843 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:01:57.843 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:01:57.843 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:57.844 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:01:57.844 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:01:57.844 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:01:57.844 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:01:57.844 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:01:57.845 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:01:57.845 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:01:57.845 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.845 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.846 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:01:57.846 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:01:57.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:01:57.850 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:01:58.327 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:01:58.366 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:01:58.367 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:01:58.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:01:58.368 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:01:58.371 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:01:58.371 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:01:58.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:01:58.371 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:01:58.371 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:01:58.372 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:01:58.372 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:01:58.372 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:01:58.799 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:01:58.847 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:58.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:58.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:58.847 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:01:59.270 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:01:59.743 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:01:59.848 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:01:59.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:01:59.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:01:59.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:00.216 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:02:00.688 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:02:00.849 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:00.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:00.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:01.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:02:01.632 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:02:01.850 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:01.850 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:01.850 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:01.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:02.105 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:02:02.577 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:02:02.851 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:02.851 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:02.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:02.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:03.048 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:02:03.519 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:02:03.992 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:02:04.464 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:02:04.937 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:02:05.407 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:02:05.881 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:02:06.353 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:02:06.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:02:06.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:02:06.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:06.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:06.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:06.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:06.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:06.435 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:06.435 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:06.435 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:06.435 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:02:06.435 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:02:06.435 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:06.436 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:11.438 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:02:11.438 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:02:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:11.438 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:11.438 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:11.446 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:11.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:02:11.448 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:11.448 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:02:11.448 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:02:11.451 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:02:11.451 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:02:11.452 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:02:11.452 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:11.452 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:11.452 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:02:11.453 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:02:11.453 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:02:11.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:11.454 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:02:11.454 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:02:11.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:02:11.454 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:11.454 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:11.454 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:02:11.454 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:02:11.454 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:02:11.455 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:11.456 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:02:11.456 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:02:11.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:02:11.457 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:11.457 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:11.457 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:02:11.457 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:02:11.457 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:02:11.457 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:02:11.459 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:02:11.460 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:02:11.460 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:02:11.460 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.460 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.461 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:11.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.461 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:11.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:11.464 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:02:11.941 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:02:11.989 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:02:11.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:02:11.993 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:02:11.996 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:02:11.999 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:02:11.999 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:02:12.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:02:12.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:02:12.000 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:02:12.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:02:12.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:02:12.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:02:12.413 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:02:12.462 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:12.462 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:12.462 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:12.463 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:12.884 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:02:13.355 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:02:13.464 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:13.464 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:13.464 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:13.464 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:13.829 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:02:14.301 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:02:14.465 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:14.465 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:14.466 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:14.466 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:14.773 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:02:15.244 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:02:15.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:15.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:15.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:15.467 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:15.715 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:02:16.188 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:02:16.468 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:16.468 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:16.469 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:16.469 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:16.660 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:02:17.132 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:02:17.603 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:02:18.076 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:02:18.548 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:02:19.020 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:02:19.492 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:02:19.965 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:02:20.437 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:02:20.909 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:02:21.380 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:02:21.853 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:02:22.325 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:02:22.797 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:02:23.268 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:02:23.742 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:02:24.214 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:02:24.686 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:02:25.157 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:02:25.630 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:02:26.103 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:02:26.574 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:02:27.046 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:02:27.519 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:02:27.991 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:02:28.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:02:28.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:02:28.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:28.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:28.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:28.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:28.049 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:28.049 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:28.049 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:02:28.049 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:02:28.049 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:02:28.049 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:28.049 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:28.049 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3584 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:33.051 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:02:33.052 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:02:33.052 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:33.052 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:33.052 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:33.052 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:33.059 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:33.060 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:02:33.061 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:33.061 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:02:33.061 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:02:33.065 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:02:33.065 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:02:33.065 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:02:33.066 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:33.066 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:33.066 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:02:33.067 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:02:33.067 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:02:33.067 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:33.069 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:02:33.069 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:02:33.069 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:02:33.069 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:33.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:33.070 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:02:33.070 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:02:33.070 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:02:33.070 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:33.072 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:02:33.072 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:02:33.072 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:02:33.072 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:33.072 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:33.072 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:02:33.073 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:02:33.073 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:02:33.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:02:33.077 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:02:33.077 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:02:33.077 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.077 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:33.082 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:02:33.559 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:02:33.605 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:02:33.608 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:02:33.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:02:33.612 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:02:33.626 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:02:33.626 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:02:33.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:02:33.626 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:02:33.626 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:02:33.627 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:02:33.627 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:02:33.627 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:02:34.032 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:02:34.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:34.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:34.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:34.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:34.502 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:02:34.973 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:02:35.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:35.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:35.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:35.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:35.444 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:02:35.918 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:02:36.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:36.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:36.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:36.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:36.390 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:02:36.862 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:02:37.084 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:37.084 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:37.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:37.084 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:37.333 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:02:37.807 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:02:38.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:38.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:38.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:38.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:38.279 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:02:38.750 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:02:39.222 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:02:39.714 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:02:40.187 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:02:40.658 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:02:41.131 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:02:41.603 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:02:41.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:02:41.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:02:41.674 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:41.674 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:41.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:41.675 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:41.679 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:41.679 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:41.679 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:41.679 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:41.679 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:02:41.679 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:02:41.679 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:41.680 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:02:46.682 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:02:46.682 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:02:46.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:46.682 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:46.682 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:46.682 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:46.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:02:46.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:02:46.690 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:46.690 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:02:46.690 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:02:46.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:02:46.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:02:46.695 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:02:46.695 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:46.695 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:02:46.696 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:02:46.696 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:02:46.696 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:02:46.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:46.697 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:02:46.698 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:02:46.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:02:46.698 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:46.698 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:02:46.698 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:02:46.698 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:02:46.698 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:02:46.699 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:46.701 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:02:46.702 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:02:46.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:02:46.702 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:02:46.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:02:46.702 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:02:46.702 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:02:46.702 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:02:46.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:02:46.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:02:46.706 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:02:46.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:02:46.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:02:46.710 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:02:47.188 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:02:47.230 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:02:47.232 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:02:47.233 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:02:47.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:02:47.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:02:47.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:02:47.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:02:47.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:02:47.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:02:47.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:02:47.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:02:47.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:02:47.660 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:02:47.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:47.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:47.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:47.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:48.131 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:02:48.602 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:02:48.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:48.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:48.710 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:48.710 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:49.076 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:02:49.548 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:02:49.710 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:49.711 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:50.020 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:02:50.491 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:02:50.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:50.712 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:50.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:50.712 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:50.964 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:02:51.436 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:02:51.712 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:02:51.713 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:02:51.713 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:02:51.713 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:02:51.908 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:02:52.382 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:02:52.854 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:02:53.326 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:02:53.797 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:02:54.270 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:02:54.743 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:02:55.215 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:02:55.686 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:02:56.159 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:02:56.631 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:02:57.103 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:02:57.574 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:02:58.047 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:02:58.520 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:02:58.991 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:02:59.463 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:02:59.936 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:03:00.408 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:03:00.880 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:03:01.352 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:03:01.825 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:03:02.297 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:03:02.769 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:03:03.240 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:03:03.294 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:03.295 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:03.302 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:03.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:03.302 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:03.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:03.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:03.305 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:03.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:03.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:03.305 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:03.305 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:03.305 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:03.305 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3586 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:08.311 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:08.311 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:08.311 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:08.311 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:08.311 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:08.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:08.314 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:08.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:08.314 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:08.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:08.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:08.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:08.315 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:08.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:08.315 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:08.315 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:08.315 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:08.315 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:08.315 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:08.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:08.316 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:08.316 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:08.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:08.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:08.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:08.317 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:08.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:08.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:08.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:08.318 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:08.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:08.320 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:08.320 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:08.320 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:08.320 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:08.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:08.325 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:08.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:08.846 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:08.848 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:08.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:08.850 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:08.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:08.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:08.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:08.905 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:08.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:08.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:08.908 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:08.908 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:08.908 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:08.908 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:08.908 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:08.908 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:13.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:13.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:13.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:13.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:13.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:13.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:13.930 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:13.930 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:13.930 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:13.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:13.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:13.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:13.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:13.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:13.936 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:13.936 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:13.936 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:13.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:13.938 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:13.938 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:13.939 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:13.939 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:13.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:13.939 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:13.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:13.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:13.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:13.941 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:13.941 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:13.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:13.942 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:13.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:13.942 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:13.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:13.942 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:13.942 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:13.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:13.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:13.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:13.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:13.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:13.950 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:14.429 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:14.473 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:14.475 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:14.476 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:14.477 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:14.496 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:14.496 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:14.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:14.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:14.513 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:14.513 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:14.513 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:14.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:14.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:14.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:14.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:14.515 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:14.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:14.516 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:19.520 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:19.520 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:19.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:19.520 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:19.520 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:19.520 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:19.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:19.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:19.529 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:19.529 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:19.529 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:19.532 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:19.533 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:19.533 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:19.533 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:19.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:19.534 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:19.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:19.534 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:19.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:19.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:19.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:19.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:19.535 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:19.535 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:19.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:19.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:19.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:19.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:19.537 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:19.537 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:19.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:19.537 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:19.538 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:19.538 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:19.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:19.538 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:19.538 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:19.543 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:19.543 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:19.543 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:19.548 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:20.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:20.080 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:20.083 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:20.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:20.085 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:20.109 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:20.109 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:20.110 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:20.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:20.127 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:20.127 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:20.127 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:20.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:20.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:20.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:20.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:20.129 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:20.129 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:20.129 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:20.129 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.135 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:25.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:25.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:25.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:25.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:25.142 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:25.142 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:25.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:25.143 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:25.145 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:25.145 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:25.145 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:25.145 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:25.146 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:25.146 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:25.146 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:25.146 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:25.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:25.147 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:25.147 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:25.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:25.148 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:25.148 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:25.148 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:25.148 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:25.148 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:25.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:25.149 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:25.149 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:25.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:25.150 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:25.150 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:25.150 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:25.150 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:25.150 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:25.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.152 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:25.152 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:25.152 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:25.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:25.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:25.157 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:25.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:25.686 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:25.688 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:25.688 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:25.688 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:25.708 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:25.708 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:25.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:25.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:25.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:25.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:25.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:25.734 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:25.734 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:25.734 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:25.734 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:25.734 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:25.734 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:25.734 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:25.734 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:25.735 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:30.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:30.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:30.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:30.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:30.738 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:30.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:30.745 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:30.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:30.745 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:30.745 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:30.745 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:30.749 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:30.750 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:30.750 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:30.750 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:30.751 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:30.751 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:30.752 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:30.752 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:30.752 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:30.754 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:30.754 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:30.754 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:30.754 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:30.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:30.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:30.756 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:30.756 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:30.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:30.757 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:30.757 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:30.757 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:30.757 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:30.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:30.758 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:30.758 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:30.758 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:30.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:30.761 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:30.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:30.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:30.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:30.761 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:30.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:30.762 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:30.762 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:30.762 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:30.767 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:31.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:31.287 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:31.291 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:31.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:31.293 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:31.311 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:31.311 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:31.312 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:31.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:31.342 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:31.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:31.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:31.349 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:31.349 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:31.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:31.352 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:31.352 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:31.352 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:31.352 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:31.352 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:31.352 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:31.352 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:31.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:31.352 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:31.353 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:31.353 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:31.353 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:31.353 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:31.353 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:03:36.355 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:36.355 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:36.355 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:36.355 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:36.355 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:36.355 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:36.362 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:36.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:36.362 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:36.362 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:36.362 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:36.363 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:36.363 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:36.363 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:36.363 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:36.363 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:36.363 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:36.364 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:36.364 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:36.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:36.364 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:36.365 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:36.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:36.365 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:36.365 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:36.365 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:36.365 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:36.365 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:36.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:36.366 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:36.366 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:36.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.369 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:36.369 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:36.369 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:36.370 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:36.370 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:36.374 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:36.852 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:36.897 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:36.900 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:36.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:36.902 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:36.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:36.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:36.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:36.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:36.946 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:36.947 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:36.951 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:36.952 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:36.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:36.952 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:36.953 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:36.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:36.953 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:36.953 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:36.953 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:03:36.953 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:36.953 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:41.960 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:03:41.960 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:03:41.960 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:41.960 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:41.960 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:41.960 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:41.968 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:03:41.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:41.970 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:41.970 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:03:41.970 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:03:41.975 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:03:41.975 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:03:41.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:41.976 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:41.976 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:03:41.976 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:03:41.976 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:03:41.976 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:03:41.976 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:41.980 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:03:41.980 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:03:41.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:41.981 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:41.981 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:03:41.981 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:03:41.981 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:03:41.981 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:03:41.982 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:41.985 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:03:41.985 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:03:41.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:41.985 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:03:41.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:03:41.986 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:03:41.986 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:03:41.986 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:03:41.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:41.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:03:41.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:03:41.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:03:41.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:03:41.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:03:41.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:03:41.992 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:03:41.992 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:03:41.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:03:41.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:03:41.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:03:42.474 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:03:42.524 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:03:42.527 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:03:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:03:42.529 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:03:42.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:03:42.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:03:42.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:03:42.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:03:42.539 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:03:42.539 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:03:42.539 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:03:42.539 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:03:42.946 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:03:42.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:42.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:42.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:42.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:43.417 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:03:43.888 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:03:43.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:43.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:43.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:43.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:44.361 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:03:44.834 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:03:44.998 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:44.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:44.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:44.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:45.306 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:03:45.777 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:03:46.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:46.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:46.000 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:46.000 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:46.250 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:03:46.723 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:03:47.001 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:03:47.001 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:03:47.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:03:47.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:03:47.195 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:03:47.666 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:03:48.139 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:03:48.611 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:03:49.083 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:03:49.554 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:03:50.027 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:03:50.500 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:03:50.972 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:03:51.443 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:03:51.916 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:03:52.389 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:03:52.860 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:03:53.332 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:03:53.805 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:03:54.277 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:03:54.750 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:03:55.221 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:03:55.694 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:03:56.166 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:03:56.638 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:03:57.112 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:03:57.584 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:03:58.056 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:03:58.527 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:03:59.001 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:03:59.473 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:03:59.945 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:04:00.416 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:04:00.889 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:04:01.362 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:04:01.834 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:04:02.305 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:04:02.778 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:04:03.250 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:04:03.722 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:04:04.194 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:04:04.667 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:04:05.139 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:04:05.611 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:04:06.082 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:04:06.556 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:04:07.028 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:04:07.500 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:04:07.971 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:04:08.445 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:04:08.917 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:04:09.389 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:04:09.862 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:04:10.335 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:04:10.807 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:04:11.278 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:04:11.751 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:04:12.224 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:04:12.696 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:04:13.167 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:04:13.640 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:04:14.112 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:04:14.584 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:04:15.055 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:04:15.529 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:04:16.001 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:04:16.012 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:04:16.012 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:04:16.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:16.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:16.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:16.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:16.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:16.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:16.022 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:16.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:16.022 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:16.022 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:16.022 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:16.022 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=7350 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:04:21.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:21.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:21.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:21.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:21.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:21.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:21.034 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:21.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:21.035 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:21.035 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:21.035 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:04:21.038 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:04:21.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:04:21.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:21.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:21.038 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:21.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:04:21.039 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:21.039 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:04:21.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:21.040 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:04:21.040 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:04:21.040 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:21.040 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:21.041 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:21.041 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:04:21.041 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:21.041 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:04:21.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:21.042 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:04:21.042 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:04:21.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:21.043 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:21.043 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:21.043 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:04:21.043 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:21.043 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:04:21.043 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:21.045 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:04:21.046 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:04:21.046 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:04:21.046 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.046 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:21.050 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:04:21.527 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:04:21.571 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:04:21.574 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:04:21.576 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:04:21.576 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:04:21.999 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:04:22.048 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:22.048 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:22.048 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:22.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:22.474 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:04:22.946 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:04:23.050 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:23.050 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:23.050 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:23.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:23.416 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:04:23.888 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:04:24.051 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:24.051 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:24.052 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:24.052 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:24.363 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:04:24.589 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:04:24.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:24.594 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:24.595 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:24.595 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:24.595 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:24.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:24.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:24.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:24.596 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:04:24.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:24.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:29.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:29.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:29.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:29.601 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:29.610 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:29.611 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:29.611 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:29.611 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:29.611 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:04:29.615 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:04:29.615 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:04:29.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:29.615 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:29.615 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:29.615 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:04:29.615 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:29.615 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:04:29.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:29.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:04:29.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:04:29.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:29.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:29.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:29.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:04:29.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:29.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:04:29.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:29.623 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:04:29.623 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:04:29.623 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:29.623 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:29.623 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:29.623 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:04:29.624 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:29.624 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:04:29.624 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:04:29.630 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:04:29.630 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:04:29.630 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:04:29.630 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:29.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:29.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.632 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:29.635 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:04:30.111 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:04:30.159 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:04:30.160 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:04:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:04:30.161 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:04:30.582 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:04:30.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:30.634 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:30.634 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:30.636 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:31.054 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:04:31.528 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:04:31.635 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:31.635 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:31.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:31.637 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:32.000 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:04:32.476 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:04:32.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:32.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:32.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:32.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:32.947 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:04:33.422 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:04:33.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:33.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:33.638 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:33.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:33.894 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:04:34.366 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:04:34.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:34.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:34.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:34.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:34.841 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:04:35.313 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:04:35.788 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:04:36.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:36.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:36.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:36.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:36.174 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:36.174 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:36.174 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:36.174 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:36.174 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:04:36.174 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:36.174 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:41.182 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:41.182 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:41.182 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:41.182 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:41.182 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:41.182 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:41.191 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:41.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:41.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:41.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:41.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:04:41.192 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:04:41.193 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:04:41.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:41.193 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:41.193 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:41.193 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:04:41.193 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:41.193 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:04:41.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:41.195 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:41.195 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:04:41.195 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:41.196 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:41.196 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:04:41.196 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.198 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:04:41.198 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:04:41.198 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:04:41.199 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:41.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:41.203 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:04:41.681 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:04:41.723 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:04:41.725 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:04:41.727 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:04:41.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:04:42.153 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:04:42.201 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:42.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:42.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:42.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:42.629 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:04:43.101 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:04:43.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:43.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:43.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:43.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:43.571 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:04:44.046 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:04:44.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:44.203 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:44.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:44.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:44.518 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:04:44.989 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:04:45.205 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:45.463 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:04:45.935 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:04:46.206 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:46.206 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:46.207 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:46.207 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:46.407 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:04:46.881 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:04:47.355 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:04:47.743 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:47.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:47.743 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:47.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:47.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:47.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:47.745 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:47.745 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:47.745 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:04:47.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:47.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:52.754 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:52.754 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:52.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:52.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:52.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:52.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:52.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:52.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:52.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:52.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:04:52.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:52.770 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:04:52.770 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:04:52.770 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:52.771 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:04:52.772 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:04:52.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:52.772 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:52.772 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:52.772 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:04:52.772 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:04:52.772 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:04:52.772 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:52.773 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:04:52.773 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:04:52.773 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:04:52.775 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:04:52.776 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:04:52.776 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:04:52.776 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:04:52.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:04:52.780 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:04:53.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:04:53.302 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:04:53.304 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:04:53.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:04:53.306 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:04:53.729 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:04:53.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:53.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:53.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:53.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:54.202 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:04:54.673 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:04:54.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:54.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:54.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:54.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:55.145 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:04:55.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:04:55.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:55.781 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:55.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:55.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:56.091 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:04:56.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:04:56.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:56.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:56.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:56.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:57.035 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:04:57.511 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:04:57.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:57.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:57.983 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:04:58.458 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:04:58.929 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:04:59.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:04:59.322 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:04:59.322 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:04:59.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:04:59.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:04:59.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:04:59.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:04:59.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:04:59.325 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:04:59.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:04:59.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:04.334 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:04.334 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:04.335 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:04.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:04.343 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:04.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:04.344 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:04.344 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:04.344 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:04.345 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:04.346 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:04.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:04.346 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:04.346 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:04.346 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:04.346 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:04.346 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:04.347 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:04.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:04.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:04.348 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:04.348 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:04.348 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:04.348 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:04.348 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:04.349 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:04.349 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:04.349 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:04.349 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:04.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:04.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:04.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:04.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:04.351 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:04.351 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:04.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:04.356 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:04.829 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:04.876 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:04.878 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:04.880 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:04.881 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:05.301 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:05:05.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:05.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:05.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:05.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:05.773 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:05:06.243 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:05:06.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:06.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:06.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:06.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:06.718 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:05:07.190 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:05:07.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:07.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:07.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:07.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:07.665 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:05:08.137 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:05:08.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:08.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:08.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:08.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:08.608 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:05:08.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:09.083 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:05:09.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:09.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:09.358 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:09.358 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:09.555 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:05:10.029 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:05:10.501 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:05:10.973 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:05:11.448 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:05:11.920 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:05:12.395 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:05:12.867 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:12.919 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:12.919 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:12.919 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:05:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:12.920 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:17.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:17.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:17.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:17.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:17.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:17.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:17.935 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:17.936 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:17.936 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:17.937 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:17.937 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:17.941 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:17.941 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:17.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:17.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:17.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:17.942 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:17.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:17.942 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:17.942 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:17.946 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:17.946 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:17.946 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:17.946 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:17.946 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:17.947 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:17.947 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:17.947 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:17.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:17.950 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:17.951 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:17.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:17.951 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:17.951 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:17.951 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:17.951 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:17.951 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:17.951 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:17.956 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:17.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:17.956 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:17.956 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:17.956 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:17.956 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:17.957 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:17.957 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:17.957 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:17.957 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:17.962 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:18.438 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:18.487 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:18.489 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:18.491 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:18.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:18.910 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:05:18.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:18.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:18.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:18.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:19.384 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:05:19.856 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:05:19.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:19.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:19.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:19.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:20.328 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:05:20.804 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:05:20.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:20.965 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:20.965 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:20.965 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:21.275 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:05:21.751 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:05:21.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:21.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:22.223 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:05:22.507 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:22.507 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:22.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:22.507 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:22.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:22.511 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:22.512 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:22.512 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:22.512 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:22.512 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:05:22.512 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:22.512 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:22.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:22.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:22.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:22.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:22.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:22.513 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=982 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:27.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:27.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:27.515 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:27.515 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:27.515 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:27.515 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:27.524 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:27.525 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:27.525 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:27.526 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:27.526 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:27.529 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:27.530 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:27.530 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:27.530 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:27.531 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:27.531 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:27.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:27.532 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:27.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:27.533 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:27.534 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:27.534 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:27.534 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:27.534 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:27.535 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:27.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:27.535 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:27.535 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:27.537 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:27.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:27.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:27.540 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:27.541 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:27.541 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:27.541 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:27.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:27.546 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:28.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:28.064 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:28.066 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:28.068 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:28.068 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:28.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:28.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:28.083 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:28.083 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:28.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:28.087 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:28.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:28.087 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:28.087 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:28.087 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:28.087 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:28.088 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.088 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:33.089 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:33.089 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:33.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:33.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:33.095 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:33.095 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:33.096 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:33.096 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:33.098 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:33.099 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:33.099 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:33.099 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:33.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:33.100 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:33.100 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:33.100 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:33.100 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:33.101 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:33.102 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:33.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:33.102 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:33.102 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:33.102 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:33.102 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:33.102 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:33.102 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:33.104 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:33.104 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:33.104 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:33.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:33.107 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:33.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:33.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:33.112 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:33.589 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:33.630 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:33.632 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:33.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:33.634 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:33.639 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:33.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:33.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:33.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:33.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:33.648 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:33.648 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:33.648 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:33.649 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:33.649 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:33.649 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:33.649 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:33.649 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:38.651 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:38.651 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:38.651 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:38.651 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:38.651 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:38.651 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:38.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:38.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:38.660 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:38.660 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:38.660 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:38.665 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:38.666 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:38.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:38.666 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:38.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:38.666 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:38.666 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:38.667 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:38.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:38.671 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:38.671 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:38.671 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:38.671 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:38.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:38.672 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:38.672 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:38.672 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:38.672 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:38.676 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:38.676 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:38.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:38.676 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:38.676 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:38.676 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:38.676 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:38.676 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:38.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:38.681 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:38.682 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:38.682 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:38.682 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.682 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:38.687 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:39.164 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:39.212 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:39.214 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:39.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:39.217 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:39.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:39.236 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:39.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:39.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:39.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:39.241 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:39.241 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:39.241 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:39.241 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:05:39.241 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:39.242 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:39.242 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:05:44.244 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:44.244 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:44.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:44.244 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:44.244 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:44.244 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:44.252 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:44.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:44.253 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:44.253 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:44.253 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:44.256 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:44.256 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:44.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:44.257 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:44.257 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:44.257 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:44.257 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:44.257 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:44.257 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:44.260 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:44.260 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:44.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:44.262 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:44.262 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:44.262 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:44.265 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:44.265 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:44.265 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.266 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:44.270 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:44.748 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:44.791 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:44.794 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:44.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:44.796 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:44.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:05:44.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:05:44.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:05:44.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:05:44.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:05:44.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:05:44.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:05:44.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:05:45.220 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:05:45.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:45.269 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:45.269 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:45.269 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:45.691 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:05:46.162 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:05:46.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:46.270 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:46.636 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:05:47.108 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:05:47.270 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:47.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:47.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:47.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:47.579 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:05:47.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:05:47.861 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:05:47.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:05:47.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:05:47.907 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:05:47.907 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:05:47.907 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:05:47.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:47.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:47.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:47.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:47.908 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:47.909 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:47.909 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:47.909 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:47.909 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:47.909 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:05:52.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:52.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:52.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:52.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:52.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:52.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:52.915 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:52.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:52.915 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:52.915 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:05:52.915 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:52.916 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:05:52.916 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:05:52.916 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:52.918 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:05:52.918 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:05:52.918 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:52.919 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:05:52.919 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:05:52.919 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.921 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:05:52.922 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:05:52.922 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:05:52.922 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:05:52.922 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:05:52.926 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:05:53.390 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:05:53.441 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:05:53.442 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:05:53.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:53.443 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:05:53.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:05:53.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:05:53.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:05:53.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:05:53.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:05:53.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:05:53.447 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:05:53.447 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:05:53.854 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:05:53.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:53.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:53.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:53.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:54.320 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:05:54.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:05:54.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:54.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:54.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:54.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:55.248 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:05:55.715 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:05:55.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:55.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:55.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:55.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:56.178 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:05:56.493 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:05:56.493 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:05:56.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:05:56.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:05:56.645 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:05:56.927 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:56.927 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:56.927 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:56.928 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:57.110 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:05:57.116 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:05:57.116 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:05:57.116 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:05:57.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:05:57.118 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:05:57.118 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:05:57.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:05:57.118 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:05:57.119 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:05:57.119 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:05:57.119 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:05:57.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:05:57.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:05:57.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:05:57.120 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:06:02.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:02.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:02.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:02.130 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:02.130 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:02.130 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:02.147 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:02.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:02.148 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:02.148 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:02.148 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:06:02.152 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:06:02.152 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:06:02.152 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:02.152 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:02.153 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:06:02.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:02.153 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:02.153 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:06:02.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:02.156 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:02.156 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:06:02.156 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:02.158 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:06:02.158 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:06:02.158 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:02.158 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:02.158 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:02.158 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:06:02.159 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:02.159 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:06:02.159 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:06:02.161 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:06:02.162 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:06:02.162 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:06:02.162 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:02.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:02.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:02.166 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:06:02.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:06:02.682 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:06:02.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:02.684 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:06:02.685 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:06:02.688 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:02.688 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:02.688 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:06:02.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:02.689 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:06:02.689 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:06:02.689 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:06:02.689 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:06:03.103 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:06:03.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:03.164 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:03.569 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:06:04.031 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:06:04.164 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:04.164 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:04.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:04.495 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:06:04.958 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:06:05.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:05.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:05.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:05.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:05.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:06:05.739 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:06:05.739 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:06:05.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:05.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:05.884 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:06:06.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:06.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:06.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:06.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:06.347 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:06:06.810 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:06:07.166 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:07.166 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:07.166 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:07.166 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:07.272 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:06:07.736 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:06:08.199 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:06:08.661 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:06:09.124 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:06:09.587 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:06:10.049 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:06:10.512 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:06:10.740 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:10.740 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:10.740 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:06:10.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:10.744 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:10.744 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:10.744 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:06:10.745 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:10.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:15.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:15.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:15.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:15.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:15.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:15.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:15.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:15.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:15.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:15.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:15.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:06:15.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:06:15.773 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:06:15.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:15.773 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:15.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:15.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:06:15.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:15.774 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:06:15.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:15.778 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:06:15.778 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:06:15.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:15.778 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:15.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:15.779 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:06:15.779 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:15.779 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:06:15.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:15.783 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:06:15.783 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:06:15.783 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:15.783 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:15.784 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:15.784 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:06:15.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:15.784 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:06:15.784 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:15.792 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:06:15.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:06:15.792 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:06:15.792 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:06:15.792 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:06:15.792 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:06:15.793 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:06:15.793 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:06:15.793 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.793 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.794 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:15.798 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:06:16.262 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:06:16.315 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:06:16.316 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:06:16.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:16.317 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:06:16.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:16.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:16.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:06:16.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:16.320 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:06:16.320 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:06:16.320 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:06:16.320 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:06:16.725 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:06:16.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:16.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:16.801 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:16.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:17.189 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:06:17.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:06:17.799 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:17.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:17.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:17.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:18.117 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:06:18.580 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:06:18.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:18.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:18.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:18.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:19.043 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:06:19.360 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:06:19.360 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:06:19.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:19.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:19.508 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:06:19.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:19.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:19.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:19.808 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:19.970 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:06:20.433 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:06:20.800 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:20.801 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:20.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:20.809 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:20.895 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:06:21.358 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:06:21.822 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:06:22.284 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:06:22.747 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:06:23.210 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:06:23.674 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:06:24.137 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:06:24.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:24.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:24.361 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:06:24.361 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:24.365 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:24.365 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:24.365 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:24.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:24.366 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:24.366 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:24.366 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:24.366 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:24.366 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:24.366 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:24.366 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:06:29.370 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:29.370 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:29.370 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:29.371 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:29.371 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:29.371 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:29.382 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:29.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:29.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:29.384 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:29.384 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:06:29.387 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:06:29.387 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:06:29.387 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:29.387 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:29.387 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:29.388 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:06:29.388 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:29.388 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:06:29.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:29.392 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:06:29.392 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:06:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:29.392 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:29.392 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:29.392 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:06:29.392 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:29.392 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:06:29.393 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:29.396 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:06:29.396 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:06:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:29.397 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:29.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:29.397 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:06:29.397 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:29.397 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:06:29.397 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:29.403 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:06:29.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:06:29.403 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:06:29.403 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:06:29.403 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:06:29.403 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:06:29.404 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:06:29.404 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:06:29.404 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:29.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:29.409 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:06:29.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:06:29.939 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:06:29.940 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:06:29.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:29.943 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:06:29.948 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:29.948 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:29.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:06:29.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:29.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:06:29.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:06:29.950 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:06:29.950 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:06:30.342 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:06:30.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:30.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:30.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:30.421 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:30.809 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:06:31.277 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:06:31.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:31.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:31.412 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:31.422 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:31.743 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:06:32.210 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:06:32.409 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:32.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:32.413 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:32.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:32.676 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:06:32.976 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:06:32.976 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:06:32.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:32.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:33.143 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:06:33.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:33.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:33.414 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:33.423 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:33.610 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:06:34.076 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:06:34.411 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:34.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:34.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:34.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:34.543 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:06:35.010 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:06:35.476 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:06:35.943 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:06:36.409 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:06:36.876 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:06:37.342 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:06:37.807 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:06:37.976 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:37.976 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:37.976 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:06:37.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:37.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:37.990 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:37.990 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:37.990 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:37.992 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:37.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:37.992 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:37.992 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:37.992 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:37.993 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:37.993 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:06:42.995 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:42.996 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:42.996 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:42.996 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:42.996 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:42.996 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:43.005 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:43.007 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:43.007 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:43.008 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:43.008 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:06:43.010 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:06:43.011 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:06:43.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:43.011 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:43.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:43.011 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:06:43.011 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:43.011 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:06:43.011 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:43.015 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:06:43.016 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:06:43.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:43.016 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:43.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:43.016 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:06:43.016 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:43.016 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:06:43.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:43.021 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:06:43.022 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:06:43.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:43.022 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:43.022 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:43.022 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:06:43.022 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:43.022 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:06:43.022 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:06:43.035 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:06:43.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:06:43.036 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:43.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:43.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:06:43.508 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:06:43.575 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:06:43.576 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:06:43.577 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:43.578 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:06:43.584 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:43.584 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:43.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:06:43.586 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:43.586 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:06:43.586 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:06:43.586 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:06:43.586 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:06:43.598 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:06:43.599 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:06:43.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:43.599 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:43.974 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:06:44.042 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:44.042 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:44.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:44.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:44.441 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:06:44.908 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:06:45.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:45.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:45.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:45.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:45.374 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:06:45.839 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:06:46.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:46.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:46.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:46.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:46.305 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:06:46.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:06:47.043 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:47.043 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:47.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:47.049 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:47.233 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:06:47.697 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:06:48.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:48.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:48.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:48.050 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:48.162 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:06:48.599 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:48.599 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:48.599 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:06:48.605 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:48.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:48.607 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:48.607 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:48.607 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:48.607 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:48.607 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:48.607 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:48.607 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:06:53.608 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:53.608 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:53.608 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:53.608 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:53.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:53.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:53.618 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:53.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:06:53.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:53.621 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:06:53.621 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:06:53.621 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:53.624 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:06:53.624 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:06:53.624 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:53.624 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:53.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:53.624 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:06:53.625 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:06:53.625 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:06:53.625 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:53.627 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:06:53.628 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:06:53.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:53.628 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:06:53.628 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:53.628 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:06:53.628 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:06:53.628 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:06:53.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:53.632 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:06:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:06:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:06:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:06:53.632 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:06:53.632 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:06:53.633 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:06:53.633 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:06:53.633 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.633 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:06:53.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:06:53.638 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:06:54.103 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:06:54.159 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:06:54.160 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:06:54.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:54.161 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:06:54.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:54.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:54.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:06:54.166 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:54.166 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:06:54.166 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:06:54.166 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:06:54.166 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:06:54.568 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:06:54.636 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:54.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:54.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:54.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:55.032 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:06:55.496 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:06:55.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:55.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:55.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:55.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:55.960 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:06:56.424 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:06:56.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:56.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:56.639 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:56.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:56.887 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:06:57.205 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:06:57.206 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:06:57.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:57.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:06:57.351 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:06:57.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:57.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:57.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:57.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:57.815 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:06:58.279 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:06:58.638 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:58.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:58.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:58.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:58.743 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:06:59.207 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:06:59.207 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:06:59.207 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:06:59.207 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:06:59.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:06:59.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:06:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:06:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:06:59.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:06:59.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:06:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:06:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:06:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:06:59.212 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:06:59.212 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:06:59.212 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:06:59.212 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:06:59.212 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:06:59.212 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:06:59.213 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:06:59.213 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:06:59.213 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:06:59.213 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1228 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:04.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:04.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:04.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:04.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:04.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:04.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:04.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:04.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:04.219 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:04.219 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:04.219 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:04.221 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:04.221 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:07:04.221 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:04.223 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:04.223 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:07:04.223 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:04.226 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:04.226 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:07:04.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:07:04.230 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:07:04.230 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:07:04.230 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.231 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:04.235 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:07:04.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:07:04.746 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:07:04.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:04.747 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:07:04.747 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:07:04.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:04.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:04.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:07:04.751 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:07:04.751 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:07:04.751 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:07:04.751 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:07:04.751 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:07:05.162 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:07:05.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:05.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:05.233 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:05.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:05.625 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:07:06.089 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:07:06.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:06.233 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:06.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:06.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:06.554 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:07:07.018 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:07:07.234 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:07.234 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:07.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:07.234 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:07.482 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:07:07.947 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:07:07.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:07.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:07.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:07.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:07.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:07.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:07.981 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:07.982 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:07.982 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:07.982 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:07.982 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:07.982 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:07:07.983 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:07.983 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:12.985 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:12.985 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:12.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:12.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:12.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:12.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:12.993 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:12.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:12.994 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:12.994 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:12.994 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:07:12.997 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:07:12.997 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:07:12.997 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:12.997 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:12.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:12.998 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:07:12.998 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:12.998 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:07:12.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:13.000 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:07:13.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:07:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:13.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:13.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:13.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:07:13.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:13.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:07:13.001 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:13.004 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:07:13.004 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:07:13.004 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:13.004 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:13.004 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:13.005 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:07:13.005 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:13.005 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:07:13.005 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.017 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:07:13.018 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:07:13.018 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:07:13.018 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:13.019 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:13.023 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:07:13.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:07:13.555 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:07:13.556 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:07:13.557 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:07:13.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:13.562 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:13.562 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:13.562 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:07:13.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:07:13.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:07:13.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:07:13.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:07:13.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:07:13.959 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:07:14.025 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:14.025 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:14.027 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:14.035 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:14.427 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:07:14.895 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:07:15.026 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:15.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:15.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:15.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:15.363 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:07:15.831 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:07:16.028 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:16.028 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:16.028 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:16.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:16.298 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:07:16.766 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:07:17.029 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:17.029 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:17.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:17.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:17.079 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:17.079 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:17.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:17.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:17.082 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:17.082 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:17.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:17.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:17.084 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:17.084 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:17.084 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:17.084 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:17.084 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:17.085 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:07:22.085 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:22.085 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:22.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:22.086 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:22.086 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:22.086 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:22.094 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:22.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:22.094 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:22.094 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:22.094 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:22.097 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:22.097 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:07:22.097 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:22.099 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:07:22.099 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:07:22.099 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:22.099 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:22.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:22.100 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:07:22.100 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:22.100 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:07:22.100 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:22.102 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:07:22.102 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:07:22.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:22.103 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:22.103 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:22.103 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:07:22.103 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:22.103 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:07:22.103 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:07:22.106 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:07:22.107 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:07:22.107 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:07:22.107 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.108 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:22.111 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:07:22.578 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:07:22.631 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:07:22.632 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:07:22.633 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:07:22.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:22.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:22.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:22.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:07:22.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:07:22.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:07:22.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:07:22.638 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:07:22.638 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:07:22.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:22.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:22.896 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:22.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:22.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:22.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:22.897 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:22.897 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:22.897 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:22.897 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:22.897 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:07:22.898 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:22.898 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:22.898 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:27.899 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:27.899 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:27.899 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:27.899 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:27.899 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:27.899 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:27.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:27.907 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:27.907 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:27.908 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:27.908 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:07:27.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:07:27.910 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:07:27.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:27.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:27.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:27.910 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:07:27.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:27.910 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:07:27.910 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:27.912 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:27.912 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:07:27.912 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:27.915 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:27.915 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:07:27.915 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:07:27.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:07:27.919 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:27.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:27.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:07:28.387 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:07:28.442 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:07:28.443 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:07:28.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:28.444 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:07:28.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:28.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:28.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:07:28.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:07:28.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:07:28.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:07:28.448 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:07:28.448 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:07:28.656 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:28.656 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:28.658 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:28.658 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:28.658 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:28.658 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:28.659 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:28.659 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:28.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:28.659 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:28.659 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:28.659 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:28.659 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:07:33.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:33.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:33.661 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:33.661 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:33.661 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:33.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:33.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:33.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:33.669 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:33.669 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:33.669 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:07:33.671 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:07:33.672 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:07:33.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:33.672 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:33.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:33.672 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:07:33.672 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:33.672 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:07:33.672 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:33.674 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:07:33.674 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:07:33.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:33.674 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:33.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:33.674 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:07:33.674 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:33.674 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:07:33.675 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:33.677 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:33.677 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:07:33.677 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.680 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:07:33.680 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:07:33.681 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:07:33.681 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:33.681 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:33.685 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:07:34.148 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:07:34.200 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:07:34.200 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:07:34.201 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:34.201 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:07:34.203 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:34.203 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:34.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:07:34.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:07:34.203 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:07:34.203 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:07:34.203 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:07:34.203 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:07:34.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:07:34.684 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:34.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:34.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:34.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:35.075 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:07:35.538 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:07:35.685 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:35.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:35.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:35.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:36.002 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:07:36.466 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:07:36.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:36.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:36.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:36.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:36.930 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:07:37.394 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:07:37.686 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:37.686 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:37.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:37.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:37.858 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:07:38.323 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:07:38.687 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:38.687 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:38.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:38.787 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:07:39.251 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:07:39.715 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:07:40.178 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:07:40.642 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:07:41.106 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:07:41.570 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:07:42.033 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:07:42.497 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:07:42.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:42.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:42.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:42.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:42.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:42.824 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:42.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:42.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:42.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:42.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:42.824 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:07:42.825 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:42.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:47.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:47.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:47.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:47.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:47.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:47.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:47.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:47.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:47.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:47.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:07:47.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:07:47.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:07:47.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:07:47.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:47.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:47.846 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:47.846 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:07:47.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:07:47.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:07:47.847 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:47.848 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:07:47.848 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:07:47.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:47.848 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:47.848 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:47.849 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:07:47.849 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:07:47.849 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:07:47.849 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:47.851 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:07:47.851 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:07:47.851 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:47.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:07:47.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:07:47.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:07:47.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:07:47.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:07:47.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:07:47.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:07:47.856 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:07:47.856 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:07:47.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:07:48.334 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:07:48.380 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:07:48.382 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:07:48.384 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:07:48.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:07:48.392 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:48.392 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:48.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:07:48.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:07:48.394 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:07:48.394 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:07:48.394 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:07:48.394 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:07:48.805 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:07:48.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:48.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:48.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:48.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:49.277 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:07:49.748 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:07:49.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:49.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:50.217 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:07:50.689 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:07:50.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:50.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:50.862 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:50.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:51.159 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:07:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:07:51.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:51.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:51.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:51.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:52.101 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:07:52.572 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:07:52.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:52.864 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:52.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:52.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:53.043 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:07:53.514 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:07:53.987 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:07:54.460 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:07:54.932 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:07:55.405 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:07:55.876 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:07:56.348 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:07:56.820 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:07:57.159 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:07:57.159 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:07:57.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:07:57.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:07:57.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:07:57.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:07:57.169 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:07:57.170 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:07:57.170 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:07:57.170 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:07:57.170 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:07:57.170 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:07:57.170 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:07:57.170 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:07:57.171 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2016 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:02.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:02.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:02.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:02.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:02.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:02.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:02.180 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:02.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:02.182 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:02.182 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:02.182 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:08:02.186 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:08:02.186 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:08:02.186 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:02.186 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:02.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:02.187 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:08:02.187 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:02.188 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:08:02.188 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:02.189 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:08:02.189 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:08:02.189 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:02.189 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:02.189 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:02.189 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:08:02.190 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:02.190 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:08:02.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:02.192 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:02.192 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:08:02.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:08:02.195 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:08:02.196 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:08:02.196 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:08:02.196 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.196 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:02.197 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:02.201 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:08:02.674 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:08:02.724 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:08:02.727 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:08:02.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:02.729 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:02.736 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:08:02.736 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:08:02.736 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:08:02.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:02.738 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:08:02.738 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:08:02.738 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:08:02.738 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:08:03.141 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:08:03.199 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:03.199 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:03.199 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:03.200 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:03.613 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:08:04.081 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:08:04.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:04.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:04.201 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:04.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:04.551 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:08:05.022 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:08:05.202 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:05.202 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:05.202 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:05.202 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:05.494 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:08:05.775 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:08:05.775 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2026-05-06 03:08:05.775 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:05.775 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:05.776 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:05.964 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:08:06.203 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:06.204 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:06.204 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:06.204 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:06.430 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:08:06.824 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:08:06.824 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:08:06.825 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:08:06.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:06.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:06.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:06.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:06.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:06.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:06.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:06.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:06.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:06.835 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:08:06.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:06.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:11.840 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:11.840 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:11.840 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:11.840 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:11.840 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:11.840 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:11.847 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:11.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:11.848 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:11.848 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:11.848 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:08:11.854 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:08:11.855 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:08:11.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:11.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:11.855 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:08:11.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:11.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:11.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:08:11.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:11.861 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:08:11.862 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:08:11.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:11.862 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:11.862 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:11.862 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:08:11.862 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:11.862 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:08:11.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:11.867 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:08:11.867 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:08:11.867 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:11.867 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:11.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:11.868 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:08:11.868 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:11.868 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:08:11.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:11.872 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:08:11.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:08:11.872 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:08:11.872 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:08:11.872 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:08:11.872 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:08:11.873 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:08:11.873 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:08:11.873 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.873 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.874 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:11.875 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:11.878 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:08:12.352 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:08:12.403 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:08:12.405 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:08:12.407 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:12.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:12.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:12.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:12.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:12.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:12.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:12.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:12.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:12.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:12.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:12.545 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:08:17.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:17.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:17.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:17.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:17.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:17.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:17.561 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:17.563 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:17.563 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:17.564 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:17.564 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:08:17.570 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:08:17.570 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:08:17.571 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:17.571 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:17.571 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:17.571 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:08:17.572 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:17.572 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:08:17.572 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:17.575 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:08:17.575 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:08:17.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:17.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:17.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:17.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:08:17.577 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:17.577 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:08:17.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:17.579 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:08:17.579 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:08:17.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:17.580 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:17.580 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:17.580 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:08:17.580 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:17.580 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:08:17.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:08:17.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:08:17.584 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:08:17.585 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.586 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:17.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.586 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:17.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:17.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:08:18.065 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:08:18.111 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:08:18.112 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:08:18.113 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:18.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:18.536 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:08:18.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:18.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:18.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:18.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:19.008 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:08:19.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:08:19.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:19.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:19.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:19.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:19.954 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:08:20.426 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:08:20.590 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:20.591 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:20.591 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:20.591 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:20.899 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:08:21.371 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:08:21.592 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:21.592 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:21.592 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:21.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:21.843 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:08:22.313 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:08:22.593 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:22.593 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:22.593 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:22.593 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:22.778 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:08:23.241 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:08:23.707 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:08:24.179 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:08:24.648 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:08:25.114 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:08:25.576 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:08:26.044 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:08:26.515 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:08:26.986 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:08:27.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:27.128 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:27.129 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:27.129 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:27.129 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:08:32.133 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:32.133 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:32.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:32.133 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:32.133 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:32.133 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:32.137 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:32.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:32.137 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:32.137 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:32.137 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:32.138 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:32.138 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:08:32.138 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:32.139 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:32.139 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:08:32.139 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:32.140 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:32.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:08:32.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.142 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:08:32.142 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:08:32.142 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:08:32.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:32.147 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:08:32.621 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:08:32.669 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:08:32.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:32.669 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:08:32.670 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:33.092 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:08:33.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:33.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:33.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:33.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:33.563 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:08:34.033 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:08:34.152 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:34.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:34.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:34.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:34.499 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:08:34.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:08:35.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:35.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:35.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:35.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:35.431 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:08:35.898 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:08:36.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:36.153 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:36.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:36.153 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:36.361 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:08:36.825 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:08:37.154 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:37.154 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:37.154 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:37.154 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:37.290 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:08:37.753 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:08:38.216 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:08:38.679 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:08:39.143 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:08:39.606 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:08:40.070 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:08:40.533 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:08:40.997 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:08:41.464 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:08:41.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:41.689 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:41.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:41.690 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:41.690 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:41.691 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:41.691 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:41.691 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:41.691 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:41.691 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:08:41.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:41.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:41.691 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:41.691 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:41.692 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:41.692 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:41.692 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:41.692 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:41.692 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2092 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:08:46.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:46.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:46.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:46.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:46.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:46.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:46.705 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:46.706 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:46.706 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:46.707 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:46.707 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:08:46.712 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:08:46.712 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:08:46.713 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:46.713 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:46.713 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:46.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:08:46.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:46.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:08:46.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:46.717 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:08:46.717 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:08:46.717 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:46.717 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:46.718 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:46.718 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:08:46.718 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:46.719 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:08:46.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:46.720 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:08:46.720 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:08:46.720 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:46.720 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:46.721 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:46.721 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:08:46.721 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:46.721 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:08:46.721 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:46.724 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:08:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:08:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:08:46.724 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:08:46.724 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:08:46.725 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:08:46.725 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:08:46.725 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.726 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:46.730 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:08:47.207 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:08:47.250 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:08:47.251 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:08:47.252 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:47.253 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:47.678 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:08:47.728 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:47.728 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:47.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:47.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:48.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:08:48.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:08:48.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:48.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:48.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:48.730 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:49.097 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:08:49.572 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:08:49.730 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:49.730 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:49.730 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:49.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:50.044 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:08:50.284 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:50.287 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:50.288 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:50.288 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:50.288 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:50.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:50.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:50.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:50.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:50.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:50.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:50.292 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:08:55.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:55.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:55.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:55.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:55.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:55.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:55.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:55.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:55.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:55.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:08:55.304 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:08:55.306 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:08:55.307 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:08:55.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:55.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:55.307 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:55.308 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:08:55.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:08:55.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:08:55.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:55.310 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:08:55.310 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:08:55.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:55.310 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:55.310 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:55.310 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:08:55.310 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:08:55.310 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:08:55.311 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:55.312 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:08:55.312 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:08:55.312 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:55.312 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:08:55.312 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:08:55.312 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:08:55.313 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:08:55.313 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:08:55.313 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:08:55.315 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:08:55.316 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:08:55.316 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:08:55.316 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.316 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:08:55.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:08:55.320 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:08:55.800 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:08:55.843 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:08:55.845 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:08:55.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:55.847 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:08:55.879 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:08:55.879 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:08:55.879 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:08:55.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:55.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:08:55.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:08:55.888 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:08:55.888 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:08:55.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:55.950 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:08:55.950 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:08:55.950 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:55.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:56.271 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:08:56.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:08:56.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:08:56.284 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:08:56.284 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:08:56.291 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:08:56.291 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:08:56.291 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:08:56.291 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:08:56.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:08:56.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:08:56.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:08:56.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:08:56.293 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:08:56.293 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:08:56.293 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:01.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:01.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:01.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:01.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:01.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:01.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:01.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:01.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:01.306 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:01.306 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:01.306 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:01.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:01.310 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:01.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:01.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:01.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:01.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:01.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:01.311 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:01.311 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:01.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:01.313 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:01.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:01.313 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:01.313 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:01.313 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:01.313 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:01.313 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:01.313 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:01.315 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:01.315 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:01.315 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:01.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:01.319 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:01.319 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:01.319 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:01.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:01.323 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:01.803 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:01.843 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:01.845 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:01.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:01.847 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:01.865 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:01.865 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:01.865 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:01.866 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:01.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:01.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:01.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:01.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:01.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:01.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:01.868 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:06.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:06.868 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:06.868 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:06.868 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:06.868 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:06.868 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:06.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:06.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:06.871 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:06.871 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:06.871 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:06.873 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:06.873 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:06.873 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:06.874 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:06.874 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:06.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:06.874 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:06.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:06.874 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:06.874 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:06.874 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:06.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:06.875 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:06.876 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:06.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:06.876 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:06.876 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:06.876 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:06.876 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:06.876 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:06.876 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:06.877 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:06.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:06.877 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:06.877 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:06.877 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:06.877 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:06.878 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:06.878 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:06.878 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:06.882 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:07.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:07.389 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:07.389 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:07.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:07.390 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:07.814 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:07.880 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:07.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:07.880 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:07.880 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:08.280 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:08.745 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:08.881 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:08.881 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:08.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:08.881 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:09.208 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:09.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:09.401 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:09.402 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:09.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:09.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:09.406 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:09.406 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:09.406 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:09.406 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:09.406 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:09.406 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:09.406 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:09.407 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:09.407 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:09.407 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:09.407 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:09.407 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:09.407 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=555 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:14.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:14.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:14.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:14.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:14.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:14.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:14.421 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:14.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:14.421 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:14.421 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:14.421 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:14.423 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:14.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:14.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:14.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:14.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:14.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:14.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:14.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:14.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:14.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:14.424 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:14.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:14.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:14.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:14.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:14.426 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:14.426 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:14.426 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:14.426 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:14.426 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:14.426 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:14.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:14.428 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:14.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:14.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:14.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:14.904 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:14.946 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:14.947 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:14.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:14.948 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:14.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:14.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:14.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:09:14.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:09:14.949 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:09:14.949 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:09:14.949 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:09:14.949 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:09:15.371 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:15.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:15.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:15.842 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:16.313 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:16.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:16.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:16.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:16.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:16.783 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:17.250 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:09:17.433 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:17.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:17.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:17.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:17.717 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:09:17.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:17.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:17.731 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:17.731 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:17.731 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:17.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:17.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:17.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:17.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:17.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:17.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:17.732 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:17.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:22.742 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:22.742 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:22.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:22.742 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:22.742 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:22.742 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:22.751 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:22.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:22.752 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:22.752 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:22.752 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:22.753 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:22.753 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:22.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:22.753 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:22.753 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:22.753 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:22.753 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:22.753 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:22.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:22.755 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:22.755 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:22.755 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:22.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:22.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:22.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:22.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:22.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:22.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:22.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:22.758 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:22.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:22.759 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:22.759 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:22.759 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:22.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:22.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:23.230 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:23.275 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:23.275 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:23.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:23.276 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:23.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:23.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:23.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:09:23.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:09:23.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:09:23.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:09:23.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:09:23.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:09:23.704 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:23.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:23.762 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:23.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:23.762 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:24.177 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:24.647 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:24.762 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:24.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:25.110 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:25.365 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:25.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:25.370 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:25.370 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:25.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:25.370 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:25.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:25.375 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:25.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:25.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:25.375 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:25.375 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:25.375 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:25.375 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:25.376 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:25.376 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:25.376 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:25.376 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:25.376 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:25.376 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:30.377 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:30.377 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:30.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:30.377 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:30.377 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:30.377 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:30.392 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:30.392 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:30.393 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:30.393 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:30.393 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:30.395 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:30.395 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:30.395 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:30.395 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:30.396 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:30.396 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:30.396 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:30.396 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:30.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:30.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:30.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:30.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:30.399 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:30.399 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:30.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:30.401 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:30.401 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:30.401 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.402 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:30.406 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:30.880 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:30.913 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:30.913 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:30.913 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:30.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:30.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:30.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:30.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:09:30.915 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:09:30.915 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:09:30.916 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:09:30.916 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:09:30.916 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:09:31.346 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:31.403 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:31.403 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:31.403 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:31.404 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:31.814 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:32.282 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:32.404 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:32.404 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:32.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:32.752 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:33.222 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:09:33.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:33.405 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:33.405 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:33.405 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:33.688 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:09:33.702 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:33.702 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:33.704 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:33.704 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:33.705 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:33.705 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:33.705 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:38.712 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:38.712 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:38.712 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:38.712 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:38.712 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:38.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:38.723 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:38.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:38.723 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:38.723 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:38.724 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:38.726 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:38.726 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:38.726 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:38.726 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:38.727 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:38.727 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:38.727 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:38.727 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:38.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:38.728 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:38.728 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:38.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:38.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:38.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:38.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:38.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:38.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:38.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:38.730 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:38.730 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:38.730 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:38.730 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:38.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:38.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:38.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:38.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:38.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:38.733 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:38.733 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:38.733 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:38.738 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:39.216 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:39.264 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:39.266 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:39.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:39.269 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:39.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:39.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:39.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:09:39.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:09:39.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:09:39.276 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:09:39.276 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:09:39.276 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:09:39.686 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:39.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:39.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:39.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:39.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:40.154 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:40.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:40.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:40.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:40.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:40.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:41.099 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:41.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:41.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:41.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:41.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:41.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:41.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:41.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:41.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:41.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:41.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:41.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:41.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:41.360 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:41.360 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:09:46.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:46.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:46.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:46.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:46.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:46.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:46.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:46.372 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:46.372 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:46.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:46.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:46.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:46.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:46.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:46.377 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:46.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:46.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:46.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:46.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:46.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:46.381 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:46.381 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:46.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:46.382 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:46.382 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:46.382 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:46.382 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:46.382 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:46.382 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:46.386 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:46.386 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:46.386 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:46.386 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:46.386 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:46.386 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:46.387 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:46.387 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:46.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:46.392 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:46.393 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:46.393 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:46.393 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.393 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.394 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:46.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:46.398 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:46.876 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:46.926 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:46.928 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:46.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:46.930 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:46.933 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:46.933 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:46.933 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:09:46.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:09:46.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:09:46.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:09:46.935 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:09:46.935 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:09:47.348 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:47.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:47.397 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:47.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:47.399 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:47.820 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:48.293 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:48.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:48.398 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:48.398 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:48.400 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:48.765 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:49.238 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:09:49.399 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:49.399 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:49.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:49.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:49.711 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:09:50.184 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:09:50.400 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:50.400 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:50.400 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:50.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:50.655 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:09:50.673 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:50.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:50.680 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:50.680 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:50.680 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:50.680 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:50.681 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:50.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:50.681 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:50.681 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:50.681 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:09:50.681 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:50.681 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:55.686 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:09:55.686 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:09:55.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:55.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:55.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:55.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:55.694 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:09:55.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:55.695 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:55.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:09:55.696 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:09:55.699 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:09:55.699 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:09:55.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:55.700 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:55.700 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:09:55.700 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:09:55.700 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:09:55.700 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:09:55.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:55.704 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:09:55.704 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:09:55.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:55.704 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:55.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:09:55.704 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:09:55.704 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:09:55.705 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:09:55.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:55.707 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:09:55.707 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:09:55.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:55.707 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:09:55.707 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:09:55.707 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:09:55.707 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:09:55.707 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:09:55.708 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:55.710 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:09:55.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:09:55.710 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:09:55.710 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:09:55.710 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:09:55.710 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:09:55.711 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:09:55.711 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:09:55.711 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.711 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:09:55.712 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:09:55.716 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:09:56.196 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:09:56.234 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:09:56.235 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:09:56.236 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:09:56.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:09:56.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:09:56.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:09:56.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:09:56.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:09:56.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:09:56.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:09:56.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:09:56.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:09:56.667 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:09:56.714 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:56.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:56.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:56.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:57.139 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:09:57.612 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:09:57.715 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:57.715 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:57.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:57.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:58.085 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:09:58.556 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:09:58.716 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:58.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:58.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:58.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:59.028 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:09:59.499 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:09:59.718 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:09:59.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:09:59.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:09:59.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:09:59.972 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:10:00.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:10:00.223 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:10:00.228 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:00.228 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:00.228 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:00.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:00.229 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:00.229 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:00.229 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:00.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:00.229 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:00.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:00.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:05.235 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:05.235 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:05.235 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:05.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:05.235 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:05.235 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:05.243 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:05.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:05.243 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:05.244 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:05.244 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:05.248 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:05.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:05.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:05.249 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:05.249 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:05.250 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:05.250 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:05.250 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:05.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:05.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:05.253 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:05.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:05.253 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:05.254 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:05.254 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:05.254 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:05.254 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:05.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:05.256 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:05.257 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:05.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:05.257 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:05.257 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:05.257 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:05.257 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:05.257 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:05.258 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.261 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:05.261 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:05.262 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:05.262 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.262 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:05.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:05.266 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:05.745 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:05.784 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:05.785 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:05.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:05.786 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:06.217 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:10:06.265 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:06.265 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:06.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:06.265 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:06.693 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:10:07.165 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:10:07.266 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:07.266 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:07.267 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:07.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:07.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:10:07.798 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:07.799 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:07.799 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:07.799 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:07.802 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:07.802 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:07.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:07.802 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:07.802 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:07.802 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:07.802 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:07.803 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=548 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:12.809 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:12.809 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:12.809 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:12.810 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:12.818 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:12.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:12.819 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:12.819 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:12.819 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:12.820 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:12.820 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:12.820 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:12.820 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:12.821 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:12.821 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:12.821 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:12.821 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:12.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:12.823 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:12.823 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:12.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:12.825 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:12.825 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:12.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:12.825 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:12.825 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:12.825 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:12.825 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:12.825 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:12.826 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:12.828 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:12.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:12.828 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:12.828 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:12.828 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:12.828 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:12.829 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:12.829 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:12.829 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.829 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:12.834 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:13.313 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:13.353 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:13.355 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:13.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:13.357 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:13.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:10:13.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:10:13.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:10:13.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:13.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:13.785 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:10:13.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:13.833 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:13.833 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:13.833 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:14.260 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:10:14.732 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:10:14.833 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:14.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:14.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:14.834 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:15.206 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:10:15.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:10:15.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:16.150 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:10:16.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:16.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:16.410 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:16.411 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:16.411 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:16.411 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:16.411 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:16.411 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:16.411 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:16.411 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:21.417 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:21.417 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:21.417 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:21.417 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:21.417 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:21.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:21.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:21.427 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:21.427 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:21.428 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:21.428 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:21.432 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:21.432 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:21.433 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:21.433 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:21.433 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:21.433 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:21.434 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:21.434 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:21.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:21.436 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:21.436 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:21.436 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:21.436 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:21.437 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:21.437 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:21.437 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:21.437 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:21.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:21.439 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:21.439 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:21.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:21.442 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:21.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:21.443 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:21.443 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:21.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:21.447 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:21.926 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:21.973 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:21.975 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:21.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:21.977 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:21.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:10:21.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:10:21.991 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:10:22.000 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:22.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:22.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:22.005 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:22.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:22.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:22.006 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:22.007 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:22.007 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:22.007 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:22.007 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:22.007 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:27.014 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:27.014 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:27.014 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:27.014 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:27.014 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:27.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:27.022 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:27.022 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:27.022 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:27.023 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:27.023 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:27.025 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:27.025 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:27.025 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:27.026 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:27.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:27.026 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:27.027 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:27.027 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:27.027 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:27.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:27.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:27.028 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:27.028 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:27.028 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:27.028 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:27.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:27.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:27.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:27.031 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:27.031 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:27.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.035 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:27.036 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:27.036 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:27.036 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.036 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.041 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:27.520 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:27.567 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:27.569 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:27.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:27.571 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:27.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:10:27.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:10:27.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:10:27.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:27.603 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:27.992 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:10:28.039 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:28.039 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:28.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:28.040 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:28.467 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:10:28.939 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:10:29.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:29.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:29.040 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:29.041 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:29.413 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:10:29.885 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:10:30.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:30.041 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:30.042 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:30.357 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:10:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:30.611 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:30.623 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:30.623 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:30.623 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:30.623 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:30.624 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:30.624 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:30.624 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:30.624 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:30.624 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:30.624 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:35.630 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:35.631 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:35.631 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:35.631 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:35.631 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:35.631 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:35.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:35.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:35.634 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:35.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:35.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:35.635 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:35.635 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:35.635 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:35.635 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:35.635 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:35.635 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:35.636 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:35.636 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:35.636 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:35.636 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:35.638 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:35.638 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:35.638 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:35.640 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:35.640 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:35.640 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:35.640 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:35.645 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:36.123 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:36.167 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:36.169 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:36.171 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:36.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:36.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:10:36.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:10:36.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:10:36.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:36.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:36.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:36.225 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:36.225 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:36.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:36.225 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:36.228 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:36.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:36.228 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:36.229 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:36.229 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:36.229 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:36.229 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:41.233 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:41.233 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:41.233 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:41.233 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:41.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:41.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:41.241 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:41.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:41.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:41.243 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:41.243 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:41.247 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:41.248 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:41.248 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:41.248 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:41.248 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:41.249 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:41.249 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:41.249 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:41.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:41.252 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:41.252 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:41.252 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:41.252 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:41.253 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:41.253 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:41.253 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:41.253 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:41.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:41.254 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:41.254 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:41.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:41.255 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:41.255 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:41.255 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:41.255 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:41.255 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:41.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:41.258 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:41.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:41.258 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:41.258 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:41.258 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:41.258 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:41.259 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:41.259 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:41.259 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.259 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:41.264 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:41.742 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:41.783 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:41.784 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:41.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:41.785 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:41.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:41.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:41.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:41.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:41.796 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:41.796 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:41.796 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:41.796 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:41.796 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:41.796 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:41.796 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:41.796 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:46.801 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:46.801 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:46.801 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:46.801 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:46.801 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:46.801 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:46.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:46.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:46.808 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:46.808 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:46.809 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:46.811 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:46.811 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:46.811 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:46.812 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:46.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:46.812 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:46.813 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:46.813 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:46.813 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:46.814 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:46.814 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:46.814 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:46.814 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:46.814 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:46.815 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:46.815 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:46.815 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:46.815 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:46.817 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:46.817 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:46.817 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:46.817 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:46.818 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:46.818 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:46.818 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:46.818 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:46.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:46.821 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:46.821 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:46.821 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:46.821 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:46.822 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:46.822 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:46.822 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.822 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:46.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:46.827 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:47.305 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:47.345 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:47.345 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:47.346 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:47.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:47.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:47.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:47.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:47.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:47.359 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:47.359 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:47.359 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:47.359 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:47.359 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:47.359 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:47.359 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:52.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:52.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:52.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:52.368 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:52.368 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:52.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:52.375 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:52.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:52.375 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:52.375 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:52.375 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:52.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:52.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:52.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:52.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:52.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:52.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:52.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:52.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:52.377 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:52.378 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:52.378 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:52.378 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:52.380 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:52.380 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:52.380 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:52.382 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:52.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:52.382 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:52.382 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:52.382 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:52.382 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:52.383 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:52.383 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:52.383 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.383 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:52.388 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:52.866 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:52.907 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:52.909 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:52.910 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:52.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:52.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:52.920 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:52.920 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:52.920 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:52.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:52.925 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:52.925 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:52.925 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:52.925 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:52.925 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:52.925 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:52.926 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:52.926 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:52.926 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:52.926 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:52.926 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:57.928 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:57.928 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:57.928 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:57.928 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:57.928 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:57.928 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:57.934 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:57.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:57.935 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:57.935 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:10:57.935 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:10:57.938 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:10:57.938 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:10:57.939 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:57.939 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:57.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:57.939 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:10:57.940 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:10:57.940 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:10:57.940 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:57.941 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:10:57.941 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:10:57.941 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:57.941 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:57.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:57.942 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:10:57.942 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:10:57.942 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:10:57.942 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:57.944 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:10:57.944 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:10:57.944 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:57.944 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:10:57.944 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:57.944 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:10:57.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:10:57.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:10:57.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:10:57.948 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:10:57.948 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:10:57.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:10:57.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:10:57.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:10:57.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:10:58.432 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:10:58.479 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:10:58.481 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:10:58.483 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:10:58.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:10:58.496 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:10:58.496 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:10:58.496 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:10:58.496 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:10:58.500 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:10:58.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:10:58.501 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:10:58.501 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:10:58.501 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:10:58.501 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:10:58.501 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.502 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:10:58.503 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:03.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:03.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:03.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:03.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:03.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:03.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:03.511 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:03.513 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:03.513 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:03.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:03.514 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:03.519 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:03.519 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:03.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:03.520 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:03.520 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:03.520 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:03.520 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:03.520 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:03.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:03.524 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:03.524 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:03.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:03.525 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:03.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:03.525 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:03.525 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:03.525 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:03.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:03.528 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:03.529 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:03.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:03.529 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:03.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:03.529 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:03.529 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:03.529 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:03.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:03.534 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:03.535 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:03.535 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:03.535 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:03.536 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:03.540 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:04.018 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:04.069 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:04.071 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:04.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:04.073 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:04.490 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:11:04.539 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:04.539 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:04.540 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:04.540 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:04.965 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:11:05.436 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:11:05.540 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:05.540 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:05.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:05.541 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:05.908 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:11:06.382 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:11:06.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:06.542 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:06.542 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:06.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:06.854 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:11:07.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:07.099 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:07.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:07.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:11:07.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:11:07.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:11:07.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:11:07.100 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:11:07.327 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:11:07.543 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:07.543 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:07.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:07.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:07.798 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:11:08.271 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:11:08.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:08.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:08.744 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:11:09.216 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:11:09.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:09.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:09.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:09.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:09.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:09.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:09.346 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:09.349 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:09.349 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:09.349 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:09.349 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:09.349 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:09.349 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:09.349 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:09.349 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.353 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:14.353 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:14.353 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:14.353 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:14.353 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:14.353 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:14.363 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:14.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:14.364 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:14.364 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:14.364 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:14.366 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:14.367 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:14.367 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:14.367 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:14.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:14.367 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:14.368 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:14.368 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:14.368 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:14.369 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:14.370 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:14.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:14.370 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:14.370 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:14.370 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:14.370 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:14.370 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:14.370 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:14.372 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:14.372 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:14.372 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:14.375 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:14.375 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:14.375 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.375 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:14.376 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:14.380 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:14.859 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:14.900 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:14.902 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:14.904 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:14.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:14.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:14.920 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:14.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:14.938 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:14.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:14.938 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:14.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:14.942 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:14.942 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:14.942 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:14.942 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:14.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:14.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:14.942 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:14.942 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.942 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.942 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.942 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.942 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.943 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:14.943 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:19.944 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:19.944 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:19.944 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:19.945 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:19.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:19.945 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:19.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:19.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:19.951 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:19.951 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:19.951 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:19.954 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:19.954 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:19.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:19.955 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:19.955 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:19.955 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:19.955 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:19.956 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:19.956 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:19.958 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:19.959 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:19.959 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:19.959 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:19.959 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:19.960 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:19.960 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:19.960 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:19.960 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:19.962 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:19.962 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:19.962 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:19.962 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:19.962 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:19.963 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:19.963 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:19.963 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:19.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:19.966 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:19.966 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:19.966 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.966 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:19.971 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:20.450 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:20.494 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:20.496 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:20.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:20.498 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:20.523 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:20.523 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:20.523 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:20.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:20.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:20.536 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:20.536 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:20.537 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:20.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:20.540 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:20.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:20.540 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:20.540 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:20.540 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:20.540 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:20.540 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:20.541 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:25.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:25.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:25.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:25.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:25.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:25.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:25.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:25.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:25.553 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:25.553 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:25.553 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:25.555 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:25.556 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:25.556 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:25.556 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:25.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:25.557 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:25.557 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:25.557 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:25.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:25.559 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:25.559 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:25.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:25.561 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:25.561 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:25.561 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:25.561 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:25.561 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:25.561 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:25.562 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:25.562 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:25.562 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:25.564 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:25.564 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:25.564 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:25.565 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:25.569 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:26.047 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:26.092 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:26.094 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:26.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:26.096 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:26.118 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:26.118 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:26.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:26.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:26.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:26.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:26.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:26.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:26.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:26.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:26.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:26.153 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:26.153 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:26.153 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:26.153 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:26.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:26.153 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:26.154 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.154 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:31.154 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:31.154 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:31.154 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:31.154 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:31.154 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:31.163 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:31.165 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:31.165 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:31.166 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:31.166 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:31.171 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:31.171 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:31.172 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:31.172 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:31.172 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:31.173 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:31.173 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:31.174 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:31.174 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:31.175 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:31.176 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:31.176 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:31.176 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:31.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:31.177 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:31.177 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:31.177 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:31.177 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:31.179 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:31.179 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:31.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:31.179 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:31.179 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:31.179 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:31.179 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:31.179 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:31.180 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.183 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:31.183 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:31.183 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:31.184 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:31.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.188 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:31.666 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:31.711 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:31.713 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:31.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.714 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:31.735 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:31.735 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:31.735 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:31.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:31.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.747 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.749 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.751 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:31.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:31.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:31.758 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:31.758 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:31.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:31.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:31.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:31.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:31.762 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:31.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:31.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:31.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:36.764 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:36.765 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:36.765 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:36.765 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:36.765 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:36.765 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:36.773 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:36.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:36.774 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:36.774 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:36.774 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:36.778 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:36.778 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:36.779 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:36.779 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:36.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:36.780 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:36.780 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:36.780 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:36.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:36.781 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:36.782 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:36.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:36.782 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:36.782 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:36.782 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:36.782 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:36.782 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:36.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:36.784 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:36.784 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:36.784 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:36.785 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:36.785 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:36.785 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:36.785 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:36.785 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:36.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:36.788 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:36.788 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:36.788 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.788 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:36.789 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:36.793 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:37.272 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:37.315 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:37.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:37.319 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:37.322 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:37.325 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 03:11:37.325 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 200
2026-05-06 03:11:37.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 03:11:37.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:37.747 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:11:37.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:37.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:37.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:37.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:37.956 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:38.156 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:38.221 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:11:38.693 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:11:38.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:38.962 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 03:11:38.962 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 0
2026-05-06 03:11:38.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 03:11:38.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:38.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:38.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:38.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:38.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:38.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:38.970 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:38.970 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:38.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:38.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:38.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:38.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:38.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:38.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:38.971 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:43.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:43.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:43.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:43.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:43.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:43.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:43.985 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:43.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:43.986 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:43.987 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:43.987 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:43.991 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:43.991 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:43.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:43.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:43.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:43.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:43.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:43.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:43.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:43.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:43.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:43.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:43.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:43.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:43.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:43.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:43.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:43.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:44.001 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:44.001 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:44.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:44.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:44.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:44.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:44.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:44.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:44.002 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:44.008 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:44.008 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:44.008 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.009 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:44.010 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.013 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:44.491 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:44.543 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:44.545 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:44.545 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:44.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:44.546 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 03:11:44.546 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 200
2026-05-06 03:11:44.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 03:11:44.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:44.967 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:11:44.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:45.179 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:45.179 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:45.179 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:45.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:45.380 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:45.443 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:11:45.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:45.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:45.920 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:11:45.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.183 [DEBUG] fake_trx.py:382 (BTS@172.18.248.20:5700) Recv FAKE_TRXC_DELAY cmd
2026-05-06 03:11:46.183 [INFO] fake_trx.py:385 (BTS@172.18.248.20:5700) Artificial TRXC delay set to 0
2026-05-06 03:11:46.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD FAKE_TRXC_DELAY
2026-05-06 03:11:46.183 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:46.183 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:46.183 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:46.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:46.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:46.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:46.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:46.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:46.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:46.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:46.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:46.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:46.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:46.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:46.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:46.190 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:46.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:46.190 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.197 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:51.197 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:51.197 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:51.197 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:51.197 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:51.197 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:51.204 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:51.205 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:51.205 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:51.206 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:51.206 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:51.209 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:51.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:51.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:51.210 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:51.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:51.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:51.212 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:51.212 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:51.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:51.214 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:51.214 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:51.215 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:51.215 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:51.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:51.216 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:51.216 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:51.216 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:51.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:51.218 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:51.218 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:51.218 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:51.218 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:51.219 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:51.219 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:51.219 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:51.219 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:51.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:51.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:51.223 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:51.224 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:51.225 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:51.228 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:51.706 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:51.755 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:51.758 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:51.759 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:51.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:51.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:51.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:51.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:51.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:51.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:51.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:51.802 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:51.802 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:51.802 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:51.805 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:51.805 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:51.805 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:51.805 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:51.806 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:51.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:51.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:56.811 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:56.811 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:56.811 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:56.811 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:56.811 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:56.811 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:56.819 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:56.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:56.820 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:56.820 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:11:56.820 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:11:56.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:11:56.823 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:11:56.823 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:56.823 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:56.823 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:56.824 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:11:56.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:11:56.824 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:11:56.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:56.826 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:11:56.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:11:56.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:56.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:11:56.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:11:56.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:11:56.831 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:11:56.831 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:11:56.831 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:11:56.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:11:56.836 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:11:57.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:11:57.353 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:11:57.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:57.356 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:11:57.358 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:11:57.383 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:11:57.383 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:11:57.383 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:11:57.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:57.393 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:11:57.396 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:11:57.396 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:11:57.396 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:11:57.396 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:11:57.398 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:11:57.399 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:11:57.399 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:11:57.399 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:11:57.399 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:11:57.399 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:11:57.399 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:11:57.399 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:02.405 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:12:02.405 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:12:02.405 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:02.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:02.405 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:02.405 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:02.413 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:02.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:12:02.414 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:02.414 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:12:02.414 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:12:02.419 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:12:02.419 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:12:02.419 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:02.422 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:12:02.422 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:12:02.422 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:12:02.422 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:02.422 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:02.423 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:12:02.423 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:12:02.423 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:12:02.423 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:12:02.425 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:12:02.425 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:12:02.425 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:12:02.428 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:12:02.428 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:12:02.428 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:02.433 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:12:02.911 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:12:02.954 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:12:02.956 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:12:02.957 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:02.958 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:12:02.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:02.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:02.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:02.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:02.989 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:02.989 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:02.989 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:02.989 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:03.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:03.015 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:03.015 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:03.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:03.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:03.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:03.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:03.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:03.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:03.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:03.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:03.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:03.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:03.090 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:03.090 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:03.091 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:03.091 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:03.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:03.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:03.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:03.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:03.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:03.383 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:12:03.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:03.430 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:03.431 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:03.431 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:03.855 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:12:04.328 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:12:04.431 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:04.431 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:04.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:04.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:04.801 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:12:05.273 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:12:05.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:05.433 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:05.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:05.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:05.744 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:12:06.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:06.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.101 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:06.101 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:06.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:06.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:06.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:06.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:06.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:06.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:06.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:06.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:06.173 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:06.173 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:06.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:06.217 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:12:06.217 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.219 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:06.219 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:06.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:06.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:06.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:06.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:06.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:06.235 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:06.235 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:06.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:06.269 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:06.269 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:06.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:06.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:06.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:06.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:06.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:06.690 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:12:07.162 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:12:07.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:07.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:07.435 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:07.435 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:07.635 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:12:08.108 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:12:08.581 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:12:09.054 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:12:09.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:09.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:09.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:09.278 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:09.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:09.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:09.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:09.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:09.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:09.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:09.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:09.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:09.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:09.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:09.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:09.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:09.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:09.526 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:12:09.999 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:12:10.470 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:12:10.943 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:12:11.416 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:12:11.888 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:12:12.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:12.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:12.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:12.361 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:12:12.362 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:12.362 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:12.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:12.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:12.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:12.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:12.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:12.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:12.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:12.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:12.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.464 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:12.464 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:12.481 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:12.481 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:12.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:12.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:12.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:12.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:12.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:12.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:12.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:12.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:12.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:12.833 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:12:13.306 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:12:13.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:13.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.513 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:13.513 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:13.530 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:13.530 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:13.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:13.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.532 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:13.532 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:13.532 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:13.532 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:13.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:13.538 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:13.538 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:13.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:13.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:13.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:13.608 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:13.624 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:13.624 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:13.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:13.625 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.625 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:13.625 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:13.625 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:13.625 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:13.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:13.630 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:13.630 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:13.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:13.776 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:12:14.248 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:12:14.722 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:12:15.194 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:12:15.668 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:12:16.140 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:12:16.612 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:12:16.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:16.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:16.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:16.638 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:16.657 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:16.657 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:16.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:16.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.658 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:16.658 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:16.658 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:16.658 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:16.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:16.711 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:16.711 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:16.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.712 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:16.783 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:16.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:16.785 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:16.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:16.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:16.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:16.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.803 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:16.803 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:16.803 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:16.803 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:16.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:16.857 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:16.857 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:16.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:16.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:17.083 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:12:17.557 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:12:18.030 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:12:18.503 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:12:18.977 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:12:19.449 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:12:19.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:19.863 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:19.866 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:19.866 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:19.866 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:19.885 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:19.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:19.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:19.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:19.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:19.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:19.886 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:19.886 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:19.921 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:19.922 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:12:19.929 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:19.929 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:19.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:19.929 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:20.395 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:12:20.868 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:12:21.341 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:12:21.813 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:12:22.286 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:12:22.759 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:12:22.933 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:22.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:22.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:22.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:22.938 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:22.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:22.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:22.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:22.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:22.959 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:22.959 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:22.959 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:22.959 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:22.997 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:23.003 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:23.003 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:23.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:23.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:23.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:23.086 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:23.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:23.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:23.088 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:23.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:23.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:23.106 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:23.107 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:23.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:23.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:23.107 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:23.107 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:23.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:23.143 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:23.143 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:23.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:23.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:23.229 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:12:23.702 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:12:24.174 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:12:24.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:24.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:24.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:24.356 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:24.374 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:24.374 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:24.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:24.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:24.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:24.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:24.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:24.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:24.418 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:24.418 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:24.418 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:24.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.640 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:24.641 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:24.645 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:12:24.658 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:24.658 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:24.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:24.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.660 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:24.660 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:24.660 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:24.660 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:24.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:24.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:24.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:24.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:24.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:25.116 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:12:25.587 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:12:26.061 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:12:26.533 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:12:27.005 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:12:27.476 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:12:27.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:27.699 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:27.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:27.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:27.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:27.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:27.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:27.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:27.719 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:27.719 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:27.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:27.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:27.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:27.765 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:27.766 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:27.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:27.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:27.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:27.939 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:27.940 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:27.940 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:27.948 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:12:27.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:27.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:27.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:27.962 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:27.962 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:27.962 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:27.962 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:27.962 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:27.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:28.003 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:28.003 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:28.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:28.003 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:28.421 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:12:28.893 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:12:29.364 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:12:29.835 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:12:30.308 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:12:30.781 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:12:31.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:31.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:31.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:31.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:31.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:31.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:31.028 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:31.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:31.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:31.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:31.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:31.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:31.065 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:31.073 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:31.073 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:31.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:31.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:31.252 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:12:31.724 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:12:32.197 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:12:32.670 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:12:33.142 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:12:33.613 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:12:34.076 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:34.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.080 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:34.081 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:34.086 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:12:34.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:34.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:34.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:34.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.096 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:34.096 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:34.096 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:34.096 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:34.131 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:34.137 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:34.137 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:34.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:34.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:34.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:34.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:34.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:34.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:34.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.332 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:34.332 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:34.332 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:34.332 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:34.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:34.373 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:34.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:34.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:34.558 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:12:35.030 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:12:35.067 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:35.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.070 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:35.070 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:35.090 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:35.090 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:35.090 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:35.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:35.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:35.092 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:35.092 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:35.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:35.130 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:35.130 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:35.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:35.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:35.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:35.188 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:35.198 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:35.198 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:35.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:35.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.198 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:35.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:35.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:35.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:35.212 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:35.215 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:35.215 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:35.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:35.501 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:12:35.974 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:12:36.447 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:12:36.919 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:12:37.391 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:12:37.864 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:12:38.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:38.221 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:38.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:38.222 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:38.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:38.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:38.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:38.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:38.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:38.232 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:38.232 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:38.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:38.236 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:38.236 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:38.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.336 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:12:38.723 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:38.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.728 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:38.728 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:38.728 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:38.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:38.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:38.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:38.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:38.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:38.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:38.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:38.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:38.753 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:38.753 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:38.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.753 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:38.807 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:12:39.281 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 03:12:39.753 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 03:12:40.225 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 03:12:40.699 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 03:12:41.171 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 03:12:41.644 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 03:12:41.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:41.759 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:41.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:41.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:41.760 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:41.780 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:41.780 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:41.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:41.781 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:41.781 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:41.781 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:41.781 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:41.781 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:41.829 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:41.836 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:41.837 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:41.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:41.837 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:42.116 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 03:12:42.589 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 03:12:43.061 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 03:12:43.535 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 03:12:44.008 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 03:12:44.479 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 03:12:44.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:44.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:44.844 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:44.844 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:44.844 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:44.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:44.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:44.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:44.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:44.853 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:44.853 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:44.853 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:44.853 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:44.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:44.909 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:44.909 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:44.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:44.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:44.950 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 03:12:45.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:45.331 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:45.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:45.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:45.332 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:45.350 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:45.350 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:45.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:45.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:45.352 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:45.352 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:45.352 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:45.352 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:45.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:45.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:45.373 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:45.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:45.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:45.423 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 03:12:45.896 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 03:12:46.369 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 03:12:46.842 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 03:12:47.315 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 03:12:47.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:47.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:47.773 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:47.774 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:47.774 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:47.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:47.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:47.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:47.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:47.779 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:47.779 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:47.779 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:47.779 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:47.779 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:12:47.779 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:12:47.779 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:12:47.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.779 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:47.780 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9793 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:52.786 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:12:52.786 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:12:52.787 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:52.787 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:52.787 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:52.787 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:52.793 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:52.794 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:12:52.794 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:52.795 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:12:52.795 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:12:52.798 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:12:52.798 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:12:52.799 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:12:52.799 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:52.799 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:52.800 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:12:52.800 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:12:52.800 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:12:52.800 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:52.801 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:12:52.802 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:12:52.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:12:52.802 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:52.802 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:52.802 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:12:52.802 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:12:52.802 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:12:52.803 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:52.804 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:12:52.804 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:12:52.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:12:52.805 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:52.805 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:52.805 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:12:52.805 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:12:52.805 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:12:52.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.808 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:12:52.808 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:12:52.808 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:12:52.808 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:52.813 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:12:53.291 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:12:53.330 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:12:53.333 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:12:53.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.335 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:12:53.358 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.358 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.359 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:53.362 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.363 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:53.363 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:53.363 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:53.363 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:53.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.395 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:53.396 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:53.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.396 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.449 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:53.474 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.474 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:53.474 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:53.474 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:53.474 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:53.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.539 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:53.540 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:12:53.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.613 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.615 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.615 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.615 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:53.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:53.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:53.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:53.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:53.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:53.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.675 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:53.675 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:53.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.764 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:12:53.812 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:53.812 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:53.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:53.812 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:53.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:53.922 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.941 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:53.941 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:53.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:53.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:53.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:53.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:53.943 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:53.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:53.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:54.001 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:12:54.001 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:12:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:54.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:54.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:54.085 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:54.087 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:54.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:54.088 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:12:54.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:54.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:54.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:54.096 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:54.100 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:54.101 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:54.101 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:12:54.101 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:12:54.101 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:12:54.101 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:54.102 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:54.102 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=279 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:12:59.103 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:12:59.103 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:12:59.103 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:59.103 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:59.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:59.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:59.112 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:12:59.113 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:12:59.113 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:59.114 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:12:59.114 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:12:59.117 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:12:59.117 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:12:59.118 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:12:59.118 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:59.118 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:12:59.119 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:12:59.119 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:12:59.119 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:12:59.119 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:12:59.121 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:12:59.121 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:12:59.121 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:12:59.123 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:12:59.124 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:12:59.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:12:59.124 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:12:59.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:12:59.124 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:12:59.124 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:12:59.124 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:12:59.124 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.127 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:12:59.127 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:12:59.128 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:12:59.128 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.128 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:12:59.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:12:59.129 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:12:59.132 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:12:59.611 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:12:59.648 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:12:59.649 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:12:59.651 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:12:59.651 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:59.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:12:59.668 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:12:59.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:12:59.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:59.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:59.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:59.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:12:59.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:12:59.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:12:59.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:12:59.717 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:12:59.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:12:59.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:00.083 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:13:00.130 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:00.130 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:00.130 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:00.130 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:00.557 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:13:00.570 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:00.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:00.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:00.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:00.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:00.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:00.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:00.592 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:00.592 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:00.592 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:00.592 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:00.592 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:00.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:00.597 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:00.597 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:13:00.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:00.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.029 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:13:01.131 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:01.131 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:01.132 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:01.132 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:01.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:01.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.300 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:01.300 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:01.300 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:01.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:01.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:01.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:01.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:01.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:01.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:01.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:01.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:01.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:01.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:01.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.473 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:01.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:01.482 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:01.482 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:01.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:01.483 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.483 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:01.483 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:01.483 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:01.483 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:01.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:01.500 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:13:01.502 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:01.502 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:13:01.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:01.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:01.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:01.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:01.895 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:01.904 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:01.905 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:01.905 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:01.905 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:01.907 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:01.907 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:01.907 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:01.907 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:01.907 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:01.907 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:01.907 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:01.907 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:06.910 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:06.910 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:06.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:06.910 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:06.910 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:06.910 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:06.913 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:06.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:06.914 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:06.914 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:06.914 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:06.915 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:06.915 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:13:06.915 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:06.916 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:06.916 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:13:06.916 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:06.917 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:13:06.917 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:13:06.917 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:06.917 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:06.917 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:06.917 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:13:06.918 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:06.918 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:13:06.918 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:06.919 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:13:06.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:13:06.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:13:06.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:13:06.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:13:06.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:13:06.920 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:13:06.920 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:13:06.920 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:06.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:13:07.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:13:07.444 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:13:07.446 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:13:07.448 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:13:07.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:07.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:07.468 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:07.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:07.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.472 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:07.472 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:07.472 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:07.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:07.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:07.509 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:07.509 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:07.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.509 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.672 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:07.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.676 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:07.676 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:07.693 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:07.693 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:07.693 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:07.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.694 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:07.694 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:07.694 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:07.695 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:07.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:07.742 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:07.742 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:13:07.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.743 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:07.876 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:13:07.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:07.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:07.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:07.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:08.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:08.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.022 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:08.022 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:08.022 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:08.039 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:08.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:08.039 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:08.040 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.040 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:08.040 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:08.041 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:08.041 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:08.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:08.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:08.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:08.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:08.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.340 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:08.340 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:08.346 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:08.346 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:08.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:08.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:13:08.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:08.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:08.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:08.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:08.394 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:08.402 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:08.402 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:13:08.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:08.818 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:13:08.924 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:08.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:08.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:08.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:09.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:09.206 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:09.208 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:09.208 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:09.208 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:09.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:09.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:09.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:09.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:09.221 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:09.221 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:09.221 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:09.221 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:09.221 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:13:09.222 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:09.222 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:14.225 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:14.225 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:14.225 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:14.225 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:14.225 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:14.225 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:14.233 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:14.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:14.233 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:14.233 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:14.233 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:13:14.236 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:13:14.237 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:13:14.237 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:14.237 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:14.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:14.238 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:13:14.238 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:14.238 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:13:14.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:14.240 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:13:14.240 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:13:14.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:14.240 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:14.240 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:14.240 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:13:14.240 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:14.240 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:13:14.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:14.243 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:14.243 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:13:14.243 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:14.246 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:13:14.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:13:14.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:13:14.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:13:14.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:13:14.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:13:14.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:13:14.247 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:13:14.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:14.252 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:13:14.730 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:13:14.772 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:13:14.776 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:14.777 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:13:14.779 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:13:14.801 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:14.801 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:14.801 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:14.804 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:14.804 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:14.804 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:14.804 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:14.804 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:14.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:14.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:14.835 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:14.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:14.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:14.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:15.002 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:15.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:15.021 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:15.021 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:15.021 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:15.022 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.022 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:15.022 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:15.022 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:15.022 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:15.061 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:15.069 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:15.069 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:13:15.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.202 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:13:15.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:15.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:15.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:15.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:15.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:15.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:15.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:15.349 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:15.367 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:15.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:15.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:15.369 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.369 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:15.369 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:15.369 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:15.369 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:15.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:15.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:15.390 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:15.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:15.666 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:15.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:15.673 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:13:15.682 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:15.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:15.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:15.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:15.684 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:15.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:15.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:15.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:15.728 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:15.728 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:13:15.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:15.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:16.145 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:13:16.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:16.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:16.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:16.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:16.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:16.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:16.535 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:16.535 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:16.535 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:16.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:16.544 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:16.544 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:16.544 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:16.546 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:16.546 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:16.546 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:16.546 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:16.546 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:13:16.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:16.547 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:16.547 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:13:21.550 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:21.551 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:21.551 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:21.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:21.551 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:21.551 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:21.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:21.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:21.558 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:21.558 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:21.558 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:13:21.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:13:21.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:13:21.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:21.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:21.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:21.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:13:21.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:21.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:13:21.563 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:21.566 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:13:21.566 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:13:21.566 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:21.566 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:21.566 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:21.566 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:13:21.567 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:21.567 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:13:21.567 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:21.569 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:13:21.569 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:13:21.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:21.569 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:21.569 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:21.569 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:13:21.569 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:21.569 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:13:21.570 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:13:21.573 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:13:21.573 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:13:21.573 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:13:21.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.574 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:21.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.575 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:21.575 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:21.578 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:13:22.057 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:13:22.102 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:13:22.105 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:13:22.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:22.107 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:13:22.133 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:22.133 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:22.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:22.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:22.139 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:22.139 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:22.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:22.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:22.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:22.159 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:22.160 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:22.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:22.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:22.529 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:13:22.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:22.577 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:23.001 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:13:23.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:13:23.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:23.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:23.578 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:23.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:23.947 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:13:23.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:23.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:23.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:23.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:24.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:24.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:24.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:24.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:24.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:24.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:24.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:24.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:24.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:24.047 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:24.047 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:13:24.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:24.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:24.419 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:13:24.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:24.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:24.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:24.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:24.892 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:13:25.365 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:13:25.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:25.581 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:25.581 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:25.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:25.837 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:13:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:26.167 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:26.169 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:26.169 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:26.169 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:26.188 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:26.188 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:26.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:26.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:26.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:26.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:26.190 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:26.190 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:26.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:26.215 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:26.215 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:26.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:26.215 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:26.310 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:13:26.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:26.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:26.582 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:26.582 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:26.783 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:13:27.255 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:13:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:13:27.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:27.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:27.767 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:27.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:27.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:27.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:27.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:27.785 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:27.785 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:27.785 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:27.785 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:27.785 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:27.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:27.826 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:27.826 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:13:27.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:27.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:28.197 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:13:28.671 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:13:29.143 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:13:29.617 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:13:30.089 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:13:30.561 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:13:31.033 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:13:31.507 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:13:31.978 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:13:32.450 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:13:32.924 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:13:33.396 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:13:33.870 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:13:34.342 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:13:34.814 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:13:35.287 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:13:35.760 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:13:36.232 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:13:36.704 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:13:37.178 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:13:37.650 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:13:38.123 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:13:38.596 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:13:39.067 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:13:39.539 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:13:40.013 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:13:40.485 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:13:40.957 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:13:41.430 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:13:41.903 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:13:42.374 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:13:42.846 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:13:43.320 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:13:43.792 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:13:44.263 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:13:44.735 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:13:45.209 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:13:45.681 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:13:46.154 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:13:46.627 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:13:47.108 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:13:47.580 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:13:47.787 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:47.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:47.788 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:47.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:47.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:47.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:47.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:47.791 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:47.791 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:47.791 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:47.791 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:47.791 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:13:47.791 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:47.791 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:52.798 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:13:52.798 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:13:52.798 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:52.798 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:52.798 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:52.798 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:52.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:13:52.806 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:52.806 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:52.807 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:13:52.807 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:13:52.809 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:13:52.809 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:13:52.809 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:52.809 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:52.810 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:13:52.810 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:13:52.810 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:13:52.810 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:13:52.810 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:52.811 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:13:52.811 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:13:52.811 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:52.811 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:52.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:13:52.812 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:13:52.812 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:13:52.812 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:13:52.812 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:52.813 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:13:52.814 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:13:52.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:52.814 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:13:52.814 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:13:52.814 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:13:52.814 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:13:52.814 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:13:52.814 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.816 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:13:52.817 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:13:52.817 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:13:52.817 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.817 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:13:52.821 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:13:53.300 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:13:53.344 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:13:53.346 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:13:53.347 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:53.349 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:13:53.368 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:53.368 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:53.368 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:53.372 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:53.372 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:53.373 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:53.373 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:53.373 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:53.396 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:53.403 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:53.403 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:53.403 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:53.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:53.772 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:13:53.818 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:53.819 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:53.819 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:53.820 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:54.243 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:13:54.714 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:13:54.819 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:54.820 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:54.820 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:54.821 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:55.187 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:13:55.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:55.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:55.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:55.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:55.249 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:55.249 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:55.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:55.250 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:55.250 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:55.250 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:55.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:55.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:55.277 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:55.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:55.284 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:13:55.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:55.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:55.660 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:13:55.821 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:55.821 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:55.821 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:55.822 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:56.132 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:13:56.604 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:13:56.823 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:56.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:56.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:56.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:57.077 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:13:57.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:57.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:57.410 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:57.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:57.411 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:13:57.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:57.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:57.426 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:57.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:57.427 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:57.427 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:57.427 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:57.427 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:57.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:57.457 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:57.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:57.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:57.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:57.549 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:13:57.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:13:57.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:13:57.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:13:57.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:13:58.020 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:13:58.494 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:13:58.966 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:13:59.004 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:59.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:59.009 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:59.009 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:59.025 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:13:59.025 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:13:59.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:13:59.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:59.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:13:59.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:13:59.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:13:59.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:13:59.060 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:13:59.066 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:13:59.066 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:13:59.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:59.066 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:13:59.438 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:13:59.909 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:14:00.383 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:14:00.855 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:14:01.327 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:14:01.801 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:14:02.273 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:14:02.745 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:14:03.219 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:14:03.691 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:14:04.162 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:14:04.635 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:14:05.108 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:14:05.580 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:14:06.053 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:14:06.526 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:14:06.999 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:14:07.472 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:14:07.944 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:14:08.417 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:14:08.890 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:14:09.362 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:14:09.834 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:14:10.308 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:14:10.780 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:14:11.252 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:14:11.726 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:14:12.198 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:14:12.670 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:14:13.142 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:14:13.616 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:14:14.088 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:14:14.559 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:14:15.033 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:14:15.505 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:14:15.978 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:14:16.450 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:14:16.922 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:14:17.393 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:14:17.867 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:14:18.339 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:14:18.812 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:14:19.028 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:19.028 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:19.029 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:14:19.031 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:19.031 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:19.031 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:19.031 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:19.032 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:14:19.032 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:14:19.032 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:14:19.032 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:14:19.032 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:14:19.032 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:14:19.032 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:19.032 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=5660 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:14:24.039 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:14:24.039 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:14:24.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:14:24.039 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:14:24.039 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:14:24.039 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:14:24.047 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:14:24.048 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:14:24.048 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:14:24.049 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:14:24.049 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:14:24.053 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:14:24.053 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:14:24.053 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:14:24.053 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:14:24.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:14:24.054 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:14:24.054 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:14:24.054 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:14:24.054 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:24.058 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:14:24.058 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:14:24.058 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:14:24.058 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:14:24.059 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:14:24.059 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:14:24.059 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:14:24.059 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:14:24.059 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:24.063 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:14:24.063 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:14:24.063 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:14:24.063 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:14:24.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:14:24.063 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:14:24.064 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:14:24.064 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:14:24.064 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:24.069 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:14:24.069 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:14:24.069 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:14:24.069 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:14:24.069 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.070 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:14:24.070 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:14:24.070 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:14:24.071 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.071 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:14:24.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:14:24.073 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:14:24.075 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:14:24.553 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:14:24.608 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:14:24.610 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:14:24.612 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:24.612 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:14:24.638 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:24.638 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:24.638 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:24.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:24.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:24.643 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:24.643 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:24.643 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:24.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:24.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:24.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:24.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:24.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:24.872 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:24.874 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:24.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:24.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:24.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:24.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:24.893 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:24.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:24.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:24.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:24.895 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:24.895 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:24.930 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:24.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:24.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:24.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:24.938 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:25.024 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:14:25.076 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:25.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:25.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:25.077 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:25.497 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:14:25.969 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:14:26.078 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:26.078 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:26.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:26.078 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:26.440 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:14:26.914 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:14:26.955 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:26.958 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:26.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:26.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:26.977 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:26.977 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:26.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:26.978 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:26.979 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:26.979 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:26.979 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:26.979 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:27.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:27.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:27.008 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:27.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:27.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:27.079 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:27.080 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:27.080 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:27.080 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:27.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:27.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:27.176 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:27.176 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:27.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:27.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:27.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:27.194 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:27.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:27.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:27.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:27.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:27.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:27.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:27.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:27.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:27.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:27.386 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:14:27.858 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:14:28.080 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:28.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:28.329 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:14:28.800 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:14:29.081 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:14:29.081 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:14:29.081 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:14:29.082 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:14:29.273 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:14:29.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:29.363 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:29.365 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:29.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:29.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:29.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:29.381 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.382 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:29.382 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:29.382 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:29.382 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:29.410 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:29.416 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:14:29.416 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:14:29.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.417 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.679 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:29.681 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.683 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:29.683 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:29.683 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:14:29.701 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:29.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:29.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:29.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:29.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:29.703 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:29.703 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:29.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:29.744 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:14:29.748 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:14:29.748 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:14:29.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:29.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:30.216 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:14:30.688 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:14:31.160 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:14:31.633 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:14:32.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:32.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.011 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:32.011 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:32.011 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:14:32.029 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:32.029 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:32.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:32.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:32.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:32.030 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:32.030 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:32.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:32.052 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:14:32.052 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:14:32.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.052 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.105 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:14:32.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:32.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.336 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:32.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:32.337 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:14:32.352 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:32.352 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:32.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:32.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.354 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:32.354 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:32.354 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:32.354 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:32.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:32.398 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:14:32.398 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:14:32.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.398 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:32.578 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:14:33.052 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:14:33.524 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:14:33.997 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:14:34.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:34.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:34.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:34.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:34.423 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:14:34.432 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:34.432 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:34.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:34.433 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:34.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:34.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:34.433 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:34.433 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:34.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:34.470 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:14:34.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:34.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:34.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:34.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:34.942 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:14:35.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:35.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:35.100 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:35.100 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:35.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:35.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:35.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:35.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:35.120 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:35.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:35.121 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:35.121 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:35.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:35.187 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:35.187 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:35.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:35.188 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:35.413 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:14:35.884 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:14:36.357 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:14:36.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:36.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:36.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:36.795 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:36.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:36.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:36.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:36.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:36.813 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:36.813 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:36.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:36.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:36.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:36.822 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:36.822 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:36.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:36.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:36.829 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:14:37.301 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:14:37.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:37.460 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:37.462 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:37.462 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:37.476 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:37.476 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:37.476 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:37.477 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:37.478 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:37.478 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:37.478 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:37.478 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:37.483 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:37.485 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:37.485 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:37.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:37.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:37.772 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:14:38.243 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:14:38.717 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:14:39.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:39.152 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:39.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:39.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:39.173 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:39.173 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:39.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:39.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:39.175 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:39.175 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:39.175 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:39.175 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:39.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:39.181 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:14:39.181 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:14:39.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:39.181 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:39.188 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:14:39.660 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:14:40.133 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:14:40.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:40.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:40.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:40.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:40.459 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:14:40.479 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:14:40.479 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:14:40.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:14:40.481 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:40.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:14:40.481 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:14:40.481 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:14:40.481 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:14:40.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:14:40.510 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:14:40.510 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:14:40.510 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:40.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:14:40.605 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:14:41.077 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:14:41.550 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:14:42.023 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:14:42.495 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:14:42.967 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:14:43.438 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:14:43.912 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:14:44.384 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:14:44.856 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:14:45.329 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:14:45.802 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:14:46.274 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:14:46.746 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:14:47.219 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:14:47.691 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:14:48.163 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:14:48.635 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:14:49.108 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:14:49.580 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:14:50.052 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:14:50.526 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:14:50.998 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:14:51.470 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:14:51.943 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:14:52.416 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:14:52.888 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:14:53.361 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:14:53.834 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:14:54.306 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:14:54.780 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:14:55.252 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:14:55.724 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:14:56.197 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:14:56.670 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:14:57.143 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:14:57.616 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:14:58.088 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:14:58.560 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:14:59.034 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:14:59.506 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:14:59.978 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:15:00.450 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:15:00.483 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:00.483 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:00.483 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:00.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:00.486 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:00.486 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:00.486 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:00.487 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:00.487 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:00.487 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:00.487 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:00.487 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:00.487 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:00.487 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:05.493 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:05.493 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:05.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:05.493 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:05.493 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:05.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:05.501 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:05.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:05.501 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:05.501 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:05.501 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:05.502 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:05.502 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:05.502 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:05.502 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:05.503 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:05.503 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:05.503 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:05.503 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:05.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:05.504 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:05.504 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:05.504 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:05.505 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:05.505 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:05.505 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:05.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:05.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:05.508 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:05.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:05.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:05.512 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:05.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:06.032 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:06.034 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:06.035 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:06.035 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.052 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:06.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.059 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.059 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:06.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:06.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.095 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.095 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.096 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.173 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.175 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.177 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.196 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:06.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.197 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.198 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.198 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:06.198 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:06.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.237 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.313 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.313 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.328 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.328 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:06.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.330 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.330 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:06.330 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:06.369 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.373 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:06.374 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:06.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.463 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:06.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.470 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.473 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.473 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:06.491 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.491 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.491 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:06.493 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.493 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.493 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.493 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:06.493 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:06.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:06.511 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.586 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.590 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:06.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:06.610 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.610 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.610 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.610 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:06.610 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:06.649 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.657 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.657 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.657 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.857 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.878 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:06.878 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:06.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:06.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.880 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:06.880 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:06.933 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:15:06.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:06.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:06.943 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:06.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:06.943 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.089 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:07.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.093 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:07.093 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:07.111 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:07.111 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:07.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:07.112 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.112 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:07.112 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:07.112 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:07.112 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:07.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:07.179 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:07.179 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:07.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:07.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.256 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:07.256 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:07.256 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:07.269 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:07.269 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:07.269 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:07.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.270 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:07.270 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:07.270 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:07.270 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:07.308 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:07.315 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:07.316 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:07.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.316 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.404 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:15:07.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:07.489 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:07.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:07.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:07.491 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:07.498 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:07.498 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:07.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:07.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:07.499 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:07.499 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:07.499 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:07.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:07.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:12.505 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:12.505 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:12.505 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:12.505 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:12.505 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:12.506 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:12.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:12.514 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:12.514 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:12.515 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:12.515 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:12.517 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:12.518 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:12.518 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:12.518 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:12.518 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:12.519 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:12.519 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:12.519 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:12.519 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:12.520 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:12.521 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:12.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:12.521 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:12.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:12.521 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:12.521 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:12.521 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:12.521 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:12.523 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:12.524 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:12.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:12.524 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:12.524 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:12.524 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:12.524 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:12.524 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:12.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:12.526 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:12.526 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:12.526 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:12.526 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:12.526 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:12.527 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:12.527 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:12.527 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.527 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:12.528 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:12.532 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:13.010 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:13.046 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:13.047 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:13.048 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:13.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:13.067 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:13.067 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:13.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:13.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:13.072 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:13.072 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:13.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:13.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:13.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:13.114 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:13.115 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:13.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:13.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:13.482 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:13.529 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:13.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:13.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:13.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:13.954 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:15:13.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:13.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:13.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:13.975 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:13.991 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:13.991 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:13.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:13.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:13.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:13.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:13.993 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:13.993 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:13.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:13.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:13.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:13.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:13.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:14.425 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:15:14.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:14.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:14.454 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:14.454 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:14.472 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:14.472 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:14.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:14.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:14.473 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:14.473 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:14.473 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:14.473 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:14.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:14.525 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:14.525 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:14.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:14.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:14.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:14.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:14.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:14.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:14.898 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:15:15.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:15.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.175 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:15.175 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:15.175 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:15.189 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:15.189 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:15.189 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:15.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.191 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:15.191 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:15.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:15.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:15.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:15.232 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:15.233 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:15.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.370 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:15:15.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:15.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:15.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:15.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:15.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:15.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:15.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:15.661 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:15.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:15.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:15.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:15.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:15.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:15.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:15.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:15.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:15.702 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:15.702 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:15.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.702 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:15.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:15.812 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:15.826 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:15.826 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:15.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:15.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.828 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:15.828 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:15.828 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:15.828 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:15.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:15.841 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:15.841 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:15.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.841 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:15.842 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:15:16.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:16.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:16.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:16.292 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:16.292 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:16.292 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:16.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.293 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:16.293 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:16.293 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:16.293 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:16.311 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:16.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:15:16.318 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:16.318 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:16.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.318 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.532 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:16.532 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:16.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:16.532 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:16.704 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:16.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:16.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:16.709 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:16.727 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:16.727 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:16.727 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:16.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:16.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:16.729 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:16.729 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:16.784 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:15:16.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:16.794 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:16.794 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:16.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:16.795 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:17.175 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:17.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:17.179 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:17.179 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:17.179 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:17.187 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:17.187 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:17.187 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:17.188 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:17.192 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:17.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:17.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:17.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:17.192 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:17.193 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:17.193 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:17.193 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:17.193 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:17.194 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:17.194 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:17.194 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:17.194 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:17.194 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:22.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:22.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:22.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:22.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:22.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:22.195 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:22.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:22.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:22.204 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:22.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:22.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:22.207 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:22.207 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:22.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:22.208 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:22.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:22.208 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:22.208 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:22.209 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:22.209 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:22.210 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:22.210 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:22.210 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:22.212 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:22.212 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:22.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:22.212 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:22.212 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:22.212 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:22.212 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:22.212 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:22.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.215 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:22.215 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:22.215 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:22.215 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:22.220 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:22.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:22.736 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:22.737 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:22.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:22.738 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:22.750 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:22.750 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:22.750 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:22.752 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:22.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:22.754 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:22.754 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:22.794 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:22.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:22.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:22.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.803 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:22.861 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:22.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:22.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:22.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:22.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:22.881 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.881 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:22.881 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:22.881 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:22.881 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:22.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:22.943 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:22.944 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:22.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:22.996 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:22.999 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.001 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.001 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.015 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:23.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:23.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:23.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.029 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:23.029 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:23.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.029 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.120 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:23.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:23.139 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.140 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.140 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.140 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:23.140 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:23.168 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:23.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.177 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:23.177 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:23.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:23.218 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:23.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:23.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.234 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:23.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.253 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:23.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.254 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.254 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:23.255 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:23.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.314 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.314 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.314 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.392 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.394 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:23.413 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.413 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.413 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.413 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:23.413 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:23.450 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.456 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.457 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.627 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.637 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:15:23.649 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:23.649 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:23.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:23.650 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:23.650 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:23.650 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:23.650 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:23.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:23.691 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:23.691 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:23.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:23.692 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:24.107 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:15:24.218 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:24.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:24.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:24.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:24.267 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:24.267 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:24.267 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:24.285 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:24.285 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:24.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:24.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:24.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:24.287 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:24.287 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:24.287 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:24.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:24.348 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:24.348 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:24.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:24.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:24.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:24.498 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:24.500 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:24.500 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:24.500 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:24.509 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:24.510 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:24.510 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:24.510 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:24.514 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:24.514 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:24.514 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:24.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:24.515 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:24.515 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:24.515 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:24.515 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:24.515 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:24.515 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:24.515 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:24.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:24.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:24.516 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=498 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:29.516 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:29.516 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:29.516 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:29.517 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:29.517 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:29.517 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:29.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:29.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:29.527 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:29.527 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:29.527 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:29.531 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:29.532 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:29.532 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:29.532 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:29.533 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:29.533 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:29.534 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:29.534 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:29.534 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:29.535 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:29.535 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:29.535 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:29.536 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:29.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:29.536 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:29.536 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:29.536 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:29.536 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:29.538 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:29.538 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:29.538 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:29.539 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:29.539 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:29.539 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:29.539 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:29.539 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:29.539 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:29.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:29.542 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:29.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:29.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:29.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:29.547 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:30.025 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:30.068 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:30.070 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:30.072 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:30.075 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:30.098 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:30.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:30.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:30.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:30.101 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:30.101 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:30.102 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:30.102 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:30.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:30.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:30.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:30.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:30.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:30.496 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:30.545 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:30.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:30.546 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:30.546 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:30.969 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:15:30.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:30.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:30.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:30.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:31.013 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:31.013 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:31.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:31.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:31.014 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:31.014 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:31.014 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:31.014 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:31.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:31.071 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:31.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:31.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:31.072 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:31.441 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:15:31.546 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:31.546 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:31.547 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:31.547 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:31.912 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:15:31.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:31.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:31.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:31.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:31.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:31.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:31.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:31.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:31.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:31.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:31.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:31.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:32.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:32.012 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:32.012 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:32.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:32.013 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:32.384 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:15:32.548 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:32.548 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:32.857 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:15:33.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:33.159 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:33.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:33.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:33.160 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:33.178 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:33.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:33.178 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:33.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:33.180 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:33.180 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:33.180 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:33.180 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:33.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:33.183 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:33.183 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:33.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:33.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:33.329 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:15:33.549 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:33.549 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:33.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:33.802 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:15:34.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:34.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:34.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:34.120 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:34.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:34.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:34.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:34.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:34.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:34.131 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:34.131 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:34.176 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:34.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:34.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:34.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.275 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:15:34.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:34.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:34.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:34.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:34.747 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:15:34.784 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:34.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:34.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:34.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:34.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:34.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:34.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.798 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:34.798 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:34.798 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:34.798 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:34.841 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:34.848 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:34.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:34.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:34.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:35.218 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:15:35.691 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:15:35.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:35.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:35.730 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:35.730 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:35.746 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:35.746 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:35.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:35.747 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:35.747 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:35.747 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:35.747 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:35.747 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:35.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:35.788 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:35.788 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:35.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:35.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:36.164 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:15:36.636 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:15:37.109 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:15:37.560 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:37.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:37.565 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:37.565 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:37.565 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:37.581 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:15:37.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:37.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:37.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:37.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:37.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:37.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:37.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:37.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:37.629 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:37.632 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:37.632 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:37.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:37.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:38.052 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:15:38.525 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:15:38.998 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:15:39.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:39.456 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:39.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:39.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:39.458 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:39.467 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:39.467 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:39.467 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:39.468 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:39.470 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:15:39.470 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:39.470 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:39.470 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:39.470 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:39.470 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:39.470 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:39.470 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:39.470 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:39.470 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:39.470 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:39.470 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:39.470 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:39.471 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:39.471 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:44.475 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:44.475 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:44.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:44.475 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:44.475 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:44.475 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:44.483 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:44.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:44.485 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:44.485 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:44.485 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:44.492 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:44.492 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:44.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:44.492 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:44.493 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:44.493 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:44.493 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:44.493 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:44.493 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:44.497 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:44.498 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:44.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:44.498 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:44.498 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:44.498 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:44.498 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:44.498 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:44.499 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:44.502 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:44.502 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:44.502 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:44.502 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:44.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:44.503 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:44.503 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:44.503 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:44.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:44.507 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:44.508 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:44.508 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:44.508 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.508 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:44.513 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:44.990 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:45.033 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:45.035 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:45.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.038 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:45.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:45.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:45.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:45.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:45.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:45.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.092 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:45.092 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:45.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.092 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:45.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.213 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:45.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:45.213 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:45.213 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:45.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.226 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:45.226 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:45.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.226 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.377 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.377 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.377 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:45.395 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.395 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.395 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:45.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.397 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:45.397 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:45.397 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:45.397 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:45.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:45.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:45.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.460 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:45.511 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:45.511 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:45.511 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:45.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:45.683 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.687 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.687 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.706 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:45.706 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:45.706 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:45.707 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.707 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:45.707 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:45.707 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:45.707 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:45.742 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:45.748 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:45.748 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:45.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.749 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:45.932 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:15:46.405 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:15:46.512 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:46.512 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:46.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:46.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:46.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:46.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:46.563 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:46.573 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:46.573 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:46.573 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:46.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:46.575 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:46.575 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:46.575 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:46.575 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:46.575 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:46.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:46.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:46.576 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:51.581 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:51.581 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:51.581 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:51.581 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:51.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:51.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:51.590 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:51.592 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:51.592 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:51.593 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:51.593 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:51.598 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:51.599 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:51.599 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:51.599 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:51.600 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:51.600 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:51.601 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:51.601 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:51.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:51.603 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:51.603 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:51.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:51.604 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:51.604 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:51.604 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:51.604 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:51.604 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:51.604 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:51.608 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:51.608 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:51.608 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:51.608 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:51.609 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:51.609 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:51.610 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:51.610 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:51.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:51.613 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:51.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:51.613 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:51.613 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:51.613 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:51.613 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.614 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:51.614 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:51.614 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:51.615 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:51.615 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:51.616 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:51.619 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:52.097 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:52.143 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:52.145 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:52.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.147 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:52.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:52.165 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.165 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:52.165 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:52.165 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:52.165 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:52.195 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.202 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:52.202 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:52.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.319 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.320 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.320 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.337 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.337 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:52.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.338 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:52.338 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:52.338 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:52.338 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:52.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.391 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:52.391 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:52.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.556 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.561 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.561 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.561 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:52.569 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:52.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:52.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:52.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:52.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:52.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:52.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:52.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:52.617 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:52.617 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:52.619 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:52.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:52.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.796 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.800 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.800 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.817 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:52.817 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:52.817 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:52.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.818 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:52.819 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:52.819 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:52.819 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:52.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:52.861 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:52.861 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:52.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:52.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:53.040 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:15:53.512 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:15:53.618 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:53.618 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:53.618 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:53.618 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:53.665 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:53.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:53.670 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:53.670 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:53.670 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:53.679 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:53.679 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:53.679 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:53.679 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:53.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:53.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:53.683 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:53.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:53.684 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:15:53.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:53.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:53.684 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:53.684 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:53.684 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:53.685 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:53.685 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:53.685 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:53.685 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:15:58.685 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:15:58.685 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:15:58.686 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:58.686 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:58.686 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:58.686 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:58.693 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:15:58.694 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:58.694 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:58.695 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:15:58.695 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:15:58.698 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:15:58.698 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:15:58.698 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:58.698 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:58.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:15:58.699 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:15:58.699 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:15:58.699 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:15:58.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:58.700 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:15:58.701 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:15:58.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:58.701 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:58.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:15:58.701 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:15:58.701 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:15:58.701 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:15:58.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:58.703 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:15:58.703 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:15:58.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:15:58.706 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:15:58.706 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:15:58.706 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:15:58.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:15:58.711 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:15:59.190 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:15:59.221 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:15:59.222 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:15:59.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.223 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:15:59.229 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.229 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.229 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:59.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.230 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:59.230 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:59.230 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:59.230 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:59.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.235 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:59.235 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:59.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.354 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.354 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:59.367 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.367 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:59.367 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:59.367 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:59.367 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:59.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.374 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:59.374 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:15:59.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.532 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.532 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.533 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:15:59.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:59.550 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.550 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:59.550 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:59.550 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:59.550 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:59.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:59.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:59.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:15:59.708 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:15:59.708 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:15:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:15:59.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:15:59.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.888 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.888 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:15:59.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:15:59.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:15:59.905 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.905 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:15:59.905 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:15:59.905 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:15:59.905 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:15:59.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:15:59.949 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:15:59.949 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:15:59.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:15:59.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:00.132 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:16:00.604 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:16:00.709 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:00.709 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:00.709 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:00.709 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:00.756 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:00.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:00.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:00.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:00.761 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:00.768 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:00.768 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:00.768 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:00.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:00.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:00.768 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:00.769 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:00.769 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:00.769 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:00.769 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:00.769 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:00.769 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.769 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:00.770 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=446 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:05.776 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:05.776 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:05.776 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:05.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:05.776 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:05.776 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:05.783 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:05.783 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:05.783 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:05.784 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:05.784 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:05.787 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:05.787 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:05.788 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:05.788 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:05.788 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:05.789 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:05.789 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:05.789 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:05.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:05.793 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:05.793 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:05.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:05.794 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:05.794 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:05.794 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:05.794 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:05.794 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:05.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:05.797 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:05.797 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:05.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:05.797 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:05.797 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:05.797 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:05.797 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:05.797 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:05.798 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.802 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:05.802 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:05.803 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:05.803 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.803 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:05.804 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:05.807 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:06.283 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:06.330 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:06.331 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.333 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:06.336 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:06.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:06.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:06.360 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:06.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:06.366 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:06.366 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:06.366 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:06.379 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.385 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:06.385 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:06.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.487 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.488 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:06.488 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:06.506 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:06.506 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:06.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:06.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:06.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:06.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:06.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:06.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.518 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:06.518 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:16:06.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.518 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.667 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.669 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:06.669 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:06.669 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:06.689 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:06.689 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:06.689 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:06.691 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.691 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:06.691 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:06.691 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:06.691 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:06.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.703 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:06.703 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:06.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.755 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:16:06.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:06.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:06.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:06.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:06.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:06.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:06.986 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:06.986 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:07.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:07.004 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:07.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:07.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:07.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:07.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:07.006 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:07.006 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:07.039 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:07.047 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:07.047 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:16:07.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:07.048 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:07.227 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:16:07.700 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:16:07.807 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:07.807 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:07.807 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:07.807 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:07.850 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:07.853 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:07.855 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:07.855 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:07.855 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:07.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:07.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:07.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:07.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:07.871 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:07.871 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:07.871 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:07.871 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:07.871 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:07.871 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:07.871 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.872 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:07.873 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=448 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:12.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:12.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:12.873 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:12.873 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:12.873 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:12.873 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:12.880 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:12.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:12.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:12.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:12.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:12.886 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:12.886 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:12.886 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:12.886 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:12.886 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:12.886 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:12.887 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:12.887 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:12.887 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:12.891 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:12.891 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:12.891 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:12.891 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:12.891 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:12.892 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:12.892 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:12.892 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:12.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:12.895 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:12.896 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:12.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:12.896 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:12.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:12.896 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:12.896 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:12.896 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:12.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:12.901 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:12.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:12.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:12.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:12.901 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:12.902 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:12.902 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:12.902 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:12.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:12.907 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:13.385 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:13.431 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:13.434 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:13.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:13.436 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:13.459 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:13.459 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:13.459 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:13.464 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.464 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:13.464 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:13.464 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:13.464 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:13.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:13.482 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:13.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:13.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.800 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:13.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:13.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:13.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:13.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:13.822 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:13.824 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.824 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:13.824 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:13.824 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:13.824 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:13.856 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:16:13.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:13.868 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:13.868 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:16:13.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:13.906 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:13.906 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:13.906 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:13.906 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:14.329 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:16:14.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:14.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:14.389 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:14.389 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:14.389 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:14.408 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:14.408 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:14.408 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:14.410 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:14.410 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:14.410 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:14.410 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:14.410 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:14.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:14.421 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:14.421 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:14.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:14.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:14.801 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:16:14.907 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:14.907 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:14.907 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:14.907 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:15.272 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:16:15.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:15.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:15.431 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:15.431 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:15.447 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:15.447 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:15.447 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:15.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:15.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:15.449 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:15.449 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:15.449 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:15.452 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:15.453 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:15.453 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:16:15.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:15.453 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:15.744 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:16:15.908 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:15.908 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:15.908 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:15.909 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:16.218 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:16:16.690 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:16:16.909 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:16.909 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:16.910 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:16.910 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:17.163 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:16:17.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:17.479 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:17.480 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:17.480 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:17.480 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:17.489 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:17.490 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:17.490 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:17.490 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:17.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:17.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:17.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:17.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:17.495 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:17.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:17.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:17.495 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:17.495 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:17.495 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:17.496 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:17.496 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:17.496 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:17.496 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:22.497 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:22.497 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:22.497 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:22.497 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:22.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:22.497 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:22.505 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:22.506 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:22.506 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:22.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:22.507 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:22.511 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:22.511 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:22.511 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:22.512 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:22.512 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:22.513 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:22.513 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:22.513 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:22.514 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:22.515 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:22.515 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:22.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:22.516 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:22.516 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:22.516 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:22.516 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:22.517 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:22.517 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:22.519 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:22.519 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:22.519 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.523 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:22.523 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:22.523 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:22.523 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.524 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:22.525 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:22.525 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:22.528 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:23.007 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:23.047 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:23.049 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:23.050 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:23.051 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:23.069 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:23.069 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:23.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:23.073 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.074 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:23.074 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:23.074 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:23.074 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:23.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:23.107 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:23.107 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:23.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:23.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:23.426 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:23.443 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:23.443 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:23.443 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:23.445 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.445 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:23.445 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:23.445 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:23.445 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:23.478 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:16:23.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:23.485 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:23.485 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:16:23.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.527 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:23.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:23.527 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:23.527 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:23.950 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:16:23.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:23.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:23.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:23.966 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:23.984 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:23.984 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:23.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:23.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.986 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:23.986 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:23.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:23.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:23.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:23.993 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:23.993 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:23.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:23.993 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:24.424 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:16:24.528 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:24.529 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:24.529 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:24.529 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:24.896 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:16:25.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:25.055 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:25.056 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:25.057 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:25.076 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:25.076 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:25.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:25.079 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:25.079 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:25.079 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:25.079 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:25.079 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:25.133 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:25.134 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:25.134 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:16:25.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:25.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:25.367 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:16:25.530 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:25.530 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:25.530 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:25.530 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:25.839 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:16:26.313 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:16:26.531 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:26.531 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:26.531 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:26.531 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:26.785 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:16:27.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:27.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:27.106 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:27.106 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:27.106 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:27.113 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:27.114 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:27.114 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:27.114 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:32.120 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:32.120 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:32.120 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:32.120 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:32.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:32.120 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:32.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:32.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:32.130 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:32.130 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:32.130 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:32.133 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:32.134 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:32.134 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:32.134 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:32.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:32.135 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:32.135 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:32.135 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:32.135 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:32.137 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:32.137 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:32.137 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:32.139 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:32.139 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:32.139 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:32.139 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:32.139 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:32.139 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:32.140 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:32.140 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:32.140 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.142 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:32.143 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:32.143 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:32.143 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:32.147 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:32.626 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:32.669 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:32.671 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:32.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:32.674 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:32.700 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:32.701 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:32.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:32.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:32.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:32.704 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:32.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:32.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:32.722 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:32.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:32.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:32.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:32.730 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:33.043 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.045 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:33.045 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:33.061 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:33.061 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:33.061 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:33.064 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.064 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:33.064 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:33.064 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:33.064 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:33.098 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:16:33.100 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:33.107 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:33.107 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:16:33.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.108 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:33.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:33.571 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:16:33.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:33.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.585 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:33.585 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:33.585 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:33.603 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:33.603 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:33.603 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:33.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.606 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:33.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:33.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:33.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:33.610 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:33.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:33.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:33.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:33.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:34.044 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:16:34.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:34.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:34.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:34.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:34.516 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:16:34.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:34.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:34.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:34.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:34.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:34.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:34.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:34.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:34.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:34.697 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:34.697 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:34.697 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:34.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:34.759 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:34.759 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:16:34.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:34.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:34.987 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:16:35.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:35.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:35.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:35.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:35.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:16:35.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:16:36.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:36.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:36.149 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:36.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:36.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:16:36.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:36.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:36.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:36.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:36.725 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:36.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:36.733 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:36.733 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:36.733 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:36.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:36.738 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:36.738 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:36.738 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:36.738 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:36.738 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:36.739 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:36.739 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:41.740 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:41.740 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:41.740 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:41.740 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:41.740 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:41.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:41.747 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:41.749 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:41.749 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:41.750 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:41.750 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:41.755 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:41.756 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:41.756 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:41.757 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:41.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:41.757 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:41.758 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:41.758 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:41.758 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:41.761 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:41.761 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:41.761 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:41.761 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:41.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:41.761 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:41.762 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:41.762 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:41.762 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:41.765 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:41.765 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:41.765 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:41.765 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:41.766 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:41.766 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:41.766 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:41.766 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:41.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:41.771 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:41.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:41.771 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:41.771 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:41.771 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:41.771 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:41.772 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:41.772 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:41.772 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.772 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:41.774 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:41.777 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:42.256 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:42.299 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:42.300 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:42.301 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:42.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:42.317 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:42.317 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:42.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:42.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.324 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:42.324 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:42.324 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:42.324 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:42.353 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:42.360 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:42.361 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:42.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.361 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:42.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.675 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:42.675 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:42.694 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:42.694 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:42.694 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:42.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.696 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:42.696 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:42.696 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:42.696 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:42.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:16:42.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:42.738 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:42.738 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:16:42.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.738 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:42.776 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:42.776 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:42.776 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:42.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:43.201 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:16:43.211 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:43.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:43.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:43.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:43.215 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:43.234 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:43.234 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:43.234 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:43.236 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:43.236 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:43.236 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:43.236 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:43.236 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:43.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:43.242 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:43.242 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:43.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:43.242 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:43.674 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:16:43.777 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:43.777 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:43.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:43.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:44.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:16:44.301 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:44.303 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:44.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:44.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:44.322 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:44.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:44.323 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:44.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:44.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:16:44.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:16:44.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:16:44.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:16:44.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:44.392 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:16:44.392 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:16:44.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:44.392 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:44.617 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:16:44.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:44.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:44.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:44.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:45.091 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:16:45.563 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:16:45.779 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:45.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:45.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:45.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:46.036 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:16:46.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:46.353 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:16:46.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:46.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:46.355 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:16:46.364 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:46.364 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:46.364 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:46.364 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:46.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:46.369 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:46.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:46.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:46.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:46.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:46.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:46.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:46.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:46.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:46.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:46.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:46.370 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:51.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:51.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:51.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:51.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:51.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:51.381 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:51.382 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:51.383 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:51.383 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:51.383 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:51.388 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:51.388 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:51.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:51.389 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:51.389 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:51.389 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:51.389 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:51.389 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:51.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:51.393 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:51.393 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:51.393 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:51.393 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:51.394 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:51.394 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:51.394 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:51.394 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:51.394 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:51.398 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:51.398 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:51.398 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.404 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:51.405 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:51.405 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:51.405 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:51.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:51.410 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:51.888 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:51.934 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:51.937 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:51.937 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:51.939 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:51.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:51.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:51.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:51.972 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:51.973 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:51.973 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:51.973 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:51.977 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:51.977 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:51.977 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:51.977 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:51.977 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:51.977 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:51.977 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:51.977 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:16:56.980 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:56.980 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:56.980 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:56.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:56.980 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:56.980 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:56.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:56.992 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:56.992 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:56.993 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:16:56.993 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:16:56.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:16:56.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:16:56.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:56.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:56.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:56.999 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:16:57.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:16:57.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:16:57.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:57.004 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:16:57.004 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:16:57.004 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:57.004 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:57.004 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:57.004 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:16:57.005 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:16:57.005 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:16:57.005 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:57.008 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:16:57.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:16:57.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:57.009 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:16:57.009 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:16:57.009 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:16:57.009 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:16:57.009 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:16:57.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:16:57.015 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:16:57.016 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:16:57.016 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:16:57.016 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.016 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.017 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:16:57.021 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:16:57.499 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:16:57.552 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:16:57.554 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:16:57.555 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:57.557 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:16:57.590 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:57.590 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:57.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:57.610 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:16:57.611 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:16:57.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:16:57.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:16:57.616 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:16:57.616 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:16:57.616 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:16:57.616 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:16:57.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:16:57.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:16:57.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:16:57.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:16:57.618 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:16:57.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:16:57.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:02.625 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:02.625 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:02.625 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:02.625 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:02.625 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:02.625 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:02.632 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:02.633 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:02.633 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:02.634 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:02.634 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:17:02.636 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:17:02.637 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:17:02.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:02.637 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:02.637 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:02.637 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:17:02.638 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:02.638 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:17:02.638 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:02.639 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:17:02.639 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:17:02.639 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:02.639 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:02.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:02.639 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:17:02.640 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:02.640 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:17:02.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:02.641 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:17:02.641 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:17:02.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:02.641 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:02.641 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:02.641 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:17:02.641 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:02.641 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:17:02.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.644 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:17:02.644 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:17:02.644 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:17:02.645 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:02.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:02.649 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:17:03.127 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:17:03.171 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:17:03.174 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:17:03.176 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:17:03.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:03.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:03.200 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:03.200 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:03.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:03.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:03.211 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:03.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:03.215 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:03.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:03.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:03.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:03.215 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:17:03.215 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:03.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:03.216 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:08.218 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:08.218 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:08.218 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:08.218 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:08.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:08.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:08.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:08.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:08.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:17:08.227 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:17:08.227 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:17:08.228 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:08.228 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:08.228 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:08.228 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:17:08.229 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:08.229 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:17:08.229 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:08.230 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:17:08.230 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:17:08.230 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:08.230 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:08.230 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:08.230 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:17:08.231 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:08.231 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:17:08.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:08.232 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:17:08.233 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:17:08.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:08.233 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:08.233 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:08.233 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:17:08.233 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:08.233 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:17:08.233 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:17:08.236 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:17:08.236 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:17:08.236 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.236 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:08.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:08.238 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:08.238 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:08.238 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:17:08.238 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:13.245 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:13.245 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:13.245 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:13.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:13.245 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:13.245 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:13.253 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:13.254 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:13.255 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:13.255 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:13.255 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:17:13.259 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:17:13.259 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:17:13.260 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:13.260 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:13.260 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:13.261 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:17:13.261 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:13.261 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:17:13.262 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:13.263 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:17:13.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:17:13.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:13.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:13.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:13.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:17:13.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:13.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:17:13.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:13.267 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:13.267 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:17:13.267 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:17:13.271 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:17:13.272 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:17:13.272 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:17:13.272 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.272 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:13.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:13.277 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:17:13.756 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:17:13.806 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:17:13.808 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:17:13.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:13.811 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:17:13.834 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:13.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:13.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:13.839 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:13.839 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:13.839 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:13.839 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:13.840 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:13.851 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:13.856 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:13.856 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:13.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:13.856 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:14.228 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:17:14.277 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:14.277 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:14.277 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:14.278 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:14.699 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:17:14.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:14.810 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:14.810 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:14.810 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:14.828 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:14.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:14.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:14.830 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:14.830 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:14.830 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:14.830 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:14.830 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:14.834 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:14.834 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:14.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:14.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:15.170 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:17:15.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:15.278 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:15.278 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:15.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:15.643 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:17:15.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:15.769 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:15.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:15.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:15.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:15.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:15.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:15.790 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:15.790 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:15.790 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:15.790 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:15.790 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:15.826 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:15.831 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:15.831 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:15.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:15.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:16.116 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:17:16.279 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:16.279 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:16.279 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:16.279 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:16.587 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:17:16.743 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:16.746 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:16.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:16.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:16.760 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:16.760 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:16.760 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:16.761 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:16.761 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:16.761 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:16.761 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:16.761 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:16.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:16.771 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:16.771 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:16.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:16.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:17.058 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:17:17.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:17.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:17.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:17.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:17.532 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:17:17.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:17.705 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:17.705 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:17.705 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:17.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:17.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:17.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:17.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:17.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:17.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:17.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:17.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:17.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:17.774 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:17.774 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:17.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:17.774 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.004 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:17:18.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:18.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:18.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:18.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:18.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:18.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:18.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:18.341 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:18.341 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:18.341 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:18.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.343 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:18.343 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:18.343 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:18.343 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:18.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:18.389 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:18.389 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:17:18.389 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.390 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.477 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:17:18.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:18.948 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.949 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:17:18.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:18.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:18.949 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:18.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:18.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:18.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:18.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:18.968 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:18.968 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:18.968 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:18.968 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:18.994 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:19.000 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:19.000 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2026-05-06 03:17:19.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:19.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:19.421 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:17:19.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:19.548 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:19.549 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:19.549 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:19.549 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:19.558 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:19.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:19.558 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:19.559 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:19.559 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:19.559 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:19.559 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:19.559 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:19.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:19.605 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:19.612 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:19.612 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:19.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:19.612 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:19.893 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:17:20.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:20.208 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.209 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:20.209 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:20.226 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:20.226 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:20.227 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:20.228 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.228 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:20.229 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:20.229 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:20.229 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:20.270 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:20.276 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:20.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:20.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.365 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:17:20.837 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:17:20.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:20.850 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.851 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:20.851 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:20.868 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:20.868 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:20.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:20.869 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.869 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:20.869 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:20.869 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:20.870 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:20.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:20.878 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:20.880 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:20.880 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:20.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:20.880 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:21.307 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:17:21.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:21.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:21.433 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:21.433 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:21.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:21.450 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:21.450 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:21.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:21.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:21.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:21.451 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:21.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:21.494 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:21.501 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:21.501 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:17:21.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:21.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:21.781 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:17:22.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:22.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.089 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:22.089 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:22.089 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:22.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:22.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:22.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:22.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:22.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:22.099 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:22.099 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:22.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:22.102 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:22.102 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:17:22.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.253 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:17:22.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:22.697 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.698 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:22.698 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:22.698 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:22.717 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:22.717 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:22.717 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:22.718 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.718 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:22.718 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:22.719 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:22.719 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:22.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:22.722 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:22.722 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:22.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.722 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:22.724 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:17:23.196 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:17:23.670 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:17:23.673 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:23.676 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:23.677 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:23.677 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:23.677 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:23.685 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:23.685 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:23.685 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:23.686 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:23.686 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:23.686 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:23.686 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:23.687 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:23.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:23.724 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:23.724 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:23.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:23.724 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:24.142 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:17:24.614 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:17:24.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:24.642 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:24.642 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:24.642 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:24.642 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:24.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:24.661 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:24.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:24.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:24.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:24.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:24.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:24.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:24.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:24.713 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:24.714 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:24.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:24.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:25.087 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:17:25.558 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:17:25.604 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:25.607 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:25.608 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:25.608 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:25.608 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:25.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:25.623 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:25.623 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:25.624 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:25.624 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:25.624 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:25.624 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:25.624 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:25.653 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:25.659 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:25.659 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:25.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:25.659 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:26.030 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:17:26.502 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:17:26.564 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:26.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:26.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:26.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:26.567 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:26.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:26.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:26.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:26.577 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:26.577 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:26.577 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:26.577 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:26.577 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:26.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:26.595 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:26.595 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:26.595 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:26.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:26.975 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:17:27.448 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:17:27.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:27.530 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:27.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:27.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:27.531 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:27.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:27.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:27.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:27.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:27.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:27.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:27.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:27.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:27.588 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:27.596 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:27.596 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:27.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:27.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:27.921 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:17:28.393 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:17:28.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:28.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:28.498 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:28.498 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:28.498 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:28.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:28.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:28.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:28.508 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:28.508 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:28.508 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:28.508 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:28.508 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:28.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:28.541 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:28.541 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:28.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:28.541 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:17:29.337 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:17:29.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:29.457 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:29.458 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:29.458 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:29.458 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:29.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:29.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:29.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:29.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:29.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:29.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:29.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:29.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:29.470 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:29.472 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:17:29.472 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:17:29.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:29.472 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:29.809 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:17:30.282 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:17:30.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:30.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:30.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:30.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:30.422 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:17:30.424 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:30.424 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:30.424 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:30.424 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:30.425 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:30.425 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:30.425 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:30.425 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:30.425 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:30.425 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:30.425 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:17:30.425 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:30.425 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:30.426 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:30.426 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:30.426 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:30.426 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:30.426 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3705 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:35.431 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:35.431 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:35.431 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:35.431 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:35.431 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:35.431 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:35.435 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:35.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:35.435 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:35.435 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:35.435 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:35.436 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:35.436 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:17:35.436 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:35.438 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:35.438 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:17:35.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:35.440 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:35.440 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:17:35.440 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.443 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:17:35.443 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:17:35.443 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:17:35.444 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:35.444 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:35.448 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:17:35.927 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:17:35.968 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:17:35.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:35.972 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:17:35.974 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:17:35.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:35.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:35.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:36.001 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.001 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.001 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.001 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:36.001 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:36.023 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.030 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.030 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.031 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:36.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:36.293 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:36.293 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:36.293 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:36.294 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.294 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.294 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.294 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:36.294 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:36.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.299 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.299 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.299 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.397 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:17:36.445 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:36.446 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:36.446 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:36.446 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:36.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.525 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.526 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:36.526 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:36.539 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:36.539 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:36.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:36.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.540 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.540 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.540 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:36.540 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:36.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.587 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.588 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.787 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.788 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:36.788 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:36.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:36.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:36.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:17:36.806 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.806 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.806 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.806 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:17:36.806 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:17:36.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:36.811 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:17:36.811 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:17:36.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:36.869 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:17:37.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:17:37.045 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:17:37.046 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:17:37.046 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:17:37.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:37.053 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:37.053 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:37.053 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:37.054 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:37.054 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:37.054 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:37.054 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:37.054 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:17:37.054 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:37.054 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:37.054 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=348 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:17:42.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:17:42.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:17:42.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:42.061 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:42.061 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:42.061 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:42.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:17:42.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:42.071 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:42.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:17:42.072 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:17:42.078 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:17:42.078 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:17:42.078 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:42.078 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:42.078 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:17:42.078 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:17:42.079 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:17:42.079 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:17:42.079 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:17:42.083 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:17:42.083 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:17:42.083 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:42.083 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:42.083 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:17:42.083 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:17:42.084 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:17:42.084 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:17:42.084 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:17:42.087 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:17:42.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:17:42.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:42.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:17:42.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:17:42.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:17:42.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:17:42.088 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:17:42.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:17:42.094 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:17:42.095 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:17:42.095 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:17:42.095 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.097 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:17:42.100 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:17:42.579 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:17:43.051 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:17:43.526 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:17:43.998 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:17:44.474 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:17:44.946 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:17:45.421 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:17:45.893 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:17:46.368 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:17:46.840 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:17:47.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:17:47.786 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:17:48.254 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:17:48.717 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:17:49.181 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:17:49.644 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:17:50.107 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:17:50.570 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:17:51.033 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:17:51.497 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:17:51.969 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:17:52.441 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:17:52.915 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:17:53.378 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:17:53.842 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:17:54.305 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:17:54.768 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:17:55.232 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:17:55.704 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:17:56.176 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:17:56.650 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:17:57.122 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:17:57.594 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:17:58.068 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:17:58.540 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:17:59.012 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:17:59.487 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:17:59.959 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:18:00.435 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:18:00.907 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:18:01.382 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:18:01.856 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:18:02.329 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:18:02.801 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:18:03.277 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:18:03.748 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:18:04.224 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:18:04.696 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:18:05.171 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:18:05.643 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:18:06.119 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:18:06.127 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:18:06.127 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:18:06.127 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:18:06.127 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:18:06.127 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:18:06.128 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:18:06.128 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:18:11.134 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:18:11.135 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:18:11.135 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:18:11.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:18:11.135 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:18:11.135 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:18:11.138 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:18:11.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:18:11.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:11.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:18:11.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:18:11.141 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:18:11.142 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:18:11.142 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:18:11.142 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:11.142 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:18:11.143 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:18:11.143 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:18:11.143 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:18:11.143 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:18:11.145 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:18:11.145 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:18:11.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:18:11.145 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:11.145 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:18:11.145 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:18:11.145 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:18:11.145 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:18:11.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:18:11.148 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:18:11.148 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:18:11.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:18:11.148 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:11.148 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:18:11.148 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:18:11.148 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:18:11.148 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:18:11.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:18:11.152 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:18:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:18:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:18:11.152 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.153 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:18:11.153 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:18:11.153 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:18:11.153 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:11.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:11.158 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:18:11.636 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:18:12.108 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:18:12.583 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:18:13.055 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:18:13.530 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:18:14.002 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:18:14.476 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:18:14.948 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:18:15.420 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:18:15.890 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:18:16.359 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:18:16.832 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:18:17.304 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:18:17.778 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:18:18.247 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:18:18.710 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:18:19.183 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:18:19.654 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:18:20.118 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:18:20.581 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:18:21.052 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:18:21.520 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:18:21.984 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:18:22.456 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:18:22.928 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:18:23.398 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:18:23.873 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:18:24.345 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:18:24.813 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:18:25.276 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:18:25.739 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:18:26.203 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:18:26.666 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:18:27.135 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:18:27.599 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:18:28.062 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:18:28.534 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:18:29.007 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:18:29.479 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:18:29.954 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:18:30.426 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:18:30.901 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:18:31.373 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:18:31.849 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:18:32.321 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:18:32.795 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:18:33.267 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:18:33.738 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:18:34.209 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:18:34.683 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:18:35.155 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:18:35.627 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:18:36.101 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:18:36.573 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:18:37.045 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:18:37.520 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:18:37.992 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:18:38.468 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:18:38.940 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:18:39.415 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:18:39.887 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:18:40.358 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:18:40.832 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:18:41.304 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:18:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:18:42.251 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:18:42.723 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:18:43.197 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:18:43.669 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:18:44.141 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:18:44.615 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:18:45.087 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:18:45.559 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:18:46.033 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:18:46.505 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:18:46.977 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:18:47.451 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:18:47.923 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 03:18:48.181 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:48.398 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 03:18:48.870 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 03:18:49.183 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:49.341 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 03:18:49.815 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 03:18:50.184 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:50.287 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 03:18:50.759 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 03:18:51.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:51.233 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 03:18:51.705 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 03:18:52.177 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 03:18:52.186 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:52.653 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 03:18:53.125 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 03:18:53.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:53.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:18:53.190 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:18:53.190 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:18:53.190 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:18:53.190 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:18:53.190 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:18:53.190 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:53.191 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=9094 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:18:58.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:18:58.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:18:58.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:18:58.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:18:58.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:18:58.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:18:58.203 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:18:58.203 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:18:58.203 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:58.204 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:18:58.204 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:18:58.206 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:18:58.206 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:18:58.206 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:18:58.207 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:58.207 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:18:58.207 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:18:58.207 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:18:58.207 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:18:58.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:18:58.208 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:18:58.208 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:18:58.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:18:58.209 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:58.209 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:18:58.209 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:18:58.209 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:18:58.209 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:18:58.209 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:18:58.210 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:18:58.210 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:18:58.210 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:18:58.210 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:18:58.210 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:18:58.210 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:18:58.211 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:18:58.211 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:18:58.211 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:18:58.212 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:18:58.212 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:18:58.212 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:18:58.212 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:18:58.213 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:18:58.213 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:18:58.213 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.213 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:18:58.218 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:18:58.696 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:18:58.734 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:18:58.735 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:18:58.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:18:58.736 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:18:58.758 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:18:58.758 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:18:58.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:18:58.763 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:18:58.763 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:18:58.763 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:18:58.763 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:18:58.763 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:18:58.790 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:18:58.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:18:58.802 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:18:58.802 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:18:58.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:18:58.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:18:59.169 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:18:59.215 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:18:59.215 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:18:59.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:18:59.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:18:59.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:18:59.655 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:00.115 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:19:00.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:00.216 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:00.216 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:00.216 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:00.587 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:19:01.061 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:19:01.216 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:01.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:01.217 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:01.217 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:01.533 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:19:02.006 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:19:02.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:02.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:02.218 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:02.218 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:02.477 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:19:02.950 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:19:03.034 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:03.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:03.038 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:03.039 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:03.060 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:03.060 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:03.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:03.062 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:03.063 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:03.063 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:03.063 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:03.063 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:03.090 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:03.099 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:03.103 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:19:03.103 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:19:03.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:03.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:03.219 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:03.219 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:03.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:03.219 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:03.423 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:19:03.896 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:19:04.368 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:19:04.840 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:19:05.312 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:19:05.786 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:19:06.257 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:19:06.731 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:19:07.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:07.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:07.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:07.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:07.128 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:19:07.145 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:07.145 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:07.146 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:07.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:07.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:07.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:07.147 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:07.147 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:07.199 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:07.204 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:19:07.209 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:07.212 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:07.213 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:07.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:07.213 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:07.640 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:07.675 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:19:08.147 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:19:08.617 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:19:09.091 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:19:09.563 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:19:10.035 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:19:10.506 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:19:10.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:10.946 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:10.946 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:10.947 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:10.965 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:10.965 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:10.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:10.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:10.967 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:10.967 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:10.967 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:10.967 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:10.972 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:10.974 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:10.976 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:19:10.977 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:19:10.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:10.977 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:10.979 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:19:11.452 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:19:11.924 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:19:12.312 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:12.395 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:19:12.869 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:19:13.260 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:13.342 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:19:13.730 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:13.815 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:19:14.287 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:19:14.680 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:14.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:14.684 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:14.684 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:14.684 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:19:14.693 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:14.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:14.697 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:19:14.697 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:19:14.697 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:19:14.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:19:14.697 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:19:14.697 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:19:14.697 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:19:19.701 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:19:19.701 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:19:19.701 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:19:19.701 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:19:19.701 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:19:19.701 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:19:19.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:19:19.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:19:19.705 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:19.705 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:19:19.705 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:19:19.707 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:19:19.708 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:19:19.708 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:19:19.708 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:19.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:19:19.709 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:19:19.709 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:19:19.709 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:19:19.710 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:19.711 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:19:19.711 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:19:19.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:19:19.711 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:19.711 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:19:19.711 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:19:19.711 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:19:19.712 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:19:19.712 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:19.714 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:19:19.714 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:19:19.714 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:19:19.714 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:19.714 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:19:19.714 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:19:19.715 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:19:19.715 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:19:19.715 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:19.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:19:19.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:19:19.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:19:19.719 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:19:19.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.720 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:19.721 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:19.724 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:19:20.203 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:19:20.247 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:19:20.250 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:20.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:20.253 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:19:20.276 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:20.276 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:20.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:20.278 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:20.278 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:20.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:20.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:20.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:20.296 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:20.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:20.309 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:20.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:20.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:20.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:20.675 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:19:20.681 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:20.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:20.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:20.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:20.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:21.146 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:19:21.161 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:21.163 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:21.617 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:19:21.641 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:21.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:21.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:21.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:21.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:22.090 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:19:22.121 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:22.563 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:19:22.607 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:22.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:22.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:22.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:22.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:23.036 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:19:23.087 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:23.509 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:19:23.567 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:23.727 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:23.727 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:23.728 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:23.728 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:23.982 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:19:24.053 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:24.454 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:19:24.533 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:24.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:24.729 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:24.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:24.729 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:24.928 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:19:25.013 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:25.400 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:19:25.497 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:25.872 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:19:25.978 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:26.343 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:19:26.459 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:26.816 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:19:26.939 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:27.289 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:19:27.425 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:27.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:19:27.904 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:27.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:27.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:27.913 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:27.913 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:27.927 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:27.927 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:27.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:27.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:27.928 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:27.928 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:27.928 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:27.929 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:27.941 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:27.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:27.948 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:19:27.948 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:19:27.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:27.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:28.233 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:19:28.626 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:28.707 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:19:29.110 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:29.179 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:19:29.591 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:29.652 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:19:30.070 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:30.125 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:19:30.557 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:30.597 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:19:31.037 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:31.070 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:19:31.517 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:31.538 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:19:31.997 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:32.011 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:19:32.477 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:32.485 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:19:32.957 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:19:32.962 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:33.431 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:19:33.442 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:33.903 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:19:33.929 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:34.376 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:19:34.408 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:34.850 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:19:34.893 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:35.323 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:19:35.374 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:35.797 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:19:35.859 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:35.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:35.867 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:35.867 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:35.867 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:35.867 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:19:35.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:35.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:35.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:35.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:35.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:35.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:35.883 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:35.883 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:35.886 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:35.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:35.889 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:35.889 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:35.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:35.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:36.233 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:36.269 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:19:36.703 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:36.706 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:36.740 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:19:37.174 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:37.213 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:19:37.645 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:37.686 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:19:38.121 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:38.158 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:19:38.593 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:38.629 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:19:39.063 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:39.102 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:19:39.534 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:39.574 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:19:40.010 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:40.047 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:19:40.481 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:40.517 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:19:40.952 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:40.988 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:19:41.422 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:41.459 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:19:41.893 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:41.933 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:19:42.364 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:42.405 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:19:42.840 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:42.877 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:19:43.311 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:43.316 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:43.320 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:43.321 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:43.321 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:43.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:43.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:43.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:43.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:43.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:43.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:43.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:43.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:43.343 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:43.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:43.347 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:19:43.347 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:19:43.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:43.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:43.347 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:19:43.736 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:43.820 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:19:44.207 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:44.293 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:19:44.682 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:44.685 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:44.765 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:19:45.154 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:45.238 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:19:45.624 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:45.710 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:19:46.101 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:46.182 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:19:46.571 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:46.573 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:46.654 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:19:47.041 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:47.127 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:19:47.513 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:47.516 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:47.599 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:19:47.988 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:48.071 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:19:48.460 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:48.462 [DEBUG] fake_trx.py:269 (MS@172.18.248.22:6700) Recv SETTA cmd
2026-05-06 03:19:48.542 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:19:48.930 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:49.015 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:19:49.401 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:49.488 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:19:49.877 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:49.960 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:19:50.349 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:50.431 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:19:50.819 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:50.824 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:50.826 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:50.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:50.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:50.827 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:19:50.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:50.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:50.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:50.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:50.842 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:19:50.842 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:19:50.842 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:19:50.842 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:19:50.842 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:19:50.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:19:50.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:50.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:19:55.845 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:19:55.845 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:19:55.845 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:19:55.845 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:19:55.845 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:19:55.845 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:19:55.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:19:55.849 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:19:55.850 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:55.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:19:55.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:19:55.852 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:19:55.852 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:19:55.853 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:19:55.853 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:55.853 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:19:55.854 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:19:55.854 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:19:55.854 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:19:55.854 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:55.856 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:19:55.856 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:19:55.856 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:19:55.856 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:55.856 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:19:55.856 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:19:55.857 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:19:55.857 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:19:55.857 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:55.859 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:19:55.859 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:19:55.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:19:55.859 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:19:55.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:19:55.860 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:19:55.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:19:55.860 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:19:55.860 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.864 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:19:55.864 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:19:55.864 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:19:55.865 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:19:55.869 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:19:56.348 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:19:56.402 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:19:56.404 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:19:56.406 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:19:56.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:56.426 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:56.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:56.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:56.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:56.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:56.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:56.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:56.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:56.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:56.447 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:56.447 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:56.820 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:19:56.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:56.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:56.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:56.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:57.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:19:57.765 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:19:57.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:57.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:57.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:57.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:58.237 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:19:58.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:58.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:58.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:58.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:58.575 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:19:58.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:19:58.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:19:58.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:58.576 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:58.576 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:58.576 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:19:58.576 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:19:58.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:19:58.620 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:19:58.620 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:19:58.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:58.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:19:58.710 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:19:58.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:58.871 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:58.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:58.872 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:19:59.181 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:19:59.651 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:19:59.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:19:59.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:19:59.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:19:59.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:00.122 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:20:00.593 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:20:00.708 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:00.708 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:00.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:00.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:00.715 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:00.715 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:00.715 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:00.716 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:00.716 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:00.716 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:00.716 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:00.716 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:00.727 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:00.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:00.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:00.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:00.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:00.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:00.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:00.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:00.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:01.060 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:20:01.534 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:20:02.006 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:20:02.480 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:20:02.811 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:02.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:02.820 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:02.820 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:02.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:02.829 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:02.829 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:02.829 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:02.833 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:02.834 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:02.834 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:02.834 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:02.834 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:02.834 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:02.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:02.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:02.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:02.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:02.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:02.835 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1507 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:07.835 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:07.835 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:07.835 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:07.835 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:07.835 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:07.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:07.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:07.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:07.839 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:07.839 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:07.839 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:20:07.842 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:20:07.842 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:20:07.842 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:07.842 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:07.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:07.843 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:20:07.843 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:07.843 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:20:07.844 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:07.845 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:20:07.846 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:20:07.846 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:07.846 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:07.846 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:07.846 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:20:07.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:07.847 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:20:07.847 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:07.849 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:20:07.849 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:20:07.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:07.849 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:07.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:07.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:20:07.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:07.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:20:07.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:20:07.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:20:07.856 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:20:07.856 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.856 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:07.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:20:08.338 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:20:08.387 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:20:08.389 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:20:08.390 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:08.392 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:20:08.416 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:08.416 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:08.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:08.421 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:08.422 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:08.422 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:08.423 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:08.423 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:08.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:08.442 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:20:08.442 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:20:08.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:08.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:08.810 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:20:08.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:08.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:08.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:08.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:09.283 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:20:09.755 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:20:09.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:09.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:09.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:09.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:10.228 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:20:10.535 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:10.538 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:10.544 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:10.544 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:10.544 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:20:10.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:10.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:10.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:10.566 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:10.566 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:10.566 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:10.566 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:10.566 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:10.606 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:10.611 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:20:10.611 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:20:10.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:10.611 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:10.700 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:20:10.862 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:10.862 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:10.863 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:10.864 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:11.174 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:20:11.646 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:20:11.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:11.863 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:11.864 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:11.865 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:12.119 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:20:12.591 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:20:12.707 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:12.710 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:12.714 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:12.714 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:12.714 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:20:12.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:12.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:12.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:12.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:12.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:12.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:12.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:12.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:12.726 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:12.727 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:12.727 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:12.727 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1051 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:17.729 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:17.729 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:17.729 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:17.729 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:17.729 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:17.729 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:17.737 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:17.738 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:17.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:17.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:17.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:20:17.743 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:20:17.743 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:20:17.744 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:17.744 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:17.744 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:17.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:20:17.746 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:17.746 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:20:17.746 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:17.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:20:17.748 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:20:17.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:17.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:17.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:17.750 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:20:17.750 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:17.750 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:20:17.750 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:17.752 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:20:17.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:20:17.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:17.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:17.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:17.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:20:17.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:17.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:20:17.753 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:20:17.757 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:20:17.758 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:20:17.758 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:20:17.758 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.758 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:17.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:17.763 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:20:18.242 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:20:18.284 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:20:18.288 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:20:18.289 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:18.291 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:20:18.306 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:18.307 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:18.307 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:18.311 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:18.311 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:18.311 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:18.311 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:18.311 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:18.339 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:18.346 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:18.346 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:18.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:18.347 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:18.714 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:20:18.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:18.761 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:18.761 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:18.761 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:19.185 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:20:19.659 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:20:19.761 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:19.778 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:19.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:19.778 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:20.131 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:20:20.444 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:20.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:20.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:20.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:20.467 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:20.467 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:20.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:20.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:20.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:20.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:20.468 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:20.468 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:20.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:20.515 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:20.515 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:20.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:20.516 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:20.604 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:20:20.778 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:20.779 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:20.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:20.779 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:21.074 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:20:21.545 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:20:21.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:21.780 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:21.780 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:21.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:22.016 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:20:22.490 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:20:22.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:22.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:22.613 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:22.613 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:22.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:22.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:22.631 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:22.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:22.632 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:22.632 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:22.632 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:22.632 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:22.676 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:22.682 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:22.682 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:22.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:22.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:22.781 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:22.782 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:22.960 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:20:23.433 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:20:23.905 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:20:24.376 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:20:24.788 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:24.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:24.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:24.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:24.805 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:24.806 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:24.806 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:24.806 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:24.808 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:24.808 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:24.808 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:24.808 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:24.808 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:24.808 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:24.808 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:29.813 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:29.813 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:29.813 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:29.813 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:29.813 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:29.813 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:29.836 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:29.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:29.838 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:29.838 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:29.838 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:20:29.846 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:20:29.846 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:20:29.846 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:29.846 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:29.847 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:29.847 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:20:29.847 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:29.847 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:20:29.848 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:29.852 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:20:29.853 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:20:29.853 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:29.853 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:29.853 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:29.853 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:20:29.854 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:29.854 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:20:29.854 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:29.858 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:20:29.858 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:20:29.858 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:29.858 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:29.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:29.859 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:20:29.859 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:29.859 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:20:29.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:29.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:20:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:20:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:20:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:20:29.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:20:29.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:20:29.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:20:29.866 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:20:29.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:29.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:29.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:20:30.350 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:20:30.398 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:20:30.401 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:20:30.402 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:30.403 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:20:30.427 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:30.427 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:30.427 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:30.432 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:30.433 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:30.433 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:30.434 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:30.434 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:30.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:30.454 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:20:30.454 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:20:30.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:30.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:30.822 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:20:30.870 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:30.870 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:30.871 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:30.871 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:31.295 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:20:31.769 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:20:31.872 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:31.872 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:31.872 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:31.873 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:32.241 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:20:32.569 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:32.571 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:32.578 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:32.578 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:32.579 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:20:32.593 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:32.593 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:32.593 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:32.594 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:32.594 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:32.594 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:32.594 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:32.594 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:32.614 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:32.620 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:20:32.620 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:20:32.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:32.620 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:32.714 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:20:32.873 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:32.874 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:32.874 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:32.874 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:33.187 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:20:33.660 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:20:33.874 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:33.875 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:33.875 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:33.875 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:34.131 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:20:34.605 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:20:34.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:34.706 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:34.711 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:34.711 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:34.712 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:20:34.722 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:34.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:34.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:34.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:34.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:34.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:34.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:34.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:34.725 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:34.725 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:34.725 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:34.725 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1048 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:34.725 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1048 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:34.725 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1048 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:34.726 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1048 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:34.726 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1048 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:34.726 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1048 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:39.730 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:39.730 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:39.730 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:39.730 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:39.730 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:39.730 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:39.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:39.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:39.742 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:39.743 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:39.743 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:20:39.747 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:20:39.748 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:20:39.748 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:39.748 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:39.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:39.749 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:20:39.749 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:39.749 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:20:39.750 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:39.752 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:20:39.752 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:20:39.752 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:39.752 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:39.752 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:39.753 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:20:39.753 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:39.753 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:20:39.753 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:39.755 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:20:39.755 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:20:39.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:39.756 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:39.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:39.756 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:20:39.756 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:39.756 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:20:39.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:39.759 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:20:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:20:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:20:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:20:39.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:20:39.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:20:39.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:20:39.760 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:20:39.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:39.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:39.765 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:20:40.243 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:20:40.288 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:20:40.290 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:20:40.291 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:40.292 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:20:40.316 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:40.316 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:40.317 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:40.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:40.322 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:40.322 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:40.323 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:40.323 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:40.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:40.348 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:40.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:40.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:40.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:40.716 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:20:40.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:40.763 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:40.763 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:40.763 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:41.187 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:20:41.660 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:20:41.763 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:41.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:41.764 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:41.764 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:42.133 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:20:42.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:42.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:42.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:42.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:42.541 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:42.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:42.541 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:42.542 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:42.544 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:42.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:42.544 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:42.544 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:42.544 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:42.544 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:42.544 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:42.544 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:47.548 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:47.548 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:47.548 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:47.548 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:47.548 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:47.548 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:47.558 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:47.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:47.559 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:47.559 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:47.559 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:20:47.562 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:20:47.562 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:20:47.562 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:47.562 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:47.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:47.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:20:47.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:47.563 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:20:47.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:47.565 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:47.565 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:20:47.565 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:47.567 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:20:47.568 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:20:47.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:47.568 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:47.568 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:47.568 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:20:47.568 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:47.568 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:20:47.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:47.571 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:20:47.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:20:47.571 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:20:47.571 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:20:47.571 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:20:47.571 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:20:47.572 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:20:47.572 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:20:47.572 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.572 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:47.573 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.574 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:47.577 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:20:48.055 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:20:48.102 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:20:48.104 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:20:48.105 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:48.106 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:20:48.122 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:48.122 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:48.123 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:48.127 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:48.127 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:48.128 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:48.128 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:48.128 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:48.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:48.163 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:20:48.163 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:20:48.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:48.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:48.528 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:20:48.576 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:48.576 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:49.001 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:20:49.474 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:20:49.577 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:49.577 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:49.577 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:49.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:49.947 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:20:50.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:50.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:50.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:50.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:50.360 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:20:50.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:50.367 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:50.368 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:50.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:50.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:50.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:50.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:50.369 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:50.369 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:50.369 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:55.375 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:55.375 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:55.376 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:55.376 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:55.376 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:55.376 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:55.385 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:55.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:55.387 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:55.387 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:20:55.387 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:20:55.393 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:20:55.393 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:20:55.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:55.393 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:55.394 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:55.394 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:20:55.394 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:20:55.394 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:20:55.395 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:55.397 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:20:55.398 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:20:55.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:55.398 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:55.398 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:55.398 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:20:55.398 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:20:55.399 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:20:55.399 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:55.401 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:20:55.402 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:20:55.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:55.402 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:20:55.402 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:55.402 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:20:55.402 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:20:55.402 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:20:55.402 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:20:55.406 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:20:55.407 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:20:55.407 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:20:55.407 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:20:55.408 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:20:55.412 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:20:55.889 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:20:55.935 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:20:55.938 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:20:55.939 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:55.939 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:20:55.956 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:55.956 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:55.956 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:55.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:55.990 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:55.990 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:55.990 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:55.990 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:56.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:56.036 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:56.036 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:56.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.359 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:20:56.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:56.410 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:56.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:56.411 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:56.411 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:56.411 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:56.411 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:56.425 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:56.425 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:56.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:20:56.435 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.435 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:56.435 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:56.435 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:20:56.435 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:20:56.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:56.448 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:20:56.448 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:20:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.821 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:20:56.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:20:56.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:20:56.828 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:20:56.828 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:20:56.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:20:56.837 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:20:56.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:20:56.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:20:56.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:20:56.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:20:56.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:20:56.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:20:56.841 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:20:56.842 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:20:56.842 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:20:56.842 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:56.842 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:56.842 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:56.842 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:56.842 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:56.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:20:56.843 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:01.843 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:01.843 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:01.843 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:01.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:01.844 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:01.844 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:01.849 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:01.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:01.850 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:01.850 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:01.850 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:01.854 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:01.854 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:01.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:01.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:01.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:01.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:01.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:01.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:01.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:01.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:01.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:01.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:01.859 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:01.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:01.859 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:01.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:01.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:01.860 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:01.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:01.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:01.862 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:01.865 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:01.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:01.866 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:01.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:01.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:01.870 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:02.349 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:02.384 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:02.385 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:02.386 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:02.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:02.403 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:02.403 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:02.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:02.449 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:02.449 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:02.450 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:02.450 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:02.450 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:02.496 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:02.496 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:02.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:02.496 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:02.819 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:02.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:02.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:02.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:02.868 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:02.869 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:02.869 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:02.887 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:02.887 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:02.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:02.897 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:02.897 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:02.897 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:02.897 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:02.897 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:02.905 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:02.909 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:02.909 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:02.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:02.909 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:03.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:03.283 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:03.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:03.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:03.291 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:21:03.297 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:03.297 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:03.298 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:03.298 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:03.299 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:03.299 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:03.299 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:03.299 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:03.299 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:03.299 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:03.299 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:08.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:08.303 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:08.303 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:08.303 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:08.303 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:08.303 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:08.311 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:08.311 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:08.311 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:08.312 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:08.312 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:08.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:08.315 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:08.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:08.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:08.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:08.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:08.317 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:08.317 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:08.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:08.318 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:08.319 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:08.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:08.319 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:08.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:08.319 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:08.319 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:08.319 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:08.319 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:08.322 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:08.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:08.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:08.327 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:08.327 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:08.327 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:08.327 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:08.327 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.328 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:08.328 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:08.328 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:08.328 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.329 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:08.333 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:08.812 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:08.863 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:08.866 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:08.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:08.869 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:08.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:08.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:08.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:08.941 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:08.942 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:08.942 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:08.942 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:08.943 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:08.953 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:08.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:08.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:08.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:08.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:09.284 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:09.328 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:09.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:09.332 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:09.333 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:09.333 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:09.334 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:09.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:09.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:09.355 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:09.355 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:09.355 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:09.365 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:09.365 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:09.365 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:09.365 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:09.365 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:09.372 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:09.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:09.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:09.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:09.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:09.755 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:21:09.789 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:09.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:09.795 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:09.796 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:09.804 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:09.805 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:09.805 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:09.805 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:09.806 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:09.806 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:09.806 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:09.806 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:09.806 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:09.806 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:09.806 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:09.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:09.806 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:14.812 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:14.812 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:14.812 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:14.812 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:14.812 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:14.812 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:14.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:14.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:14.821 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:14.821 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:14.821 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:14.823 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:14.824 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:14.824 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:14.824 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:14.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:14.824 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:14.825 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:14.825 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:14.825 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:14.826 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:14.826 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:14.826 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:14.828 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:14.828 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:14.828 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:14.831 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:14.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:14.831 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:14.831 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:14.831 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:14.831 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:14.832 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:14.832 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:14.832 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.832 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:14.833 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:14.837 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:15.315 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:15.363 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:15.367 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:15.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:15.371 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:15.398 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:15.398 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:15.399 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:15.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:15.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:15.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:15.424 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:15.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:15.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:15.462 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:21:15.463 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:21:15.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:15.463 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:15.787 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:15.835 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:15.835 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:15.836 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:15.836 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:16.261 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:21:16.734 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:21:16.836 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:16.836 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:16.837 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:16.837 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:17.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:21:17.678 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:21:17.837 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:17.838 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:18.152 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:21:18.624 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:21:18.839 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:18.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:18.839 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:18.839 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:19.098 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:21:19.469 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:19.469 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:19.469 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:21:19.472 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:19.472 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:19.472 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:19.472 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:19.473 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:19.473 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:19.473 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:19.473 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:19.473 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:19.473 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:19.473 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:24.481 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:24.481 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:24.481 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:24.481 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:24.481 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:24.481 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:24.486 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:24.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:24.487 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:24.487 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:24.487 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:24.490 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:24.491 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:24.491 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:24.491 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:24.491 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:24.492 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:24.492 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:24.492 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:24.492 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:24.493 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:24.494 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:24.494 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:24.494 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:24.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:24.494 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:24.495 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:24.495 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:24.495 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:24.496 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:24.496 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:24.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:24.497 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:24.497 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:24.497 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:24.497 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:24.497 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:24.497 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.500 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:24.500 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:24.500 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:24.501 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:24.501 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:24.505 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:24.984 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:25.027 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:25.028 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:25.029 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:25.030 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:25.047 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:25.047 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:25.047 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:25.094 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.094 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:25.094 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:25.095 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:25.095 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:25.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:25.131 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:25.131 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:25.131 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.132 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.341 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:25.347 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:25.348 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:25.364 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:25.364 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:25.364 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:25.374 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.374 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:25.374 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:25.374 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:25.374 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:25.404 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:25.411 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:25.411 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:25.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.453 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:25.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:25.503 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:25.503 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:25.503 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:25.615 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:25.617 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:25.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:25.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:25.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:25.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:25.631 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:25.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:25.634 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:25.634 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:25.634 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:25.634 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:25.634 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:25.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:25.634 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:30.638 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:30.639 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:30.639 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:30.639 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:30.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:30.639 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:30.646 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:30.646 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:30.646 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:30.647 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:30.647 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:30.649 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:30.649 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:30.649 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:30.650 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:30.650 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:30.650 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:30.650 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:30.651 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:30.651 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:30.652 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:30.652 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:30.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:30.654 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:30.654 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:30.654 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:30.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:30.657 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:30.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:30.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:30.662 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:31.140 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:31.182 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:31.185 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:31.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:31.186 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:31.211 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:31.211 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:31.211 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:31.252 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:31.253 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:31.253 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:31.254 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:31.254 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:31.280 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:31.287 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:21:31.287 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:21:31.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:31.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:31.612 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:31.659 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:31.660 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:32.085 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:21:32.558 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:21:32.660 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:32.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:32.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:32.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:33.030 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:21:33.502 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:21:33.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:33.662 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:33.662 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:33.662 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:33.972 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:21:34.444 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:21:34.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:34.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:34.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:34.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:34.917 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:21:35.291 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:35.291 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:35.292 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:21:35.295 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:35.295 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:35.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:35.296 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:35.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:40.303 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:40.304 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:40.304 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:40.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:40.304 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:40.304 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:40.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:40.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:40.308 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:40.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:40.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:40.310 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:40.311 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:40.311 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:40.311 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:40.312 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:40.312 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:40.312 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:40.312 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:40.313 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:40.314 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:40.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:40.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:40.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:40.314 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:40.314 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:40.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:40.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:40.315 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:40.317 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:40.317 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:40.317 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:40.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:40.318 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:40.318 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:40.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:40.318 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:40.318 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:40.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:40.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:40.323 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:40.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:40.328 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:40.807 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:40.857 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:40.859 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:40.861 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:40.862 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:40.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:40.885 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:40.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:40.932 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:40.933 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:40.933 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:40.933 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:40.933 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:40.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:40.953 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:40.953 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:40.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:40.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:41.279 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:41.326 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:41.326 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:41.327 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:41.328 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:41.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:41.666 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:41.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:41.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:41.681 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:41.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:41.682 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:41.682 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:41.684 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:41.684 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:41.684 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:41.684 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:41.684 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:41.684 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:41.684 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:46.689 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:46.689 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:46.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:46.689 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:46.689 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:46.689 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:46.692 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:46.692 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:46.692 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:46.693 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:46.693 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:46.694 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:46.694 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:46.694 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:46.695 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:46.695 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:46.695 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:46.697 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:46.697 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:46.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:46.699 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:46.699 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:46.699 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:46.704 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:47.184 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:47.223 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:47.226 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:47.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:47.228 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:47.253 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:47.253 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:47.254 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:47.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:47.287 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:47.288 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:47.288 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:47.288 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:47.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:47.331 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:47.331 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:47.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:47.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:47.659 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:47.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:47.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:47.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:47.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:48.041 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:48.043 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:48.050 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:48.050 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:48.059 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:48.060 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:48.065 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:48.065 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:48.065 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:48.065 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:48.065 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:48.065 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:48.065 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:48.065 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:53.067 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:53.067 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:53.067 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:53.067 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:53.067 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:53.067 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:53.076 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:53.077 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:53.077 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:53.078 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:53.078 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:53.081 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:53.081 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:53.082 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:53.082 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:53.082 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:53.083 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:53.083 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:53.083 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:53.083 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:53.085 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:53.085 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:53.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:53.085 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:53.085 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:53.085 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:53.085 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:53.085 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:53.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:53.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:53.088 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:53.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.093 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:53.094 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:53.094 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:53.094 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.095 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:53.099 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:53.577 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:21:53.628 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:21:53.631 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:21:53.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:53.633 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:21:53.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:53.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:53.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:21:53.683 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:53.683 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:53.683 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:53.684 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:21:53.684 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:21:53.717 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:53.725 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:21:53.725 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:21:53.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:53.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:54.049 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:21:54.098 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:54.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:54.434 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:21:54.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:21:54.446 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:21:54.446 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:21:54.453 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:54.453 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:54.453 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:54.453 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:54.454 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:54.454 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:54.455 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:54.455 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:54.455 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:54.455 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:54.455 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:54.455 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:21:59.460 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:21:59.460 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:21:59.460 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:59.460 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:59.460 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:59.460 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:59.469 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:21:59.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:59.470 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:59.470 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:21:59.471 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:21:59.474 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:21:59.475 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:21:59.475 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:59.475 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:59.475 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:21:59.476 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:21:59.476 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:21:59.477 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:21:59.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:21:59.478 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:21:59.479 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:21:59.479 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:59.479 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:59.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:21:59.479 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:21:59.480 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:21:59.480 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:21:59.480 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:59.482 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:21:59.482 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:21:59.482 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.486 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:21:59.486 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:21:59.486 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:21:59.486 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.487 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:21:59.488 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:21:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:21:59.491 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:21:59.969 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:00.013 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:00.016 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:00.018 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:00.018 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:00.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:00.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:00.037 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:00.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:00.070 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:00.071 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:00.072 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:00.072 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:00.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:00.119 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:22:00.119 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:22:00.119 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:00.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:00.442 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:00.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:00.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:00.491 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:00.491 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:00.915 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:22:00.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:00.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:00.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:00.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:00.970 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:22:00.980 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:00.980 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:00.980 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:00.980 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:00.984 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:00.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:00.984 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:00.984 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:00.984 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:22:00.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:00.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:00.985 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:00.985 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:00.985 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:00.985 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:00.985 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:00.985 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:00.986 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=323 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:05.987 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:05.987 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:05.987 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:05.987 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:05.995 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:05.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:05.996 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:05.996 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:05.996 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:22:05.998 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:22:05.999 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:22:05.999 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:05.999 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:05.999 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:06.000 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:22:06.000 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:06.000 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:22:06.000 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:06.001 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:22:06.001 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:22:06.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:06.001 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:06.001 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:06.001 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:22:06.001 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:06.001 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:22:06.002 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:06.003 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:22:06.003 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:22:06.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:06.003 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:06.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:06.003 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:22:06.003 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:06.003 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:22:06.004 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:22:06.006 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:22:06.006 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:22:06.006 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:22:06.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:06.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:06.011 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:22:06.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:06.529 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:06.532 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:06.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:06.534 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:06.552 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:06.552 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:06.552 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:06.588 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:06.589 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:06.589 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:06.590 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:06.590 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:06.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:06.638 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:06.639 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:06.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:06.640 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:06.963 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:07.009 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:07.009 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:07.009 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:07.009 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:07.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:07.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:07.356 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:07.356 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:07.366 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:07.366 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:07.366 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:07.366 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:07.368 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:07.368 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:07.368 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:07.368 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:07.368 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:22:07.369 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:07.369 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:07.369 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:12.373 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:12.373 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:12.374 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:12.374 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:12.374 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:12.374 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:12.383 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:12.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:12.385 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:12.385 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:12.385 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:22:12.391 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:22:12.391 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:22:12.392 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:12.392 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:12.392 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:12.393 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:22:12.393 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:12.393 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:22:12.393 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:12.396 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:22:12.396 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:22:12.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:12.397 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:12.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:12.397 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:22:12.397 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:12.397 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:22:12.397 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:12.400 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:22:12.400 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:22:12.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:12.401 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:12.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:12.401 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:22:12.401 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:12.401 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:22:12.401 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.405 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:22:12.406 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:22:12.406 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:22:12.406 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.406 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.407 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:12.411 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:22:12.890 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:12.937 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:12.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:12.940 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:12.942 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:12.960 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:12.960 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:12.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:12.975 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:12.975 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:12.975 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:12.975 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:12.975 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:12.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:12.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:22:12.983 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:22:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:12.983 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:13.361 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:13.408 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:13.409 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:13.409 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:13.409 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:13.802 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:13.805 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:13.811 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:13.811 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:13.812 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:22:13.822 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:13.823 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:13.823 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:13.823 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:13.823 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:13.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:13.824 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:13.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:13.824 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:22:13.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:13.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:18.830 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:18.830 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:18.830 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:18.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:18.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:18.830 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:18.839 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:18.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:18.840 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:18.840 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:18.840 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:22:18.843 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:22:18.843 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:22:18.844 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:18.844 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:18.844 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:18.845 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:22:18.845 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:18.845 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:22:18.845 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:18.847 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:22:18.847 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:22:18.847 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:18.847 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:18.847 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:18.848 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:22:18.848 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:18.848 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:22:18.848 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:18.850 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:18.850 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:22:18.850 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:18.853 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:22:18.853 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:22:18.854 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:22:18.854 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:22:18.854 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.854 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:18.859 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:22:19.337 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:19.383 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:19.385 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:19.387 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:19.387 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:19.400 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:19.400 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:19.400 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:19.401 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:19.401 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:19.401 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:19.401 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:19.401 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:19.809 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:19.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:19.858 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:19.858 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:19.858 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:20.280 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:22:20.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:20.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:20.555 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:20.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:20.564 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:20.564 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:20.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:20.565 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:20.565 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:20.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:20.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:20.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:20.753 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:22:20.859 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:20.859 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:20.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:20.859 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:21.226 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:22:21.621 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:22:21.698 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:22:21.734 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:22:21.738 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:21.738 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:21.747 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:21.747 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:21.747 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:21.747 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:21.750 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:21.750 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:21.750 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:21.750 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:21.750 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:22:21.750 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:21.750 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:21.750 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=625 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:26.755 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:26.755 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:26.755 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:26.755 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:26.763 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:26.765 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:26.765 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:26.766 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:26.766 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:22:26.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:22:26.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:22:26.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:26.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:26.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:26.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:22:26.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:26.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:22:26.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:26.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:22:26.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:22:26.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:26.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:26.778 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:26.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:22:26.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:26.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:22:26.779 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:26.780 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:22:26.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:22:26.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:26.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:26.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:26.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:22:26.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:26.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:22:26.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:22:26.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:22:26.786 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:22:26.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:26.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:26.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:22:27.269 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:27.311 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:27.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:27.312 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:27.314 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:27.329 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:27.329 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:27.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:27.333 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:27.333 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:27.333 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:27.333 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:27.333 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:27.740 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:27.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:27.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:27.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:27.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:28.212 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:22:28.683 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:22:28.790 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:28.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:28.791 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:28.791 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:29.156 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:22:29.628 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:22:29.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:29.791 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:29.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:29.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:30.100 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:22:30.571 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:22:30.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:30.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:30.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:30.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:31.045 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:22:31.517 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:22:31.793 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:31.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:31.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:31.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:31.989 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:22:32.275 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:22:32.283 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:32.283 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:32.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:32.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:32.461 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:22:32.935 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:22:33.406 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:22:33.880 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:22:34.353 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:22:34.826 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:22:35.247 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:35.247 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:35.250 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:35.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:35.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:35.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:35.251 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:35.251 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:35.251 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:35.251 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:35.251 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:22:35.251 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:35.251 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:40.259 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:40.259 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:40.259 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:40.259 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:40.259 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:40.259 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:40.262 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:40.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:40.262 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:40.262 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:40.262 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:22:40.263 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:22:40.263 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:22:40.263 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:40.263 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:40.263 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:40.263 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:40.264 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:40.264 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:40.264 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:22:40.265 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:40.265 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:22:40.265 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:40.266 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:40.266 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:22:40.266 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:22:40.268 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:22:40.268 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:22:40.268 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.268 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:40.269 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:40.273 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:22:40.752 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:40.789 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:40.790 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:40.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:40.791 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:40.807 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:40.807 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:40.807 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:40.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:40.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:40.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:40.813 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:40.813 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:41.224 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:41.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:41.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:41.271 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:41.271 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:41.695 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:22:42.166 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:22:42.271 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:42.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:42.272 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:42.272 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:42.639 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:22:43.111 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:22:43.272 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:43.272 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:43.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:43.273 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:43.584 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:22:44.057 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:22:44.274 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:44.274 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:44.274 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:44.274 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:44.529 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:22:45.001 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:22:45.275 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:45.275 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:45.275 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:45.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:45.472 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:22:45.727 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:22:45.733 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:45.733 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:45.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:45.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:45.945 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:22:46.418 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:22:46.889 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:22:47.363 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:22:47.836 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:22:48.308 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:22:48.697 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:48.697 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:48.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:48.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:48.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:48.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:48.707 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:48.707 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:48.707 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:48.707 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:48.707 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:22:48.708 [WARNING] transceiver.py:257 (TRX2@172.18.248.20:5700/2) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-05-06 03:22:48.708 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:48.708 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:48.708 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:48.708 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:48.708 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:48.708 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:48.708 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:48.709 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:48.709 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:22:53.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:22:53.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:22:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:53.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:53.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:53.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:22:53.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:53.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:53.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:22:53.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:53.714 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:22:53.714 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:22:53.714 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:53.715 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:22:53.715 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:22:53.715 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:53.716 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:22:53.716 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:22:53.716 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:22:53.718 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:22:53.719 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:22:53.719 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:22:53.719 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:22:53.719 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:22:53.723 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:22:54.201 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:22:54.239 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:22:54.240 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:22:54.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:22:54.241 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:22:54.259 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:22:54.259 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:22:54.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:22:54.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:54.264 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:54.264 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:54.264 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:22:54.264 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:22:54.673 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:22:54.721 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:54.722 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:55.145 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:22:55.618 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:22:55.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:55.723 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:55.723 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:55.723 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:56.090 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:22:56.562 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:22:56.723 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:56.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:56.724 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:56.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:57.033 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:22:57.507 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:22:57.724 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:57.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:57.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:57.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:57.979 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:22:58.451 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:22:58.726 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:22:58.726 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:22:58.726 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:22:58.726 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:22:58.922 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:22:59.177 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:22:59.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:22:59.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:59.183 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:22:59.395 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:22:59.868 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:23:00.340 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:23:00.815 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:23:01.287 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:23:01.761 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:23:02.146 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:23:02.146 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:23:02.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:02.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:02.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:02.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:02.152 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:02.152 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:02.152 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:02.152 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:02.152 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:02.152 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:02.152 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:23:07.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:07.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:07.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:07.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:07.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:07.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:07.159 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:07.159 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:07.159 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:07.160 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:07.160 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:23:07.160 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:23:07.161 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:23:07.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:07.161 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:07.161 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:07.161 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:23:07.161 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:07.161 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:23:07.161 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:07.162 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:07.162 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:23:07.162 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:07.163 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:07.163 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:23:07.163 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.165 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:23:07.166 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:23:07.166 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:23:07.166 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:07.166 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:07.170 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:23:07.649 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:23:07.689 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:23:07.691 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:23:07.693 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:23:07.693 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:23:07.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:23:07.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:23:07.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:23:07.711 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:07.711 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:23:07.711 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:23:07.711 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:23:07.711 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:23:08.121 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:23:08.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:08.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:08.169 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:08.169 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:08.592 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:23:09.066 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:23:09.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:09.169 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:09.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:09.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:09.538 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:23:10.010 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:23:10.169 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:10.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:10.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:10.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:10.481 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:23:10.954 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:23:11.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:11.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:11.172 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:11.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:11.427 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:23:11.899 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:23:12.173 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:12.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:12.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:12.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:12.370 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:23:12.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:23:12.631 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:23:12.631 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:23:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:12.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:12.843 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:23:13.315 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:23:13.787 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:23:14.261 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:23:14.733 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:23:15.205 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:23:15.596 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:23:15.596 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:23:15.600 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:15.601 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:15.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:15.601 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:15.601 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:15.601 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:15.601 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:15.601 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:15.601 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (TRX2@172.18.248.20:5700/2) RX TRXD message (ver=1 fn=1822 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:15.602 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:15.602 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:23:20.606 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:20.606 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:20.606 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:20.606 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:20.606 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:20.606 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:20.615 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:20.617 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:20.617 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:20.618 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:20.618 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:23:20.623 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:23:20.623 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:23:20.623 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:20.624 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:20.624 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:20.624 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:23:20.624 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:20.624 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:23:20.624 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:20.627 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:23:20.627 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:23:20.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:20.628 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:20.628 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:20.628 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:23:20.628 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:20.628 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:23:20.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:20.631 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:23:20.631 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:23:20.631 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:20.631 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:20.632 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:20.632 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:23:20.632 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:20.632 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:23:20.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:20.635 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.636 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:23:20.637 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:23:20.637 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:23:20.637 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.637 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.638 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:20.641 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:23:21.120 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:23:21.166 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:23:21.168 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:23:21.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:23:21.170 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:23:21.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:23:21.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:23:21.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:23:21.193 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:21.194 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:23:21.194 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:23:21.194 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:23:21.194 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:23:21.592 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:23:21.639 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:21.639 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:21.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:21.640 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:22.064 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:23:22.537 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:23:22.640 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:22.640 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:22.640 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:22.641 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:23.009 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:23:23.481 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:23:23.641 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:23.641 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:23.641 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:23.642 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:23.952 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:23:24.425 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:23:24.642 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:24.642 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:24.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:24.643 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:24.897 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:23:25.369 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:23:25.643 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:25.644 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:25.644 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:25.644 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:25.840 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:23:26.096 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD NOHANDOVER
2026-05-06 03:23:26.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:23:26.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:23:26.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:26.105 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:26.314 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:23:26.786 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:23:27.258 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:23:27.731 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:23:28.204 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:23:28.676 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:23:29.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:23:29.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:23:29.073 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:29.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:29.073 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:29.073 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:29.074 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:29.074 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:29.074 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:29.074 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:23:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:29.074 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:34.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:34.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:34.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:34.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:34.089 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:34.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:34.090 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:34.090 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:34.090 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:23:34.093 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:23:34.093 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:23:34.094 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:34.094 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:34.094 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:34.094 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:23:34.095 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:34.095 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:23:34.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:34.096 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:23:34.096 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:23:34.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:34.096 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:34.096 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:34.096 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:23:34.096 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:34.097 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:23:34.097 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:34.098 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:23:34.098 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:23:34.098 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:34.098 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:34.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:34.099 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:23:34.099 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:34.099 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:23:34.099 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.101 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:23:34.102 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:23:34.102 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:23:34.102 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:34.102 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:34.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.103 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:34.106 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:23:34.585 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:23:34.627 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:23:34.630 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:23:34.630 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:23:34.634 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:23:35.057 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:23:35.105 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:35.105 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:35.105 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:35.105 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:35.533 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:23:36.005 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:23:36.106 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:36.106 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:36.107 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:36.107 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:36.479 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:23:36.951 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:23:37.108 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:37.108 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:37.109 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:37.109 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:37.425 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:23:37.897 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:23:38.110 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:38.110 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:38.110 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:38.110 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:38.369 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:23:38.843 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:23:39.111 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:39.111 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:39.112 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:39.112 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:39.315 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:23:39.787 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:23:40.263 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:23:40.738 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:23:41.210 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:23:41.682 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:23:42.157 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:23:42.629 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:23:43.105 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:23:43.577 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:23:44.052 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:23:44.524 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:23:44.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:44.646 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:44.646 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:44.646 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:44.647 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:44.647 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:44.647 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:44.647 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:44.647 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:23:44.647 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:44.647 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:49.653 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:49.654 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:49.654 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:49.654 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:49.654 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:49.654 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:49.657 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:49.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:49.657 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:49.657 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:49.657 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:23:49.658 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:23:49.658 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:23:49.658 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:49.658 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:49.658 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:49.658 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:49.659 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:49.659 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:49.659 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:23:49.659 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:49.661 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:49.661 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:23:49.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:23:49.663 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:23:49.663 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:23:49.663 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.663 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:49.664 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:49.665 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:49.665 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:49.665 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:49.665 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:49.665 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:49.665 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:49.665 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:23:54.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:23:54.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:23:54.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:54.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:54.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:54.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:54.680 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:23:54.681 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:54.681 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:54.682 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:23:54.682 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:23:54.686 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:23:54.686 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:23:54.687 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:54.687 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:54.687 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:23:54.688 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:23:54.688 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:23:54.688 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:23:54.688 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:54.690 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:23:54.690 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:23:54.691 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:54.691 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:54.691 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:23:54.691 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:23:54.692 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:23:54.692 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:23:54.692 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:54.693 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:23:54.693 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:23:54.693 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:54.693 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:23:54.694 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:23:54.694 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:23:54.694 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:23:54.694 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:23:54.694 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:23:54.698 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:23:54.698 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:23:54.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:23:54.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:23:54.703 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:23:55.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:23:55.227 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:23:55.229 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:23:55.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:23:55.231 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:23:55.232 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:23:55.232 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:23:55.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:23:55.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:23:55.233 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:23:55.234 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:23:55.234 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:23:55.234 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:23:55.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:23:55.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:55.700 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:55.701 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:55.701 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:56.124 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:23:56.596 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:23:56.701 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:56.702 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:56.702 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:56.702 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:57.069 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:23:57.541 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:23:57.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:57.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:57.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:57.703 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:58.013 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:23:58.484 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:23:58.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:58.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:58.704 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:58.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:58.958 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:23:59.430 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:23:59.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:23:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:23:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:23:59.705 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:23:59.901 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:24:00.372 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:24:00.846 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:24:01.318 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:24:01.790 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:24:02.261 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:24:02.735 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:24:03.207 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:24:03.278 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:03.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:03.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:03.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:03.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:03.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:03.285 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:03.285 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:03.285 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:03.285 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:03.285 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:03.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:03.286 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:03.286 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:08.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:08.296 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:08.296 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:08.296 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:08.296 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:08.296 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:08.307 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:08.307 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:08.307 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:08.308 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:08.308 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:24:08.309 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:24:08.309 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:24:08.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:08.310 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:08.310 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:08.310 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:24:08.310 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:08.310 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:24:08.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:08.312 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:08.312 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:24:08.312 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:08.314 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:08.314 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:24:08.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.317 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:24:08.317 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:24:08.317 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:24:08.318 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.318 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:08.319 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:08.319 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:08.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:13.326 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:13.327 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:13.327 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:13.327 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:13.327 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:13.327 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:13.335 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:13.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:13.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:13.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:13.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:24:13.339 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:24:13.340 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:24:13.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:13.340 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:13.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:13.341 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:24:13.341 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:13.341 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:24:13.341 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:13.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:13.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:24:13.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:13.345 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:24:13.345 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:24:13.345 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:13.345 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:13.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:13.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:24:13.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:13.346 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:24:13.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:13.348 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:24:13.348 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:24:13.348 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:24:13.348 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:24:13.348 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:24:13.349 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:24:13.349 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:24:13.349 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.349 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:13.354 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:24:13.832 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:24:13.877 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:24:13.879 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:24:13.881 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:24:13.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:24:13.884 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:13.884 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:13.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:24:13.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:24:13.886 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:24:13.886 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:24:13.887 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:24:13.887 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:24:14.304 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:24:14.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:14.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:14.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:14.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:14.776 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:24:15.248 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:24:15.352 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:15.352 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:15.352 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:15.352 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:15.721 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:24:16.194 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:24:16.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:16.353 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:16.353 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:16.353 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:16.667 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:24:17.140 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:24:17.353 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:17.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:17.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:17.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:17.612 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:24:18.085 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:24:18.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:18.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:18.355 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:18.355 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:18.557 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:24:19.029 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:24:19.500 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:24:19.974 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:24:20.446 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:24:20.919 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:24:21.392 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:24:21.864 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:24:21.926 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:21.926 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:21.931 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:21.931 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:21.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:21.931 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:21.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:21.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:21.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:21.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:21.933 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:21.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:21.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:26.938 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:26.938 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:26.938 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:26.938 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:26.938 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:26.938 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:26.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:26.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:26.941 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:26.941 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:26.941 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:24:26.942 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:24:26.942 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:24:26.942 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:26.942 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:26.943 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:24:26.943 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:26.944 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:26.944 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:26.944 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:24:26.944 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:26.944 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:24:26.944 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:26.945 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:26.945 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:24:26.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:24:26.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:24:26.947 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:24:26.947 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:24:26.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:26.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:26.949 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:26.949 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:26.949 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:26.949 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:26.949 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:26.949 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:26.949 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:31.957 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:31.957 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:31.957 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:31.957 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:31.957 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:31.957 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:31.964 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:31.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:31.965 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:31.965 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:31.965 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:24:31.970 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:24:31.970 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:24:31.971 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:31.971 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:31.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:31.972 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:24:31.972 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:31.972 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:24:31.972 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:31.974 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:24:31.975 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:24:31.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:31.975 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:31.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:31.975 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:24:31.975 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:31.975 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:24:31.975 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:31.978 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:31.978 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:24:31.978 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:24:31.981 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:24:31.981 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:24:31.981 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.981 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:31.982 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:31.986 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:24:32.464 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:24:32.504 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:24:32.506 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:24:32.508 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:24:32.508 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:24:32.511 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:32.511 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:32.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:24:32.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:24:32.513 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:24:32.513 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:24:32.513 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:24:32.513 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:24:32.936 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:24:32.985 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:32.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:32.985 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:32.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:33.408 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:24:33.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:24:33.986 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:33.986 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:33.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:33.986 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:34.353 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:24:34.825 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:24:34.987 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:34.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:34.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:34.987 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:35.296 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:24:35.769 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:24:35.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:35.988 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:35.988 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:35.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:36.242 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:24:36.714 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:24:36.988 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:36.989 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:36.989 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:36.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:37.185 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:24:37.658 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:24:38.130 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:24:38.602 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:24:39.074 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:24:39.547 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:24:40.019 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:24:40.492 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:24:40.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:40.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:40.569 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:40.569 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:40.569 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:40.569 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:40.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:40.570 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:40.570 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:40.570 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:40.570 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:40.570 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:40.570 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:45.576 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:45.576 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:45.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:45.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:45.576 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:45.576 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:45.583 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:45.584 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:45.584 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:45.585 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:45.585 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:24:45.587 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:24:45.587 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:24:45.587 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:45.587 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:45.588 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:45.588 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:24:45.588 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:45.588 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:24:45.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:45.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:24:45.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:24:45.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:45.590 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:45.590 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:45.590 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:24:45.590 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:45.590 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:24:45.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:45.591 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:24:45.591 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:24:45.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:45.592 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:45.592 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:45.592 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:24:45.592 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:45.592 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:24:45.592 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.594 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:24:45.595 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:24:45.595 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:24:45.595 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.595 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:45.596 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:45.596 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:45.596 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:50.603 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:50.603 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:50.603 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:50.603 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:50.603 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:50.603 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:50.611 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:50.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:50.612 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:50.612 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:24:50.612 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:24:50.616 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:24:50.616 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:24:50.616 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:50.616 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:50.617 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:50.617 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:24:50.617 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:24:50.617 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:24:50.617 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:50.618 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:24:50.619 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:24:50.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:50.619 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:50.619 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:50.619 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:24:50.619 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:24:50.619 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:24:50.619 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:50.621 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:24:50.621 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:24:50.621 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.624 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:24:50.624 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:24:50.624 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:24:50.624 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.625 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:24:50.629 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:24:51.108 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:24:51.148 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:24:51.150 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:24:51.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:24:51.153 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:24:51.156 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:51.156 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:51.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:24:51.157 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:24:51.158 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:24:51.158 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:24:51.158 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:24:51.158 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:24:51.580 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:24:51.626 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:51.627 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:51.627 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:51.627 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:52.051 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:24:52.524 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:24:52.627 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:52.628 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:52.628 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:52.628 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:52.997 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:24:53.469 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:24:53.629 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:53.629 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:53.629 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:53.629 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:53.940 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:24:54.413 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:24:54.630 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:54.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:54.630 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:54.631 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:54.885 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:24:55.357 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:24:55.631 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:55.631 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:55.632 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:55.632 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:55.828 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:24:56.301 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:24:56.774 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:24:57.246 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:24:57.719 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:24:58.191 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:24:58.663 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:24:59.134 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:24:59.202 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:24:59.202 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:24:59.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:24:59.208 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:24:59.208 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:24:59.208 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:24:59.212 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:24:59.212 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:24:59.213 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:24:59.213 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:24:59.213 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:24:59.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:24:59.213 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:24:59.213 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:59.214 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:59.214 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:59.214 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:59.214 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:59.214 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:24:59.214 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:04.215 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:04.215 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:04.215 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:04.216 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:04.216 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:04.216 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:04.224 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:04.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:04.225 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:04.225 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:04.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:25:04.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:25:04.230 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:25:04.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:04.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:04.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:04.230 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:25:04.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:04.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:25:04.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:04.234 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:25:04.235 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:25:04.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:04.235 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:04.235 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:04.235 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:25:04.235 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:04.235 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:25:04.236 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:04.239 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:25:04.239 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:25:04.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:04.240 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:04.240 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:04.240 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:25:04.240 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:04.240 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:25:04.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:04.245 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:04.246 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:25:04.247 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:25:04.247 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:25:04.247 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.247 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:25:04.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:04.250 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:04.250 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:25:04.250 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:09.258 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:09.258 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:09.258 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:09.258 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:09.258 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:09.258 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:09.266 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:09.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:09.267 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:09.267 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:09.267 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:25:09.270 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:25:09.270 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:25:09.270 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:09.270 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:09.271 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:09.271 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:25:09.271 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:09.271 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:25:09.271 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:09.272 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:25:09.272 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:25:09.272 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:09.272 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:09.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:09.273 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:25:09.273 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:09.273 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:25:09.273 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:09.275 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:09.275 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:25:09.275 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.278 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:25:09.278 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:25:09.278 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:25:09.278 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:09.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:09.283 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:25:09.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:25:09.805 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:25:09.808 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:25:09.808 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:25:09.810 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:25:09.813 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:25:09.813 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:25:09.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:25:09.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:25:09.814 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:25:09.814 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:25:09.814 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:25:09.814 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:25:10.232 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:25:10.281 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:10.281 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:10.281 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:10.281 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:10.703 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:25:11.175 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:25:11.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:11.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:11.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:11.283 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:11.648 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:25:12.120 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:25:12.283 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:12.283 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:12.283 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:12.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:12.592 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:25:13.063 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:25:13.284 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:13.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:13.284 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:13.284 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:13.537 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:25:14.009 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:25:14.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:14.286 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:14.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:14.286 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:14.481 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:25:14.952 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:25:15.425 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:25:15.898 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:25:16.370 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:25:16.841 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:25:17.314 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:25:17.786 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:25:18.258 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:25:18.729 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:25:19.202 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:25:19.675 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:25:20.146 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:25:20.617 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:25:21.091 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:25:21.563 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:25:22.035 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:25:22.506 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:25:22.979 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:25:23.452 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:25:23.856 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:25:23.856 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:25:23.861 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:23.861 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:23.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:23.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:23.864 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:23.864 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:23.864 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:23.864 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:23.864 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:23.864 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3151 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:28.868 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:28.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:28.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:28.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:28.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:28.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:28.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:28.875 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:28.875 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:28.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:28.876 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:25:28.878 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:25:28.878 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:25:28.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:28.879 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:28.879 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:28.879 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:25:28.879 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:28.879 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:25:28.880 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:28.881 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:28.881 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:25:28.881 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:28.883 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:28.883 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:25:28.883 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:25:28.886 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:25:28.886 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:25:28.886 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.886 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.887 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:28.888 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:28.888 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:28.888 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:25:33.896 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:33.896 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:33.896 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:33.896 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:33.896 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:33.896 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:33.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:33.905 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:33.905 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:33.906 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:33.906 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:25:33.909 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:25:33.910 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:25:33.910 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:33.910 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:33.910 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:33.911 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:25:33.911 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:33.911 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:25:33.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:33.912 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:25:33.913 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:25:33.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:33.913 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:33.913 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:33.913 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:25:33.913 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:33.913 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:25:33.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:33.915 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:25:33.915 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:25:33.915 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:33.915 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:33.915 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:33.916 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:25:33.916 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:33.916 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:25:33.916 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:33.918 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:25:33.918 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:25:33.919 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:25:33.919 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:25:33.919 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.919 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:33.924 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:25:34.403 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:25:34.443 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:25:34.446 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:25:34.448 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:25:34.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:25:34.450 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:25:34.451 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:25:34.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:25:34.451 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:25:34.451 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:25:34.451 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:25:34.452 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:25:34.452 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:25:34.875 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:25:34.921 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:34.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:34.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:34.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:35.346 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:25:35.819 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:25:35.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:35.923 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:35.923 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:35.923 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:36.292 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:25:36.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:25:36.923 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:36.924 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:36.924 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:36.924 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:37.237 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:25:37.710 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:25:37.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:37.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:37.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:37.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:38.182 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:25:38.653 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:25:38.926 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:38.926 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:38.926 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:38.926 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:39.126 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:25:39.599 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:25:40.071 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:25:40.542 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:25:41.016 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:25:41.488 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:25:41.960 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:25:42.431 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:25:42.497 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:25:42.497 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:25:42.502 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:42.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:42.502 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:42.502 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:42.504 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:42.504 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:42.504 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:42.504 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:42.504 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:25:42.504 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:42.504 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:42.504 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:25:47.510 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:47.510 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:47.510 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:47.510 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:47.510 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:47.510 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:47.519 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:47.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:47.521 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:47.521 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:47.521 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:25:47.525 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:25:47.526 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:25:47.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:47.526 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:47.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:47.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:25:47.527 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:47.527 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:25:47.527 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:47.530 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:25:47.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:25:47.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:47.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:47.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:47.531 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:25:47.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:47.532 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:25:47.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:47.535 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:25:47.535 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:25:47.535 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:47.535 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:47.535 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:47.536 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:25:47.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:47.536 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:25:47.536 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:25:47.541 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:25:47.542 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:25:47.542 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:25:47.542 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.542 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:25:47.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.544 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:47.545 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:47.545 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:47.545 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:25:52.552 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:25:52.552 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:25:52.552 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:52.552 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:52.552 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:52.552 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:52.559 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:25:52.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:52.560 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:52.560 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:25:52.560 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:25:52.563 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:25:52.563 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:25:52.563 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:52.563 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:52.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:25:52.563 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:25:52.564 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:25:52.564 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:25:52.564 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:52.567 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:25:52.568 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:25:52.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:52.568 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:52.568 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:25:52.568 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:25:52.568 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:25:52.568 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:25:52.568 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:52.572 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:25:52.572 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:25:52.572 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:52.572 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:25:52.573 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:25:52.573 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:25:52.573 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:25:52.573 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:25:52.573 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:52.578 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:52.579 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:25:52.580 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:25:52.580 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:25:52.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:25:52.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:25:52.582 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:25:52.585 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:25:53.063 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:25:53.112 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:25:53.115 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:25:53.116 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:25:53.117 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:25:53.119 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:25:53.119 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:25:53.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:25:53.120 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:25:53.121 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:25:53.121 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:25:53.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:25:53.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:25:53.535 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:25:53.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:53.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:53.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:53.585 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:54.006 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:25:54.479 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:25:54.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:54.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:54.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:54.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:54.952 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:25:55.424 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:25:55.587 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:55.587 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:55.588 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:55.588 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:55.898 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:25:56.370 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:25:56.588 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:56.588 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:56.589 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:56.589 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:56.842 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:25:57.313 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:25:57.589 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:25:57.590 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:25:57.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:25:57.590 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:25:57.786 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:25:58.259 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:25:58.731 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:25:59.202 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:25:59.674 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:26:00.148 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:26:00.620 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:26:01.091 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:26:01.564 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:26:02.036 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:26:02.508 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:26:02.979 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:26:03.161 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:26:03.161 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:26:03.165 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:03.165 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:03.165 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:03.165 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:03.166 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:03.166 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:03.166 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:03.166 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:03.166 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:03.166 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:03.166 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:26:08.173 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:08.173 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:08.173 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:08.173 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:08.173 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:08.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:08.181 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:08.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:08.183 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:08.183 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:08.183 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:26:08.188 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:26:08.188 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:26:08.188 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:08.188 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:08.189 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:08.189 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:26:08.189 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:08.189 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:26:08.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:08.193 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:26:08.193 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:26:08.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:08.194 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:08.194 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:08.194 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:26:08.194 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:08.194 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:26:08.194 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:08.198 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:26:08.198 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:26:08.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:08.198 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:08.198 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:08.198 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:26:08.198 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:08.198 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:26:08.199 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:08.203 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.204 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:26:08.205 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:26:08.205 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:26:08.205 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:26:08.205 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:08.208 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:08.208 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:08.208 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:26:13.214 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:13.214 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:13.214 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:13.214 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:13.214 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:13.214 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:13.223 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:13.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:13.224 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:13.224 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:13.225 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:26:13.229 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:26:13.229 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:26:13.230 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:13.230 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:13.230 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:13.231 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:26:13.231 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:13.231 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:26:13.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:13.233 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:26:13.233 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:26:13.233 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:13.233 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:13.234 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:13.234 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:26:13.234 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:13.234 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:26:13.234 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:13.236 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:13.236 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:26:13.236 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:13.239 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:26:13.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:26:13.239 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:26:13.239 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:26:13.239 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:26:13.239 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:26:13.240 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:26:13.240 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:26:13.240 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.240 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.241 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:13.245 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:26:13.723 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:26:13.761 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:26:13.762 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:26:13.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:26:13.764 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:26:13.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:26:13.766 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:26:13.766 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:26:13.767 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:26:13.767 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:26:13.767 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:26:13.767 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:26:13.767 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:26:14.195 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:26:14.243 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:14.247 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:14.248 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:14.248 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:14.666 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:26:15.140 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:26:15.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:15.248 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:15.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:15.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:15.612 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:26:16.084 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:26:16.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:16.249 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:16.249 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:16.249 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:16.555 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:26:17.028 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:26:17.249 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:17.250 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:17.250 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:17.250 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:17.500 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:26:17.972 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:26:18.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:18.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:18.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:18.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:18.444 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:26:18.917 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:26:19.389 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:26:19.861 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:26:20.332 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:26:20.805 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:26:21.278 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:26:21.750 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:26:22.221 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:26:22.694 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:26:23.167 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:26:23.639 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:26:24.110 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:26:24.583 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:26:24.818 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:26:24.818 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:26:24.824 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:24.824 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:24.825 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:24.825 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:24.829 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:24.829 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:24.829 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:24.829 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:24.829 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:26:24.830 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:24.830 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:24.830 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:24.830 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:24.830 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:24.830 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:24.830 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:24.830 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:24.831 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2504 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:26:29.832 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:29.832 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:29.832 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:29.832 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:29.832 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:29.832 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:29.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:29.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:29.843 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:29.843 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:29.843 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:26:29.847 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:26:29.847 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:26:29.848 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:29.848 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:29.848 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:29.849 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:26:29.849 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:29.849 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:26:29.849 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:29.850 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:26:29.851 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:26:29.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:29.851 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:29.851 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:29.851 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:26:29.851 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:29.851 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:26:29.851 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:29.853 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:26:29.853 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:26:29.853 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:29.853 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:29.853 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:29.853 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:26:29.854 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:29.854 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:26:29.854 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:29.856 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:26:29.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:26:29.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:26:29.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:26:29.857 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:26:29.857 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:26:29.857 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:29.858 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:29.859 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:29.859 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:29.859 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:29.859 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:26:34.867 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:34.867 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:34.867 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:34.867 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:34.867 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:34.867 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:34.875 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:34.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:34.876 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:34.876 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:26:34.877 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:26:34.880 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:26:34.880 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:26:34.880 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:34.880 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:34.881 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:34.881 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:26:34.881 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:26:34.881 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:26:34.882 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:34.883 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:26:34.883 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:26:34.883 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:34.885 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:26:34.885 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:26:34.885 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:34.885 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:26:34.885 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:26:34.885 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:26:34.886 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:26:34.886 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:26:34.886 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:26:34.888 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:26:34.889 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:26:34.889 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:26:34.889 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:26:34.890 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:26:34.893 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:26:35.371 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:26:35.415 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:26:35.419 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:26:35.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:26:35.421 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:26:35.423 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:26:35.423 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:26:35.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:26:35.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:26:35.424 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:26:35.424 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:26:35.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:26:35.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:26:35.842 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:26:35.892 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:35.892 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:36.314 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:26:36.785 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:26:36.893 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:36.894 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:36.894 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:36.894 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:37.258 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:26:37.731 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:26:37.894 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:37.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:37.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:37.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:38.203 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:26:38.674 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:26:38.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:38.895 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:38.895 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:38.896 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:39.147 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:26:39.619 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:26:39.895 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:39.896 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:39.896 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:39.897 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:40.092 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:26:40.565 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:26:41.038 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:26:41.510 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:26:41.981 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:26:42.454 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:26:42.926 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:26:43.399 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:26:43.872 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:26:44.344 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:26:44.816 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:26:45.288 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:26:45.761 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:26:46.233 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:26:46.705 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:26:47.176 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:26:47.650 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:26:48.122 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:26:48.594 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:26:49.065 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:26:49.538 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:26:50.011 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:26:50.483 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:26:50.956 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:26:51.429 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:26:51.901 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:26:52.374 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:26:52.847 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:26:53.319 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:26:53.790 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:26:54.263 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:26:54.736 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:26:55.207 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:26:55.471 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:26:55.471 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:26:55.477 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:26:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:26:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:26:55.477 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:26:55.478 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:26:55.479 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:26:55.479 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:26:55.479 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:26:55.479 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:26:55.479 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:26:55.479 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:00.485 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:00.485 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:00.485 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:00.485 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:00.485 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:00.485 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:00.493 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:00.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:00.495 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:00.495 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:00.495 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:27:00.500 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:27:00.500 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:27:00.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:00.501 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:00.501 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:00.501 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:27:00.501 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:00.501 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:27:00.502 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:00.506 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:27:00.506 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:27:00.506 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:00.506 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:00.506 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:00.506 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:27:00.507 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:00.507 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:27:00.507 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:00.510 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:27:00.511 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:27:00.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:00.511 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:00.511 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:00.511 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:27:00.511 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:00.511 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:27:00.511 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:27:00.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:27:00.518 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:27:00.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:27:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.520 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.520 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.520 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.520 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:00.521 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:00.521 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:00.521 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:27:05.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:05.529 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:05.529 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:05.529 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:05.529 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:05.529 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:05.539 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:05.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:05.540 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:05.540 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:05.540 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:27:05.543 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:27:05.543 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:27:05.544 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:05.544 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:05.544 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:05.544 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:27:05.545 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:05.545 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:27:05.545 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:05.547 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:27:05.547 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:27:05.547 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:05.547 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:05.547 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:05.548 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:27:05.548 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:05.548 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:27:05.548 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:05.549 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:27:05.549 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:27:05.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:05.550 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:05.550 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:05.550 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:27:05.550 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:05.550 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:27:05.550 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:05.552 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:27:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:27:05.552 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:27:05.553 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:27:05.553 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:27:05.553 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.553 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:05.554 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:05.558 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:27:06.036 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:27:06.081 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:27:06.083 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:27:06.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:27:06.085 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:27:06.508 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:27:06.555 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:06.556 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:06.556 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:06.556 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:06.982 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:27:07.454 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:27:07.556 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:07.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:07.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:07.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:07.926 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:27:08.400 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:27:08.558 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:08.558 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:08.559 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:08.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:08.872 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:27:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:27:09.560 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:09.560 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:09.818 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:27:10.290 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:27:10.561 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:10.579 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:10.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:10.579 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:10.762 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:27:11.236 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:27:11.708 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:27:12.180 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:27:12.654 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:27:13.126 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:27:13.595 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:27:14.058 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:27:14.530 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:27:15.002 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:27:15.476 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:27:15.948 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:27:16.096 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:16.096 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:16.096 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:16.097 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:16.099 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:16.099 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:16.099 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:16.099 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:16.099 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:16.099 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:16.099 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:27:21.104 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:21.104 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:21.104 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:21.104 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:21.104 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:21.104 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:21.111 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:21.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:21.112 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:21.112 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:21.112 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:27:21.114 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:27:21.115 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:27:21.115 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:21.115 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:21.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:21.116 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:27:21.116 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:21.116 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:27:21.116 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:21.117 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:27:21.117 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:27:21.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:21.117 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:21.117 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:21.117 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:27:21.117 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:21.117 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:27:21.118 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:21.119 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:27:21.119 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:27:21.119 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:21.119 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:21.120 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:21.120 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:27:21.120 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:21.120 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:27:21.120 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:27:21.122 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:27:21.122 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:27:21.122 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.122 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.123 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:21.124 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:21.124 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:21.124 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:27:26.131 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:26.131 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:26.132 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:26.132 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:26.132 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:26.132 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:26.142 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:26.143 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:26.143 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:26.144 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:26.144 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:27:26.148 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:27:26.148 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:27:26.148 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:26.148 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:26.149 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:26.149 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:27:26.149 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:26.149 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:27:26.149 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:26.152 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:27:26.152 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:27:26.152 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:26.153 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:26.153 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:26.153 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:27:26.153 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:26.153 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:27:26.153 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:26.156 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:27:26.156 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:27:26.156 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:26.156 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:26.157 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:26.157 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:27:26.157 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:26.157 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:27:26.157 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.162 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:27:26.163 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:27:26.163 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:27:26.163 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.163 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:26.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:26.167 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:27:26.646 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:27:26.699 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:27:26.702 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:27:26.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:27:26.704 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:27:27.118 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:27:27.168 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:27.168 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:27.168 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:27.168 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:27.594 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:27:28.058 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:27:28.170 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:28.170 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:28.170 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:28.170 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:28.524 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:27:28.987 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:27:29.171 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:29.171 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:29.171 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:29.172 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:29.459 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:27:29.931 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:27:30.172 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:30.173 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:30.173 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:30.173 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:30.405 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:27:30.872 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:27:31.174 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:31.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:31.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:31.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:31.346 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:27:31.819 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:27:32.291 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:27:32.766 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:27:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:27:33.714 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:27:34.185 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:27:34.661 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:27:35.133 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:27:35.608 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:27:36.080 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:27:36.556 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:27:37.027 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:27:37.503 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:27:37.975 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:27:38.449 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:27:38.717 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:38.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:38.717 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:38.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:38.719 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:38.719 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:38.719 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:38.719 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:38.719 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:38.719 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:38.719 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:27:43.724 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:43.724 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:43.725 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:43.725 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:43.725 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:43.725 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:43.738 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:43.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:43.739 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:43.739 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:43.739 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:27:43.741 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:27:43.742 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:27:43.742 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:43.742 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:43.742 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:43.742 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:27:43.743 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:43.743 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:27:43.743 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:43.744 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:43.744 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:27:43.744 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:43.745 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:27:43.745 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:27:43.745 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:43.745 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:43.745 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:43.745 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:27:43.746 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:43.746 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:27:43.746 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:43.747 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:27:43.748 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:27:43.748 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:27:43.748 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:43.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:43.749 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:43.749 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:43.749 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:43.749 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:43.749 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:27:48.758 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:48.758 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:48.758 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:48.758 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:48.758 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:48.758 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:48.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:48.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:48.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:48.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:27:48.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:27:48.772 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:27:48.772 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:27:48.772 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:48.772 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:48.772 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:48.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:27:48.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:27:48.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:27:48.773 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:48.776 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:27:48.776 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:27:48.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:48.776 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:48.776 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:48.776 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:27:48.776 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:27:48.776 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:27:48.777 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:48.779 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:27:48.779 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:27:48.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:48.780 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:27:48.780 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:48.780 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:27:48.780 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:27:48.780 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:27:48.780 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:48.784 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:27:48.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:27:48.784 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:27:48.784 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:27:48.784 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:27:48.784 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:27:48.785 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:27:48.785 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:27:48.785 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.785 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:27:48.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:27:48.790 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:27:49.267 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:27:49.316 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:27:49.318 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:27:49.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:27:49.320 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:27:49.323 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:27:49.323 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:27:49.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:27:49.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:27:49.325 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:27:49.325 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:27:49.325 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:27:49.325 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:27:49.357 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:27:49.357 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:27:49.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:27:49.357 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:27:49.738 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:27:49.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:49.790 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:49.790 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:49.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:50.211 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:27:50.685 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:27:50.791 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:50.792 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:50.792 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:50.792 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:51.157 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:27:51.630 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:27:51.792 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:51.793 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:51.793 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:51.793 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:52.102 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:27:52.574 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:27:52.794 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:52.794 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:52.794 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:52.794 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:53.046 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:27:53.519 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:27:53.795 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:53.795 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:53.795 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:53.795 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:53.991 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:27:54.463 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:27:54.936 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:27:55.408 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:27:55.880 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:27:56.351 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:27:56.825 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:27:57.298 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:27:57.361 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:27:57.361 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:27:57.361 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:27:57.363 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:27:57.363 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:27:57.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:27:57.363 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:27:57.364 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:27:57.364 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:27:57.364 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:27:57.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:27:57.364 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:27:57.364 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:27:57.364 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:02.372 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:02.372 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:02.372 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:02.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:02.379 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:02.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:02.380 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:02.380 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:02.380 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:02.382 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:02.383 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:02.383 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:02.383 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:02.384 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:02.384 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:02.385 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:02.385 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:02.385 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:02.387 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:02.387 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:02.387 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:02.387 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:02.387 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:02.388 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:02.388 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:02.388 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:02.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:02.391 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:02.391 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:02.391 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:02.391 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:02.392 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:02.392 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:02.392 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:02.392 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:02.392 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:02.397 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:02.397 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:02.397 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.398 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:02.398 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:02.398 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:02.399 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:02.399 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.399 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.399 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.400 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:02.401 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:02.401 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:02.401 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:07.409 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:07.409 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:07.409 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:07.409 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:07.409 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:07.409 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:07.417 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:07.418 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:07.418 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:07.419 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:07.419 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:07.421 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:07.422 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:07.422 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:07.422 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:07.422 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:07.423 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:07.423 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:07.423 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:07.423 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:07.424 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:07.424 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:07.424 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:07.424 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:07.424 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:07.424 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:07.425 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:07.425 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:07.425 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:07.426 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:07.426 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:07.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:07.427 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:07.427 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:07.427 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:07.427 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:07.427 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:07.427 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:07.429 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:07.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:07.429 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:07.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:07.429 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:07.429 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:07.430 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:07.430 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:07.430 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.430 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.431 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:07.435 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:28:07.914 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:28:07.952 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:28:07.954 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:28:07.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:28:07.955 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:28:07.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:28:07.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:28:07.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:28:07.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:07.957 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:28:07.958 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:28:07.958 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:28:07.958 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:28:08.003 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:28:08.003 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:28:08.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:08.004 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:08.386 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:28:08.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:08.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:08.433 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:08.433 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:08.858 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:28:09.332 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:28:09.434 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:09.434 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:09.434 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:09.434 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:09.804 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:28:10.277 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:28:10.435 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:10.435 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:10.436 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:10.436 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:10.749 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:28:11.221 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:28:11.437 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:11.437 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:11.695 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:28:12.167 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:28:12.438 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:12.438 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:12.438 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:12.439 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:12.639 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:28:13.111 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:28:13.584 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:28:14.056 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:28:14.530 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:28:15.002 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:28:15.474 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:28:15.946 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:28:16.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:28:16.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:28:16.008 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:28:16.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:16.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:16.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:16.013 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:16.016 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:16.016 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:16.016 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:16.016 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:16.016 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:16.016 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:16.016 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:16.016 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:16.016 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:21.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:21.021 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:21.021 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:21.021 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:21.021 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:21.021 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:21.029 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:21.031 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:21.031 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:21.032 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:21.032 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:21.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:21.038 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:21.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:21.038 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:21.039 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:21.039 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:21.040 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:21.040 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:21.040 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:21.043 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:21.043 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:21.043 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:21.043 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:21.043 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:21.043 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:21.044 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:21.044 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:21.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:21.047 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:21.047 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:21.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:21.048 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:21.048 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:21.048 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:21.048 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:21.048 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:21.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:21.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:21.053 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:21.053 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:21.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.054 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:21.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:21.055 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:21.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:26.063 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:26.063 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:26.063 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:26.063 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:26.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:26.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:26.070 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:26.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:26.072 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:26.072 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:26.072 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:26.074 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:26.075 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:26.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:26.075 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:26.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:26.075 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:26.076 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:26.076 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:26.076 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:26.077 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:26.077 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:26.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:26.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:26.078 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:26.078 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:26.078 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:26.078 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:26.078 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:26.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:26.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:26.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.083 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:26.083 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:26.084 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:26.084 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:26.085 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:26.088 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:28:26.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:28:26.612 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:28:26.614 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:28:26.616 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:28:26.616 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:28:26.618 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:28:26.618 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:28:26.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:28:26.618 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:26.618 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:28:26.618 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:28:26.618 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:28:26.618 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:28:26.657 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:28:26.657 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:28:26.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:26.658 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:27.039 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:28:27.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:27.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:27.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:27.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:27.512 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:28:27.985 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:28:28.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:28.088 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:28.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:28.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:28.457 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:28:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:28:29.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:29.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:29.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:29.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:29.403 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:28:29.875 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:28:30.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:30.090 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:30.349 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:28:30.821 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:28:31.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:31.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:31.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:31.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:31.292 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:28:31.764 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:28:32.237 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:28:32.709 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:28:33.182 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:28:33.653 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:28:34.127 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:28:34.599 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:28:34.662 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:28:34.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:28:34.662 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:28:34.667 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:34.667 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:34.668 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:34.668 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:34.672 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:34.672 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:34.672 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:34.672 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:34.672 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:34.672 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:34.672 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:34.673 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:39.673 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:39.673 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:39.674 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:39.674 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:39.674 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:39.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:39.683 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:39.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:39.685 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:39.685 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:39.685 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:39.688 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:39.688 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:39.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:39.689 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:39.689 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:39.689 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:39.689 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:39.689 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:39.689 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:39.692 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:39.693 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:39.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:39.693 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:39.693 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:39.693 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:39.693 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:39.693 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:39.693 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:39.696 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:39.696 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:39.696 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:39.699 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:39.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:39.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:39.700 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:39.700 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:39.700 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.701 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:39.702 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:39.702 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:39.702 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:44.709 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:44.709 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:44.709 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:44.709 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:44.709 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:44.709 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:44.717 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:44.718 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:44.719 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:44.719 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:44.719 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:44.723 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:44.723 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:44.723 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:44.723 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:44.723 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:44.724 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:44.724 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:44.724 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:44.724 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:44.727 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:44.727 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:44.728 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:44.728 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:44.728 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:44.729 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:44.729 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:44.729 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:44.729 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:44.731 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:44.731 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:44.731 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:44.735 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:44.735 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:44.735 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:44.735 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.736 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:44.737 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:44.740 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:28:45.218 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:28:45.260 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:28:45.262 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:28:45.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:28:45.263 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:28:45.265 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:28:45.265 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:28:45.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:28:45.265 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:45.265 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:28:45.265 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:28:45.265 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:28:45.265 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:28:45.308 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:28:45.308 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:28:45.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:45.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:28:45.690 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:28:45.738 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:45.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:45.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:46.161 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:28:46.635 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:28:46.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:46.739 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:46.739 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:46.739 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:47.108 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:28:47.581 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:28:47.739 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:47.754 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:47.754 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:47.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:48.053 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:28:48.525 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:28:48.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:48.755 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:48.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:48.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:48.998 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:28:49.471 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:28:49.756 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:49.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:49.757 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:49.757 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:49.942 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:28:50.414 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:28:50.888 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:28:51.361 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:28:51.834 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:28:52.307 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:28:52.779 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:28:53.253 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:28:53.312 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:28:53.312 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:28:53.312 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:28:53.317 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:53.317 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:53.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:53.317 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:53.321 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:53.321 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:53.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:53.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:53.321 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:53.321 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:53.321 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:53.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:53.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:53.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:53.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:53.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:28:58.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:58.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:58.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:58.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:58.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:58.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:58.334 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:58.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:58.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:58.337 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:28:58.337 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:28:58.342 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:28:58.342 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:28:58.342 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:58.342 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:58.342 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:58.343 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:28:58.343 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:28:58.343 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:28:58.343 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:28:58.346 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:28:58.346 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:28:58.346 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:58.346 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:58.347 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:58.347 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:28:58.347 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:28:58.347 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:28:58.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:28:58.350 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:28:58.350 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:28:58.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:58.350 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:28:58.350 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:28:58.350 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:28:58.350 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:28:58.350 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:28:58.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:28:58.356 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:28:58.357 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:28:58.357 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:28:58.357 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:28:58.357 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.358 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.358 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.359 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:28:58.360 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:28:58.360 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:28:58.360 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:03.367 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:03.367 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:03.367 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:03.367 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:03.367 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:03.367 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:03.372 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:03.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:03.373 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:03.373 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:03.373 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:29:03.376 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:29:03.376 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:29:03.376 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:03.376 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:03.377 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:03.377 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:29:03.377 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:03.377 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:29:03.378 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:03.379 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:03.379 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:29:03.379 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:03.381 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:03.381 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:29:03.381 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.384 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:29:03.384 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:29:03.384 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:29:03.384 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:03.385 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:03.389 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:29:03.867 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:29:03.911 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:29:03.914 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:29:03.914 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:29:03.916 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:29:03.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:29:03.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:29:03.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:29:03.920 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:03.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:29:03.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:29:03.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:29:03.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:29:03.957 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:29:03.957 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:29:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:03.957 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:04.339 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:29:04.386 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:04.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:04.387 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:04.387 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:04.811 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:29:05.284 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:29:05.387 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:05.387 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:05.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:05.388 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:05.756 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:29:06.228 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:29:06.388 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:06.388 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:06.388 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:06.389 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:06.702 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:29:07.174 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:29:07.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:07.389 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:07.389 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:07.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:07.646 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:29:08.117 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:29:08.390 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:08.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:08.391 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:08.391 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:08.590 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:29:09.063 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:29:09.535 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:29:10.008 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:29:10.480 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:29:10.953 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:29:11.425 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:29:11.898 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:29:12.369 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:29:12.840 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:29:13.312 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:29:13.785 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:29:14.257 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:29:14.730 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:29:15.204 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:29:15.676 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:29:16.147 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:29:16.620 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:29:17.093 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:29:17.566 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:29:17.962 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:29:17.962 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:29:17.962 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:29:17.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:17.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:17.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:17.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:17.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:17.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:17.971 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:29:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:17.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:17.972 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3150 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:22.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:22.972 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:22.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:22.972 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:22.972 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:22.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:22.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:22.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:22.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:22.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:22.981 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:29:22.984 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:29:22.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:29:22.985 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:22.985 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:22.985 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:22.986 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:29:22.986 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:22.986 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:29:22.987 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:22.989 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:29:22.989 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:29:22.989 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:22.989 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:22.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:22.990 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:29:22.991 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:22.991 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:29:22.991 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:22.993 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:29:22.993 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:29:22.993 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:22.993 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:22.993 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:22.993 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:29:22.994 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:22.994 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:29:22.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:29:22.999 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:29:23.000 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:29:23.000 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:29:23.000 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.000 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:29:23.001 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.001 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.001 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.002 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:23.003 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:23.003 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:23.003 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:23.003 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:23.003 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:23.003 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:23.003 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:29:28.011 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:28.011 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:28.011 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:28.011 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:28.011 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:28.011 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:28.018 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:28.019 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:28.019 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:28.020 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:28.020 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:29:28.022 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:29:28.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:29:28.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:28.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:28.023 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:28.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:29:28.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:28.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:29:28.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:28.024 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:29:28.024 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:29:28.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:28.025 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:28.025 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:28.025 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:29:28.025 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:28.025 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:29:28.025 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:28.027 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:28.027 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:29:28.027 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:28.029 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:29:28.029 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:29:28.029 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:29:28.029 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:29:28.029 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:29:28.030 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:29:28.030 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:29:28.030 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.030 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.031 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:28.035 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:29:28.514 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:29:28.555 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:29:28.558 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:29:28.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:29:28.560 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:29:28.563 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:29:28.563 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:29:28.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:29:28.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:28.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:29:28.565 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:29:28.565 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:29:28.565 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:29:28.604 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:29:28.604 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:29:28.604 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:28.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:28.986 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:29:29.032 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:29.032 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:29.033 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:29.033 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:29.458 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:29:29.932 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:29:30.033 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:30.034 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:30.034 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:30.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:30.403 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:29:30.876 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:29:31.035 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:31.035 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:31.035 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:31.036 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:31.349 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:29:31.821 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:29:32.036 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:32.037 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:32.037 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:32.038 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:32.295 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:29:32.767 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:29:33.037 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:33.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:33.039 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:33.039 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:29:33.709 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:29:34.182 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:29:34.655 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:29:35.126 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:29:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:29:36.072 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:29:36.544 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:29:36.609 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:29:36.610 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:29:36.610 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:29:36.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:36.615 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:36.615 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:36.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:36.618 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:36.618 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:36.618 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:36.618 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:36.618 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:29:36.618 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:36.618 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:36.618 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:41.621 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:41.621 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:41.621 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:41.621 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:41.621 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:41.622 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:41.630 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:41.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:41.631 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:41.631 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:41.631 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:29:41.636 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:29:41.636 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:29:41.636 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:41.636 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:41.636 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:41.636 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:29:41.637 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:41.637 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:29:41.637 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:41.642 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:29:41.642 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:29:41.642 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:41.642 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:41.642 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:41.643 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:29:41.643 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:41.643 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:29:41.643 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:41.647 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:29:41.648 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:29:41.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:41.648 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:41.648 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:41.648 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:29:41.648 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:41.649 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:29:41.649 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:41.655 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:29:41.655 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:29:41.655 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:29:41.655 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.656 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:29:41.657 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:29:41.657 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:29:41.657 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:29:41.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.657 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.657 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.657 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:29:41.657 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.658 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.658 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:41.659 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:41.660 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:41.660 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:41.660 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:29:46.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:46.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:46.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:46.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:46.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:46.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:46.674 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:46.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:46.675 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:46.675 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:29:46.676 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:29:46.679 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:29:46.680 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:29:46.680 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:46.680 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:46.681 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:46.681 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:29:46.681 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:29:46.682 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:29:46.682 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:46.684 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:29:46.685 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:29:46.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:46.685 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:46.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:46.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:29:46.686 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:29:46.686 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:29:46.686 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:46.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:29:46.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:29:46.690 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:46.690 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:29:46.690 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:46.690 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:29:46.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:29:46.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:29:46.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:29:46.697 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.698 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:29:46.698 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:29:46.698 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:29:46.698 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.699 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:29:46.700 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:29:46.703 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:29:47.181 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:29:47.231 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:29:47.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:29:47.235 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:29:47.238 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:29:47.240 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:29:47.240 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:29:47.240 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:29:47.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:47.241 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:29:47.241 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:29:47.241 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:29:47.241 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:29:47.271 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:29:47.272 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:29:47.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:47.272 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:29:47.653 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:29:47.702 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:47.703 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:47.703 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:47.704 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:48.126 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:29:48.599 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:29:48.703 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:48.704 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:48.716 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:48.717 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:49.071 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:29:49.545 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:29:49.704 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:49.717 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:49.718 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:49.718 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:50.017 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:29:50.489 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:29:50.705 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:50.718 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:50.719 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:50.719 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:50.963 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:29:51.435 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:29:51.706 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:51.720 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:51.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:51.720 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:51.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:29:52.378 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:29:52.852 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:29:53.324 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:29:53.797 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:29:54.269 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:29:54.741 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:29:55.213 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:29:55.686 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:29:56.158 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:29:56.630 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:29:57.102 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:29:57.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:29:57.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:29:57.277 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:29:57.282 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:29:57.282 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:29:57.282 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:29:57.282 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:29:57.286 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:29:57.287 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:29:57.287 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:29:57.287 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:29:57.287 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:29:57.287 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:29:57.287 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:29:57.288 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2286 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:02.293 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:02.293 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:02.293 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:02.294 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:02.294 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:02.294 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:02.302 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:02.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:02.303 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:02.303 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:02.303 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:30:02.308 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:30:02.308 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:30:02.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:02.309 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:02.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:02.309 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:30:02.309 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:02.309 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:30:02.310 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:02.313 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:30:02.314 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:30:02.314 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:02.314 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:02.315 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:02.315 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:30:02.315 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:02.315 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:30:02.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:02.318 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:30:02.318 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:30:02.318 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:02.318 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:02.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:02.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:30:02.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:02.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:30:02.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:02.322 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:30:02.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:30:02.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:30:02.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:30:02.322 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:30:02.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:30:02.323 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:30:02.323 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:30:02.323 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.324 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:02.325 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:02.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:02.325 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:02.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:02.325 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:02.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:02.325 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:30:07.332 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:07.333 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:07.333 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:07.333 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:07.333 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:07.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:07.336 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:07.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:07.336 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:07.336 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:07.336 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:30:07.337 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:30:07.337 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:30:07.337 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:07.337 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:07.338 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:07.338 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:07.338 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:30:07.339 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:07.339 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:30:07.339 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:07.340 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:07.340 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:30:07.340 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:30:07.342 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:30:07.342 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:30:07.342 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.342 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.343 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:07.347 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:30:07.818 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:30:07.867 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:30:07.869 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:30:07.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:30:07.871 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:30:07.874 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:30:07.874 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:30:07.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:30:07.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:30:07.875 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:30:07.875 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:30:07.875 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:30:07.875 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:30:07.908 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:30:07.908 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2026-05-06 03:30:07.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:30:07.908 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:30:08.285 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:30:08.345 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:08.345 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:08.346 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:08.346 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:08.754 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:30:09.219 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:30:09.347 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:09.347 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:09.347 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:09.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:09.687 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:30:10.155 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:30:10.348 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:10.348 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:10.348 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:10.348 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:10.626 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:30:11.099 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:30:11.350 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:11.350 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:11.567 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:30:12.037 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:30:12.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:12.351 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:12.351 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:12.351 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:12.509 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:30:12.976 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:30:13.446 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:30:13.911 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:30:14.379 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:30:14.844 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:30:15.310 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:30:15.780 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:30:16.244 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:30:16.707 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:30:17.172 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:30:17.635 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:30:18.102 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:30:18.573 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:30:18.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:30:18.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:30:18.910 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:30:18.911 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:18.911 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:18.911 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:18.911 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:18.912 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:18.912 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:18.912 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:18.912 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:30:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:18.912 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:23.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:23.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:23.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:23.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:23.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:23.924 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:23.931 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:23.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:23.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:23.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:23.933 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:30:23.936 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:30:23.937 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:30:23.937 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:23.937 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:23.937 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:23.937 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:30:23.938 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:23.938 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:30:23.938 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:23.939 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:30:23.940 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:30:23.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:23.940 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:23.940 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:23.940 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:30:23.940 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:23.940 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:30:23.940 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:23.942 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:30:23.942 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:30:23.942 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:23.942 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:23.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:23.943 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:30:23.943 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:23.943 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:30:23.943 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:23.945 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:30:23.946 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:30:23.946 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:30:23.946 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:23.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:23.947 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:23.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:23.947 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:23.947 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:23.948 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:23.948 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:23.948 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:30:28.954 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:28.954 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:28.954 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:28.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:28.954 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:28.955 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:28.966 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:28.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:28.968 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:28.968 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:28.968 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:30:28.972 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:30:28.973 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:30:28.973 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:28.973 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:28.973 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:28.974 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:30:28.974 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:28.974 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:30:28.974 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:28.979 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:30:28.979 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:30:28.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:28.980 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:28.980 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:28.980 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:30:28.980 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:28.980 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:30:28.981 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:28.984 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:30:28.984 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:30:28.984 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:28.984 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:28.985 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:28.985 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:30:28.985 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:28.985 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:30:28.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:28.989 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.990 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:30:28.990 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:30:28.990 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:30:28.990 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:28.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:28.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:30:29.463 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:30:29.511 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:30:29.513 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:30:29.514 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:30:29.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:30:29.930 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:30:29.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:29.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:29.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:29.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:30.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:30:30.858 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:30:30.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:30.993 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:30.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:30.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:31.323 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:30:31.787 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:30:31.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:31.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:31.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:31.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:32.252 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:30:32.716 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:30:32.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:32.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:32.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:32.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:33.179 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:30:33.644 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:30:33.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:33.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:33.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:33.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:34.108 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:30:34.572 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:30:35.035 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:30:35.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:30:35.963 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:30:36.426 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:30:36.891 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:30:37.357 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:30:37.827 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:30:38.298 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:30:38.772 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:30:39.235 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:30:39.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:39.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:39.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:39.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:39.526 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:39.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:39.526 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:39.526 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:39.526 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:39.526 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:39.526 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:39.526 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2309 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:30:44.535 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:44.535 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:44.536 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:44.536 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:44.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:44.536 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:44.551 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:44.551 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:44.551 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:44.552 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:44.552 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:44.554 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:44.554 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:30:44.554 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:44.557 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:44.557 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:30:44.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:44.559 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:44.559 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:30:44.559 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:44.561 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:30:44.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:30:44.561 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:30:44.561 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:30:44.561 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:30:44.561 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:30:44.562 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:30:44.562 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:30:44.562 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.562 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:44.563 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:44.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:44.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:44.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:44.564 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:44.564 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:44.564 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:30:44.564 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.572 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:30:49.572 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:30:49.572 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:49.572 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:49.572 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:49.572 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:49.581 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:30:49.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:49.582 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:49.582 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:30:49.582 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:30:49.585 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:30:49.585 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:30:49.585 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:49.585 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:49.585 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:30:49.586 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:30:49.586 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:30:49.586 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:30:49.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:49.589 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:30:49.589 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:30:49.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:49.589 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:49.589 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:30:49.589 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:30:49.589 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:30:49.589 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:30:49.590 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:49.593 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:30:49.593 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:30:49.593 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:49.593 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:30:49.593 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:30:49.593 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:30:49.594 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:30:49.594 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:30:49.594 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.599 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:30:49.600 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:30:49.600 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:30:49.600 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.600 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.601 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:30:49.604 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:30:50.068 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:30:50.121 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:30:50.121 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:30:50.122 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:30:50.122 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:30:50.533 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:30:50.604 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:50.604 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:50.605 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:51.005 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:30:51.473 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:30:51.606 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:51.606 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:51.606 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:51.606 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:51.938 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:30:52.405 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:30:52.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:52.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:52.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:52.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:52.874 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:30:53.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:30:53.608 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:53.608 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:53.608 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:53.608 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:53.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:30:54.288 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:30:54.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:30:54.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:30:54.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:30:54.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:30:54.763 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:30:55.235 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:30:55.702 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:30:56.166 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:30:56.639 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:30:57.110 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:30:57.574 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:30:58.038 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:30:58.501 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:30:58.965 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:30:59.432 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:30:59.895 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:31:00.359 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:31:00.830 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:31:01.302 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:31:01.778 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:31:02.132 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:02.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:02.133 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:02.133 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:02.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:02.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:02.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:02.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:02.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:02.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:02.136 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:31:02.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:02.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:02.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:02.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:02.136 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:02.137 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:02.137 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2731 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:07.136 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:07.136 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:07.136 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:07.136 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:07.136 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:07.136 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:07.139 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:07.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:07.139 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:07.139 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:07.139 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:31:07.140 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:31:07.140 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:31:07.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:07.141 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:07.141 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:07.141 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:31:07.141 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:07.141 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:31:07.141 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:07.142 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:07.142 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:31:07.142 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:07.143 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:07.143 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:31:07.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.145 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:31:07.146 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:31:07.146 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:31:07.146 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:07.150 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:31:07.628 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:31:07.670 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:31:07.673 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:31:07.675 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:31:07.675 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:07.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:07.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:07.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:07.679 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:07.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:07.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:07.681 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:07.681 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:08.100 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:31:08.148 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:08.148 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:08.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:08.149 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:08.571 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:31:09.045 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:31:09.149 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:09.150 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:09.517 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:31:09.989 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:31:10.150 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:10.150 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:10.151 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:10.461 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:31:10.933 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:31:11.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:11.151 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:11.151 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:11.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:11.404 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:31:11.875 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:31:12.151 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:12.152 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:12.152 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:12.152 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:12.347 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:31:12.820 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:31:13.290 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:31:13.764 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:31:14.236 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:31:14.708 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:31:15.179 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:31:15.650 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:31:16.121 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:31:16.593 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:31:17.065 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:31:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:31:18.007 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:31:18.479 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:31:18.724 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:18.724 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:18.725 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:18.725 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:18.725 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:18.725 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:18.726 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:18.726 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:18.726 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:18.726 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:18.726 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:18.726 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:18.726 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:31:23.732 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:23.732 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:23.732 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:23.732 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:23.732 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:23.732 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:23.740 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:23.741 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:23.741 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:23.742 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:23.742 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:23.745 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:23.745 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:31:23.745 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:23.748 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:31:23.749 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:31:23.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:23.749 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:23.749 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:23.749 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:31:23.749 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:23.749 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:31:23.749 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:23.753 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:31:23.753 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:31:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:23.753 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:23.753 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:23.753 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:31:23.753 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:23.753 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:31:23.754 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:23.758 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.759 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:31:23.760 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:31:23.760 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:31:23.760 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.760 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:23.762 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:23.762 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:23.764 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:31:24.236 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:31:24.293 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:31:24.295 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:31:24.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:24.297 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:31:24.299 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:24.299 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:24.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:24.300 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:24.300 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:24.300 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:24.300 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:24.300 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:24.708 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:31:24.764 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:24.764 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:24.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:24.766 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:25.180 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:31:25.653 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:31:25.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:25.765 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:25.765 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:25.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:26.124 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:31:26.592 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:31:26.765 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:26.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:26.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:26.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:27.060 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:31:27.524 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:31:27.766 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:27.766 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:27.766 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:27.768 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:27.990 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:31:28.456 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:31:28.767 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:28.767 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:28.767 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:28.769 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:28.930 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:31:29.402 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:31:29.874 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:31:30.345 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:31:30.812 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:31:31.283 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:31:31.748 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:31:32.216 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:31:32.680 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:31:33.150 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:31:33.615 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:31:34.080 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:31:34.549 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:31:35.017 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:31:35.482 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:31:35.948 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:31:36.413 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:31:36.879 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:31:37.343 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:31:37.812 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:31:38.278 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:31:38.745 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:31:39.209 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:31:39.331 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:39.331 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:39.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:39.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:39.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:39.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:39.340 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:39.340 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:39.340 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:39.340 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:39.340 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:39.340 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:39.340 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:31:39.340 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3397 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:39.340 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3397 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:39.340 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3397 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:39.340 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3397 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:39.340 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3397 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:39.340 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3397 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.344 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:44.345 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:44.345 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:44.345 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:44.345 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:44.345 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:44.356 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:44.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:44.357 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:44.357 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:44.357 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:44.360 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:44.360 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:31:44.360 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:44.362 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:31:44.362 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:31:44.362 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:44.362 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:44.362 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:44.362 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:31:44.363 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:44.363 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:31:44.363 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:44.364 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:31:44.364 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:31:44.364 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:44.364 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:44.364 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:44.364 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:31:44.365 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:44.365 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:31:44.365 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:31:44.367 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:31:44.367 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:31:44.367 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.367 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.368 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:44.372 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:31:44.837 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:31:44.891 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:31:44.893 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:31:44.894 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:31:44.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:44.903 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:44.903 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:44.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:44.904 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:44.904 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:44.904 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:44.904 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:44.904 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:44.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:44.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:44.937 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:44.937 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:44.939 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:44.939 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:44.939 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:44.939 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:44.939 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:31:44.939 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.939 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.939 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.939 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.939 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.939 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:44.940 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:31:49.943 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:49.943 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:49.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:49.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:49.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:49.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:49.951 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:49.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:49.952 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:49.952 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:49.953 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:31:49.956 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:31:49.957 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:31:49.957 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:49.957 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:49.958 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:49.958 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:31:49.959 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:49.959 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:31:49.959 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:49.961 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:31:49.961 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:31:49.962 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:49.962 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:49.962 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:49.962 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:31:49.963 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:49.963 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:31:49.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:49.966 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:31:49.966 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:31:49.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:49.967 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:49.967 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:49.967 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:31:49.967 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:49.967 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:31:49.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:31:49.976 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.977 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:31:49.977 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:31:49.977 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:31:49.977 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.978 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.979 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:49.980 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:49.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.980 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:49.982 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:31:50.453 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:31:50.504 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:31:50.505 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:31:50.506 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:31:50.507 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:50.522 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.522 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.522 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:50.540 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.540 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.540 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:50.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:50.547 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.548 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:50.548 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:50.548 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:50.548 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:50.590 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:50.590 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:50.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:50.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.725 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.725 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.725 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:50.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:50.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:50.734 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.734 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:50.734 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:50.734 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:50.734 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:50.780 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:31:50.780 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:31:50.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.780 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.916 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:31:50.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:50.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.963 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:31:50.979 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.979 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.979 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:50.981 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:50.982 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:50.983 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:50.985 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:50.985 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:50.985 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:50.985 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:50.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:50.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:50.987 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:50.987 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:50.987 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:50.987 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:51.006 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:51.006 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:51.006 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:51.007 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:51.305 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:51.306 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:51.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:51.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:51.326 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:51.326 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:51.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:51.332 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:51.332 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:51.332 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:51.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:51.334 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:51.334 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:51.334 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:51.334 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:51.334 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:51.381 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:31:51.384 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:31:51.384 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:31:51.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:51.384 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:51.846 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:31:51.982 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:51.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:51.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:51.985 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:52.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:52.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:52.165 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:52.165 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:52.165 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:31:52.176 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:52.176 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:52.176 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:52.176 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:52.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:52.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:52.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:52.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:52.177 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:31:52.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:52.178 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:57.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:31:57.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:31:57.187 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:57.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:57.188 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:57.188 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:57.211 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:31:57.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:57.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:57.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:31:57.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:31:57.218 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:31:57.219 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:31:57.219 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:57.219 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:57.219 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:31:57.219 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:31:57.220 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:31:57.220 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:31:57.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:57.224 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:31:57.224 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:31:57.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:57.224 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:57.224 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:31:57.224 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:31:57.224 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:31:57.224 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:31:57.225 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:57.227 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:31:57.228 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:31:57.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:57.228 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:31:57.228 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:31:57.228 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:31:57.228 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:31:57.228 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:31:57.228 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:57.232 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:31:57.232 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:31:57.232 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:31:57.232 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:31:57.232 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.233 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:31:57.233 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:31:57.233 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:31:57.233 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.234 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.235 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:31:57.238 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:31:57.704 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:31:57.765 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:31:57.766 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:31:57.767 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:31:57.768 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:57.784 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:57.784 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:57.784 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:57.804 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:31:57.804 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:31:57.805 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:31:57.807 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:31:57.812 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:57.812 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:57.812 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:57.812 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:31:57.812 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:31:57.842 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:31:57.842 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:31:57.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:57.843 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:31:58.172 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:31:58.237 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:58.237 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:58.238 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:58.238 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:58.643 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:31:59.113 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:31:59.238 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:31:59.238 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:31:59.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:31:59.239 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:31:59.584 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:32:00.055 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:32:00.239 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:00.239 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:00.239 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:00.240 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:00.526 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:32:00.997 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:32:01.241 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:01.241 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:01.241 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:01.241 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:01.467 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:32:01.938 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:32:02.242 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:02.242 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:02.242 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:02.242 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:02.409 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:32:02.845 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:02.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:02.849 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:02.850 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:02.865 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:02.865 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:02.865 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:02.871 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:02.871 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:02.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:02.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:02.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:02.873 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:02.873 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:02.873 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:02.873 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:02.875 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:32:02.875 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:32:02.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:02.875 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:02.879 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:32:03.351 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:32:03.821 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:32:04.291 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:32:04.760 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:32:05.226 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:32:05.690 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:32:06.156 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:32:06.628 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:32:07.095 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:32:07.563 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:32:07.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:07.877 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:07.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:07.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:07.880 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:32:07.895 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:07.895 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:07.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:07.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:07.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:07.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:07.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:07.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:07.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:07.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:07.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:07.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:07.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:07.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:07.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:07.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:08.028 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:32:08.495 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:32:08.964 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:32:09.429 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:32:09.893 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:32:10.362 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:32:10.827 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:32:11.293 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:32:11.760 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:32:12.227 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:32:12.697 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:32:12.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:12.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:12.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:12.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:12.964 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:12.964 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:12.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:12.969 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:12.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:12.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:12.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:12.971 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:12.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:12.971 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:12.971 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:12.971 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:12.973 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:32:12.973 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:32:12.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:12.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:13.161 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:32:13.628 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:32:14.099 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:32:14.570 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:32:15.039 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:32:15.508 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:32:15.973 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:32:16.438 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:32:16.905 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:32:17.371 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:32:17.835 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:32:17.976 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:17.977 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:17.980 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:17.980 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:17.980 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:32:17.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:17.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:17.992 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:17.993 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:17.997 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:32:17.997 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:32:17.998 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:32:17.998 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:32:17.998 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:32:17.998 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:32:17.998 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:32:17.998 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:17.998 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:17.999 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:17.999 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:17.999 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:17.999 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:17.999 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4525 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:23.002 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:32:23.002 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:32:23.002 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:32:23.002 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:32:23.002 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:32:23.002 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:32:23.014 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:32:23.015 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:32:23.015 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:23.016 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:32:23.016 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:32:23.021 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:32:23.022 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:32:23.022 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:32:23.022 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:23.022 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:32:23.023 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:32:23.023 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:32:23.023 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:32:23.023 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:23.028 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:32:23.028 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:32:23.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:32:23.029 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:23.029 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:32:23.029 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:32:23.029 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:32:23.029 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:32:23.029 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:32:23.034 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:32:23.034 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:32:23.034 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:23.039 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:32:23.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:32:23.039 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:32:23.039 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:32:23.039 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:32:23.039 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:32:23.040 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:32:23.040 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:32:23.040 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.040 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.041 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.042 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:23.042 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:23.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.042 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:23.045 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:32:23.513 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:32:23.569 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:32:23.570 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:32:23.572 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:32:23.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:23.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:23.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:23.589 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:23.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:23.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:23.600 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:23.602 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:23.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:23.605 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:23.606 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:23.606 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:23.606 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:23.650 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:23.651 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:23.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:23.651 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:23.980 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:32:24.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:24.044 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:24.044 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:24.044 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:24.445 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:32:24.917 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:32:25.044 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:25.045 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:25.045 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:25.045 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:25.387 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:32:25.853 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:32:26.045 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:26.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:26.319 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:32:26.787 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:32:27.046 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:27.046 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:27.046 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:27.047 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:27.258 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:32:27.726 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:32:28.047 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:28.047 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:28.047 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:28.048 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:28.192 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:32:28.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:28.656 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:28.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:28.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:28.664 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:32:28.672 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:28.672 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:28.672 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:28.678 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:28.678 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:28.678 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:28.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:28.680 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:28.680 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:28.680 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:28.680 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:28.680 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:28.704 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:32:28.704 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:32:28.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:28.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:29.132 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:32:29.602 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:32:30.073 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:32:30.543 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:32:31.010 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:32:31.476 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:32:31.947 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:32:32.411 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:32:32.875 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:32:33.340 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:32:33.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:33.710 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:33.713 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:33.713 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:33.713 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:32:33.732 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:33.732 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:33.732 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:33.737 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:33.737 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:33.737 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:33.738 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:33.739 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:33.739 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:33.739 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:33.739 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:33.739 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:33.758 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:33.758 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:33.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:33.758 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:33.807 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:32:34.276 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:32:34.748 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:32:35.219 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:32:35.685 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:32:36.151 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:32:36.618 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:32:37.084 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:32:37.556 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:32:38.024 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:32:38.489 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:32:38.762 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:38.763 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:38.766 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:38.767 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:38.785 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:38.785 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:38.786 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:38.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:38.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:38.792 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:38.792 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:38.793 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:38.793 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:38.793 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:38.794 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:38.794 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:38.812 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:32:38.813 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:32:38.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:38.813 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:38.954 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:32:39.425 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:32:39.894 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:32:40.362 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:32:40.826 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:32:41.292 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:32:41.763 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:32:42.231 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:32:42.703 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:32:43.175 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:32:43.648 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:32:43.818 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:43.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:43.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:43.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:43.822 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:32:43.834 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:43.834 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:43.835 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:43.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:32:43.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:32:43.839 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:32:43.839 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:32:43.839 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:32:43.839 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:32:43.839 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:43.840 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4531 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:32:48.841 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:32:48.841 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:32:48.841 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:32:48.841 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:32:48.841 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:32:48.841 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:32:48.852 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:32:48.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:32:48.853 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:48.853 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:32:48.853 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:32:48.856 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:32:48.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:32:48.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:48.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:32:48.858 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:32:48.858 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:32:48.858 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:48.858 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:32:48.858 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:32:48.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:32:48.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:32:48.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:48.860 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:32:48.860 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:32:48.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:32:48.860 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:32:48.860 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:32:48.860 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:32:48.860 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:32:48.860 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:32:48.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:32:48.863 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:32:48.863 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:32:48.863 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:32:48.868 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:32:49.331 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:32:49.385 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:32:49.387 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:32:49.389 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:32:49.389 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:49.406 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:49.406 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:49.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:49.422 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:49.422 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:49.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:49.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:49.425 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:49.425 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:49.425 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:49.425 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:49.425 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:49.468 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:49.468 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:49.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:49.468 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:49.800 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:32:49.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:49.866 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:49.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:50.269 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:32:50.738 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:32:50.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:50.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:50.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:50.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:51.205 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:32:51.672 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:32:51.868 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:51.868 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:51.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:52.141 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:32:52.613 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:32:52.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:52.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:52.869 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:52.869 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:53.085 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:32:53.557 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:32:53.869 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:32:53.869 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:32:53.870 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:32:53.870 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:32:54.029 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:32:54.473 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:54.474 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:54.477 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:54.477 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:54.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:54.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:54.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:54.501 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:54.501 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:54.501 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:54.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:54.502 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:32:54.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:54.503 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:54.503 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:54.503 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:54.503 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:54.548 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:32:54.548 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:32:54.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:54.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:54.974 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:32:55.447 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:32:55.920 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:32:56.383 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:32:56.845 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:32:57.315 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:32:57.788 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:32:58.261 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:32:58.735 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:32:59.208 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:32:59.553 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:59.554 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:59.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:59.558 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:59.558 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:32:59.576 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:59.576 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:59.576 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:59.582 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:32:59.582 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:32:59.582 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:32:59.582 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:32:59.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:59.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:59.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:59.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:32:59.584 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:32:59.627 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:32:59.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:32:59.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:59.628 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:32:59.680 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:33:00.151 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:33:00.622 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:33:01.092 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:33:01.563 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:33:02.037 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:33:02.509 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:33:02.981 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:33:03.451 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:33:03.922 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:33:04.393 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:33:04.632 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:04.633 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:04.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:04.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:04.653 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:04.653 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:04.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:04.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:04.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:04.660 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:04.660 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:04.661 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:04.661 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:04.661 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:04.661 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:04.662 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:04.671 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:33:04.671 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:33:04.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:04.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:04.862 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:33:05.334 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:33:05.806 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:33:06.274 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:33:06.743 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:33:07.213 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:33:07.683 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:33:08.154 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:33:08.625 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:33:09.095 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:33:09.561 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:33:09.677 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:09.677 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:09.681 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:09.682 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:09.682 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:33:09.696 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:09.696 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:09.697 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:09.697 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:09.699 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:09.699 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:09.699 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:33:09.699 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:33:09.699 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:33:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:09.700 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:14.703 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:33:14.703 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:33:14.704 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:14.704 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:14.704 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:14.704 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:14.712 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:14.712 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:33:14.713 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:14.713 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:33:14.713 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:33:14.716 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:33:14.716 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:33:14.716 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:14.719 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:33:14.720 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:33:14.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:33:14.720 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:14.720 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:33:14.720 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:14.720 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:33:14.720 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:33:14.720 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:14.723 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:33:14.723 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:33:14.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:33:14.723 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:14.723 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:14.723 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:33:14.723 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:33:14.723 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:33:14.724 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:14.728 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:33:14.728 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:33:14.728 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:33:14.728 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:33:14.728 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.729 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:33:14.730 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:33:14.730 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:33:14.730 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:33:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:33:14.730 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:14.731 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:14.732 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:14.734 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:33:15.211 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:33:15.261 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:33:15.264 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:33:15.265 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:15.266 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:33:15.286 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:15.286 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:15.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:15.308 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:15.308 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:15.308 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:15.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:15.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:15.316 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:15.316 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:15.316 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:15.316 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:15.349 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:15.349 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:15.349 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:15.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:15.683 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:33:15.733 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:15.734 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:15.734 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:15.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:16.152 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:33:16.625 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:33:16.734 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:16.735 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:16.735 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:16.735 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:17.097 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:33:17.568 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:33:17.736 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:17.736 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:17.736 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:17.736 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:18.039 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:33:18.505 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:33:18.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:18.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:18.737 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:18.737 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:18.972 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:33:19.440 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:33:19.737 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:19.737 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:19.738 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:19.738 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:19.906 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:33:20.352 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:20.356 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:20.360 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:20.360 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:20.374 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:33:20.380 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:20.380 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:20.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:20.385 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:20.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:20.386 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:20.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:20.387 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:20.387 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:20.388 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:20.388 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:20.388 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:20.418 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:33:20.418 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:33:20.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:20.419 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:20.842 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:33:21.311 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:33:21.779 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:33:22.243 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:33:22.710 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:33:23.182 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:33:23.650 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:33:24.121 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:33:24.593 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:33:25.064 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:33:25.422 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:25.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:25.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:25.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:25.429 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:33:25.448 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:25.448 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:25.448 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:25.453 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:25.453 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:25.454 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:25.454 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:25.455 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:25.455 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:25.455 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:25.455 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:25.455 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:25.481 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:25.482 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:25.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:25.482 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:25.534 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:33:26.005 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:33:26.475 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:33:26.939 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:33:27.406 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:33:27.877 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:33:28.349 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:33:28.821 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:33:29.292 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:33:29.763 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:33:30.233 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:33:30.486 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:30.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:30.490 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:30.490 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:30.499 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:30.499 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:30.499 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:30.505 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:30.505 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:30.505 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:30.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:30.507 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:30.507 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:30.507 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:30.507 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:30.507 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:30.511 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:33:30.511 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:33:30.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:30.511 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:30.703 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:33:31.167 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:33:31.633 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:33:32.098 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:33:32.563 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:33:33.033 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:33:33.503 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:33:33.968 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:33:34.436 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:33:34.906 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:33:35.371 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:33:35.512 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:35.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:35.514 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:35.514 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:35.514 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:33:35.521 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:35.521 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:35.522 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:35.522 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:35.525 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:35.525 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:35.525 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:33:35.525 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:33:35.525 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:33:35.525 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:35.525 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:35.525 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4523 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:35.525 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4523 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:35.525 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4523 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:35.525 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=4523 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:40.528 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:33:40.528 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:33:40.528 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:40.528 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:40.528 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:40.528 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:40.535 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:40.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:33:40.536 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:40.536 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:33:40.536 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:33:40.540 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:33:40.540 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:33:40.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:33:40.540 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:40.540 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:40.540 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:33:40.540 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:33:40.540 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:33:40.541 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:40.542 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:33:40.542 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:33:40.542 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:33:40.542 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:40.542 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:40.542 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:33:40.543 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:33:40.543 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:33:40.543 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:40.544 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:33:40.545 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:33:40.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:33:40.545 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:40.545 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:40.545 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:33:40.545 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:33:40.545 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:33:40.545 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.547 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:33:40.547 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:33:40.548 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:33:40.548 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:40.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:40.552 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:33:41.024 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:33:41.084 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:33:41.086 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:33:41.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:41.088 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:33:41.113 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.113 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.113 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:41.138 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.138 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.138 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:41.141 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:41.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.147 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:41.147 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:41.148 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:41.148 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:41.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:41.163 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:41.163 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.164 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.402 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.403 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:41.407 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.407 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.424 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.424 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.424 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:41.429 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.429 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.429 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:41.430 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:41.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.431 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:41.431 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:41.431 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:41.431 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:41.441 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:33:41.441 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:33:41.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.442 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.492 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:33:41.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:41.551 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:41.551 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:41.551 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:41.819 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:41.819 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.822 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.822 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.822 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:33:41.842 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.842 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.842 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:41.847 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:41.848 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:41.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:41.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:41.849 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.849 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:41.849 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:41.849 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:41.849 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:41.862 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:41.862 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:41.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.862 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:41.961 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:33:42.428 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:33:42.551 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:42.552 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:42.552 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:42.552 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:42.584 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:42.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:42.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:42.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:42.601 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:42.601 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:42.601 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:42.606 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:42.606 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:42.606 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:42.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:42.608 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:42.608 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:42.608 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:42.608 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:42.608 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:42.663 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:33:42.663 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:33:42.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:42.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:42.900 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:33:43.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:43.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:43.220 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:43.221 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:43.221 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:33:43.231 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:43.231 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:43.231 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:43.232 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:43.236 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:43.236 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:43.236 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:33:43.236 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:33:43.237 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:33:43.237 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:43.237 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:43.237 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:43.237 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:43.237 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:43.238 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:43.238 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:43.238 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:43.238 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=585 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:33:48.239 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:33:48.239 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:33:48.239 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:48.239 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:48.239 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:48.239 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:48.242 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:33:48.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:33:48.242 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:48.242 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:33:48.242 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:33:48.243 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:33:48.243 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:33:48.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:33:48.244 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:48.244 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:33:48.244 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:33:48.244 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:33:48.244 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:33:48.244 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:33:48.245 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:33:48.245 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:33:48.245 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:33:48.246 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:33:48.246 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:33:48.246 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.248 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:33:48.248 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:33:48.248 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:33:48.249 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:33:48.249 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:33:48.253 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:33:48.732 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:33:48.775 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:33:48.777 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:33:48.778 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:48.779 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:33:48.799 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:48.799 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:48.799 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:48.814 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:33:48.814 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:33:48.814 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:33:48.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:33:48.820 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:48.821 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:48.821 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:48.821 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:33:48.821 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:33:48.870 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:33:48.870 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:33:48.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:48.871 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:33:49.204 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:33:49.251 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:49.251 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:49.251 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:49.251 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:49.675 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:33:50.146 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:33:50.252 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:50.252 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:50.252 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:50.252 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:50.617 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:33:51.088 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:33:51.253 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:51.253 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:51.253 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:51.253 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:51.561 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:33:52.033 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:33:52.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:52.254 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:52.254 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:52.254 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:52.503 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:33:52.976 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:33:53.254 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:33:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:33:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:33:53.255 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:33:53.447 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:33:53.917 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:33:54.386 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:33:54.855 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:33:55.324 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:33:55.789 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:33:56.255 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:33:56.725 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:33:57.191 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:33:57.656 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:33:58.121 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:33:58.585 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:33:59.053 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:33:59.519 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:33:59.984 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:34:00.449 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:34:00.918 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:34:01.385 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:34:01.850 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:34:02.319 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:34:02.786 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:34:03.258 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:34:03.729 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:34:04.202 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:34:04.674 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:34:05.143 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:34:05.611 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:34:06.081 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:34:06.547 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:34:07.012 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:34:07.476 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:34:07.941 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:34:08.411 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:34:08.872 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:08.873 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:34:08.875 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:34:08.880 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:08.880 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:08.896 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:08.896 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:08.896 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:34:08.901 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:08.901 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:08.901 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:34:08.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:34:08.903 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:08.903 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:34:08.903 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:34:08.903 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:34:08.903 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:34:08.916 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:34:08.916 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:34:08.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:08.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:09.344 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:34:09.814 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:34:10.283 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:34:10.752 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:34:11.219 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:34:11.686 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:34:12.153 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:34:12.621 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:34:13.087 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:34:13.551 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:34:14.015 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:34:14.479 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:34:14.947 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:34:15.418 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:34:15.889 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:34:16.359 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:34:16.829 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:34:17.299 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:34:17.766 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:34:18.231 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:34:18.695 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:34:19.161 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:34:19.627 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:34:20.097 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:34:20.568 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:34:21.035 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:34:21.501 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:34:21.972 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:34:22.439 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:34:22.910 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:34:23.382 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:34:23.851 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:34:24.321 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:34:24.788 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 03:34:25.254 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 03:34:25.724 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 03:34:26.195 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 03:34:26.666 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 03:34:27.133 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 03:34:27.607 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 03:34:28.078 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 03:34:28.545 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 03:34:28.918 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:28.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:34:28.923 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:28.923 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:28.923 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:34:28.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:28.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:28.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:34:28.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:28.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:28.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:34:28.935 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:34:28.936 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:28.936 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:34:28.936 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:34:28.936 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:34:28.936 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:34:28.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:34:28.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:34:28.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:28.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:29.014 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 03:34:29.479 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 03:34:29.948 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 03:34:30.413 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 03:34:30.883 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 03:34:31.348 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 03:34:31.818 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 03:34:32.289 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 03:34:32.755 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 03:34:33.224 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 03:34:33.691 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 03:34:34.158 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 03:34:34.628 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 03:34:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 03:34:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 03:34:36.039 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 03:34:36.512 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 03:34:36.980 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 03:34:37.452 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 03:34:37.920 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 03:34:38.389 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 03:34:38.861 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 03:34:39.327 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 03:34:39.794 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 03:34:40.259 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 03:34:40.723 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 03:34:41.191 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 03:34:41.656 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 03:34:42.120 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 03:34:42.587 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 03:34:43.053 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 03:34:43.522 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 03:34:43.987 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 03:34:44.451 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 03:34:44.916 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 03:34:45.381 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 03:34:45.848 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 03:34:46.313 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 03:34:46.779 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 03:34:47.243 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 03:34:47.708 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 03:34:48.172 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 03:34:48.638 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 03:34:48.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:48.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:34:48.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:48.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:48.987 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:48.987 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:48.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:34:48.992 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:34:48.992 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:34:48.992 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:34:48.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:34:48.994 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:48.994 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:34:48.994 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:34:48.994 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:34:48.994 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:34:49.008 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:34:49.008 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:34:49.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:49.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:34:49.103 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 03:34:49.572 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 03:34:50.041 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 03:34:50.511 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 03:34:50.982 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 03:34:51.452 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 03:34:51.924 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 03:34:52.390 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 03:34:52.856 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 03:34:53.322 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 03:34:53.790 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 03:34:54.255 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 03:34:54.721 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 03:34:55.185 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 03:34:55.657 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 03:34:56.127 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 03:34:56.593 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 03:34:57.059 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 03:34:57.529 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 03:34:57.994 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 03:34:58.457 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 03:34:58.922 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 03:34:59.388 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 03:34:59.857 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 03:35:00.329 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 03:35:00.793 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 03:35:01.260 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 03:35:01.733 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 03:35:02.201 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 03:35:02.671 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 03:35:03.142 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 03:35:03.614 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 03:35:04.086 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 03:35:04.554 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 03:35:05.023 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 03:35:05.490 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 03:35:05.955 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 03:35:06.421 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 03:35:06.887 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 03:35:07.360 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 03:35:07.831 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 03:35:08.303 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 03:35:08.774 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 03:35:09.010 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:09.011 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:09.015 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:09.015 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:09.015 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:09.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:09.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:09.020 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:09.020 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:09.020 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:09.020 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:09.020 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:09.020 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:09.020 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:35:14.026 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:14.026 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:14.026 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:14.026 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:14.026 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:14.026 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:14.033 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:14.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:35:14.034 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:14.034 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:35:14.034 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:35:14.037 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:35:14.037 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:35:14.037 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:35:14.037 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:14.037 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:14.037 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:35:14.038 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:35:14.038 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:35:14.038 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:14.041 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:35:14.041 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:35:14.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:35:14.042 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:14.042 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:14.042 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:35:14.042 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:35:14.042 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:35:14.042 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:14.045 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:35:14.046 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:35:14.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:35:14.046 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:14.046 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:14.046 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:35:14.046 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:35:14.046 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:35:14.046 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:14.051 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:35:14.051 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:35:14.051 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:35:14.051 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:35:14.051 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.052 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:35:14.052 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:35:14.052 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:35:14.053 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:14.053 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.054 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:14.055 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:14.055 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:14.056 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:35:19.062 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:19.062 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:19.062 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:19.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:19.063 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:19.063 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:19.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:19.070 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:35:19.070 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:19.071 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:35:19.071 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:35:19.073 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:35:19.073 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:35:19.074 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:35:19.074 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:19.074 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:19.074 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:35:19.075 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:35:19.075 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:35:19.075 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:19.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:35:19.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:35:19.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:35:19.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:19.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:19.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:35:19.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:35:19.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:35:19.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:35:19.079 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:35:19.079 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:35:19.079 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.082 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:35:19.082 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:35:19.082 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:35:19.083 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:19.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:19.087 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:35:19.563 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:35:19.609 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:35:19.611 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:35:19.613 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:35:19.613 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:19.633 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:19.633 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:19.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:19.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:19.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:19.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:19.646 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:19.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:19.649 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:19.649 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:19.649 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:19.649 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:19.653 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:19.653 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:19.653 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:19.654 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:19.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:19.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:19.863 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:19.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:19.881 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:19.881 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:19.881 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:19.882 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:19.883 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:19.883 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:19.883 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:19.884 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:19.884 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:19.888 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:19.888 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:19.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:19.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.034 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:35:20.085 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:20.085 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:20.085 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:20.085 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:20.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.098 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.114 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:20.116 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.116 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:20.116 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:20.116 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:20.116 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:20.118 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:20.118 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:20.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.118 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.315 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.315 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.319 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.319 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.338 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.339 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:20.345 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.345 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:20.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.346 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:20.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:20.347 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:20.347 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:20.354 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:20.354 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:35:20.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.354 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:35:20.630 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.631 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.631 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.631 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.631 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:20.636 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:20.637 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.637 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:20.637 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:20.637 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:20.637 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:20.681 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:20.681 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:35:20.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.682 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.955 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:20.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:20.959 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:20.959 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:20.959 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:20.960 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.960 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:20.960 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:20.961 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:20.961 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:20.964 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:35:20.965 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:20.965 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:35:20.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:20.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:21.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:21.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:21.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:21.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:21.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:21.263 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:21.264 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:21.264 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:21.264 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:21.271 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:21.271 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:21.271 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:21.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:21.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:21.277 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:21.278 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:21.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:21.279 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:21.279 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:21.279 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:21.279 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:21.286 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:21.286 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:21.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:21.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:21.428 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:35:21.900 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:35:22.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:22.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:22.086 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:22.086 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:22.372 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:35:22.843 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:35:23.087 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:23.087 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:23.088 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:23.088 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:35:23.703 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:23.705 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:23.709 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:23.709 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:23.724 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:23.726 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:23.726 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:23.726 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:23.728 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:23.728 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:23.728 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:23.728 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:23.728 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:23.729 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:23.729 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:23.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:23.729 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:23.789 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:35:24.088 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:24.089 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:24.089 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:24.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:24.261 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:35:24.732 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:35:25.205 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:35:25.678 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:35:26.150 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:35:26.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:26.305 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:26.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:26.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:26.324 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:26.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:26.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:26.325 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:26.326 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:26.326 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:26.326 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:26.326 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:26.326 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:26.329 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:26.329 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:26.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:26.329 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:26.621 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:35:27.092 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:35:27.562 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:35:28.028 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:35:28.498 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:35:28.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:28.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:28.893 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:28.893 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:28.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:28.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:28.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:28.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:28.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:28.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:28.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:28.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:28.914 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:28.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:28.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:28.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:28.968 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:28.969 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:35:28.969 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:35:28.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:28.970 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:29.441 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:35:29.912 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:35:30.385 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:35:30.858 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:35:31.330 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:35:31.409 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:31.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:31.414 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:31.414 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:31.414 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:31.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:31.430 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:31.430 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:31.430 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:31.431 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:31.432 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:31.432 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:31.432 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:31.432 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:31.466 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:31.466 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:35:31.466 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:31.467 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:31.800 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:35:32.272 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:35:32.745 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:35:33.218 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:35:33.688 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:35:34.160 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:35:34.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:34.240 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:34.243 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:34.243 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:34.244 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:34.260 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:34.261 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:34.261 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:34.261 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:34.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:34.263 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:34.263 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:34.263 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:34.263 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:34.297 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:34.297 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:35:34.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:34.298 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:34.626 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:35:35.094 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:35:35.559 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:35:36.025 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:35:36.492 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:35:36.957 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:35:37.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:37.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:37.041 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:37.041 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:37.041 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:37.053 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:37.064 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:37.064 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:37.065 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:37.069 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:37.069 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:37.069 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:37.069 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:37.069 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:35:37.070 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:37.070 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:37.070 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3902 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:42.061 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:42.061 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:42.061 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:42.062 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:42.062 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:42.062 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:42.068 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:42.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:35:42.068 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:42.068 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:35:42.068 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:35:42.072 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:35:42.072 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:35:42.072 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:35:42.072 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:42.072 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:42.073 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:35:42.073 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:35:42.073 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:35:42.073 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:42.076 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:35:42.076 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:35:42.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:35:42.077 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:42.077 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:42.077 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:35:42.077 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:35:42.077 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:35:42.077 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:42.080 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:35:42.080 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:35:42.080 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:35:42.080 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:35:42.080 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:42.081 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:35:42.081 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:35:42.081 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:35:42.081 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:42.085 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:35:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:35:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:35:42.085 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:35:42.085 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.086 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:35:42.086 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:35:42.086 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:35:42.086 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.087 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:35:42.088 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:35:42.091 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:35:42.562 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:35:42.617 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:35:42.620 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:35:42.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:42.623 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:35:42.646 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:42.646 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:42.646 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:42.667 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:42.667 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:42.668 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:42.669 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:42.674 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:42.674 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:42.674 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:42.674 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:42.674 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:42.700 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:42.700 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:42.700 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:42.701 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:43.033 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:35:43.089 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:43.090 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:43.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:43.506 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:35:43.978 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:35:44.090 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:44.091 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:44.091 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:44.091 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:44.448 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:35:44.918 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:35:45.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:45.092 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:45.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:45.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:45.389 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:35:45.811 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:45.812 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:45.815 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:45.815 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:45.827 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:45.827 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:45.828 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:45.833 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:45.833 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:45.833 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:45.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:45.835 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:45.836 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:45.836 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:45.836 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:45.836 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:45.858 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:45.859 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:35:45.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:45.859 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:45.861 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:35:46.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:46.093 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:46.093 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:46.093 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:46.325 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:35:46.789 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:35:47.092 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:47.094 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:47.094 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:47.094 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:47.253 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:35:47.717 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:35:48.182 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:35:48.647 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:35:49.057 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:49.058 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:49.062 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:49.062 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:49.062 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:49.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:49.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:49.068 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:49.074 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:49.074 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:49.074 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:49.074 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:49.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:49.076 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:49.076 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:49.076 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:49.076 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:49.113 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:49.114 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:49.114 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:49.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:49.119 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:35:49.590 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:35:50.061 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:35:50.532 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:35:51.003 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:35:51.473 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:35:51.944 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:35:52.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:52.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:52.349 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:52.349 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:52.366 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:52.366 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:52.366 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:52.373 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:52.373 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:52.373 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:35:52.373 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:52.375 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:52.375 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:35:52.375 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:35:52.375 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:35:52.375 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:35:52.414 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:35:52.415 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:35:52.416 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:35:52.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:52.416 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:52.884 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:35:53.353 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:35:53.825 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:35:54.295 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:35:54.767 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:35:55.231 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:35:55.564 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:35:55.565 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:35:55.568 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:35:55.568 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:35:55.568 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:35:55.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:35:55.580 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:35:55.580 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:35:55.580 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:35:55.584 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:35:55.584 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:35:55.585 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:35:55.585 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:35:55.585 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:35:55.585 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:35:55.585 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:35:55.585 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:55.585 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:55.586 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:55.586 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:55.586 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:55.586 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:35:55.586 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2934 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:36:00.586 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:36:00.587 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:36:00.587 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:00.587 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:00.587 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:00.587 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:00.594 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:00.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:36:00.594 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:00.594 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:36:00.594 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:36:00.597 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:36:00.597 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:36:00.597 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:36:00.597 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:00.597 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:36:00.598 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:00.598 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:36:00.598 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:36:00.598 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:36:00.601 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:36:00.601 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:36:00.601 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:36:00.604 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:36:00.604 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:36:00.604 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.607 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:36:00.608 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:36:00.608 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:36:00.608 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.608 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.609 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:00.612 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:36:01.078 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:36:01.134 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:36:01.136 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:36:01.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:01.136 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:36:01.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:01.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:01.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:01.182 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:01.182 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:01.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:01.184 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:01.190 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.190 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:01.190 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:01.191 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:01.191 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:01.218 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:01.218 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:01.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.218 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.546 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:36:01.549 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:01.553 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:01.553 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:01.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:01.575 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:01.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:01.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:01.581 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:01.581 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:01.581 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:01.583 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.583 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:01.583 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:01.583 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:01.583 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:01.587 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:36:01.587 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:36:01.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.587 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:01.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:01.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:02.011 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:36:02.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:02.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:02.068 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:02.068 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:02.068 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:36:02.082 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:02.082 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:02.082 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:02.088 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:02.088 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:02.088 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:02.088 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:02.089 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:02.089 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:02.089 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:02.089 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:02.089 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:02.099 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:02.099 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:02.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:02.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:02.481 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:36:02.611 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:02.611 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:02.611 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:02.611 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:02.952 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:36:03.423 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:36:03.612 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:03.612 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:03.612 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:03.612 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:03.893 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:36:04.365 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:36:04.613 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:04.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:04.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:04.614 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:04.836 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:36:04.990 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:04.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:04.994 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:04.994 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:05.008 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:05.008 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:05.008 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:05.014 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:05.014 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:05.014 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:05.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:05.016 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:05.016 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:05.016 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:05.016 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:05.016 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:05.070 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:36:05.070 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:36:05.070 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:05.071 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:05.305 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:36:05.614 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:05.614 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:05.614 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:05.615 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:05.778 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:36:06.245 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:36:06.715 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:36:07.185 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:36:07.654 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:36:07.969 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:07.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:07.974 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:07.974 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:07.974 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:36:07.984 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:07.984 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:07.986 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:07.986 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:36:07.986 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:36:07.986 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:36:07.986 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:12.990 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:36:12.990 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:36:12.990 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:12.990 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:12.990 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:12.990 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:13.000 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:13.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:36:13.001 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:13.001 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:36:13.001 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:36:13.004 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:36:13.004 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:36:13.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:36:13.004 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:13.004 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:13.004 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:36:13.004 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:36:13.004 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:36:13.005 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:36:13.007 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:36:13.007 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:36:13.007 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:13.009 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:36:13.009 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:36:13.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:36:13.010 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:13.010 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:13.010 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:36:13.010 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:36:13.010 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:36:13.010 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:36:13.013 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:36:13.013 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:36:13.013 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.013 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.014 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:13.018 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:36:13.483 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:36:13.543 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:36:13.545 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:36:13.546 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:36:13.548 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:13.570 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:13.570 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:13.570 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:13.591 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:13.591 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:13.591 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:13.592 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:13.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:13.597 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:13.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:13.598 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:13.598 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:13.621 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:13.621 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:13.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:13.622 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:13.951 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:36:14.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:14.016 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:14.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:14.016 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:14.422 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:36:14.893 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:36:14.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:14.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:14.918 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:14.918 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:14.929 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:14.930 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:14.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:14.937 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:14.937 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:14.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:14.938 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:14.940 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:14.940 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:14.940 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:14.940 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:14.940 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:14.983 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:36:14.983 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:36:14.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:14.984 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:15.016 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:15.017 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:15.017 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:15.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:15.365 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:36:15.833 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:36:16.017 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:16.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:16.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:16.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:16.301 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:36:16.771 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:36:17.018 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:17.018 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:17.018 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:17.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:17.093 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:17.094 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:17.097 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:17.097 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:17.097 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:36:17.114 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:17.115 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:17.115 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:17.120 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:17.120 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:17.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:17.121 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:17.122 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:17.122 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:17.122 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:17.122 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:17.122 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:17.143 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:17.143 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:17.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:17.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:17.242 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:36:17.712 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:36:18.019 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:18.019 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:18.019 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:18.019 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:18.178 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:36:18.648 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:36:19.114 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:36:19.586 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:36:20.058 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:36:20.528 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:36:20.999 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:36:21.470 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:36:21.930 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:21.931 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:21.935 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:21.935 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:21.941 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:36:21.955 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:21.955 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:21.955 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:21.961 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:21.961 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:21.961 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:21.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:21.963 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:21.963 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:21.963 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:21.963 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:21.963 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:21.986 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:36:21.986 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:36:21.986 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:21.987 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:22.412 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:36:22.882 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:36:23.354 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:36:23.826 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:36:24.299 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:36:24.771 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:36:25.242 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:36:25.712 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:36:26.181 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:36:26.648 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:36:27.119 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:36:27.590 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:36:28.061 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:36:28.531 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:36:28.996 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:36:29.461 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:36:29.925 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:36:30.391 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:36:30.861 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:36:31.325 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:36:31.795 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:36:32.261 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:36:32.729 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:36:33.201 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:36:33.674 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:36:34.144 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:36:34.611 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:36:35.077 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:36:35.541 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:36:36.009 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:36:36.481 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:36:36.952 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:36:37.419 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:36:37.892 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:36:38.364 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:36:38.829 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:36:39.302 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:36:39.769 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:36:40.240 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:36:40.709 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:36:41.173 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:36:41.638 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:36:41.958 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:41.958 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:41.959 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:36:41.963 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:41.963 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:41.963 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:41.963 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:41.965 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:41.965 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:41.965 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:41.965 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:41.965 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:36:41.965 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:36:41.965 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:36:46.971 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:36:46.971 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:36:46.971 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:46.971 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:46.971 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:46.971 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:46.979 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:36:46.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:36:46.980 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:46.980 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:36:46.980 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:36:46.982 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:36:46.983 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:36:46.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:36:46.983 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:46.983 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:36:46.983 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:36:46.983 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:36:46.983 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:36:46.983 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:46.985 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:36:46.985 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:36:46.985 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:36:46.985 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:46.985 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:36:46.986 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:36:46.986 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:36:46.986 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:36:46.986 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:46.987 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:36:46.987 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:36:46.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:36:46.988 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:36:46.988 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:36:46.988 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:36:46.988 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:36:46.988 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:36:46.988 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.990 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:36:46.991 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:36:46.991 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:36:46.991 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.991 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:36:46.995 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:36:47.458 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:36:47.514 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:36:47.516 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:36:47.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:47.518 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:36:47.536 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:47.537 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:47.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:47.557 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:47.557 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:47.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:47.558 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:47.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:47.563 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:47.563 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:47.563 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:47.563 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:47.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:47.597 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:47.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:47.597 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:47.926 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:36:47.993 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:47.994 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:47.994 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:47.994 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:48.210 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:48.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:48.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:48.215 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:48.235 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:48.235 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:48.235 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:48.241 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:48.241 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:48.241 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:48.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:48.243 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:48.243 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:48.243 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:48.243 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:48.243 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:48.249 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:36:48.249 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:36:48.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:48.249 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:48.394 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:36:48.859 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:36:48.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:48.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:48.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:48.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:49.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:49.162 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:49.166 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:49.166 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:49.166 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:36:49.185 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:49.185 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:49.185 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:49.191 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:49.191 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:49.191 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:49.191 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:49.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:49.192 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:49.192 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:49.192 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:49.192 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:49.232 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:49.232 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:49.232 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:49.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:49.329 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:36:49.800 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:36:49.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:49.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:49.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:49.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:50.266 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:36:50.736 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:36:50.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:50.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:50.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:50.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:51.126 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:51.127 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:51.130 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:51.130 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:51.147 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:51.147 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:51.147 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:51.152 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:36:51.152 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:36:51.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:36:51.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:36:51.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:51.154 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:36:51.154 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:36:51.154 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:36:51.154 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:36:51.203 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:36:51.208 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:36:51.208 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:36:51.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:51.209 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:36:51.670 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:36:51.999 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:36:51.999 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:36:51.999 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:36:51.999 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:36:52.139 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:36:52.603 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:36:53.071 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:36:53.536 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:36:54.002 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:36:54.471 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:36:54.942 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:36:55.406 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:36:55.871 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:36:56.336 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:36:56.800 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:36:57.266 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:36:57.738 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:36:58.211 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:36:58.684 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:36:59.156 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:36:59.628 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:37:00.102 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:37:00.573 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:37:01.040 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:37:01.507 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:37:01.977 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:37:02.448 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:37:02.919 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:37:03.393 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:37:03.864 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:37:04.336 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:37:04.809 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:37:05.283 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:37:05.754 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:37:06.226 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:37:06.700 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:37:07.172 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:37:07.643 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:37:08.112 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:37:08.585 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:37:09.057 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:37:09.528 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:37:09.999 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:37:10.469 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:37:10.940 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:37:11.150 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:11.150 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:11.150 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:37:11.155 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:11.155 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:11.156 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:11.156 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:11.156 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:37:11.156 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:37:11.156 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:37:16.164 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:37:16.164 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:37:16.164 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:16.165 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:16.165 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:16.165 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:16.173 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:16.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:37:16.173 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:16.173 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:37:16.173 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:37:16.174 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:37:16.175 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:37:16.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:37:16.175 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:16.175 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:16.175 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:37:16.175 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:37:16.175 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:37:16.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:37:16.178 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:37:16.178 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:37:16.178 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:16.181 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:37:16.181 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:37:16.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:37:16.181 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:16.181 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:16.181 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:37:16.181 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:37:16.181 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:37:16.182 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.185 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:37:16.185 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:37:16.185 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:37:16.185 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:16.186 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:16.190 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:37:16.653 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:37:16.709 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:37:16.710 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:37:16.712 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:37:16.713 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:16.731 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:16.731 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:16.731 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:16.744 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:16.745 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:16.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:16.746 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:16.748 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:16.749 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:16.749 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:16.749 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:16.749 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:16.791 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:16.791 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:16.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:16.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:17.119 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:37:17.188 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:17.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:17.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:17.189 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:17.592 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:37:18.064 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:37:18.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:18.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:18.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:18.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:18.534 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:37:19.005 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:37:19.190 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:19.190 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:19.190 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:19.191 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:19.224 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:19.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:19.227 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:19.227 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:19.239 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:19.239 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:19.239 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:19.245 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:19.245 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:19.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:19.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:19.247 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:19.247 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:19.247 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:19.247 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:19.247 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:19.285 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:37:19.285 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:37:19.285 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:19.286 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:19.473 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:37:19.942 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:37:20.191 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:20.191 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:20.191 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:20.192 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:20.411 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:37:20.884 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:37:21.193 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:21.193 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:21.193 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:21.193 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:21.354 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:37:21.826 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:37:21.964 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:21.965 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:21.968 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:21.969 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:21.969 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:37:21.988 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:21.988 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:21.988 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:21.995 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:21.995 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:21.995 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:21.995 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:21.996 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:21.996 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:21.996 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:21.996 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:21.996 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:22.008 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:22.009 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:22.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:22.009 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:22.294 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:37:22.764 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:37:23.232 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:37:23.701 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:37:24.169 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:37:24.637 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:37:25.104 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:37:25.259 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:25.261 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:25.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:25.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:25.273 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:25.273 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:25.273 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:25.279 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:25.279 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:25.279 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:25.279 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:25.281 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:25.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:25.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:25.281 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:25.281 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:25.284 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:37:25.284 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:37:25.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:25.284 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:25.575 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:37:26.048 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:37:26.512 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:37:26.983 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:37:27.457 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:37:27.929 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:37:28.401 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:37:28.865 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:37:29.330 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:37:29.804 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:37:30.275 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:37:30.747 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:37:31.220 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:37:31.692 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:37:32.162 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:37:32.634 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:37:33.106 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:37:33.578 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:37:34.051 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:37:34.524 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:37:34.995 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:37:35.466 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:37:35.935 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:37:36.407 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:37:36.880 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:37:37.351 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:37:37.821 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:37:38.288 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:37:38.761 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:37:39.233 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:37:39.704 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:37:40.175 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:37:40.647 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:37:41.115 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:37:41.587 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:37:42.059 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:37:42.530 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:37:43.000 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:37:43.471 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:37:43.942 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:37:44.413 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:37:44.883 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:37:45.277 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:45.277 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:45.277 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:37:45.280 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:45.280 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:45.280 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:45.280 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:45.281 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:45.281 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:45.281 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:45.281 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:45.281 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:37:45.281 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:37:45.281 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:37:45.281 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:45.281 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=6310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:50.288 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:37:50.288 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:37:50.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:50.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:50.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:50.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:50.300 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:50.301 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:37:50.301 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:50.302 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:37:50.302 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:37:50.307 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:37:50.307 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:37:50.307 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:37:50.307 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:50.308 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:50.308 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:37:50.308 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:37:50.308 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:37:50.308 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:50.315 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:37:50.315 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:37:50.316 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:37:50.316 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:50.316 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:50.316 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:37:50.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:37:50.317 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:37:50.317 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:50.321 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:37:50.321 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:37:50.321 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:37:50.321 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:50.322 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:50.322 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:37:50.322 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:37:50.322 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:37:50.322 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:50.329 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:37:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:37:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:37:50.329 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:50.330 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.331 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:37:50.331 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:37:50.331 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:37:50.331 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:37:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.331 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.332 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.333 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:50.333 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:50.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.333 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:50.336 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:37:50.799 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:37:50.863 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:37:50.865 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:37:50.867 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:37:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:50.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:50.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:50.889 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:50.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:50.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:50.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:50.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:50.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:50.919 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:50.919 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:50.919 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:50.919 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:50.937 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:50.937 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:50.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:50.937 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.153 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:51.157 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:51.157 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:51.174 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:51.174 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:51.174 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:51.180 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:51.180 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:51.180 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:51.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:51.182 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.182 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:51.182 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:51.182 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:51.182 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:51.219 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:37:51.219 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:37:51.219 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.220 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.263 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:37:51.334 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:51.335 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:51.335 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:51.336 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:51.544 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:51.548 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:51.548 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:51.548 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:37:51.566 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:51.566 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:51.567 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:51.572 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:51.572 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:51.572 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:51.572 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:51.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:51.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:51.574 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:51.574 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:51.585 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:51.585 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:51.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.585 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:51.729 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:37:52.117 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:52.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:52.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:52.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:52.137 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:52.137 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:52.137 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:52.143 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:52.143 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:52.143 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:52.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:52.145 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:52.145 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:52.145 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:52.145 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:52.145 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:52.195 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:37:52.196 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:37:52.196 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:37:52.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:52.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:52.336 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:52.336 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:52.336 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:52.337 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:52.666 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:37:52.745 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:52.745 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:52.747 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:52.747 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:52.747 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:37:52.755 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:52.756 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:52.760 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:52.761 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:52.761 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:37:52.761 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:37:52.761 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:37:52.761 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=532 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=532 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=532 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:52.762 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=533 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:37:57.762 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:37:57.762 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:37:57.762 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:57.762 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:57.762 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:57.762 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:57.767 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:37:57.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:37:57.768 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:57.768 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:37:57.768 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:37:57.771 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:37:57.771 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:37:57.771 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:37:57.774 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:37:57.774 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:37:57.774 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:57.776 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:37:57.776 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:37:57.776 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:37:57.776 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:37:57.777 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:37:57.777 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:37:57.777 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:37:57.777 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:37:57.777 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:57.779 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:37:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:37:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:37:57.779 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:37:57.780 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:37:57.780 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:37:57.780 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.780 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:37:57.781 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:37:57.785 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:37:58.257 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:37:58.305 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:37:58.306 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:37:58.307 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:58.308 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:37:58.324 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:58.324 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:58.324 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:58.335 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:37:58.335 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:37:58.335 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:37:58.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:37:58.342 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:58.342 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:58.342 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:58.342 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:37:58.342 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:37:58.347 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:37:58.347 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:37:58.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:58.348 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:37:58.728 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:37:58.783 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:58.783 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:37:59.200 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:37:59.673 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:37:59.784 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:37:59.785 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:37:59.785 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:37:59.785 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:38:00.146 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:38:00.618 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:38:00.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:38:00.786 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:38:00.786 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:38:00.786 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:38:01.089 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:38:01.559 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:38:01.787 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:38:01.787 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:38:01.788 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:38:01.788 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:38:02.032 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:38:02.505 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:38:02.788 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:38:02.788 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:38:02.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:38:02.789 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:38:02.977 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:38:03.445 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:38:03.915 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:38:04.385 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:38:04.856 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:38:05.322 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:38:05.792 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:38:06.260 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:38:06.725 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:38:07.192 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:38:07.666 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:38:08.138 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:38:08.611 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:38:09.084 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:38:09.557 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:38:10.027 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:38:10.499 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:38:10.968 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:38:11.440 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:38:11.913 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:38:12.384 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:38:12.855 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:38:13.320 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:38:13.792 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:38:14.264 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:38:14.733 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:38:15.201 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:38:15.665 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:38:16.131 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:38:16.597 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:38:17.062 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:38:17.533 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:38:18.003 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:38:18.474 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:38:18.945 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:38:19.413 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:38:19.883 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:38:20.353 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:38:20.823 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:38:21.289 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:38:21.758 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:38:22.222 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:38:22.691 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:38:23.159 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:38:23.624 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:38:24.095 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:38:24.561 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:38:25.027 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:38:25.494 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:38:25.960 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:38:26.426 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:38:26.892 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:38:27.363 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:38:27.834 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:38:28.305 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:38:28.775 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:38:29.245 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:38:29.712 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:38:30.179 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:38:30.647 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:38:31.115 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:38:31.291 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:38:31.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:38:31.296 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:38:31.296 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:38:31.304 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:38:31.304 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:38:31.304 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:38:31.309 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:38:31.309 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:38:31.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:38:31.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:38:31.310 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:38:31.310 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:38:31.310 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:38:31.310 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:38:31.310 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:38:31.349 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:38:31.349 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:38:31.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:38:31.350 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:38:31.583 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:38:32.050 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:38:32.514 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:38:32.984 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:38:33.450 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:38:33.915 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:38:34.379 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 03:38:34.848 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 03:38:35.312 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 03:38:35.776 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 03:38:36.242 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 03:38:36.709 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 03:38:37.179 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 03:38:37.647 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 03:38:38.121 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 03:38:38.591 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 03:38:39.065 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 03:38:39.531 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 03:38:40.003 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 03:38:40.474 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 03:38:40.938 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 03:38:41.408 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 03:38:41.879 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 03:38:42.350 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 03:38:42.816 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 03:38:43.285 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 03:38:43.753 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 03:38:44.219 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 03:38:44.687 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 03:38:45.153 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 03:38:45.621 [DEBUG] clck_gen.py:113 IND CLOCK 10404
2026-05-06 03:38:46.088 [DEBUG] clck_gen.py:113 IND CLOCK 10506
2026-05-06 03:38:46.554 [DEBUG] clck_gen.py:113 IND CLOCK 10608
2026-05-06 03:38:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 10710
2026-05-06 03:38:47.491 [DEBUG] clck_gen.py:113 IND CLOCK 10812
2026-05-06 03:38:47.963 [DEBUG] clck_gen.py:113 IND CLOCK 10914
2026-05-06 03:38:48.433 [DEBUG] clck_gen.py:113 IND CLOCK 11016
2026-05-06 03:38:48.902 [DEBUG] clck_gen.py:113 IND CLOCK 11118
2026-05-06 03:38:49.370 [DEBUG] clck_gen.py:113 IND CLOCK 11220
2026-05-06 03:38:49.838 [DEBUG] clck_gen.py:113 IND CLOCK 11322
2026-05-06 03:38:50.310 [DEBUG] clck_gen.py:113 IND CLOCK 11424
2026-05-06 03:38:50.782 [DEBUG] clck_gen.py:113 IND CLOCK 11526
2026-05-06 03:38:51.255 [DEBUG] clck_gen.py:113 IND CLOCK 11628
2026-05-06 03:38:51.727 [DEBUG] clck_gen.py:113 IND CLOCK 11730
2026-05-06 03:38:52.198 [DEBUG] clck_gen.py:113 IND CLOCK 11832
2026-05-06 03:38:52.670 [DEBUG] clck_gen.py:113 IND CLOCK 11934
2026-05-06 03:38:53.141 [DEBUG] clck_gen.py:113 IND CLOCK 12036
2026-05-06 03:38:53.606 [DEBUG] clck_gen.py:113 IND CLOCK 12138
2026-05-06 03:38:54.070 [DEBUG] clck_gen.py:113 IND CLOCK 12240
2026-05-06 03:38:54.534 [DEBUG] clck_gen.py:113 IND CLOCK 12342
2026-05-06 03:38:55.001 [DEBUG] clck_gen.py:113 IND CLOCK 12444
2026-05-06 03:38:55.468 [DEBUG] clck_gen.py:113 IND CLOCK 12546
2026-05-06 03:38:55.939 [DEBUG] clck_gen.py:113 IND CLOCK 12648
2026-05-06 03:38:56.412 [DEBUG] clck_gen.py:113 IND CLOCK 12750
2026-05-06 03:38:56.884 [DEBUG] clck_gen.py:113 IND CLOCK 12852
2026-05-06 03:38:57.356 [DEBUG] clck_gen.py:113 IND CLOCK 12954
2026-05-06 03:38:57.827 [DEBUG] clck_gen.py:113 IND CLOCK 13056
2026-05-06 03:38:58.293 [DEBUG] clck_gen.py:113 IND CLOCK 13158
2026-05-06 03:38:58.763 [DEBUG] clck_gen.py:113 IND CLOCK 13260
2026-05-06 03:38:59.232 [DEBUG] clck_gen.py:113 IND CLOCK 13362
2026-05-06 03:38:59.703 [DEBUG] clck_gen.py:113 IND CLOCK 13464
2026-05-06 03:39:00.176 [DEBUG] clck_gen.py:113 IND CLOCK 13566
2026-05-06 03:39:00.649 [DEBUG] clck_gen.py:113 IND CLOCK 13668
2026-05-06 03:39:01.121 [DEBUG] clck_gen.py:113 IND CLOCK 13770
2026-05-06 03:39:01.594 [DEBUG] clck_gen.py:113 IND CLOCK 13872
2026-05-06 03:39:02.066 [DEBUG] clck_gen.py:113 IND CLOCK 13974
2026-05-06 03:39:02.539 [DEBUG] clck_gen.py:113 IND CLOCK 14076
2026-05-06 03:39:03.009 [DEBUG] clck_gen.py:113 IND CLOCK 14178
2026-05-06 03:39:03.477 [DEBUG] clck_gen.py:113 IND CLOCK 14280
2026-05-06 03:39:03.950 [DEBUG] clck_gen.py:113 IND CLOCK 14382
2026-05-06 03:39:04.421 [DEBUG] clck_gen.py:113 IND CLOCK 14484
2026-05-06 03:39:04.893 [DEBUG] clck_gen.py:113 IND CLOCK 14586
2026-05-06 03:39:04.900 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:04.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:39:04.904 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:04.904 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:04.904 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:39:04.914 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:04.914 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:04.914 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:39:04.919 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:04.919 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:04.919 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:39:04.920 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:39:04.921 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:04.921 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:39:04.921 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:39:04.921 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:39:04.921 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:39:04.935 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:39:04.935 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:39:04.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:04.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:05.363 [DEBUG] clck_gen.py:113 IND CLOCK 14688
2026-05-06 03:39:05.833 [DEBUG] clck_gen.py:113 IND CLOCK 14790
2026-05-06 03:39:06.302 [DEBUG] clck_gen.py:113 IND CLOCK 14892
2026-05-06 03:39:06.770 [DEBUG] clck_gen.py:113 IND CLOCK 14994
2026-05-06 03:39:07.242 [DEBUG] clck_gen.py:113 IND CLOCK 15096
2026-05-06 03:39:07.712 [DEBUG] clck_gen.py:113 IND CLOCK 15198
2026-05-06 03:39:08.180 [DEBUG] clck_gen.py:113 IND CLOCK 15300
2026-05-06 03:39:08.647 [DEBUG] clck_gen.py:113 IND CLOCK 15402
2026-05-06 03:39:09.116 [DEBUG] clck_gen.py:113 IND CLOCK 15504
2026-05-06 03:39:09.585 [DEBUG] clck_gen.py:113 IND CLOCK 15606
2026-05-06 03:39:10.050 [DEBUG] clck_gen.py:113 IND CLOCK 15708
2026-05-06 03:39:10.516 [DEBUG] clck_gen.py:113 IND CLOCK 15810
2026-05-06 03:39:10.980 [DEBUG] clck_gen.py:113 IND CLOCK 15912
2026-05-06 03:39:11.448 [DEBUG] clck_gen.py:113 IND CLOCK 16014
2026-05-06 03:39:11.915 [DEBUG] clck_gen.py:113 IND CLOCK 16116
2026-05-06 03:39:12.381 [DEBUG] clck_gen.py:113 IND CLOCK 16218
2026-05-06 03:39:12.849 [DEBUG] clck_gen.py:113 IND CLOCK 16320
2026-05-06 03:39:13.317 [DEBUG] clck_gen.py:113 IND CLOCK 16422
2026-05-06 03:39:13.785 [DEBUG] clck_gen.py:113 IND CLOCK 16524
2026-05-06 03:39:14.257 [DEBUG] clck_gen.py:113 IND CLOCK 16626
2026-05-06 03:39:14.729 [DEBUG] clck_gen.py:113 IND CLOCK 16728
2026-05-06 03:39:15.200 [DEBUG] clck_gen.py:113 IND CLOCK 16830
2026-05-06 03:39:15.673 [DEBUG] clck_gen.py:113 IND CLOCK 16932
2026-05-06 03:39:16.146 [DEBUG] clck_gen.py:113 IND CLOCK 17034
2026-05-06 03:39:16.618 [DEBUG] clck_gen.py:113 IND CLOCK 17136
2026-05-06 03:39:17.087 [DEBUG] clck_gen.py:113 IND CLOCK 17238
2026-05-06 03:39:17.557 [DEBUG] clck_gen.py:113 IND CLOCK 17340
2026-05-06 03:39:18.030 [DEBUG] clck_gen.py:113 IND CLOCK 17442
2026-05-06 03:39:18.502 [DEBUG] clck_gen.py:113 IND CLOCK 17544
2026-05-06 03:39:18.972 [DEBUG] clck_gen.py:113 IND CLOCK 17646
2026-05-06 03:39:19.443 [DEBUG] clck_gen.py:113 IND CLOCK 17748
2026-05-06 03:39:19.909 [DEBUG] clck_gen.py:113 IND CLOCK 17850
2026-05-06 03:39:20.374 [DEBUG] clck_gen.py:113 IND CLOCK 17952
2026-05-06 03:39:20.840 [DEBUG] clck_gen.py:113 IND CLOCK 18054
2026-05-06 03:39:21.308 [DEBUG] clck_gen.py:113 IND CLOCK 18156
2026-05-06 03:39:21.776 [DEBUG] clck_gen.py:113 IND CLOCK 18258
2026-05-06 03:39:22.244 [DEBUG] clck_gen.py:113 IND CLOCK 18360
2026-05-06 03:39:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 18462
2026-05-06 03:39:23.177 [DEBUG] clck_gen.py:113 IND CLOCK 18564
2026-05-06 03:39:23.645 [DEBUG] clck_gen.py:113 IND CLOCK 18666
2026-05-06 03:39:24.111 [DEBUG] clck_gen.py:113 IND CLOCK 18768
2026-05-06 03:39:24.580 [DEBUG] clck_gen.py:113 IND CLOCK 18870
2026-05-06 03:39:25.051 [DEBUG] clck_gen.py:113 IND CLOCK 18972
2026-05-06 03:39:25.518 [DEBUG] clck_gen.py:113 IND CLOCK 19074
2026-05-06 03:39:25.983 [DEBUG] clck_gen.py:113 IND CLOCK 19176
2026-05-06 03:39:26.450 [DEBUG] clck_gen.py:113 IND CLOCK 19278
2026-05-06 03:39:26.916 [DEBUG] clck_gen.py:113 IND CLOCK 19380
2026-05-06 03:39:27.382 [DEBUG] clck_gen.py:113 IND CLOCK 19482
2026-05-06 03:39:27.851 [DEBUG] clck_gen.py:113 IND CLOCK 19584
2026-05-06 03:39:28.319 [DEBUG] clck_gen.py:113 IND CLOCK 19686
2026-05-06 03:39:28.790 [DEBUG] clck_gen.py:113 IND CLOCK 19788
2026-05-06 03:39:29.261 [DEBUG] clck_gen.py:113 IND CLOCK 19890
2026-05-06 03:39:29.731 [DEBUG] clck_gen.py:113 IND CLOCK 19992
2026-05-06 03:39:30.202 [DEBUG] clck_gen.py:113 IND CLOCK 20094
2026-05-06 03:39:30.676 [DEBUG] clck_gen.py:113 IND CLOCK 20196
2026-05-06 03:39:31.148 [DEBUG] clck_gen.py:113 IND CLOCK 20298
2026-05-06 03:39:31.618 [DEBUG] clck_gen.py:113 IND CLOCK 20400
2026-05-06 03:39:32.091 [DEBUG] clck_gen.py:113 IND CLOCK 20502
2026-05-06 03:39:32.563 [DEBUG] clck_gen.py:113 IND CLOCK 20604
2026-05-06 03:39:33.033 [DEBUG] clck_gen.py:113 IND CLOCK 20706
2026-05-06 03:39:33.504 [DEBUG] clck_gen.py:113 IND CLOCK 20808
2026-05-06 03:39:33.972 [DEBUG] clck_gen.py:113 IND CLOCK 20910
2026-05-06 03:39:34.439 [DEBUG] clck_gen.py:113 IND CLOCK 21012
2026-05-06 03:39:34.904 [DEBUG] clck_gen.py:113 IND CLOCK 21114
2026-05-06 03:39:35.376 [DEBUG] clck_gen.py:113 IND CLOCK 21216
2026-05-06 03:39:35.840 [DEBUG] clck_gen.py:113 IND CLOCK 21318
2026-05-06 03:39:36.305 [DEBUG] clck_gen.py:113 IND CLOCK 21420
2026-05-06 03:39:36.769 [DEBUG] clck_gen.py:113 IND CLOCK 21522
2026-05-06 03:39:37.238 [DEBUG] clck_gen.py:113 IND CLOCK 21624
2026-05-06 03:39:37.709 [DEBUG] clck_gen.py:113 IND CLOCK 21726
2026-05-06 03:39:38.180 [DEBUG] clck_gen.py:113 IND CLOCK 21828
2026-05-06 03:39:38.645 [DEBUG] clck_gen.py:113 IND CLOCK 21930
2026-05-06 03:39:39.112 [DEBUG] clck_gen.py:113 IND CLOCK 22032
2026-05-06 03:39:39.583 [DEBUG] clck_gen.py:113 IND CLOCK 22134
2026-05-06 03:39:40.038 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:39:40.038 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:40.049 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:40.049 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:40.053 [DEBUG] clck_gen.py:113 IND CLOCK 22236
2026-05-06 03:39:40.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:40.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:40.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:39:40.065 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:40.065 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:40.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:39:40.066 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:39:40.067 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:40.067 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:39:40.067 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:39:40.067 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:39:40.067 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:39:40.098 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:39:40.098 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:39:40.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:40.098 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:39:40.517 [DEBUG] clck_gen.py:113 IND CLOCK 22338
2026-05-06 03:39:40.982 [DEBUG] clck_gen.py:113 IND CLOCK 22440
2026-05-06 03:39:41.447 [DEBUG] clck_gen.py:113 IND CLOCK 22542
2026-05-06 03:39:41.914 [DEBUG] clck_gen.py:113 IND CLOCK 22644
2026-05-06 03:39:42.379 [DEBUG] clck_gen.py:113 IND CLOCK 22746
2026-05-06 03:39:42.843 [DEBUG] clck_gen.py:113 IND CLOCK 22848
2026-05-06 03:39:43.308 [DEBUG] clck_gen.py:113 IND CLOCK 22950
2026-05-06 03:39:43.775 [DEBUG] clck_gen.py:113 IND CLOCK 23052
2026-05-06 03:39:44.249 [DEBUG] clck_gen.py:113 IND CLOCK 23154
2026-05-06 03:39:44.715 [DEBUG] clck_gen.py:113 IND CLOCK 23256
2026-05-06 03:39:45.179 [DEBUG] clck_gen.py:113 IND CLOCK 23358
2026-05-06 03:39:45.644 [DEBUG] clck_gen.py:113 IND CLOCK 23460
2026-05-06 03:39:46.115 [DEBUG] clck_gen.py:113 IND CLOCK 23562
2026-05-06 03:39:46.587 [DEBUG] clck_gen.py:113 IND CLOCK 23664
2026-05-06 03:39:47.060 [DEBUG] clck_gen.py:113 IND CLOCK 23766
2026-05-06 03:39:47.533 [DEBUG] clck_gen.py:113 IND CLOCK 23868
2026-05-06 03:39:48.004 [DEBUG] clck_gen.py:113 IND CLOCK 23970
2026-05-06 03:39:48.478 [DEBUG] clck_gen.py:113 IND CLOCK 24072
2026-05-06 03:39:48.949 [DEBUG] clck_gen.py:113 IND CLOCK 24174
2026-05-06 03:39:49.422 [DEBUG] clck_gen.py:113 IND CLOCK 24276
2026-05-06 03:39:49.892 [DEBUG] clck_gen.py:113 IND CLOCK 24378
2026-05-06 03:39:50.364 [DEBUG] clck_gen.py:113 IND CLOCK 24480
2026-05-06 03:39:50.837 [DEBUG] clck_gen.py:113 IND CLOCK 24582
2026-05-06 03:39:51.308 [DEBUG] clck_gen.py:113 IND CLOCK 24684
2026-05-06 03:39:51.780 [DEBUG] clck_gen.py:113 IND CLOCK 24786
2026-05-06 03:39:52.250 [DEBUG] clck_gen.py:113 IND CLOCK 24888
2026-05-06 03:39:52.722 [DEBUG] clck_gen.py:113 IND CLOCK 24990
2026-05-06 03:39:53.192 [DEBUG] clck_gen.py:113 IND CLOCK 25092
2026-05-06 03:39:53.664 [DEBUG] clck_gen.py:113 IND CLOCK 25194
2026-05-06 03:39:54.134 [DEBUG] clck_gen.py:113 IND CLOCK 25296
2026-05-06 03:39:54.603 [DEBUG] clck_gen.py:113 IND CLOCK 25398
2026-05-06 03:39:55.067 [DEBUG] clck_gen.py:113 IND CLOCK 25500
2026-05-06 03:39:55.534 [DEBUG] clck_gen.py:113 IND CLOCK 25602
2026-05-06 03:39:55.862 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:39:55.863 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:39:55.863 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:39:55.867 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:39:55.867 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:39:55.867 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:39:55.867 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:39:55.869 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:39:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:39:55.869 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:39:55.869 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:39:55.869 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:39:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:39:55.869 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:39:55.869 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=25677 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:00.873 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:40:00.873 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:40:00.874 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:00.874 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:00.874 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:00.874 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:00.881 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:00.881 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:40:00.881 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:00.882 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:40:00.882 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:40:00.885 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:40:00.885 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:40:00.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:40:00.885 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:00.885 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:00.885 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:40:00.885 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:40:00.886 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:40:00.886 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:00.889 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:40:00.890 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:40:00.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:40:00.890 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:00.890 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:00.890 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:40:00.890 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:40:00.890 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:40:00.890 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:00.894 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:40:00.894 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:40:00.894 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:40:00.894 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:00.894 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:00.894 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:40:00.895 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:40:00.895 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:40:00.895 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.900 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:40:00.901 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:40:00.901 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:40:00.901 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.901 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.902 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.902 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.902 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.902 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.903 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:00.904 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:40:00.904 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:40:00.904 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:40:05.911 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:40:05.911 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:40:05.911 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:05.911 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:05.911 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:05.911 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:05.919 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:05.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:40:05.920 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:05.920 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:40:05.920 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:40:05.924 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:40:05.924 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:40:05.924 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:40:05.924 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:05.925 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:40:05.925 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:05.925 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:40:05.925 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:40:05.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:05.929 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:40:05.930 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:40:05.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:40:05.930 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:05.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:05.930 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:40:05.930 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:40:05.930 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:40:05.931 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:05.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:40:05.935 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:40:05.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:40:05.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:05.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:05.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:40:05.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:40:05.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:40:05.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:05.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:40:05.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:40:05.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:40:05.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.941 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:40:05.941 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:40:05.941 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:40:05.941 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.942 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.943 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:05.946 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:40:06.424 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:40:06.469 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:40:06.470 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:40:06.471 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:06.472 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:40:06.484 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:06.484 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:06.485 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:06.495 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:06.495 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:06.495 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:06.496 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:06.497 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:06.497 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:06.497 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:06.497 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:06.497 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:06.512 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:06.512 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:06.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:06.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:06.894 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:40:06.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:06.944 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:06.945 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:06.945 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:07.364 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:40:07.833 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:40:07.935 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:07.936 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:07.936 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:07.936 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:07.944 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:07.944 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:07.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:07.944 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:07.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:07.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:07.946 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:07.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:07.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:07.949 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:07.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:07.951 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:07.951 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:07.951 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:07.951 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:07.951 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:07.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:40:07.967 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:40:07.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:07.968 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:08.298 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:40:08.764 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:40:08.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:08.946 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:08.946 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:08.947 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:09.231 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:40:09.702 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:40:09.945 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:09.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:09.947 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:09.948 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:10.170 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:40:10.197 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:10.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:10.201 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:10.201 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:10.201 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:40:10.215 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:10.216 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:10.216 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:10.222 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:10.222 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:10.222 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:10.222 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:10.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:10.223 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:10.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:10.223 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:10.223 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:10.256 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:10.256 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:10.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:10.256 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:10.639 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:40:10.946 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:10.948 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:10.948 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:10.949 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:11.113 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:40:11.585 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:40:12.057 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:40:12.528 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:40:12.999 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:40:13.470 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:40:13.621 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:13.621 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:13.622 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:13.622 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:13.629 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:13.629 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:13.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:13.634 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:13.634 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:13.634 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:13.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:13.635 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:13.635 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:13.635 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:13.635 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:13.635 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:13.649 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:40:13.649 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:40:13.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:13.649 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:13.940 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:40:14.412 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:40:14.885 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:40:14.963 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:14.963 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:14.964 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:40:14.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:14.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:14.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:14.969 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:14.969 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:14.969 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:40:14.969 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:40:14.969 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:40:14.969 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:14.969 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:14.969 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1959 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:40:19.974 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:40:19.974 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:40:19.974 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:19.974 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:19.974 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:19.974 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:19.983 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:40:19.985 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:40:19.985 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:19.986 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:40:19.986 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:40:19.991 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:40:19.991 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:40:19.991 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:40:19.991 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:19.992 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:40:19.992 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:40:19.992 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:40:19.992 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:40:19.992 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:19.996 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:40:19.996 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:40:19.996 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:40:19.996 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:19.997 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:40:19.997 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:40:19.997 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:40:19.997 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:40:19.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:20.000 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:40:20.000 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:40:20.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:40:20.001 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:40:20.001 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:40:20.001 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:40:20.001 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:40:20.001 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:40:20.001 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:20.006 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:40:20.007 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:40:20.007 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:40:20.007 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.007 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:40:20.008 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:40:20.012 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:40:20.490 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:40:20.537 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:40:20.540 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:40:20.541 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:20.544 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:40:20.567 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:20.567 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:20.568 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:20.589 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:20.589 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:20.590 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:20.591 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:20.596 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:20.596 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:20.596 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:20.597 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:20.597 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:20.628 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:20.628 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:20.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:20.629 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:20.962 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:40:21.010 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:21.010 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:21.010 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:21.012 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:21.432 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:40:21.904 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:40:22.011 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:22.012 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:22.012 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:22.014 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:22.375 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:40:22.845 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:40:23.013 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:23.013 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:23.013 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:23.015 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:23.316 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:40:23.789 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:40:24.014 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:24.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:24.015 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:24.017 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:24.262 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:40:24.735 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:40:25.015 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:40:25.015 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:40:25.016 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:40:25.018 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:40:25.208 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:40:25.681 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:40:26.153 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:40:26.626 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:40:27.099 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:40:27.571 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:40:28.041 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:40:28.513 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:40:28.984 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:40:29.455 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:40:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:40:30.401 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:40:30.873 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:40:31.346 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:40:31.819 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:40:32.292 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:40:32.765 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:40:33.238 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:40:33.710 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:40:34.179 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:40:34.652 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:40:35.124 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:40:35.598 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:40:35.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:35.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:35.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:35.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:35.910 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:35.910 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:35.910 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:35.915 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:35.915 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:35.916 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:35.916 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:35.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:35.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:35.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:35.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:35.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:35.967 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:40:35.967 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:40:35.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:35.967 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:36.068 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:40:36.541 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:40:37.013 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:40:37.485 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:40:37.957 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:40:38.429 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:40:38.901 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:40:39.372 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:40:39.842 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:40:40.309 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:40:40.774 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:40:41.242 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:40:41.715 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:40:42.188 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:40:42.660 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:40:43.130 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:40:43.601 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:40:44.074 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:40:44.546 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:40:45.018 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:40:45.490 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:40:45.961 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:40:46.432 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:40:46.905 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:40:47.378 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:40:47.850 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:40:48.320 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:40:48.793 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:40:49.267 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:40:49.737 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:40:50.210 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:40:50.682 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:40:51.030 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:51.033 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:51.036 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:51.036 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:51.036 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:40:51.053 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:51.053 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:51.053 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:51.059 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:40:51.059 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:40:51.059 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:40:51.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:40:51.060 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:51.060 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:51.060 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:51.060 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:40:51.060 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:40:51.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:40:51.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:40:51.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:51.101 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:40:51.153 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:40:51.627 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:40:52.099 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:40:52.570 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:40:53.041 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:40:53.514 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:40:53.987 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:40:54.459 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:40:54.929 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:40:55.400 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:40:55.871 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:40:56.342 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:40:56.812 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 03:40:57.279 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 03:40:57.744 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 03:40:58.211 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 03:40:58.678 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 03:40:59.144 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 03:40:59.609 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 03:41:00.075 [DEBUG] clck_gen.py:113 IND CLOCK 8670
2026-05-06 03:41:00.541 [DEBUG] clck_gen.py:113 IND CLOCK 8772
2026-05-06 03:41:01.008 [DEBUG] clck_gen.py:113 IND CLOCK 8874
2026-05-06 03:41:01.474 [DEBUG] clck_gen.py:113 IND CLOCK 8976
2026-05-06 03:41:01.940 [DEBUG] clck_gen.py:113 IND CLOCK 9078
2026-05-06 03:41:02.405 [DEBUG] clck_gen.py:113 IND CLOCK 9180
2026-05-06 03:41:02.872 [DEBUG] clck_gen.py:113 IND CLOCK 9282
2026-05-06 03:41:03.343 [DEBUG] clck_gen.py:113 IND CLOCK 9384
2026-05-06 03:41:03.808 [DEBUG] clck_gen.py:113 IND CLOCK 9486
2026-05-06 03:41:04.273 [DEBUG] clck_gen.py:113 IND CLOCK 9588
2026-05-06 03:41:04.737 [DEBUG] clck_gen.py:113 IND CLOCK 9690
2026-05-06 03:41:05.173 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:05.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:05.177 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:05.178 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:05.192 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:05.192 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:05.192 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:05.199 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:05.199 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:05.199 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:05.199 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:05.201 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:05.201 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:05.201 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:05.201 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:05.201 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:05.202 [DEBUG] clck_gen.py:113 IND CLOCK 9792
2026-05-06 03:41:05.203 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:41:05.203 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:41:05.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:05.203 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:05.671 [DEBUG] clck_gen.py:113 IND CLOCK 9894
2026-05-06 03:41:06.136 [DEBUG] clck_gen.py:113 IND CLOCK 9996
2026-05-06 03:41:06.600 [DEBUG] clck_gen.py:113 IND CLOCK 10098
2026-05-06 03:41:07.064 [DEBUG] clck_gen.py:113 IND CLOCK 10200
2026-05-06 03:41:07.531 [DEBUG] clck_gen.py:113 IND CLOCK 10302
2026-05-06 03:41:07.920 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:07.921 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:07.921 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:41:07.925 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:07.925 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:07.925 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:07.925 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:07.927 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:41:07.927 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:41:07.927 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:41:07.927 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:41:07.927 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:41:07.927 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:41:07.927 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:41:07.927 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=10390 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:41:07.927 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=10390 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:41:07.927 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=10390 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:41:07.927 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=10390 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:41:12.932 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:41:12.932 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:41:12.932 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:41:12.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:41:12.932 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:41:12.932 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:41:12.941 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:41:12.942 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:41:12.942 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:12.943 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:41:12.943 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:41:12.946 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:41:12.947 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:41:12.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:41:12.947 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:12.947 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:41:12.947 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:41:12.947 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:41:12.947 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:41:12.947 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:12.950 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:41:12.951 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:41:12.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:41:12.951 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:12.951 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:41:12.951 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:41:12.951 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:41:12.951 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:41:12.952 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:12.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:41:12.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:41:12.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:41:12.955 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:12.955 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:41:12.955 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:41:12.955 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:41:12.955 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:41:12.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:12.960 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.961 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:41:12.962 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:41:12.962 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:41:12.962 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.962 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.963 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.964 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:12.966 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:41:13.436 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:41:13.489 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:41:13.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:13.491 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:41:13.493 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:41:13.512 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:13.512 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:13.513 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:13.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:13.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:13.531 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:13.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:13.537 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:13.537 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:13.537 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:13.537 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:13.537 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:13.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:13.574 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:13.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:13.575 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:13.907 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:41:13.965 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:13.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:13.966 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:13.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:14.379 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:41:14.852 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:41:14.966 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:14.966 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:14.967 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:15.323 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:41:15.793 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:41:15.967 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:15.967 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:15.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:15.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:41:16.734 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:41:16.969 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:16.969 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:16.969 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:16.969 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:17.205 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:41:17.676 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:41:17.970 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:17.970 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:17.971 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:17.971 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:18.146 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:41:18.617 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:41:19.088 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:41:19.559 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:41:20.029 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:41:20.500 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:41:20.971 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:41:21.441 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:41:21.912 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:41:22.383 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:41:22.854 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:41:23.325 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:41:23.795 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:41:24.000 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:24.001 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:24.004 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:24.005 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:24.019 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:24.019 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:24.019 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:24.024 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:24.024 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:24.024 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:24.025 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:24.026 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:24.026 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:24.026 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:24.026 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:24.026 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:24.076 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:41:24.076 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:41:24.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:24.077 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:24.267 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:41:24.740 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:41:25.213 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:41:25.686 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:41:26.160 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:41:26.633 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:41:27.103 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:41:27.576 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:41:28.049 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:41:28.521 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:41:28.991 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:41:29.457 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:41:29.928 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:41:30.393 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:41:30.864 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:41:31.336 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:41:31.807 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:41:32.278 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:41:32.749 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:41:33.220 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:41:33.691 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:41:34.158 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:41:34.322 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:34.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:34.325 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:34.325 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:34.325 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:41:34.337 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:34.338 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:34.338 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:34.343 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:34.343 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:34.343 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:34.344 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:34.345 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:34.345 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:34.345 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:34.345 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:34.345 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:34.390 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:34.391 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:34.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:34.391 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:34.627 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:41:35.098 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:41:35.569 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:41:36.034 [DEBUG] clck_gen.py:113 IND CLOCK 4998
2026-05-06 03:41:36.502 [DEBUG] clck_gen.py:113 IND CLOCK 5100
2026-05-06 03:41:36.967 [DEBUG] clck_gen.py:113 IND CLOCK 5202
2026-05-06 03:41:37.434 [DEBUG] clck_gen.py:113 IND CLOCK 5304
2026-05-06 03:41:37.905 [DEBUG] clck_gen.py:113 IND CLOCK 5406
2026-05-06 03:41:38.376 [DEBUG] clck_gen.py:113 IND CLOCK 5508
2026-05-06 03:41:38.847 [DEBUG] clck_gen.py:113 IND CLOCK 5610
2026-05-06 03:41:39.320 [DEBUG] clck_gen.py:113 IND CLOCK 5712
2026-05-06 03:41:39.793 [DEBUG] clck_gen.py:113 IND CLOCK 5814
2026-05-06 03:41:40.265 [DEBUG] clck_gen.py:113 IND CLOCK 5916
2026-05-06 03:41:40.733 [DEBUG] clck_gen.py:113 IND CLOCK 6018
2026-05-06 03:41:41.206 [DEBUG] clck_gen.py:113 IND CLOCK 6120
2026-05-06 03:41:41.245 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:41.246 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:41.250 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:41.250 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:41.270 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:41.270 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:41.270 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:41.275 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:41.275 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:41.275 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:41.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:41.276 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:41.277 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:41.277 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:41.277 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:41.277 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:41.296 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:41:41.296 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:41:41.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:41.297 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:41.677 [DEBUG] clck_gen.py:113 IND CLOCK 6222
2026-05-06 03:41:42.150 [DEBUG] clck_gen.py:113 IND CLOCK 6324
2026-05-06 03:41:42.620 [DEBUG] clck_gen.py:113 IND CLOCK 6426
2026-05-06 03:41:43.087 [DEBUG] clck_gen.py:113 IND CLOCK 6528
2026-05-06 03:41:43.553 [DEBUG] clck_gen.py:113 IND CLOCK 6630
2026-05-06 03:41:44.025 [DEBUG] clck_gen.py:113 IND CLOCK 6732
2026-05-06 03:41:44.491 [DEBUG] clck_gen.py:113 IND CLOCK 6834
2026-05-06 03:41:44.957 [DEBUG] clck_gen.py:113 IND CLOCK 6936
2026-05-06 03:41:45.421 [DEBUG] clck_gen.py:113 IND CLOCK 7038
2026-05-06 03:41:45.891 [DEBUG] clck_gen.py:113 IND CLOCK 7140
2026-05-06 03:41:46.355 [DEBUG] clck_gen.py:113 IND CLOCK 7242
2026-05-06 03:41:46.820 [DEBUG] clck_gen.py:113 IND CLOCK 7344
2026-05-06 03:41:47.284 [DEBUG] clck_gen.py:113 IND CLOCK 7446
2026-05-06 03:41:47.749 [DEBUG] clck_gen.py:113 IND CLOCK 7548
2026-05-06 03:41:48.217 [DEBUG] clck_gen.py:113 IND CLOCK 7650
2026-05-06 03:41:48.688 [DEBUG] clck_gen.py:113 IND CLOCK 7752
2026-05-06 03:41:49.158 [DEBUG] clck_gen.py:113 IND CLOCK 7854
2026-05-06 03:41:49.621 [DEBUG] clck_gen.py:113 IND CLOCK 7956
2026-05-06 03:41:50.092 [DEBUG] clck_gen.py:113 IND CLOCK 8058
2026-05-06 03:41:50.558 [DEBUG] clck_gen.py:113 IND CLOCK 8160
2026-05-06 03:41:51.024 [DEBUG] clck_gen.py:113 IND CLOCK 8262
2026-05-06 03:41:51.496 [DEBUG] clck_gen.py:113 IND CLOCK 8364
2026-05-06 03:41:51.960 [DEBUG] clck_gen.py:113 IND CLOCK 8466
2026-05-06 03:41:52.423 [DEBUG] clck_gen.py:113 IND CLOCK 8568
2026-05-06 03:41:52.546 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:52.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:52.550 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:52.550 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:52.550 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:41:52.557 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:41:52.557 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:41:52.557 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:41:52.558 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:41:52.558 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:41:57.563 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:41:57.563 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:41:57.564 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:41:57.564 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:41:57.564 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:41:57.564 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:41:57.570 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:41:57.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:41:57.571 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:57.571 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:41:57.571 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:41:57.573 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:41:57.573 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:41:57.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:41:57.574 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:57.574 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:41:57.574 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:41:57.574 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:41:57.574 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:41:57.574 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:41:57.576 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:41:57.576 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:41:57.576 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:57.577 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:41:57.578 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:41:57.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:41:57.578 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:41:57.578 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:41:57.578 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:41:57.578 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:41:57.578 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:41:57.578 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:41:57.580 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:41:57.580 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:41:57.580 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.580 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:41:57.581 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:41:57.585 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:41:58.048 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:41:58.109 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:41:58.110 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:58.112 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:41:58.113 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:41:58.134 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:58.134 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:58.134 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:58.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:58.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:58.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:58.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:58.161 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.161 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:58.161 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:58.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:58.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:58.185 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:58.186 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:58.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.186 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.503 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.504 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:58.507 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:58.507 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:58.515 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:41:58.525 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:58.525 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:58.526 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:58.531 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:58.531 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:58.532 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:58.532 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:58.534 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.534 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:58.534 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:58.534 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:58.534 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:58.560 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:41:58.560 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:41:58.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:58.582 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:58.582 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:58.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:58.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:58.985 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:41:59.036 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.037 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:59.042 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:59.042 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:59.042 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:41:59.058 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:59.058 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:59.058 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:59.063 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:59.063 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:59.063 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:59.064 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:59.065 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.065 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:59.065 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:59.065 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:59.065 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:59.069 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:59.069 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:59.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.069 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.457 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:41:59.583 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:41:59.583 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:41:59.583 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:41:59.583 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:41:59.848 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.849 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:59.853 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:59.853 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:59.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:59.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:59.870 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:59.876 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:41:59.876 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:41:59.876 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:41:59.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:41:59.878 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.878 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:41:59.878 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:41:59.878 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:41:59.878 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:41:59.927 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:41:59.927 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:41:59.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.928 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:41:59.928 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:42:00.400 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:42:00.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:00.584 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:00.584 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:00.584 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:00.873 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:42:01.345 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:42:01.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:01.585 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:01.585 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:01.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:01.817 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:42:02.288 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:42:02.586 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:02.586 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:02.586 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:02.586 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:02.758 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:42:03.230 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:42:03.703 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:42:03.953 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:03.954 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:03.957 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:03.957 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:03.957 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:42:03.968 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:03.968 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:03.968 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:03.968 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:03.972 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:03.972 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:03.973 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:42:03.973 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:42:03.973 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:42:03.973 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:03.973 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:03.973 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:03.973 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:03.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:03.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:03.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:03.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:03.974 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=1387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:08.975 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:42:08.975 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:42:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:08.975 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:08.975 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:08.981 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:08.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:42:08.981 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:08.981 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:42:08.982 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:42:08.984 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:42:08.984 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:42:08.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:42:08.984 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:08.984 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:08.984 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:42:08.984 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:42:08.984 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:42:08.985 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:08.986 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:42:08.987 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:42:08.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:42:08.987 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:08.987 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:08.987 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:42:08.987 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:42:08.987 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:42:08.987 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:42:08.989 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:42:08.989 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:42:08.989 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:08.991 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:42:08.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:42:08.991 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:42:08.991 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:42:08.991 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:42:08.991 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:42:08.992 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:42:08.992 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:42:08.992 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.993 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:08.997 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:42:09.467 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:42:09.519 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:42:09.520 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:42:09.521 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:42:09.522 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:09.538 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:09.538 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:09.539 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:09.556 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:09.556 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:09.557 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:09.559 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:09.563 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:09.564 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:09.564 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:09.564 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:09.564 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:09.604 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:09.605 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:09.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:09.605 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:09.937 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:42:09.994 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:09.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:09.995 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:09.995 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:10.409 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:42:10.881 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:42:10.995 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:10.995 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:10.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:10.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:11.353 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:42:11.821 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:42:11.996 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:11.996 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:11.996 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:11.996 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:12.286 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:42:12.752 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:42:12.831 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:12.832 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:12.835 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:12.835 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:12.852 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:12.852 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:12.852 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:12.858 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:12.858 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:12.858 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:12.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:12.860 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:12.860 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:12.860 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:12.860 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:12.860 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:12.887 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:42:12.887 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:42:12.887 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:12.888 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:12.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:12.997 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:12.997 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:12.997 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:13.219 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:42:13.688 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:42:13.997 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:13.998 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:13.998 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:13.998 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:14.154 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:42:14.624 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:42:15.091 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:42:15.557 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:42:16.027 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:42:16.233 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:16.234 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:16.237 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:16.237 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:16.237 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:42:16.257 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:16.257 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:16.257 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:16.263 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:16.263 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:16.263 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:16.264 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:16.266 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:16.266 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:16.266 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:16.266 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:16.266 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:16.308 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:16.309 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:16.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:16.309 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:16.495 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:42:16.964 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:42:17.436 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:42:17.906 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:42:18.377 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:42:18.847 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:42:19.317 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:42:19.789 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:42:19.944 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:19.945 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:19.949 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:19.949 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:19.966 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:19.966 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:19.966 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:19.973 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:19.973 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:19.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:19.973 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:19.974 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:19.974 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:19.974 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:19.974 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:19.974 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:20.024 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:42:20.024 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:42:20.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:20.025 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:20.257 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:42:20.728 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:42:21.201 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:42:21.674 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:42:22.147 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:42:22.619 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:42:23.091 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:42:23.562 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:42:24.034 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:42:24.111 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:24.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:24.112 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:24.112 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:24.112 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:42:24.114 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:24.114 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:24.114 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:24.114 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:24.115 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:24.115 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:24.115 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:42:24.115 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:42:24.115 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:42:24.115 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:24.115 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:24.115 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:42:29.122 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:42:29.122 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:42:29.122 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:29.122 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:29.122 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:29.122 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:29.129 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:29.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:42:29.129 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:29.129 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:42:29.129 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:42:29.132 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:42:29.132 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:42:29.132 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:42:29.132 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:29.133 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:29.133 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:42:29.133 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:42:29.133 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:42:29.133 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:29.134 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:42:29.135 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:42:29.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:42:29.135 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:29.135 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:29.135 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:42:29.135 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:42:29.135 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:42:29.135 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:42:29.137 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:42:29.137 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:42:29.137 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.139 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:42:29.139 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:42:29.139 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:42:29.139 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:29.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:29.144 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:42:29.616 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:42:29.655 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:42:29.656 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:42:29.658 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:42:29.658 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:29.674 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:29.674 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:29.675 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:29.696 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:29.696 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:29.696 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:29.698 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:29.704 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:29.704 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:29.705 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:29.705 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:29.705 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:29.753 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:29.753 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:29.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:29.754 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.087 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:42:30.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.132 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:30.135 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:30.135 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:30.142 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:30.142 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:30.143 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:30.143 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:30.154 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:30.154 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:30.154 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:30.160 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:30.160 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:30.160 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:30.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:30.162 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.162 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:30.162 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:30.162 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:30.162 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:30.177 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:42:30.177 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:42:30.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.177 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.555 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:42:30.768 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.769 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:30.772 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:30.772 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:30.772 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:42:30.791 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:30.791 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:30.791 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:30.797 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:30.797 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:30.797 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:30.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:30.798 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.799 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:30.799 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:30.799 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:30.799 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:30.833 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:30.833 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:30.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:30.834 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:31.024 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:42:31.144 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:31.144 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:31.144 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:31.144 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:31.495 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:42:31.885 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:31.886 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:31.889 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:31.889 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:31.906 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:31.906 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:31.906 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:31.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:31.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:31.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:31.912 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:31.913 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:31.913 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:31.914 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:31.914 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:31.914 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:31.964 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:42:31.964 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:42:31.965 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:42:31.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:31.965 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:32.145 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:32.146 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:32.146 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:32.146 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:32.434 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:42:32.906 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:42:33.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:33.147 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:33.378 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:42:33.849 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:42:34.147 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:34.147 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:34.148 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:34.148 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:34.320 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:42:34.791 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:42:35.262 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:42:35.733 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:42:36.203 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:42:36.675 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:42:37.148 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:42:37.619 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:42:38.086 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:42:38.556 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:42:39.024 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:42:39.489 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:42:39.953 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:42:40.418 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:42:40.886 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:42:41.355 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:42:41.827 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:42:42.299 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:42:42.771 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:42:43.243 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:42:43.716 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:42:44.189 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:42:44.661 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:42:45.134 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:42:45.607 [DEBUG] clck_gen.py:113 IND CLOCK 3570
2026-05-06 03:42:46.078 [DEBUG] clck_gen.py:113 IND CLOCK 3672
2026-05-06 03:42:46.551 [DEBUG] clck_gen.py:113 IND CLOCK 3774
2026-05-06 03:42:47.023 [DEBUG] clck_gen.py:113 IND CLOCK 3876
2026-05-06 03:42:47.492 [DEBUG] clck_gen.py:113 IND CLOCK 3978
2026-05-06 03:42:47.964 [DEBUG] clck_gen.py:113 IND CLOCK 4080
2026-05-06 03:42:48.433 [DEBUG] clck_gen.py:113 IND CLOCK 4182
2026-05-06 03:42:48.906 [DEBUG] clck_gen.py:113 IND CLOCK 4284
2026-05-06 03:42:49.377 [DEBUG] clck_gen.py:113 IND CLOCK 4386
2026-05-06 03:42:49.844 [DEBUG] clck_gen.py:113 IND CLOCK 4488
2026-05-06 03:42:50.308 [DEBUG] clck_gen.py:113 IND CLOCK 4590
2026-05-06 03:42:50.780 [DEBUG] clck_gen.py:113 IND CLOCK 4692
2026-05-06 03:42:51.251 [DEBUG] clck_gen.py:113 IND CLOCK 4794
2026-05-06 03:42:51.723 [DEBUG] clck_gen.py:113 IND CLOCK 4896
2026-05-06 03:42:51.909 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:51.909 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:51.909 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:42:51.913 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:51.913 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:51.913 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:51.913 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:51.914 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:51.914 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:51.914 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:42:51.914 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:42:51.914 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:42:51.914 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:51.914 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:56.921 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:42:56.922 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:42:56.922 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:56.922 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:56.922 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:56.922 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:56.926 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:42:56.926 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:42:56.926 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:56.927 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:42:56.927 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:42:56.929 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:42:56.929 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:42:56.929 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:42:56.929 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:56.929 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:42:56.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:42:56.930 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:42:56.930 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:42:56.930 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:42:56.932 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:42:56.932 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:42:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:56.935 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:42:56.936 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:42:56.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:42:56.936 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:42:56.936 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:42:56.936 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:42:56.936 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:42:56.936 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:42:56.936 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:56.946 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:42:56.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:42:56.946 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:42:56.946 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:42:56.946 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:42:56.946 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.947 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:42:56.947 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:42:56.947 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:42:56.948 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.948 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.949 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:42:56.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.950 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:42:56.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:42:56.952 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:42:57.423 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:42:57.482 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:42:57.483 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:42:57.485 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:42:57.485 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:57.504 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:57.504 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:57.504 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:57.517 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:42:57.517 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:42:57.517 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:42:57.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:42:57.520 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:57.520 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:57.520 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:57.521 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:42:57.521 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:42:57.561 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:42:57.561 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:42:57.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:57.561 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:42:57.889 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:42:57.953 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:57.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:57.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:57.954 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:58.354 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:42:58.825 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:42:58.954 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:58.954 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:58.955 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:58.955 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:42:59.297 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:42:59.763 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:42:59.955 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:42:59.955 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:42:59.956 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:42:59.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:00.234 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:43:00.380 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:00.382 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:00.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:00.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:00.397 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:00.397 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:00.397 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:00.404 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:00.404 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:00.404 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:00.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:00.406 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:00.406 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:00.406 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:00.406 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:00.406 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:00.411 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:43:00.411 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:43:00.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:00.411 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:00.704 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:43:00.957 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:00.957 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:00.957 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:00.957 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:01.176 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:43:01.640 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:43:01.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:01.958 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:01.958 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:01.958 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:02.104 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:43:02.570 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:43:03.034 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:43:03.499 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:43:03.969 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:43:04.438 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:43:04.907 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:43:04.927 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:04.928 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:04.931 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:04.931 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:04.931 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:43:04.945 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:04.945 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:04.945 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:04.952 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:04.952 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:04.952 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:04.952 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:04.954 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:04.954 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:04.954 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:04.954 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:04.954 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:04.997 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:04.997 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:04.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:04.997 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:05.376 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:43:05.847 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:43:06.319 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:43:06.790 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:43:07.262 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:43:07.726 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:43:08.191 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:43:08.656 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:43:09.124 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:43:09.596 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:43:10.066 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:43:10.537 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:43:11.007 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:43:11.478 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:43:11.633 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:11.634 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:11.637 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:11.637 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:11.655 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:11.655 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:11.655 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:11.661 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:11.662 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:11.662 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:11.662 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:11.663 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:11.663 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:11.663 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:11.663 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:11.663 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:11.713 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:43:11.713 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:43:11.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:11.714 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:11.944 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:43:12.408 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:43:12.487 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:12.487 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:12.487 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:43:12.491 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:12.491 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:12.492 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:12.492 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:12.494 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:12.494 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:12.494 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:12.494 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:12.494 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:43:12.494 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:12.494 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:12.494 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:17.498 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:17.498 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:17.499 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:17.499 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:17.499 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:17.499 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:17.507 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:17.507 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:17.507 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:17.508 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:17.508 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:43:17.508 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:43:17.509 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:43:17.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:17.509 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:17.509 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:17.509 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:43:17.509 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:17.509 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:43:17.509 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:17.511 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:43:17.511 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:43:17.511 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:17.511 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:17.511 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:17.511 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:43:17.512 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:17.512 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:43:17.512 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:17.513 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:43:17.514 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:43:17.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:17.514 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:17.514 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:17.514 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:43:17.514 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:17.514 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:43:17.514 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.517 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:43:17.518 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:43:17.518 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:43:17.518 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.518 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:17.519 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:17.522 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:43:17.995 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:43:18.054 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:43:18.057 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:18.057 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:43:18.058 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:43:18.075 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:18.075 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:18.076 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:18.095 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:18.095 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:18.095 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:18.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:18.100 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:18.100 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:18.100 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:18.100 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:18.101 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:18.134 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:18.134 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:18.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:18.135 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:18.467 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:43:18.522 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:18.522 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:18.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:18.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:18.938 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:43:19.406 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:43:19.523 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:19.523 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:19.523 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:19.523 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:19.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:19.868 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:19.870 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:19.870 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:19.878 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:43:19.886 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:19.886 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:19.886 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:19.894 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:19.894 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:19.894 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:19.894 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:19.895 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:19.895 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:19.895 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:19.896 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:19.896 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:19.925 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:43:19.925 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2026-05-06 03:43:19.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:19.926 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:20.348 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:43:20.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:20.524 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:20.524 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:20.524 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:20.821 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:43:21.295 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:43:21.524 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:21.525 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:21.525 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:21.525 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:21.768 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:43:22.240 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:43:22.525 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:22.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:22.526 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:22.526 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:22.639 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:22.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:22.645 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:22.645 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:22.645 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:43:22.664 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:22.664 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:22.664 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:22.671 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:22.671 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:22.671 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:22.671 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:22.673 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:22.673 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:22.673 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:22.673 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:22.673 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:22.708 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:22.709 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:22.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:22.709 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:22.711 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:43:23.182 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:43:23.651 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:43:24.119 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:43:24.589 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:43:25.060 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:43:25.532 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:43:26.005 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:43:26.477 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:43:26.946 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:43:27.099 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:27.101 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:27.105 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:27.105 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:27.121 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:27.121 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:27.121 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:27.128 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:27.128 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:27.128 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:43:27.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:27.130 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:27.130 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:43:27.130 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:43:27.130 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:43:27.130 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:43:27.178 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.248.22:6700) Recv SETFH cmd
2026-05-06 03:43:27.178 [INFO] transceiver.py:201 (MS@172.18.248.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2026-05-06 03:43:27.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:27.179 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:43:27.419 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:43:27.891 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:43:28.361 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:43:28.832 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:43:29.303 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:43:29.386 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:43:29.386 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:43:29.386 [INFO] transceiver.py:205 (MS@172.18.248.22:6700) Frequency hopping disabled
2026-05-06 03:43:29.389 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:29.390 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:29.390 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:29.390 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:29.391 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:29.391 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:29.391 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:29.391 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:29.391 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:29.391 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:29.391 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:43:29.391 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:29.391 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=2571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:34.397 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:34.397 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:34.397 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:34.397 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:34.397 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:34.397 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:34.405 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:34.406 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:34.406 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:34.407 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:34.407 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:43:34.410 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:43:34.410 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:43:34.410 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:34.410 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:34.410 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:34.410 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:43:34.411 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:34.411 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:43:34.411 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:34.414 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:43:34.414 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:43:34.414 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:34.414 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:34.415 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:34.415 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:43:34.415 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:34.415 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:43:34.415 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:34.419 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:43:34.419 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:43:34.419 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:34.419 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:34.420 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:34.420 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:43:34.420 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:34.420 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:43:34.420 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:34.425 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:43:34.425 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:43:34.425 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:43:34.425 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.426 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:43:34.427 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:43:34.427 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:43:34.427 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:34.428 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.429 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:34.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:34.432 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:43:34.902 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:43:34.967 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:43:34.969 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:43:34.970 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:34.971 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:43:34.992 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:34.998 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.296 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.368 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:43:35.432 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:35.432 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:35.432 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:35.432 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:35.620 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.838 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:43:35.946 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.950 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:35.972 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:36.273 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:36.275 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:36.285 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:36.285 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:36.285 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:36.285 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:36.288 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:36.288 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:36.288 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:36.288 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:36.289 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:36.289 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:36.289 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:43:36.289 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:36.289 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:36.289 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:36.290 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:36.290 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:36.290 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:36.290 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:41.292 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:41.292 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:41.292 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:41.292 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:41.292 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:41.292 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:41.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:41.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:41.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:41.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:41.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:43:41.301 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:43:41.301 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:43:41.301 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:41.301 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:41.301 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:41.301 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:43:41.302 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:41.302 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:43:41.302 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:41.304 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:41.304 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:43:41.304 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:41.306 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:41.306 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:43:41.306 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:41.308 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:43:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:43:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:43:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:43:41.308 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:43:41.308 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:43:41.309 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:43:41.309 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:43:41.309 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.309 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.310 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:41.314 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:43:41.776 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:43:41.835 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:43:41.836 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:43:41.839 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:43:41.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:41.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:41.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:41.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:41.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.187 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.192 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.202 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.210 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.213 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.247 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:43:42.311 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:42.312 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:42.314 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:42.314 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:42.505 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.510 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.527 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.531 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.540 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.719 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:43:42.830 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.834 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.860 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.864 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.868 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:42.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:43.163 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:43.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:43.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:43.174 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:43.189 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:43.189 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:43.189 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:43.190 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:43.190 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:43:43.194 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:43.195 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:43.195 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:43.195 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:43.195 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:43.195 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:43.195 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=410 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:43.195 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=412 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:48.196 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:48.196 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:48.196 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:48.196 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:48.207 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:48.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:48.208 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:48.208 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:48.208 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:43:48.210 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:43:48.210 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:43:48.210 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:48.211 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:48.211 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:48.211 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:43:48.211 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:48.211 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:43:48.211 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:48.213 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:48.213 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:43:48.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:48.214 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:43:48.215 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:43:48.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:48.215 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:48.215 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:48.215 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:43:48.215 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:48.215 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:43:48.215 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:43:48.217 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:43:48.217 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:43:48.217 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:48.222 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:43:48.694 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:43:48.743 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:43:48.745 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:43:48.747 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:43:48.748 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:48.767 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:48.773 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:48.777 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.072 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.078 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.080 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.096 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.102 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.162 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:43:49.220 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:49.220 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:49.220 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:49.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:49.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.399 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.405 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.432 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.629 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:43:49.728 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.735 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.752 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:49.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:50.055 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:50.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:50.062 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:50.074 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:50.074 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:50.074 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:50.074 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:50.075 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:50.075 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:50.075 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:50.075 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:50.075 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:43:50.075 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:50.075 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:50.075 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:43:55.081 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:55.081 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:55.081 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:55.081 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:55.084 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:55.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:55.084 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:55.084 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:43:55.084 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:43:55.085 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:43:55.085 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:43:55.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:55.086 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:55.086 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:55.086 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:43:55.086 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:43:55.086 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:43:55.086 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:55.087 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:43:55.087 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:43:55.087 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:55.088 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:43:55.088 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:43:55.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:55.088 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:43:55.088 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:43:55.088 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:43:55.088 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:43:55.088 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:43:55.089 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:55.090 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:43:55.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:43:55.090 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:43:55.090 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:43:55.090 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:43:55.090 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:43:55.091 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:43:55.091 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:43:55.091 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:43:55.091 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:43:55.095 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:43:55.567 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:43:55.612 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:43:55.614 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:43:55.615 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:43:55.615 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:55.635 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:55.640 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:55.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:55.944 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:55.967 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:55.971 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.035 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:43:56.094 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:56.095 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:56.095 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:56.095 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:56.269 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.274 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.294 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.298 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.501 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:43:56.598 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.601 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.618 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.623 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.922 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.926 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:43:56.932 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:43:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:43:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:43:56.932 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:43:56.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:43:56.933 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:43:56.933 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:43:56.933 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:43:56.933 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:43:56.933 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:43:56.933 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:01.942 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:01.942 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:01.943 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:01.943 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:01.943 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:01.943 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:01.950 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:01.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:01.950 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:01.950 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:01.950 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:01.952 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:01.952 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:01.952 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:01.952 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:01.953 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:01.953 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:01.953 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:01.953 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:01.953 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:01.954 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:01.954 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:01.954 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:01.955 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:01.955 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:01.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:01.956 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:01.956 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:01.956 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:01.956 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:01.956 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:01.956 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:01.958 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:01.958 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:01.958 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.958 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.959 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:01.963 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:02.434 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:02.485 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:02.488 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:02.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:02.490 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:02.536 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:02.537 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:02.844 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:02.845 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:02.859 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:02.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:02.903 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:44:02.961 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:02.961 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:02.961 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:02.962 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:03.161 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.177 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.367 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:44:03.482 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.502 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.801 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.804 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:03.817 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:03.817 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:03.817 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:03.818 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:03.820 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:03.820 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:03.820 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:03.820 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:03.820 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:03.820 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:03.820 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:03.820 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:08.823 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:08.824 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:08.824 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:08.824 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:08.824 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:08.824 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:08.835 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:08.835 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:08.836 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:08.836 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:08.836 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:08.838 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:08.839 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:08.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:08.839 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:08.839 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:08.839 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:08.839 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:08.839 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:08.839 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:08.843 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:08.843 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:08.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:08.844 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:08.844 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:08.844 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:08.844 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:08.844 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:08.844 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:08.848 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:08.848 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:08.848 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:08.848 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:08.849 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:08.849 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:08.849 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:08.849 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:08.849 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:08.855 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:08.856 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:08.856 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:08.856 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.856 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.857 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:08.858 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:08.861 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:09.325 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:09.383 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:09.385 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:09.386 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.387 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:09.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:09.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.712 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.719 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.725 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.730 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.744 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.750 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:09.792 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:44:09.860 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:09.860 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:09.861 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:09.861 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:10.048 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.053 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.056 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.059 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.079 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.084 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.087 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.091 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.262 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:44:10.383 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.388 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.391 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.395 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.406 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.411 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.709 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.726 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:44:10.733 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.734 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:10.751 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:10.751 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:10.751 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:10.751 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:10.756 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:10.756 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:10.756 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:10.756 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:10.756 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:10.756 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:10.756 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (TRX1@172.18.248.20:5700/1) RX TRXD message (ver=1 fn=417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.757 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=416 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:10.758 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:15.757 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:15.757 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:15.757 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:15.757 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:15.757 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:15.757 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:15.768 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:15.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:15.769 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:15.769 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:15.769 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:15.773 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:15.773 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:15.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:15.773 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:15.773 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:15.773 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:15.773 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:15.773 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:15.774 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:15.777 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:15.777 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:15.777 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:15.777 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:15.777 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:15.778 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:15.778 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:15.778 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:15.778 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:15.781 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:15.781 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:15.781 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:15.785 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:15.785 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:15.785 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:15.786 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:15.786 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:15.786 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.786 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:15.787 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:15.791 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:16.263 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:16.313 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:16.315 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:16.317 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:16.319 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:16.346 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.359 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.650 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.655 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.663 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.678 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.685 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.687 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.733 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:44:16.789 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:16.789 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:16.789 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:16.790 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:16.981 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.988 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:16.990 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.007 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.012 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.016 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.203 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:44:17.312 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.317 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.320 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.340 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.345 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.348 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.643 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.652 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:17.663 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:17.663 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:17.663 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:17.663 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:17.666 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:17.666 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:17.666 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:17.666 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:17.666 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:17.666 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:17.666 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:22.669 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:22.669 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:22.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:22.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:22.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:22.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:22.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:22.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:22.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:22.679 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:22.679 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:22.681 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:22.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:22.682 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:22.682 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:22.682 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:22.682 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:22.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:22.683 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:22.683 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:22.684 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:22.684 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:22.684 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:22.684 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:22.685 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:22.685 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:22.685 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:22.685 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:22.685 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:22.686 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:22.686 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:22.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:22.687 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:22.687 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:22.687 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:22.687 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:22.687 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:22.687 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:22.690 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:22.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:22.690 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:22.690 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:22.690 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:22.690 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:22.691 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:22.691 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:22.691 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.691 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:22.692 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:22.696 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:23.170 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:23.205 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:23.206 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:23.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.206 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:23.214 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.215 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.216 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.217 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.225 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.226 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.228 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.229 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.230 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.236 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.238 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.239 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.242 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.243 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.244 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.251 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.253 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.254 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.255 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.256 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.257 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:23.260 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:23.260 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:23.261 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:23.261 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:23.261 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:23.261 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:23.261 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:23.261 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:23.261 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:28.272 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:28.272 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:28.273 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:28.273 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:28.273 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:28.273 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:28.280 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:28.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:28.280 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:28.280 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:28.281 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:28.283 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:28.283 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:28.283 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:28.283 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:28.283 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:28.283 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:28.284 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:28.284 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:28.284 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:28.286 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:28.286 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:28.286 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:28.288 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:28.288 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:28.288 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:28.288 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:28.289 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:28.289 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:28.289 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:28.289 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:28.289 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:28.292 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:28.292 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:28.292 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:28.292 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.293 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:28.297 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:28.760 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:28.823 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:28.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.825 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:28.826 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:28.838 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.839 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.840 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.842 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.843 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.846 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.847 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.848 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.853 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.854 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.855 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.862 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.863 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.865 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.870 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.871 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.874 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.875 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.876 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.882 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.884 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.888 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.889 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.890 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.891 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.892 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.893 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.896 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.898 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.899 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.906 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.907 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.908 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.909 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.910 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.911 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.913 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.915 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.917 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.918 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.919 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:28.922 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:28.922 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:28.923 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:28.923 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:28.923 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:28.923 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:28.923 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:28.923 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:28.923 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:33.930 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:33.930 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:33.930 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:33.930 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:33.930 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:33.930 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:33.933 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:33.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:33.933 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:33.933 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:33.933 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:33.934 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:33.934 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:33.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:33.935 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:33.935 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:33.935 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:33.935 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:33.935 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:33.935 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:33.936 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:33.936 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:33.936 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:33.937 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:33.937 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:33.937 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:33.937 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:33.937 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:33.938 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:33.938 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:33.938 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:33.938 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:33.940 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:33.940 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:33.940 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.940 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.941 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:33.945 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:34.408 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:34.468 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:34.469 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:34.471 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:34.472 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.489 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.492 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.493 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.495 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.497 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.499 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.500 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.501 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.509 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.512 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.513 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.514 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.516 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.517 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.524 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.526 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.528 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.530 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.533 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.534 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.542 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.547 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.549 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.550 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.551 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:34.553 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:34.553 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:34.553 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:34.553 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:34.554 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:34.555 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:34.555 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:34.555 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:34.555 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:34.555 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:34.555 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:39.560 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:39.560 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:39.560 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:39.560 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:39.560 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:39.560 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:39.573 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:39.573 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:39.573 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:39.574 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:39.574 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:39.576 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:39.576 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:39.576 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:39.578 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:39.578 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:39.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:39.579 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:39.579 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:39.579 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:39.579 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:39.579 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:39.579 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:39.580 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:39.581 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:39.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:39.581 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:39.581 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:39.581 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:39.581 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:39.581 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:39.581 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.584 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:39.584 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:39.584 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:39.584 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.585 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:39.589 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:40.062 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:40.109 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:40.110 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:40.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.112 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:40.136 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.138 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.140 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.142 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.143 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.144 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.153 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.157 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.169 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.178 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.179 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.181 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.182 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.183 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:40.185 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:40.185 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:40.185 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:40.185 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:40.186 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:40.186 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:40.187 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:40.187 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:40.187 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:40.187 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:40.187 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:40.187 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:44:45.192 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:45.192 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:45.192 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:45.192 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:45.192 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:45.193 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:45.199 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:45.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:45.199 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:45.199 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:45.199 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:45.201 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:45.201 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:45.201 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:45.203 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:45.203 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:45.203 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:45.204 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:45.204 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:45.204 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:45.204 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:45.204 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:45.204 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:45.205 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:45.205 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:45.205 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:45.206 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:45.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:45.207 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:45.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:45.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:45.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.211 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:45.683 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:45.730 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:45.732 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.732 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:45.733 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:45.755 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.757 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.758 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.759 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.760 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.761 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.788 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.790 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.791 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.795 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.797 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.799 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.809 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.810 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.813 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.814 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.815 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.821 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.822 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.823 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.825 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.827 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:45.829 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:45.830 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:45.830 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:45.830 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:45.831 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:45.831 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:45.831 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:45.831 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:45.831 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:50.838 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:50.838 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:50.838 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:50.838 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:50.838 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:50.838 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:50.850 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:50.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:50.851 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:50.851 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:50.851 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:50.855 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:50.855 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:50.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:50.855 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:50.855 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:50.855 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:50.855 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:50.856 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:50.856 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:50.858 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:50.859 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:50.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:50.859 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:50.859 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:50.859 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:50.859 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:50.859 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:50.859 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:50.862 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:50.862 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:50.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:50.862 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:50.862 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:50.862 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:50.862 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:50.862 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:50.863 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:50.866 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:50.866 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:50.866 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.866 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.867 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:50.871 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:51.339 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:51.393 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:51.394 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:51.396 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:51.397 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:51.413 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.415 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.416 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.417 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.418 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.419 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.422 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.424 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.425 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.427 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.429 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.435 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.436 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.437 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.439 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.440 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.441 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.443 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.444 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.445 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.446 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.447 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.448 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.455 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.456 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.457 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.460 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.461 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.462 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.464 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.466 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.467 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.468 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.475 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.477 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.478 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.479 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.480 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.481 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.484 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.486 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.487 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.488 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.490 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.491 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:51.494 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:51.494 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:51.494 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:51.494 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:51.495 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:51.495 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:51.495 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:51.495 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:51.495 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:51.495 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:51.495 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:56.502 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:56.502 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:56.502 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:56.502 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:56.502 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:56.502 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:56.516 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:56.518 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:56.518 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:56.519 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:44:56.519 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:44:56.525 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:44:56.525 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:44:56.525 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:56.525 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:56.526 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:56.526 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:44:56.526 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:44:56.526 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:44:56.526 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:56.531 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:44:56.531 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:44:56.531 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:56.531 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:56.531 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:56.532 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:44:56.532 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:44:56.532 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:44:56.532 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:56.536 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:44:56.536 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:44:56.536 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:56.536 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:44:56.536 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:44:56.537 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:44:56.537 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:44:56.537 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:44:56.537 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:44:56.543 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.544 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:44:56.544 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:44:56.544 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:44:56.544 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.545 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:44:56.546 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:56.549 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:44:57.013 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:44:57.080 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:44:57.082 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:44:57.083 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.084 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:44:57.106 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:44:57.107 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.111 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.112 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.113 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.114 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.115 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.118 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.119 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.120 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.128 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.129 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.130 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.134 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.135 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.137 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.139 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.146 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.147 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.148 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.150 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.151 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.152 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.154 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.155 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.156 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.164 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.165 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.166 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.168 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.170 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.171 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.172 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:44:57.175 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:44:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:44:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:44:57.175 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:44:57.177 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:44:57.177 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:44:57.177 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:44:57.177 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:44:57.177 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:44:57.177 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:44:57.177 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:02.183 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:02.183 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:02.183 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:02.183 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:02.183 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:02.183 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:02.190 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:02.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:02.191 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:02.191 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:02.191 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:02.195 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:02.196 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:02.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:02.196 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:02.196 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:02.196 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:02.196 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:02.196 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:02.197 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:02.199 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:02.200 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:02.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:02.200 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:02.200 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:02.200 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:02.200 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:02.200 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:02.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:02.203 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:02.203 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:02.203 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:02.206 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:02.207 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:02.207 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:02.207 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.207 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.208 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:02.212 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:45:02.684 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:45:02.737 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:45:02.739 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:45:02.740 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:45:02.740 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:02.742 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:02.742 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:02.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:02.742 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:02.742 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:02.742 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:02.742 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:02.742 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:03.156 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:45:03.211 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:03.212 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:03.212 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:03.212 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:03.627 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:45:04.101 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:45:04.212 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:04.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:04.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:04.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:04.570 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:45:05.043 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:45:05.213 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:05.213 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:05.213 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:05.213 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:05.515 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:45:05.986 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:45:06.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:06.195 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:06.200 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:06.200 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:06.200 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:06.201 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:06.202 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:06.202 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:06.202 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:06.202 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:06.202 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:45:06.202 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:06.202 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:06.202 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:11.206 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:11.206 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:11.206 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:11.206 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:11.206 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:11.206 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:11.213 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:11.213 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:11.213 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:11.214 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:11.214 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:11.216 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:11.216 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:11.216 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:11.216 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:11.217 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:11.217 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:11.217 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:11.217 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:11.217 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:11.218 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:11.218 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:11.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:11.218 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:11.218 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:11.218 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:11.218 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:11.219 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:11.219 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:11.220 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:11.220 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:11.220 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:11.222 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:11.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:11.222 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:11.222 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:11.222 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:11.222 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:11.223 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:11.223 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:11.223 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.223 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:11.224 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:11.227 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:45:11.698 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:45:11.749 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:45:11.752 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:45:11.753 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:11.754 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:45:11.770 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:11.770 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:11.771 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:11.773 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:11.773 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:11.773 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:11.774 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:11.774 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:11.793 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 03:45:11.796 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:11.796 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:11.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:11.796 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:12.166 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:45:12.226 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:12.226 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:12.226 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:12.226 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:12.287 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:12.288 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:12.288 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:12.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:12.288 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:12.289 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:12.289 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:12.289 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:12.289 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:12.302 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:12.305 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:12.305 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:12.315 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:12.315 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:12.316 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:12.316 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:12.320 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:12.320 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:12.320 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:12.320 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:12.320 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:45:12.321 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:12.321 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:12.321 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=239 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:17.324 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:17.325 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:17.325 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:17.325 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:17.325 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:17.325 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:17.333 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:17.334 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:17.334 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:17.335 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:17.335 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:17.338 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:17.338 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:17.339 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:17.339 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:17.339 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:17.340 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:17.340 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:17.340 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:17.340 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:17.342 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:17.342 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:17.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:17.343 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:17.343 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:17.343 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:17.343 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:17.343 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:17.343 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:17.346 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:17.346 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:17.346 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:17.346 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:17.346 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:17.346 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:17.347 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:17.347 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:17.347 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:17.350 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:17.351 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:17.351 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:17.351 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.351 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:17.352 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:17.356 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:45:17.827 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:45:17.879 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:45:17.881 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:45:17.883 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:17.884 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:45:17.912 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:17.912 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:17.912 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:17.917 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:17.917 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:17.917 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:17.917 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:17.917 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:17.969 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 03:45:17.971 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:17.972 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:17.972 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:17.973 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:18.045 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:18.103 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:18.104 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:18.104 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:18.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:18.104 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:18.104 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:18.104 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:18.104 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:18.105 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:18.293 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:45:18.354 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:18.354 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:18.354 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:18.354 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:18.760 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:45:19.229 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:45:19.355 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:19.355 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:19.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:19.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:19.696 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:45:20.164 [DEBUG] clck_gen.py:113 IND CLOCK 612
2026-05-06 03:45:20.356 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:20.356 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:20.356 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:20.356 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:20.635 [DEBUG] clck_gen.py:113 IND CLOCK 714
2026-05-06 03:45:21.105 [DEBUG] clck_gen.py:113 IND CLOCK 816
2026-05-06 03:45:21.357 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:21.357 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:21.357 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:21.357 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:21.576 [DEBUG] clck_gen.py:113 IND CLOCK 918
2026-05-06 03:45:22.044 [DEBUG] clck_gen.py:113 IND CLOCK 1020
2026-05-06 03:45:22.358 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:22.358 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:22.359 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:22.517 [DEBUG] clck_gen.py:113 IND CLOCK 1122
2026-05-06 03:45:22.986 [DEBUG] clck_gen.py:113 IND CLOCK 1224
2026-05-06 03:45:23.452 [DEBUG] clck_gen.py:113 IND CLOCK 1326
2026-05-06 03:45:23.924 [DEBUG] clck_gen.py:113 IND CLOCK 1428
2026-05-06 03:45:24.397 [DEBUG] clck_gen.py:113 IND CLOCK 1530
2026-05-06 03:45:24.868 [DEBUG] clck_gen.py:113 IND CLOCK 1632
2026-05-06 03:45:25.339 [DEBUG] clck_gen.py:113 IND CLOCK 1734
2026-05-06 03:45:25.810 [DEBUG] clck_gen.py:113 IND CLOCK 1836
2026-05-06 03:45:26.279 [DEBUG] clck_gen.py:113 IND CLOCK 1938
2026-05-06 03:45:26.746 [DEBUG] clck_gen.py:113 IND CLOCK 2040
2026-05-06 03:45:27.210 [DEBUG] clck_gen.py:113 IND CLOCK 2142
2026-05-06 03:45:27.683 [DEBUG] clck_gen.py:113 IND CLOCK 2244
2026-05-06 03:45:28.155 [DEBUG] clck_gen.py:113 IND CLOCK 2346
2026-05-06 03:45:28.623 [DEBUG] clck_gen.py:113 IND CLOCK 2448
2026-05-06 03:45:29.091 [DEBUG] clck_gen.py:113 IND CLOCK 2550
2026-05-06 03:45:29.562 [DEBUG] clck_gen.py:113 IND CLOCK 2652
2026-05-06 03:45:30.033 [DEBUG] clck_gen.py:113 IND CLOCK 2754
2026-05-06 03:45:30.505 [DEBUG] clck_gen.py:113 IND CLOCK 2856
2026-05-06 03:45:30.978 [DEBUG] clck_gen.py:113 IND CLOCK 2958
2026-05-06 03:45:31.450 [DEBUG] clck_gen.py:113 IND CLOCK 3060
2026-05-06 03:45:31.923 [DEBUG] clck_gen.py:113 IND CLOCK 3162
2026-05-06 03:45:32.396 [DEBUG] clck_gen.py:113 IND CLOCK 3264
2026-05-06 03:45:32.869 [DEBUG] clck_gen.py:113 IND CLOCK 3366
2026-05-06 03:45:33.338 [DEBUG] clck_gen.py:113 IND CLOCK 3468
2026-05-06 03:45:33.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:33.636 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:33.636 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:33.636 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:33.641 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:33.642 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:33.642 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:33.642 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:33.642 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:33.659 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:33.659 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:33.659 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:33.661 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:33.661 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:33.661 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:33.661 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:33.662 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:33.662 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:33.662 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:33.662 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:33.662 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:45:33.662 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:33.662 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:38.668 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:38.668 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:38.669 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:38.669 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:38.669 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:38.669 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:38.677 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:38.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:38.678 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:38.678 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:38.678 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:38.682 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:38.682 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:38.683 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:38.683 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:38.683 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:38.684 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:38.685 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:38.685 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:38.685 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:38.687 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:38.687 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:38.687 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:38.687 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:38.688 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:38.688 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:38.688 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:38.689 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:38.689 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:38.690 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:38.690 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:38.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:38.691 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:38.691 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:38.691 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:38.691 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:38.691 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:38.691 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:38.694 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:38.694 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:38.694 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:38.694 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:38.695 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:38.695 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:38.695 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.695 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.696 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:38.700 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:45:39.178 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:45:39.219 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:45:39.221 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:45:39.223 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:39.223 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:45:39.246 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:39.246 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:39.246 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:39.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:39.249 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:39.249 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:39.250 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:39.250 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:39.276 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 03:45:39.281 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:39.281 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:39.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:39.282 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:39.337 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:39.498 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 03:45:39.573 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:39.574 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:39.574 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:39.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:39.574 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:39.574 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:39.575 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:39.575 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:39.575 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:39.597 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:39.600 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:39.600 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:39.610 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:39.610 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:39.612 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:39.612 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:39.612 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:39.612 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:39.612 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:45:39.612 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:39.612 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:44.616 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:44.616 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:44.616 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:44.616 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:44.616 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:44.616 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:44.623 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:44.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:44.624 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:44.624 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:44.624 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:44.628 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:44.629 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:44.629 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:44.629 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:44.629 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:44.629 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:44.630 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:44.630 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:44.630 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:44.634 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:44.634 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:44.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:44.634 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:44.634 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:44.634 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:44.634 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:44.634 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:44.635 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:44.638 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:44.638 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:44.638 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:44.639 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:44.639 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:44.639 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:44.639 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:44.639 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:44.639 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:44.645 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:44.646 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:44.646 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:44.646 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.646 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.647 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.648 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:44.648 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:44.648 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:44.651 [DEBUG] clck_gen.py:113 IND CLOCK 0
2026-05-06 03:45:45.122 [DEBUG] clck_gen.py:113 IND CLOCK 102
2026-05-06 03:45:45.177 [DEBUG] fake_trx.py:278 (BTS@172.18.248.20:5700) Recv FAKE_TOA cmd
2026-05-06 03:45:45.179 [DEBUG] fake_trx.py:297 (BTS@172.18.248.20:5700) Recv FAKE_RSSI cmd
2026-05-06 03:45:45.180 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:45.180 [DEBUG] fake_trx.py:322 (BTS@172.18.248.20:5700) Recv FAKE_CI cmd
2026-05-06 03:45:45.195 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:45.196 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:45.196 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:45.198 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:45.199 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:45.199 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:45.199 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:45.199 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:45.218 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD HANDOVER
2026-05-06 03:45:45.222 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:45.223 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:45.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:45.223 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:45.590 [DEBUG] clck_gen.py:113 IND CLOCK 204
2026-05-06 03:45:45.649 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:45.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:45.651 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:45.651 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:46.060 [DEBUG] clck_gen.py:113 IND CLOCK 306
2026-05-06 03:45:46.531 [DEBUG] clck_gen.py:113 IND CLOCK 408
2026-05-06 03:45:46.650 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:46.650 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:46.652 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:46.652 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:47.002 [DEBUG] clck_gen.py:113 IND CLOCK 510
2026-05-06 03:45:47.230 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:47.231 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:47.231 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:47.231 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD ECHO
2026-05-06 03:45:47.248 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.248.22:6700) Ignore CMD SETSLOT
2026-05-06 03:45:47.248 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.248.22:6700) Recv RXTUNE cmd
2026-05-06 03:45:47.248 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.248.22:6700) Recv TXTUNE cmd
2026-05-06 03:45:47.248 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.248.22:6700) Recv POWERON CMD
2026-05-06 03:45:47.248 [INFO] ctrl_if_trx.py:109 (MS@172.18.248.22:6700) Starting transceiver...
2026-05-06 03:45:47.281 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD NOHANDOVER
2026-05-06 03:45:47.283 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.248.22:6700) Recv POWEROFF cmd
2026-05-06 03:45:47.283 [INFO] ctrl_if_trx.py:117 (MS@172.18.248.22:6700) Stopping transceiver...
2026-05-06 03:45:47.293 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:47.293 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:47.293 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:47.294 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:47.297 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:47.297 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:47.298 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:47.298 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:47.298 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:45:47.298 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:47.298 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:47.298 [WARNING] transceiver.py:257 (BTS@172.18.248.20:5700) RX TRXD message (ver=1 fn=576 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2026-05-06 03:45:52.295 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:52.295 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:52.295 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:52.295 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:52.298 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:52.298 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:52.299 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:52.299 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:52.299 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:52.299 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:52.299 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:52.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:52.300 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:52.300 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:52.300 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:52.300 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:52.300 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:52.300 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:52.301 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:52.301 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:52.301 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:52.302 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:52.302 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:52.302 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:52.304 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:52.304 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:52.304 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:52.304 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:52.305 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:52.305 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:52.305 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:52.305 [INFO] transceiver.py:246 Stopping clock generator
2026-05-06 03:45:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:52.305 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.309 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:57.309 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:57.309 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:57.309 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:57.309 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:57.309 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:57.313 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:57.313 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:57.313 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.248.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:57.314 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.248.20:5700) Recv SETFORMAT cmd
2026-05-06 03:45:57.314 [INFO] ctrl_if_trx.py:201 (BTS@172.18.248.20:5700) TRXD header version 1 -> 1
2026-05-06 03:45:57.315 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.248.20:5700/1) Recv RXTUNE cmd
2026-05-06 03:45:57.316 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.248.20:5700/1) Recv TXTUNE cmd
2026-05-06 03:45:57.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:57.316 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.248.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:57.316 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:57.316 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.248.20:5700/1) Recv NOMTXPOWER cmd
2026-05-06 03:45:57.316 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.248.20:5700/1) Recv SETFORMAT cmd
2026-05-06 03:45:57.316 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.248.20:5700/1) TRXD header version 1 -> 1
2026-05-06 03:45:57.316 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.248.20:5700/1) Recv SETPOWER cmd
2026-05-06 03:45:57.317 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.248.20:5700/2) Recv RXTUNE cmd
2026-05-06 03:45:57.317 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.248.20:5700/2) Recv TXTUNE cmd
2026-05-06 03:45:57.317 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:57.317 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.248.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:57.317 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:57.318 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.248.20:5700/2) Recv NOMTXPOWER cmd
2026-05-06 03:45:57.318 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.248.20:5700/2) Recv SETFORMAT cmd
2026-05-06 03:45:57.318 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.248.20:5700/2) TRXD header version 1 -> 1
2026-05-06 03:45:57.318 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.248.20:5700/2) Recv SETPOWER cmd
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.248.20:5700/3) Recv RXTUNE cmd
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.248.20:5700/3) Recv TXTUNE cmd
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:57.319 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.248.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.248.20:5700/3) Recv NOMTXPOWER cmd
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.248.20:5700/3) Recv SETFORMAT cmd
2026-05-06 03:45:57.319 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.248.20:5700/3) TRXD header version 1 -> 1
2026-05-06 03:45:57.319 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.248.20:5700/3) Recv SETPOWER cmd
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.248.20:5700) Recv RXTUNE cmd
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETTSC
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETTSC
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETTSC
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.248.20:5700) Recv TXTUNE cmd
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETRXGAIN
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETTSC
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETRXGAIN
2026-05-06 03:45:57.321 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETRXGAIN
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.248.20:5700) Recv NOMTXPOWER cmd
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.248.20:5700) Recv SETPOWER cmd
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.248.20:5700) Recv POWERON CMD
2026-05-06 03:45:57.322 [INFO] ctrl_if_trx.py:109 (BTS@172.18.248.20:5700) Starting transceiver...
2026-05-06 03:45:57.322 [INFO] transceiver.py:243 Starting clock generator
2026-05-06 03:45:57.322 [INFO] clck_gen.py:95 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETRXGAIN
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.322 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.248.20:5700/1) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.248.20:5700/1) Recv RFMUTE cmd
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.248.20:5700/2) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.248.20:5700/3) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.248.20:5700) Ignore CMD SETSLOT
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.248.20:5700/2) Recv RFMUTE cmd
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.248.20:5700) Recv RFMUTE cmd
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.248.20:5700/3) Recv RFMUTE cmd
2026-05-06 03:45:57.323 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.248.20:5700) Recv POWEROFF cmd
2026-05-06 03:45:57.323 [INFO] ctrl_if_trx.py:117 (BTS@172.18.248.20:5700) Stopping transceiver...
2026-05-06 03:45:57.323 [INFO] transceiver.py:246 Stopping clock generator