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0.5576810TC_lu_imsi_auth3g_tmsifalsePASSED0MSC_Tests1.0763160TC_lu_imsi_auth3g_tmsi_check_imeifalsePASSED0MSC_Tests1.3762960TC_lu_imsi_auth3g_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5350810TC_lu_imsi_auth_tmsifalsePASSED0MSC_Tests1.2124260TC_lu_imsi_auth_tmsi_check_imeifalsePASSED0MSC_Tests1.3737780TC_lu_imsi_auth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests1.3356670TC_lu_imsi_auth_tmsi_check_imei_early_errfalsePASSED0MSC_Tests1.3850840TC_lu_imsi_auth_tmsi_check_imei_early_nackfalsePASSED0MSC_Tests1.0941370TC_lu_imsi_auth_tmsi_check_imei_errfalsePASSED0MSC_Tests1.2443030TC_lu_imsi_auth_tmsi_check_imei_nackfalsePASSED0MSC_Tests1.1953830TC_lu_imsi_auth_tmsi_encr_0134_1falsePASSED0MSC_Tests0.5865250TC_lu_imsi_auth_tmsi_encr_0134_34falsePASSED0MSC_Tests0.5783440TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3falsePASSED0MSC_Tests0.5924470TC_lu_imsi_auth_tmsi_encr_013_2falsePASSED0MSC_Tests0.5658310TC_lu_imsi_auth_tmsi_encr_13_13falsePASSED0MSC_Tests0.5734440TC_lu_imsi_auth_tmsi_encr_13_2falsePASSED0MSC_Tests0.5637050TC_lu_imsi_auth_tmsi_encr_1_13falsePASSED0MSC_Tests0.4508680TC_lu_imsi_auth_tmsi_encr_3_1falsePASSED0MSC_Tests0.4712680TC_lu_imsi_auth_tmsi_encr_3_13falsePASSED0MSC_Tests1.1725380TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debugfalsePASSED0MSC_Tests0.5223430TC_lu_imsi_auth_tmsi_encr_3_1_no_cmfalsePASSED0MSC_Tests0.6755130TC_lu_imsi_noauth_notmsifalsePASSED0MSC_Tests1.1855430TC_lu_imsi_noauth_notmsi_check_imeifalsePASSED0MSC_Tests0.7433560TC_lu_imsi_noauth_notmsi_check_imei_earlyfalsePASSED0MSC_Tests0.6940130TC_lu_imsi_noauth_tmsifalsePASSED0MSC_Tests1.2010650TC_lu_imsi_noauth_tmsi_check_imeifalsePASSED0MSC_Tests1.3892920TC_lu_imsi_noauth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5855040TC_lu_imsi_rejectfalsePASSED0MSC_Tests5.5366540TC_lu_imsi_timeout_gsupfalsePASSED708MSC_Tests7.536182Timeout waiting for ClearCommand/Release MSC_Tests.ttcn:7860 MSC_Tests control part MSC_Tests.ttcn:691 TC_lu_imsi_timeout_tmsi_realloc testcase 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