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0.6423550TC_lu_imsi_auth3g_tmsifalsePASSED0MSC_Tests1.1599390TC_lu_imsi_auth3g_tmsi_check_imeifalsePASSED0MSC_Tests1.4016260TC_lu_imsi_auth3g_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5691540TC_lu_imsi_auth_tmsifalsePASSED0MSC_Tests1.159970TC_lu_imsi_auth_tmsi_check_imeifalsePASSED0MSC_Tests1.4261260TC_lu_imsi_auth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests1.2926270TC_lu_imsi_auth_tmsi_check_imei_early_errfalsePASSED0MSC_Tests1.372640TC_lu_imsi_auth_tmsi_check_imei_early_nackfalsePASSED0MSC_Tests1.1487840TC_lu_imsi_auth_tmsi_check_imei_errfalsePASSED0MSC_Tests1.1523320TC_lu_imsi_auth_tmsi_check_imei_nackfalsePASSED0MSC_Tests0.5959970TC_lu_imsi_auth_tmsi_encr_0134_1falsePASSED0MSC_Tests0.5964710TC_lu_imsi_auth_tmsi_encr_0134_34falsePASSED0MSC_Tests0.5851010TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3falsePASSED0MSC_Tests0.5847860TC_lu_imsi_auth_tmsi_encr_013_2falsePASSED0MSC_Tests0.565250TC_lu_imsi_auth_tmsi_encr_13_13falsePASSED0MSC_Tests0.5455440TC_lu_imsi_auth_tmsi_encr_13_2falsePASSED0MSC_Tests0.5574710TC_lu_imsi_auth_tmsi_encr_1_13falsePASSED0MSC_Tests0.5147490TC_lu_imsi_auth_tmsi_encr_3_1falsePASSED0MSC_Tests0.5684170TC_lu_imsi_auth_tmsi_encr_3_13falsePASSED0MSC_Tests1.1522630TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debugfalsePASSED0MSC_Tests0.5559950TC_lu_imsi_auth_tmsi_encr_3_1_no_cmfalsePASSED0MSC_Tests0.6857020TC_lu_imsi_noauth_notmsifalsePASSED0MSC_Tests1.1607780TC_lu_imsi_noauth_notmsi_check_imeifalsePASSED0MSC_Tests1.4003850TC_lu_imsi_noauth_notmsi_check_imei_earlyfalsePASSED0MSC_Tests0.7344680TC_lu_imsi_noauth_tmsifalsePASSED0MSC_Tests1.1391910TC_lu_imsi_noauth_tmsi_check_imeifalsePASSED0MSC_Tests1.3559890TC_lu_imsi_noauth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5579790TC_lu_imsi_rejectfalsePASSED0MSC_Tests5.5482810TC_lu_imsi_timeout_gsupfalsePASSED731MSC_Tests7.535323Timeout waiting for ClearCommand/Release MSC_Tests.ttcn:7860 MSC_Tests control part MSC_Tests.ttcn:691 TC_lu_imsi_timeout_tmsi_realloc testcase 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