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5500440TC_lu_imsi_auth3g_tmsifalsePASSED0MSC_Tests1.1181190TC_lu_imsi_auth3g_tmsi_check_imeifalsePASSED0MSC_Tests1.41890TC_lu_imsi_auth3g_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5942530TC_lu_imsi_auth_tmsifalsePASSED0MSC_Tests1.1176570TC_lu_imsi_auth_tmsi_check_imeifalsePASSED0MSC_Tests1.3882460TC_lu_imsi_auth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests1.368150TC_lu_imsi_auth_tmsi_check_imei_early_errfalsePASSED0MSC_Tests1.2820090TC_lu_imsi_auth_tmsi_check_imei_early_nackfalsePASSED0MSC_Tests1.2035640TC_lu_imsi_auth_tmsi_check_imei_errfalsePASSED0MSC_Tests1.141480TC_lu_imsi_auth_tmsi_check_imei_nackfalsePASSED0MSC_Tests0.5373940TC_lu_imsi_auth_tmsi_encr_0134_1falsePASSED0MSC_Tests0.5941090TC_lu_imsi_auth_tmsi_encr_0134_34falsePASSED0MSC_Tests1.2004250TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3falsePASSED0MSC_Tests0.540810TC_lu_imsi_auth_tmsi_encr_013_2falsePASSED0MSC_Tests0.5488370TC_lu_imsi_auth_tmsi_encr_13_13falsePASSED0MSC_Tests0.5240670TC_lu_imsi_auth_tmsi_encr_13_2falsePASSED0MSC_Tests0.5660360TC_lu_imsi_auth_tmsi_encr_1_13falsePASSED0MSC_Tests0.4563160TC_lu_imsi_auth_tmsi_encr_3_1falsePASSED0MSC_Tests0.4791430TC_lu_imsi_auth_tmsi_encr_3_13falsePASSED0MSC_Tests1.112150TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debugfalsePASSED0MSC_Tests0.4575860TC_lu_imsi_auth_tmsi_encr_3_1_no_cmfalsePASSED0MSC_Tests0.7050760TC_lu_imsi_noauth_notmsifalsePASSED0MSC_Tests1.0550820TC_lu_imsi_noauth_notmsi_check_imeifalsePASSED0MSC_Tests1.4423680TC_lu_imsi_noauth_notmsi_check_imei_earlyfalsePASSED0MSC_Tests0.626330TC_lu_imsi_noauth_tmsifalsePASSED0MSC_Tests1.1968290TC_lu_imsi_noauth_tmsi_check_imeifalsePASSED0MSC_Tests1.3879450TC_lu_imsi_noauth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5500790TC_lu_imsi_rejectfalsePASSED0MSC_Tests5.5677340TC_lu_imsi_timeout_gsupfalsePASSED755MSC_Tests7.539369Timeout waiting for ClearCommand/Release MSC_Tests.ttcn:7860 MSC_Tests control part MSC_Tests.ttcn:691 TC_lu_imsi_timeout_tmsi_realloc testcase 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