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6390TC_lu_imsi_auth3g_tmsifalsePASSED0MSC_Tests1.1407440TC_lu_imsi_auth3g_tmsi_check_imeifalsePASSED0MSC_Tests1.3225020TC_lu_imsi_auth3g_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.6059030TC_lu_imsi_auth_tmsifalsePASSED0MSC_Tests1.207180TC_lu_imsi_auth_tmsi_check_imeifalsePASSED0MSC_Tests1.3873330TC_lu_imsi_auth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests1.3233790TC_lu_imsi_auth_tmsi_check_imei_early_errfalsePASSED0MSC_Tests1.351770TC_lu_imsi_auth_tmsi_check_imei_early_nackfalsePASSED0MSC_Tests1.177360TC_lu_imsi_auth_tmsi_check_imei_errfalsePASSED0MSC_Tests1.2178860TC_lu_imsi_auth_tmsi_check_imei_nackfalsePASSED0MSC_Tests0.5488950TC_lu_imsi_auth_tmsi_encr_0134_1falsePASSED0MSC_Tests0.5665220TC_lu_imsi_auth_tmsi_encr_0134_34falsePASSED0MSC_Tests1.2421440TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3falsePASSED0MSC_Tests0.5185910TC_lu_imsi_auth_tmsi_encr_013_2falsePASSED0MSC_Tests0.5708870TC_lu_imsi_auth_tmsi_encr_13_13falsePASSED0MSC_Tests0.5036770TC_lu_imsi_auth_tmsi_encr_13_2falsePASSED0MSC_Tests1.2682890TC_lu_imsi_auth_tmsi_encr_1_13falsePASSED0MSC_Tests0.5504350TC_lu_imsi_auth_tmsi_encr_3_1falsePASSED0MSC_Tests1.2835120TC_lu_imsi_auth_tmsi_encr_3_13falsePASSED0MSC_Tests1.1334990TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debugfalsePASSED0MSC_Tests1.2316380TC_lu_imsi_auth_tmsi_encr_3_1_no_cmfalsePASSED0MSC_Tests0.5428080TC_lu_imsi_noauth_notmsifalsePASSED0MSC_Tests1.0926430TC_lu_imsi_noauth_notmsi_check_imeifalsePASSED0MSC_Tests1.3630380TC_lu_imsi_noauth_notmsi_check_imei_earlyfalsePASSED0MSC_Tests0.7322870TC_lu_imsi_noauth_tmsifalsePASSED0MSC_Tests1.1220390TC_lu_imsi_noauth_tmsi_check_imeifalsePASSED0MSC_Tests1.4069790TC_lu_imsi_noauth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.6097130TC_lu_imsi_rejectfalsePASSED0MSC_Tests5.5273240TC_lu_imsi_timeout_gsupfalsePASSED782MSC_Tests7.556452Timeout waiting for ClearCommand/Release MSC_Tests.ttcn:7860 MSC_Tests control part MSC_Tests.ttcn:691 TC_lu_imsi_timeout_tmsi_realloc testcase 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