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70TC_lu_imsi_auth3g_tmsifalsePASSED0MSC_Tests1.1962720TC_lu_imsi_auth3g_tmsi_check_imeifalsePASSED0MSC_Tests1.3301830TC_lu_imsi_auth3g_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5511190TC_lu_imsi_auth_tmsifalsePASSED0MSC_Tests1.1598820TC_lu_imsi_auth_tmsi_check_imeifalsePASSED0MSC_Tests1.4248790TC_lu_imsi_auth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests1.4116050TC_lu_imsi_auth_tmsi_check_imei_early_errfalsePASSED0MSC_Tests1.2997430TC_lu_imsi_auth_tmsi_check_imei_early_nackfalsePASSED0MSC_Tests0.5400210TC_lu_imsi_auth_tmsi_check_imei_errfalsePASSED0MSC_Tests1.1131330TC_lu_imsi_auth_tmsi_check_imei_nackfalsePASSED0MSC_Tests0.5788630TC_lu_imsi_auth_tmsi_encr_0134_1falsePASSED0MSC_Tests0.5720390TC_lu_imsi_auth_tmsi_encr_0134_34falsePASSED0MSC_Tests0.5697870TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3falsePASSED0MSC_Tests0.5548510TC_lu_imsi_auth_tmsi_encr_013_2falsePASSED0MSC_Tests0.5651020TC_lu_imsi_auth_tmsi_encr_13_13falsePASSED0MSC_Tests0.5504520TC_lu_imsi_auth_tmsi_encr_13_2falsePASSED0MSC_Tests0.5669520TC_lu_imsi_auth_tmsi_encr_1_13falsePASSED0MSC_Tests0.5264910TC_lu_imsi_auth_tmsi_encr_3_1falsePASSED0MSC_Tests0.5636530TC_lu_imsi_auth_tmsi_encr_3_13falsePASSED0MSC_Tests1.1056520TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debugfalsePASSED0MSC_Tests0.5622430TC_lu_imsi_auth_tmsi_encr_3_1_no_cmfalsePASSED0MSC_Tests0.6390460TC_lu_imsi_noauth_notmsifalsePASSED0MSC_Tests1.1682530TC_lu_imsi_noauth_notmsi_check_imeifalsePASSED0MSC_Tests1.3145440TC_lu_imsi_noauth_notmsi_check_imei_earlyfalsePASSED0MSC_Tests0.7847560TC_lu_imsi_noauth_tmsifalsePASSED0MSC_Tests1.1895230TC_lu_imsi_noauth_tmsi_check_imeifalsePASSED0MSC_Tests1.4337580TC_lu_imsi_noauth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5345090TC_lu_imsi_rejectfalsePASSED0MSC_Tests5.5199340TC_lu_imsi_timeout_gsupfalsePASSED785MSC_Tests7.584897Timeout waiting for ClearCommand/Release MSC_Tests.ttcn:7860 MSC_Tests control part MSC_Tests.ttcn:691 TC_lu_imsi_timeout_tmsi_realloc testcase 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