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s0.6116390TC_lu_imsi_auth3g_tmsifalsePASSED0MSC_Tests1.1535380TC_lu_imsi_auth3g_tmsi_check_imeifalsePASSED0MSC_Tests1.350340TC_lu_imsi_auth3g_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5885620TC_lu_imsi_auth_tmsifalsePASSED0MSC_Tests1.1769250TC_lu_imsi_auth_tmsi_check_imeifalsePASSED0MSC_Tests0.7108230TC_lu_imsi_auth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.6492160TC_lu_imsi_auth_tmsi_check_imei_early_errfalsePASSED0MSC_Tests0.6626590TC_lu_imsi_auth_tmsi_check_imei_early_nackfalsePASSED0MSC_Tests0.4887610TC_lu_imsi_auth_tmsi_check_imei_errfalsePASSED0MSC_Tests0.4476360TC_lu_imsi_auth_tmsi_check_imei_nackfalsePASSED0MSC_Tests0.5848750TC_lu_imsi_auth_tmsi_encr_0134_1falsePASSED0MSC_Tests0.5574040TC_lu_imsi_auth_tmsi_encr_0134_34falsePASSED0MSC_Tests1.2666310TC_lu_imsi_auth_tmsi_encr_0134_34_no_cm3falsePASSED0MSC_Tests0.5577350TC_lu_imsi_auth_tmsi_encr_013_2falsePASSED0MSC_Tests0.5582870TC_lu_imsi_auth_tmsi_encr_13_13falsePASSED0MSC_Tests0.5432140TC_lu_imsi_auth_tmsi_encr_13_2falsePASSED0MSC_Tests0.5937950TC_lu_imsi_auth_tmsi_encr_1_13falsePASSED0MSC_Tests0.5417150TC_lu_imsi_auth_tmsi_encr_3_1falsePASSED0MSC_Tests0.5714430TC_lu_imsi_auth_tmsi_encr_3_13falsePASSED0MSC_Tests0.4551570TC_lu_imsi_auth_tmsi_encr_3_1_log_msc_debugfalsePASSED0MSC_Tests0.5478050TC_lu_imsi_auth_tmsi_encr_3_1_no_cmfalsePASSED0MSC_Tests0.6830110TC_lu_imsi_noauth_notmsifalsePASSED0MSC_Tests1.1447690TC_lu_imsi_noauth_notmsi_check_imeifalsePASSED0MSC_Tests0.6590770TC_lu_imsi_noauth_notmsi_check_imei_earlyfalsePASSED0MSC_Tests0.7617590TC_lu_imsi_noauth_tmsifalsePASSED0MSC_Tests1.1215490TC_lu_imsi_noauth_tmsi_check_imeifalsePASSED0MSC_Tests0.6763850TC_lu_imsi_noauth_tmsi_check_imei_earlyfalsePASSED0MSC_Tests0.5624830TC_lu_imsi_rejectfalsePASSED0MSC_Tests5.5270350TC_lu_imsi_timeout_gsupfalsePASSED2344MSC_Tests7.643849Timeout waiting for ClearCommand/Release MSC_Tests.ttcn:7860 MSC_Tests control part MSC_Tests.ttcn:691 TC_lu_imsi_timeout_tmsi_realloc testcase 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