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BuildDurationFailSkipTotal
ttcn3-remsim-test-latest #13002 min 42 sec4032
ttcn3-remsim-test-latest #13012 min 41 sec4032
ttcn3-remsim-test-latest #13022 min 32 sec3032
ttcn3-remsim-test-latest #13032 min 46 sec5032
ttcn3-remsim-test-latest #13042 min 41 sec4032
ttcn3-remsim-test-latest #13052 min 46 sec5032
ttcn3-remsim-test-latest #13062 min 41 sec4032
ttcn3-remsim-test-latest #13072 min 41 sec4032
ttcn3-remsim-test-latest #13082 min 47 sec5032
ttcn3-remsim-test-latest #13092 min 42 sec4032
ttcn3-remsim-test-latest #13102 min 32 sec3032
ttcn3-remsim-test-latest #13112 min 31 sec3032
ttcn3-remsim-test-latest #13122 min 31 sec3032
ttcn3-remsim-test-latest #13132 min 47 sec5032
ttcn3-remsim-test-latest #13142 min 46 sec5032
ttcn3-remsim-test-latest #13152 min 37 sec4032
ttcn3-remsim-test-latest #13162 min 46 sec5032
ttcn3-remsim-test-latest #13172 min 47 sec5032
ttcn3-remsim-test-latest #13182 min 47 sec5032
ttcn3-remsim-test-latest #13192 min 46 sec5032
ttcn3-remsim-test-latest #13202 min 41 sec4032
ttcn3-remsim-test-latest #13212 min 41 sec4032
ttcn3-remsim-test-latest #13222 min 32 sec3032
ttcn3-remsim-test-latest #13232 min 41 sec4032
ttcn3-remsim-test-latest #13242 min 42 sec4032
ttcn3-remsim-test-latest #13252 min 46 sec5032
ttcn3-remsim-test-latest #13262 min 42 sec4032
ttcn3-remsim-test-latest #13272 min 47 sec5032
ttcn3-remsim-test-latest #13282 min 46 sec5032