<?xml version="1.0"?>
<testsuite name='Titan' tests='44' failures='0' errors='0' skipped='0' inconc='0' time='182.00'>
  <testcase classname='S1GW_Tests' name='TC_setup' time='2.843466'/>
  <testcase classname='S1GW_Tests' name='TC_setup_multi' time='0.951700'/>
  <testcase classname='S1GW_Tests' name='TC_conn_term_by_mme' time='0.594151'/>
  <testcase classname='S1GW_Tests' name='TC_conn_term_mme_unavail' time='5.119559'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_setup' time='0.286870'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_setup3' time='0.268610'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_setup_multi' time='0.734035'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_setup3_multi' time='0.967923'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_release_ind' time='0.049172'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_setup_failure' time='0.286083'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_setup3_failure' time='0.330809'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_modify_req_rsp' time='0.293291'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_modify_req_rsp_multi' time='1.388846'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_modify_ind_cnf' time='0.336197'/>
  <testcase classname='S1GW_Tests' name='TC_e_rab_modify_ind_cnf_multi' time='1.502710'/>
  <testcase classname='S1GW_Tests' name='TC_initial_ctx_setup' time='0.256779'/>
  <testcase classname='S1GW_Tests' name='TC_initial_ctx_setup3' time='0.310275'/>
  <testcase classname='S1GW_Tests' name='TC_initial_ctx_setup_multi' time='0.872584'/>
  <testcase classname='S1GW_Tests' name='TC_initial_ctx_setup3_multi' time='1.031885'/>
  <testcase classname='S1GW_Tests' name='TC_initial_ctx_setup_failure' time='5.129798'/>
  <testcase classname='S1GW_Tests' name='TC_ue_ctx_release_req' time='0.044161'/>
  <testcase classname='S1GW_Tests' name='TC_ue_ctx_release_req3' time='0.070879'/>
  <testcase classname='S1GW_Tests' name='TC_ue_ctx_release_cmd_compl' time='0.265279'/>
  <testcase classname='S1GW_Tests' name='TC_ue_ctx_release_cmd_compl3' time='0.264071'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_uldl_nas_release' time='1.022845'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_e_rab_setup' time='1.851446'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_e_rab_release_cmd' time='2.441544'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_e_rab_release_ind' time='2.635605'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_initial_ctx_setup' time='1.769149'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_ue_ctx_release_req' time='2.190890'/>
  <testcase classname='S1GW_Tests' name='TC_uemux_ue_ctx_release_cmd' time='2.229327'/>
  <testcase classname='S1GW_Tests' name='TC_handover_preparation' time='0.255445'/>
  <testcase classname='S1GW_Tests' name='TC_handover_preparation_release' time='0.303774'/>
  <testcase classname='S1GW_Tests' name='TC_handover_res_alloc' time='0.274945'/>
  <testcase classname='S1GW_Tests' name='TC_handover_res_alloc_fail' time='0.320662'/>
  <testcase classname='S1GW_Tests' name='TC_pfcp_heartbeat' time='0.014443'/>
  <testcase classname='S1GW_Tests' name='TC_mme_pool_reject_fallback' time='0.550446'/>
  <testcase classname='S1GW_Tests' name='TC_mme_pool_timeout_fallback' time='5.659435'/>
  <testcase classname='S1GW_Tests' name='TC_mme_pool_all_reject' time='0.040345'/>
  <testcase classname='S1GW_Tests' name='TC_mme_pool_enb_disc_wait_s1setup_req' time='0.020355'/>
  <testcase classname='S1GW_Tests' name='TC_mme_pool_enb_disc_wait_s1setup_rsp' time='0.042049'/>
  <testcase classname='S1GW_Tests' name='TC_rest_mme_list' time='0.005471'/>
  <testcase classname='S1GW_Tests' name='TC_rest_mme_add_del' time='0.013657'/>
  <testcase classname='S1GW_Tests' name='TC_rest_mme_del_fallback' time='0.549935'/>
</testsuite>
