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0x7fffffff__INT_LEAST64_TYPE__ long long int__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| AƒŽ Aƒ„…ŽIÎÅÄÃ4A„Ž4A„…†ŽA,aeabi"7-M M "ñÿ 00 46"$&(*,.028Ar£Õ:n© 7: Ù ð (?Rj4ƒ4flash_common_f01.c$t$dwm4.0.e49964f5ef61afced4b3c3d071764ac8wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.8c90486dae5eea2d8efddd23fe5d09d9wm4.memorymap.h.28.9d643caf3497e42de1f9c9da7297e92ewm4.flash_common_f01.h.35.08a510204460b203acd9a4d6dd59edc6wm4.flash.h.52.0ccf0cd1c428fc1191d0b73e3b4872d0flash_clear_pgerr_flagflash_clear_wrprterr_flagflash_wait_for_last_operationflash_get_status_flagsflash_program_wordflash_program_half_wordflash_erase_option_bytesflash_unlock_option_bytesflash_program_option_bytes > @@ = B" = = B = "&-4;BINZ_kr€…¤°µÄÎÒ×áåêóü#,6; JTX]gkp Š §¬»ÅÊÕÚ/J o ( 08 %+' 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GPIO_BSRR(GPIOJ)SCB_BASE (SCS_BASE + 0x0D00)RCC_BASE (PERIPH_BASE_AHB1 + 0x01000)ADC1_BASE (PERIPH_BASE_APB2 + 0x2400)GPIO_AF6 0x6__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64GPIOK_PUPDR GPIO_PUPDR(GPIOK)CORESIGHT_LSR_SLK (1<<1)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 2__CHAR_UNSIGNED__ 1GPIOJ_LCKR GPIO_LCKR(GPIOJ)GPIO_AF2 0x2__FLT64_HAS_INFINITY__ 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffGPIO_PUPD_MASK(n) (0x3 << (2 * (n)))__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17WINT_MIN __WINT_MIN__INT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__SIZEOF_INT__ 4CEC_BASE (PERIPH_BASE_APB1 + 0x7800)GPIOF_OTYPER GPIO_OTYPER(GPIOF)GPIO_OSPEED(n,speed) ((speed) << (2 * (n)))signed charINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 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unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38GPIOG_BSRR GPIO_BSRR(GPIOG)__USFRACT_MAX__ 0XFFP-8UHRGPIOH GPIO_PORT_H_BASE__UINTPTR_MAX__ 0xffffffffUGPIO_AF8 0x8__FLT32_MIN_EXP__ (-125)GPIOA_MODER GPIO_MODER(GPIOA)GPIO_MODE_AF 0x2__ATOMIC_ACQ_REL 4__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64INT_LEAST64_MAX __INT_LEAST64_MAX__GPIOE_LCKR GPIO_LCKR(GPIOE)__SFRACT_EPSILON__ 0x1P-7HRgpio_port_config_lock__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31GPIOI_IDR GPIO_IDR(GPIOI)DWT_BASE (PPBI_BASE + 0x1000)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)GPIOK_OTYPER GPIO_OTYPER(GPIOK)ITM_BASE (PPBI_BASE + 0x0000)__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32GPIO_AF10 0xa__INT_FAST16_WIDTH__ 32INTMAX_C__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAX__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_MAX__ 0x7fffffffGPIOB GPIO_PORT_B_BASE__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIOI_OTYPER GPIO_OTYPER(GPIOI)../../stm32/common/gpio_common_all.c__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)__UACCUM_IBIT__ 16long intUINT8_MAXIWDG_BASE (PERIPH_BASE_APB1 + 0x3000)SIZE_MAX __SIZE_MAX__GPIOH_AFRH GPIO_AFRH(GPIOH)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1GPIO9 (1 << 9)__UFRACT_EPSILON__ 0x1P-16UR__ARM_ARCH_7M__ 1GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32USART2_BASE (PERIPH_BASE_APB1 + 0x4400)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charGPIOJ_AFRL GPIO_AFRL(GPIOJ)GPIOJ_OTYPER GPIO_OTYPER(GPIOJ)__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__GPIO_AF1 0x1__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX__gpio_getSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)__DEC_EVAL_METHOD__ 2__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)GPIO_AF9 0x9INFO_BASE (0x1ffff000U)GPIOB_PUPDR GPIO_PUPDR(GPIOB)BIT27 (1<<27)__LFRACT_MAX__ 0X7FFFFFFFP-31LRGPIOH_ODR GPIO_ODR(GPIOH)__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9__thumb__ 1__INT_LEAST32_MAX__ 0x7fffffffL__VERSION__ "12.2.1 20221205"INT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1GPIO_PUPD_PULLUP 0x1LIBOPENCM3_GPIO_COMMON_ALL_H __FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKGPIO4 (1 << 4)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2PTRDIFF_MINFLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x02000)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)UINTPTR_MAX __UINTPTR_MAX____STDC_VERSION__ 201710L__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINGPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)GPIO_PUPD(n,pupd) ((pupd) << (2 * (n)))__UINT_FAST32_TYPE__ unsigned intunsigned char__STDC_UTF_32__ 1__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38TIM6_BASE (PERIPH_BASE_APB1 + 0x1000)__FRACT_MAX__ 0X7FFFP-15RTIM3_BASE (PERIPH_BASE_APB1 + 0x0400)INT_LEAST32_MAX __INT_LEAST32_MAX____INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5GPIO_AF7 0x7GPIO11 (1 << 11)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127GPIOJ_PUPDR GPIO_PUPDR(GPIOJ)__USQ_FBIT__ 32uint16_t__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32INT_FAST32_MIN (-INT_FAST32_MAX - 1)UINT_LEAST8_MAXINT_LEAST8_MAXGPIOG_AFRH GPIO_AFRH(GPIOG)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__GPIOD_PUPDR GPIO_PUPDR(GPIOD)__USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intGPIOG_AFRL GPIO_AFRL(GPIOG)__FLT_MIN__ 1.1754943508222875e-38FGPIOG_ODR GPIO_ODR(GPIOG)__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LGPIOB_MODER GPIO_MODER(GPIOB)WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00)__USFRACT_MIN__ 0.0UHR__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H GPIOK_BSRR GPIO_BSRR(GPIOK)__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)GPIO8 (1 << 8)GPIO_OSPEED_LOW 0x0GPIOB_AFRL GPIO_AFRL(GPIOB)__DA_FBIT__ 31__GXX_ABI_VERSION 1017GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0c00)__INT_LEAST16_MAX__ 0x7fffGPIOI GPIO_PORT_I_BASE__FLT_DENORM_MIN__ 1.4012984643248171e-45F__ULLACCUM_EPSILON__ 0x1P-32ULLKGPIOC_ODR GPIO_ODR(GPIOC)GPIOA_LCKR GPIO_LCKR(GPIOA)INT_LEAST8_MAX __INT_LEAST8_MAX__GPIOK_ODR GPIO_ODR(GPIOK)__UINT32_C(c) c ## ULGPIOD_LCKR GPIO_LCKR(GPIOD)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FGPIO_MODE_MASK(n) (0x3 << (2 * (n)))GPIO_AF0 0x0__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2__HQ_IBIT__ 0__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)GPIOC_BSRR GPIO_BSRR(GPIOC)GPIOF_PUPDR GPIO_PUPDR(GPIOF)__FLT32_HAS_QUIET_NAN__ 1I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)GPIOB_ODR GPIO_ODR(GPIOB)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308GPIOJ_IDR GPIO_IDR(GPIOJ)__ARM_ARCH_EXT_IDIV__ 1DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7ac)GPIO_PUPD_NONE 0x0bool _BoolSYSCFG_COMP_BASE (PERIPH_BASE_APB2 + 0x0000)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffGPIOA_IDR GPIO_IDR(GPIOA)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)GPIO3 (1 << 3)INT16_MAX __INT16_MAX__PERIPH_BASE_AHB2 (PERIPH_BASE + 0x8000000)GPIOD_MODER GPIO_MODER(GPIOD)__FLT32X_IS_IEC_60559__ 2GPIO_OSPEED_2MHZ 0x0PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)GPIOF_BSRR GPIO_BSRR(GPIOF)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXGPIOK_OSPEEDR GPIO_OSPEEDR(GPIOK)__INT_LEAST16_WIDTH__ 16USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)SPI1_BASE (PERIPH_BASE_APB2 + 0x3000)__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__WINT_MAX__ 0xffffffffU__OPTIMIZE_SIZE__ 1__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)UINT64_C__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULGPIOD_IDR GPIO_IDR(GPIOD)GPIOK_AFRH GPIO_AFRH(GPIOK)INT64_C(c) __INT64_C(c)__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1GPIO_AFR_MASK(n) (0xf << ((n) * 4))__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXGPIO_ODR(port) MMIO32((port) + 0x14)GPIO_OSPEED_HIGH 0x3GPIOK GPIO_PORT_K_BASE__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024GPIO_MODER(port) MMIO32((port) + 0x00)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1GPIOJ_OSPEEDR GPIO_OSPEEDR(GPIOJ)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fCRC_BASE (PERIPH_BASE_AHB1 + 0x03000)BIT14 (1<<14)GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intGPIOF_AFRL GPIO_AFRL(GPIOF)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINGPIO_AFRH(port) MMIO32((port) + 0x24)__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)GPIO_AF11 0xb__INT32_MAX__ 0x7fffffffL__ARM_PCS 1UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLGPIOI_ODR GPIO_ODR(GPIOI)__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24GPIOC GPIO_PORT_C_BASE__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__GPIOH_LCKR GPIO_LCKR(GPIOH)GPIOE GPIO_PORT_E_BASEBIT28 (1<<28)UINT32_MAX __UINT32_MAX____GCC_ATOMIC_CHAR16_T_LOCK_FREE 2GPIOF_BRR GPIO_BRR(GPIOF)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0GPIOK_AFRL GPIO_AFRL(GPIOK)gpioport__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64GPIOE_IDR GPIO_IDR(GPIOE)GPIOE_PUPDR GPIO_PUPDR(GPIOE)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1GPIO_OTYPE_PP 0x0__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))DAC_BASE (PERIPH_BASE_APB1 + 0x7400)__GNUC__ 12GPIOF_AFRH GPIO_AFRH(GPIOF)WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16GPIOC_MODER GPIO_MODER(GPIOC)__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4GPIO_AF15 0xf__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULK__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)GPIO_AF14 0xe__UINT_FAST64_MAX__ 0xffffffffffffffffULLGPIO2 (1 << 2)GPIOA_AFRL GPIO_AFRL(GPIOA)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLLIBOPENCM3_GPIO_COMMON_F24_H __ARM_ARCH_PROFILE__INT64_TYPE__ long long intGPIO_OSPEED_50MHZ 0x2__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4BACKUP_REGS_BASE (RTC_BASE + 0x50)GPIO_MODE_INPUT 0x0__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXFPB_BASE (PPBI_BASE + 0x2000)__UHA_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0GPIOG GPIO_PORT_G_BASESTIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__ID_BASE (SCS_BASE + 0x0FD0)SYS_TICK_BASE (SCS_BASE + 0x0010)__UFRACT_FBIT__ 16GPIO_AF5 0x5__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308GPIOD_ODR GPIO_ODR(GPIOD)__INT_FAST32_TYPE__ intGPIOB_BSRR GPIO_BSRR(GPIOB)__ARM_ARCH_PROFILE 77unsigned intGPIOE_MODER GPIO_MODER(GPIOE)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1GPIOA_BRR GPIO_BRR(GPIOA)__USACCUM_IBIT__ 8GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sectionsGPIO_MODE(n,mode) ((mode) << (2 * (n)))__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0GPIO12 (1 << 12)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1__ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_CGPIOE_BSRR GPIO_BSRR(GPIOE)__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__GPIOH_IDR GPIO_IDR(GPIOH)GPIOA GPIO_PORT_A_BASE__SIZEOF_PTRDIFF_T__ 4GPIO13 (1 << 13)__STDC__ 1GPIOK_IDR GPIO_IDR(GPIOK)__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned chargpio_set__ARM_FEATURE_COPROC 15UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINGPIOD GPIO_PORT_D_BASEGPIO14 (1 << 14)PERIPH_BASE (0x40000000U)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x20000)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 2TSC_BASE (PERIPH_BASE_AHB1 + 0x03000)__LFRACT_EPSILON__ 0x1P-31LRGPIOI_PUPDR GPIO_PUPDR(GPIOI)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xGPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)__arm__ 1__FLT32_MIN_10_EXP__ (-37)TIM1_BASE (PERIPH_BASE_APB2 + 0x2c00)MMIO64(addr) (*(volatile uint64_t *)(addr))gpio_port_writeGPIOG_IDR GPIO_IDR(GPIOG)INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)GPIOH_MODER GPIO_MODER(GPIOH)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)GPIOA_OTYPER GPIO_OTYPER(GPIOA)__TA_IBIT__ 64GPIOG_MODER GPIO_MODER(GPIOG)GPIOE_AFRL GPIO_AFRL(GPIOE)__ARM_FEATURE_QRDMXGPIO_OTYPE_OD 0x1__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__GPIOD_BSRR GPIO_BSRR(GPIOD)DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0)INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT8_MIN (-INT8_MAX - 1)GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)GPIO1 (1 << 1)__FLT32_DIG__ 6INT_LEAST16_MAXGPIOG_LCKR GPIO_LCKR(GPIOG)BIT15 (1<<15)GPIOB_AFRH GPIO_AFRH(GPIOB)GPIO_LCKK (1 << 16)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAXGPIOI_LCKR GPIO_LCKR(GPIOI)__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intGPIOJ_ODR GPIO_ODR(GPIOJ)USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned int__FLT_MIN_10_EXP__ (-37)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63GPIOE_AFRH GPIO_AFRH(GPIOE)INT_LEAST64_MAX__SACCUM_IBIT__ 8reg32__UHQ_IBIT__ 0TIM2_BASE (PERIPH_BASE_APB1 + 0x0000)LIBOPENCM3_MEMORYMAP_COMMON_H BIT29 (1<<29)LIBOPENCM3_GPIO_COMMON_F234_H __INT_FAST16_TYPE__ intGPIOF_IDR GPIO_IDR(GPIOF)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15GPIOI_BSRR GPIO_BSRR(GPIOI)__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffGPIOK_MODER GPIO_MODER(GPIOK)GPIO_PUPDR(port) MMIO32((port) + 0x0c)PTRDIFF_MAX __PTRDIFF_MAX__GPIO_PUPD_PULLDOWN 0x2__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKGPIOC_BRR GPIO_BRR(GPIOC)GPIO_LCKR(port) MMIO32((port) + 0x1c)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRGPIO_AF4 0x4__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intGPIOF_MODER GPIO_MODER(GPIOF)gpio_port_readGPIOH_PUPDR GPIO_PUPDR(GPIOH)GPIOK_LCKR GPIO_LCKR(GPIOK)WCHAR_MINGPIOB_IDR GPIO_IDR(GPIOB)BEGIN_DECLS GPIOJ_AFRH GPIO_AFRH(GPIOJ)GPIOC_AFRH GPIO_AFRH(GPIOC)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)GPIOB_LCKR GPIO_LCKR(GPIOB)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1__ARM_FPGPIOE_OTYPER GPIO_OTYPER(GPIOE)__QQ_IBIT__ 0__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0GPIO7 (1 << 7)__UINT_LEAST32_TYPE__ long unsigned intGPIO_AFR(n,af) ((af) << ((n) * 4))__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2GPIOA_BSRR GPIO_BSRR(GPIOA)TIM16_BASE (PERIPH_BASE_APB2 + 0x4400)GPIOG_PUPDR GPIO_PUPDR(GPIOG)INT_LEAST8_MININTMAX_MAX__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1TIM17_BASE (PERIPH_BASE_APB2 + 0x4800)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C/build/libopencm3/lib/gd32/f1x0INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intGPIOE_ODR GPIO_ODR(GPIOE)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLGPIO0 (1 << 0)gpio_toggleUSART1_BASE (PERIPH_BASE_APB2 + 0x3800)portDMA1_BASE (PERIPH_BASE_AHB1 + 0x00000)GPIOB_BRR GPIO_BRR(GPIOB)TPIU_BASE (PPBI_BASE + 0x40000)__LDBL_MIN__ 2.2250738585072014e-308LGPIOD_OTYPER GPIO_OTYPER(GPIOD)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16GPIOJ_MODER GPIO_MODER(GPIOJ)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0EXTI_BASE (PERIPH_BASE_APB2 + 0x0400)LIBOPENCM3_GPIO_H GPIO_AF12 0xcshort int__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32UINT_LEAST32_MAXGPIOI_MODER GPIO_MODER(GPIOI)BIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCGPIOA_ODR GPIO_ODR(GPIOA)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53GPIO_BRR(port) MMIO32((port) + 0x28)BIT5 (1<<5)__GNUC_PATCHLEVEL__ 1BIT1 (1<<1)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)GPIO_OSPEED_MED 0x1GPIO_MODE_OUTPUT 0x1__INT16_MAX__ 0x7fff__INT_WIDTH__ 32GPIOJ GPIO_PORT_J_BASEGPIOD_AFRL GPIO_AFRL(GPIOD)__QQ_FBIT__ 7GPIOC_OTYPER GPIO_OTYPER(GPIOC)RTC_BASE (PERIPH_BASE_APB1 + 0x2800)GPIO_AF3 0x3__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64GPIO_IDR(port) MMIO32((port) + 0x10)GPIO_AFRL(port) MMIO32((port) + 0x20)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32GPIO_OSPEEDR(port) MMIO32((port) + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0TIM14_BASE (PERIPH_BASE_APB1 + 0x2000)__SIZEOF_WINT_T__ 4__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32GPIOF_LCKR GPIO_LCKR(GPIOF)GPIO_MODE_ANALOG 0x3__ARM_ASM_SYNTAX_UNIFIED__ 1__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODGPIOA_AFRH GPIO_AFRH(GPIOA)__thumb2__ 1GPIOH_BSRR GPIO_BSRR(GPIOH)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H GPIOG_OTYPER GPIO_OTYPER(GPIOG)INT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64GPIOC_LCKR GPIO_LCKR(GPIOC)__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)GPIOB_OTYPER GPIO_OTYPER(GPIOB)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1__UINT_FAST16_TYPE__ unsigned intGPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)GPIO6 (1 << 6)__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15TIM15_BASE (PERIPH_BASE_APB2 + 0x4000)BIT22 (1<<22)__INT_LEAST8_WIDTH__ 8GD32F1X0 1__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CGPIOD_BRR GPIO_BRR(GPIOD)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1GPIO15 (1 << 15)GPIOH_OTYPER GPIO_OTYPER(GPIOH)__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffUSPI2_BASE (PERIPH_BASE_APB1 + 0x3800)__ARM_ARCH__LONG_MAX__ 0x7fffffffLGPIO_OSPEED_100MHZ 0x3__ARM_FEATURE_LDREX 7PTRDIFF_MAX__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32WINT_MAX__INT16_C(c) cGPIOD_AFRH GPIO_AFRH(GPIOD)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)__UINT_FAST32_MAX__ 0xffffffffUGPIO_OTYPER(port) MMIO32((port) + 0x04)__DBL_MIN_10_EXP__ (-307)dataGPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)GPIOC_IDR GPIO_IDR(GPIOC)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32GPIOH_AFRL GPIO_AFRL(GPIOH)UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53GPIO_AF13 0xd__ULFRACT_IBIT__ 0GPIO_ALL 0xffffINT_FAST16_MAXITR_BASE (SCS_BASE + 0x0000)GPIOF GPIO_PORT_F_BASE__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intGPIOA_PUPDR GPIO_PUPDR(GPIOA)__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| A,aeabi"7-M M "ñÿ 79!#%')+-/135;=nŸÑ6j¤ ß := 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../../stm32/common/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/stm32../../../include/libopencm3/cm3../../../include/libopencm3/gd32/f1x0../../../include/libopencm3/stm32/f0../../../include/libopencm3/stm32/commongpio_common_f0234.cstdint.hgpio.hcommon.hstdbool.hmemorymap.hmemorymap.hmemorymap.hgpio.hgpio.hgpio_common_f24.hgpio_common_f234.hgpio_common_all.hÚx . 'x.!".2 = -// ,/x .!!.… &t ! 01 ".1</. 6!²&u.$!".1</. . +J1</. 6!! GPIOJ_BSRR GPIO_BSRR(GPIOJ)SCB_BASE (SCS_BASE + 0x0D00)RCC_BASE (PERIPH_BASE_AHB1 + 0x01000)ADC1_BASE (PERIPH_BASE_APB2 + 0x2400)GPIO_AF6 0x6__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64GPIOK_PUPDR GPIO_PUPDR(GPIOK)CORESIGHT_LSR_SLK (1<<1)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 2__CHAR_UNSIGNED__ 1GPIOJ_LCKR GPIO_LCKR(GPIOJ)GPIO_AF2 0x2__FLT64_HAS_INFINITY__ 1../../stm32/common/gpio_common_f0234.c__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffGPIO_PUPD_MASK(n) (0x3 << (2 * (n)))__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17WINT_MIN __WINT_MIN__INT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__SIZEOF_INT__ 4CEC_BASE (PERIPH_BASE_APB1 + 0x7800)GPIOF_OTYPER GPIO_OTYPER(GPIOF)GPIO_OSPEED(n,speed) ((speed) << (2 * (n)))INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKGPIO_OSPEED_25MHZ 0x1__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intGPIO10 (1 << 10)gpios__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__SHRT_WIDTH__ 16__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)INT_FAST16_MIN__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)__UINT8_C(c) c__INT16_TYPE__ short inttrue 1__FLT64_MAX__ 1.7976931348623157e+308F64UINT_FAST32_MAXGPIOF_ODR GPIO_ODR(GPIOF)GPIO_BSRR(port) MMIO32((port) + 0x18)GPIO5 (1 << 5)GPIOI_AFRH GPIO_AFRH(GPIOI)INT_FAST64_MAX __INT_FAST64_MAX____GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1GPIOI_AFRL GPIO_AFRL(GPIOI)GPIOC_PUPDR GPIO_PUPDR(GPIOC)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64__SIG_ATOMIC_TYPE__ intGPIOC_AFRL GPIO_AFRL(GPIOC)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38GPIOG_BSRR GPIO_BSRR(GPIOG)__USFRACT_MAX__ 0XFFP-8UHRGPIOH GPIO_PORT_H_BASE__UINTPTR_MAX__ 0xffffffffUGPIO_AF8 0x8__FLT32_MIN_EXP__ (-125)GPIOA_MODER GPIO_MODER(GPIOA)GPIO_MODE_AF 0x2__ATOMIC_ACQ_REL 4__ULFRACT_FBIT__ 32INT8_MIN (-INT8_MAX - 1)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64INT_LEAST64_MAX __INT_LEAST64_MAX__GPIOE_LCKR GPIO_LCKR(GPIOE)__SFRACT_EPSILON__ 0x1P-7HRGPIOK_MODER GPIO_MODER(GPIOK)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31GPIOI_IDR GPIO_IDR(GPIOI)DWT_BASE (PPBI_BASE + 0x1000)__UTA_FBIT__ 64__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)GPIOK_OTYPER GPIO_OTYPER(GPIOK)ITM_BASE (PPBI_BASE + 0x0000)__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32GPIO_AF10 0xa__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAX__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_MAX__ 0x7fffffffGPIOB GPIO_PORT_B_BASE__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__GPIOI_OTYPER GPIO_OTYPER(GPIOI)__UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)__UACCUM_IBIT__ 16long intUINT8_MAXIWDG_BASE (PERIPH_BASE_APB1 + 0x3000)SIZE_MAX __SIZE_MAX__GPIOH_AFRH GPIO_AFRH(GPIOH)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1GPIO9 (1 << 9)__UFRACT_EPSILON__ 0x1P-16UR__ARM_ARCH_7M__ 1GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32USART2_BASE (PERIPH_BASE_APB1 + 0x4400)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charGPIOJ_AFRL GPIO_AFRL(GPIOJ)GPIOJ_OTYPER GPIO_OTYPER(GPIOJ)__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__GPIO_AF1 0x1__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)__DEC_EVAL_METHOD__ 2__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)GPIO_AF9 0x9INFO_BASE (0x1ffff000U)GPIOB_PUPDR GPIO_PUPDR(GPIOB)BIT27 (1<<27)__LFRACT_MAX__ 0X7FFFFFFFP-31LRGPIOH_ODR GPIO_ODR(GPIOH)__FLT_MIN_10_EXP__ (-37)INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9__thumb__ 1__INT_LEAST32_MAX__ 0x7fffffffLsigned charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1GPIO_PUPD_PULLUP 0x1LIBOPENCM3_GPIO_COMMON_ALL_H __FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKGPIO4 (1 << 4)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2PTRDIFF_MINFLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x02000)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)UINTPTR_MAX __UINTPTR_MAX____STDC_VERSION__ 201710L__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINGPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)pull_up_downGPIO_PUPD(n,pupd) ((pupd) << (2 * (n)))__UINT_FAST32_TYPE__ unsigned intunsigned char__STDC_UTF_32__ 1__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38TIM6_BASE (PERIPH_BASE_APB1 + 0x1000)__FRACT_MAX__ 0X7FFFP-15RTIM3_BASE (PERIPH_BASE_APB1 + 0x0400)INT_LEAST32_MAX __INT_LEAST32_MAX____INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5GPIO_AF7 0x7GPIO11 (1 << 11)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127GPIOJ_PUPDR GPIO_PUPDR(GPIOJ)__USQ_FBIT__ 32uint16_t__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32__FLT_DENORM_MIN__ 1.4012984643248171e-45FUINT_LEAST8_MAXINT_LEAST8_MAXGPIOG_AFRH GPIO_AFRH(GPIOG)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__GPIOD_PUPDR GPIO_PUPDR(GPIOD)__USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intmoderGPIOG_AFRL GPIO_AFRL(GPIOG)__FLT_MIN__ 1.1754943508222875e-38FGPIOG_ODR GPIO_ODR(GPIOG)__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LGPIOB_MODER GPIO_MODER(GPIOB)WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00)__USFRACT_MIN__ 0.0UHR__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024LIBOPENCM3_MEMORYMAP_H GPIOK_BSRR GPIO_BSRR(GPIOK)alt_func_numDESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)GPIO8 (1 << 8)GPIO_OSPEED_LOW 0x0GPIOB_AFRL GPIO_AFRL(GPIOB)__DA_FBIT__ 31__GXX_ABI_VERSION 1017GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0c00)__INT_LEAST16_MAX__ 0x7fffGPIOI GPIO_PORT_I_BASEID_BASE (SCS_BASE + 0x0FD0)__ULLACCUM_EPSILON__ 0x1P-32ULLKGPIOC_ODR GPIO_ODR(GPIOC)GPIOA_LCKR GPIO_LCKR(GPIOA)INT_LEAST8_MAX __INT_LEAST8_MAX__GPIOK_ODR GPIO_ODR(GPIOK)__UINT32_C(c) c ## ULGPIOD_LCKR GPIO_LCKR(GPIOD)__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FGPIO_MODE_MASK(n) (0x3 << (2 * (n)))GPIO_AF0 0x0__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2__HQ_IBIT__ 0__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)GPIOC_BSRR GPIO_BSRR(GPIOC)GPIOF_PUPDR GPIO_PUPDR(GPIOF)__FLT32_MIN__ 1.1754943508222875e-38F32__FLT32_HAS_QUIET_NAN__ 1I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)GPIOB_ODR GPIO_ODR(GPIOB)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308GPIOJ_IDR GPIO_IDR(GPIOJ)otype__ARM_ARCH_EXT_IDIV__ 1DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7ac)GPIO_PUPD_NONE 0x0bool _BoolSYSCFG_COMP_BASE (PERIPH_BASE_APB2 + 0x0000)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffGPIOA_IDR GPIO_IDR(GPIOA)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)GPIO3 (1 << 3)INT16_MAX __INT16_MAX__PERIPH_BASE_AHB2 (PERIPH_BASE + 0x8000000)GPIOD_MODER GPIO_MODER(GPIOD)__FLT32X_IS_IEC_60559__ 2GPIO_OSPEED_2MHZ 0x0speedGPIOF_BSRR GPIO_BSRR(GPIOF)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXGPIOK_OSPEEDR GPIO_OSPEEDR(GPIOK)__INT_LEAST16_WIDTH__ 16USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)SPI1_BASE (PERIPH_BASE_APB2 + 0x3000)__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__WINT_MAX__ 0xffffffffU__OPTIMIZE_SIZE__ 1__USFRACT_FBIT__ 8ospeedrCORESIGHT_LSR_SLI (1<<0)UINT64_C__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULGPIOD_IDR GPIO_IDR(GPIOD)GPIOK_AFRH GPIO_AFRH(GPIOK)INT64_C(c) __INT64_C(c)__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1GPIO_AFR_MASK(n) (0xf << ((n) * 4))__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXGPIO_ODR(port) MMIO32((port) + 0x14)GPIO_OSPEED_HIGH 0x3GPIOK GPIO_PORT_K_BASE__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024GPIO_MODER(port) MMIO32((port) + 0x00)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1GPIOJ_OSPEEDR GPIO_OSPEEDR(GPIOJ)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fCRC_BASE (PERIPH_BASE_AHB1 + 0x03000)BIT14 (1<<14)GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__GCC_DESTRUCTIVE_SIZE 64BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intGPIOF_AFRL GPIO_AFRL(GPIOF)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINGPIO_AFRH(port) MMIO32((port) + 0x24)__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)GPIO_AF11 0xb__INT32_MAX__ 0x7fffffffL__ARM_PCS 1UINTMAX_MAX__DBL_HAS_DENORM__ 1BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLGPIOI_ODR GPIO_ODR(GPIOI)__ARM_FEATURE_BF16_VECTOR_ARITHMETICPPBI_BASE (0xE0000000U)__FLT32_MANT_DIG__ 24GPIOC GPIO_PORT_C_BASE__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__GPIOH_LCKR GPIO_LCKR(GPIOH)GPIOE GPIO_PORT_E_BASEBIT28 (1<<28)UINT32_MAX __UINT32_MAX____GCC_ATOMIC_CHAR16_T_LOCK_FREE 2GPIOF_BRR GPIO_BRR(GPIOF)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0GPIOK_AFRL GPIO_AFRL(GPIOK)gpioport__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64GPIOE_IDR GPIO_IDR(GPIOE)GPIOE_PUPDR GPIO_PUPDR(GPIOE)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1GPIO_OTYPE_PP 0x0__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))DAC_BASE (PERIPH_BASE_APB1 + 0x7400)__GNUC__ 12GPIOF_AFRH GPIO_AFRH(GPIOF)WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16GPIOC_MODER GPIO_MODER(GPIOC)__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4GPIO_AF15 0xf__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULK__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)GPIO_AF14 0xe__UINT_FAST64_MAX__ 0xffffffffffffffffULLGPIO2 (1 << 2)GPIOA_AFRL GPIO_AFRL(GPIOA)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLLIBOPENCM3_GPIO_COMMON_F24_H __ARM_ARCH_PROFILE__INT64_TYPE__ long long intGPIO_OSPEED_50MHZ 0x2__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4BACKUP_REGS_BASE (RTC_BASE + 0x50)GPIO_MODE_INPUT 0x0__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXFPB_BASE (PPBI_BASE + 0x2000)__UHA_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0GPIOG GPIO_PORT_G_BASESTIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SYS_TICK_BASE (SCS_BASE + 0x0010)__UFRACT_FBIT__ 16GPIO_AF5 0x5__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308GPIOD_ODR GPIO_ODR(GPIOD)gpio_set_output_options__INT_FAST32_TYPE__ intGPIOB_BSRR GPIO_BSRR(GPIOB)__ARM_ARCH_PROFILE 77unsigned intGPIOE_MODER GPIO_MODER(GPIOE)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1GPIOA_BRR GPIO_BRR(GPIOA)__USACCUM_IBIT__ 8GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sectionsGPIO_MODE(n,mode) ((mode) << (2 * (n)))__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0GPIO12 (1 << 12)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1__ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_CGPIOE_BSRR GPIO_BSRR(GPIOE)__ARM_FP16_ARGS__GCC_IEC_559 0__FLT32X_DIG__ 15INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__GPIOH_IDR GPIO_IDR(GPIOH)GPIOA GPIO_PORT_A_BASE__SIZEOF_PTRDIFF_T__ 4GPIO13 (1 << 13)__STDC__ 1GPIOK_IDR GPIO_IDR(GPIOK)__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned char__ARM_FEATURE_COPROC 15gpio_set_afUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINGPIOD GPIO_PORT_D_BASEGPIO14 (1 << 14)PERIPH_BASE (0x40000000U)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x20000)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 2TSC_BASE (PERIPH_BASE_AHB1 + 0x03000)__LFRACT_EPSILON__ 0x1P-31LRGPIOI_PUPDR GPIO_PUPDR(GPIOI)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xGPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)__arm__ 1__FLT32_MIN_10_EXP__ (-37)afrhTIM1_BASE (PERIPH_BASE_APB2 + 0x2c00)MMIO64(addr) (*(volatile uint64_t *)(addr))GPIOG_IDR GPIO_IDR(GPIOG)INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVEafrl__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)GPIOH_MODER GPIO_MODER(GPIOH)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)GPIOA_OTYPER GPIO_OTYPER(GPIOA)__TA_IBIT__ 64GPIOG_MODER GPIO_MODER(GPIOG)GPIOE_AFRL GPIO_AFRL(GPIOE)__ARM_FEATURE_QRDMXGPIO_OTYPE_OD 0x1__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__GPIOD_BSRR GPIO_BSRR(GPIOD)DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0)INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT_FAST32_MIN (-INT_FAST32_MAX - 1)GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)GPIO1 (1 << 1)__FLT32_DIG__ 6INT_LEAST16_MAXGPIOG_LCKR GPIO_LCKR(GPIOG)BIT15 (1<<15)GPIOB_AFRH GPIO_AFRH(GPIOB)GPIO_LCKK (1 << 16)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAXGPIOI_LCKR GPIO_LCKR(GPIOI)__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intGPIOJ_ODR GPIO_ODR(GPIOJ)USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned intGPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63GPIOE_AFRH GPIO_AFRH(GPIOE)INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0TIM2_BASE (PERIPH_BASE_APB1 + 0x0000)LIBOPENCM3_MEMORYMAP_COMMON_H BIT29 (1<<29)LIBOPENCM3_GPIO_COMMON_F234_H __INT_FAST16_TYPE__ intGPIOF_IDR GPIO_IDR(GPIOF)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intgpio_mode_setupGPIOI_BSRR GPIO_BSRR(GPIOI)__UTQ_FBIT__ 128__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffGPIO_PUPDR(port) MMIO32((port) + 0x0c)PTRDIFF_MAX __PTRDIFF_MAX__INT8_CGPIO_PUPD_PULLDOWN 0x2__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKGPIOC_BRR GPIO_BRR(GPIOC)GPIO_LCKR(port) MMIO32((port) + 0x1c)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRGPIO_AF4 0x4__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intGPIOF_MODER GPIO_MODER(GPIOF)GPIOH_PUPDR GPIO_PUPDR(GPIOH)GPIOK_LCKR GPIO_LCKR(GPIOK)WCHAR_MINGPIOB_IDR GPIO_IDR(GPIOB)BEGIN_DECLS GPIOJ_AFRH GPIO_AFRH(GPIOJ)GPIOC_AFRH GPIO_AFRH(GPIOC)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)GPIOB_LCKR GPIO_LCKR(GPIOB)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1__ARM_FPGPIOE_OTYPER GPIO_OTYPER(GPIOE)__QQ_IBIT__ 0__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0GPIO7 (1 << 7)__UINT_LEAST32_TYPE__ long unsigned intGPIO_AFR(n,af) ((af) << ((n) * 4))__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2GPIOA_BSRR GPIO_BSRR(GPIOA)TIM16_BASE (PERIPH_BASE_APB2 + 0x4400)GPIOG_PUPDR GPIO_PUPDR(GPIOG)INT_LEAST8_MININTMAX_MAX__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1TIM17_BASE (PERIPH_BASE_APB2 + 0x4800)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C/build/libopencm3/lib/gd32/f1x0INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intGPIOE_ODR GPIO_ODR(GPIOE)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLGPIO0 (1 << 0)USART1_BASE (PERIPH_BASE_APB2 + 0x3800)DMA1_BASE (PERIPH_BASE_AHB1 + 0x00000)GPIOB_BRR GPIO_BRR(GPIOB)TPIU_BASE (PPBI_BASE + 0x40000)__LDBL_MIN__ 2.2250738585072014e-308LGPIOD_OTYPER GPIO_OTYPER(GPIOD)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16GPIOJ_MODER GPIO_MODER(GPIOJ)FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0EXTI_BASE (PERIPH_BASE_APB2 + 0x0400)LIBOPENCM3_GPIO_H GPIO_AF12 0xcINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)short int__UINT16_C(c) cBIT31 (1<<31)__UDA_IBIT__ 32modeUINT_LEAST32_MAXGPIOI_MODER GPIO_MODER(GPIOI)BIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCGPIOA_ODR GPIO_ODR(GPIOA)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53GPIO_BRR(port) MMIO32((port) + 0x28)BIT5 (1<<5)__GNUC_PATCHLEVEL__ 1BIT1 (1<<1)BIT26 (1<<26)INT_LEAST32_MAX__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)GPIO_OSPEED_MED 0x1GPIO_MODE_OUTPUT 0x1__INT16_MAX__ 0x7fff__INT_WIDTH__ 32GPIOJ GPIO_PORT_J_BASEGPIOD_AFRL GPIO_AFRL(GPIOD)__QQ_FBIT__ 7GPIOC_OTYPER GPIO_OTYPER(GPIOC)RTC_BASE (PERIPH_BASE_APB1 + 0x2800)GPIO_AF3 0x3__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64GPIO_IDR(port) MMIO32((port) + 0x10)GPIO_AFRL(port) MMIO32((port) + 0x20)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32GPIO_OSPEEDR(port) MMIO32((port) + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0TIM14_BASE (PERIPH_BASE_APB1 + 0x2000)__SIZEOF_WINT_T__ 4__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32GPIOF_LCKR GPIO_LCKR(GPIOF)GPIO_MODE_ANALOG 0x3__ARM_ASM_SYNTAX_UNIFIED__ 1__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODGPIOA_AFRH GPIO_AFRH(GPIOA)__thumb2__ 1GPIOH_BSRR GPIO_BSRR(GPIOH)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H GPIOG_OTYPER GPIO_OTYPER(GPIOG)INT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64GPIOC_LCKR GPIO_LCKR(GPIOC)__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)GPIOB_OTYPER GPIO_OTYPER(GPIOB)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1__UINT_FAST16_TYPE__ unsigned intGPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)GPIO6 (1 << 6)__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15TIM15_BASE (PERIPH_BASE_APB2 + 0x4000)BIT22 (1<<22)__INT_LEAST8_WIDTH__ 8GD32F1X0 1__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CGPIOD_BRR GPIO_BRR(GPIOD)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1GPIO15 (1 << 15)GPIOH_OTYPER GPIO_OTYPER(GPIOH)__HQ_FBIT__ 15__bool_true_false_are_defined 1pupd__SIZE_MAX__ 0xffffffffUSPI2_BASE (PERIPH_BASE_APB1 + 0x3800)__ARM_ARCH__LONG_MAX__ 0x7fffffffLGPIO_OSPEED_100MHZ 0x3__ARM_FEATURE_LDREX 7PTRDIFF_MAX__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__WCHAR_WIDTH__ 32WINT_MAX__INT16_C(c) cGPIOD_AFRH GPIO_AFRH(GPIOD)INT_FAST16_MIN (-INT_FAST16_MAX - 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(1<<10)__INT_FAST64_WIDTH__ 64INT_LEAST64_MAX __INT_LEAST64_MAX__SPI1_BASE (PERIPH_BASE_APB2 + 0x3000)RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)__SFRACT_EPSILON__ 0x1P-7HRRCC_CLOCK_HSI_64MHZ__INT32_C(c) c ## Lppre1__ORDER_BIG_ENDIAN__ 4321SIZE_MAXRCC_CFGR_PLLMUL_PLL_CLK_MUL3 0x1__SQ_FBIT__ 31FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)DWT_BASE (PPBI_BASE + 0x1000)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)FLASH_RDP_L1 ((uint8_t)0xf0)RCC_CFGR_HPRE_SYSCLK_DIV16 0xbFLASH_CR_PER (1 << 1)__UHQ_FBIT__ 16RCC_CFGR_PLLMUL_PLL_CLK_MUL2 0x0__FLT64_MIN_EXP__ (-1021)ITM_BASE (PPBI_BASE + 0x0000)__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)RCC_APB2ENR_ADCEN (1 << 9)__LACCUM_IBIT__ 32RCC_CFGR_USBPRE_SHIFT 22__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1RCC_CFGR_PLLMUL_4_SHIFT 27__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_FAST8_MAXRCC_CIR_HSERDYC (1 << 19)RCC_CFGR_ADCPRE_PCLK2_DIV8 0x3__GCC_ATOMIC_POINTER_LOCK_FREE 2__UINT_FAST16_MAX__ 0xffffffffUFLASH_OBR_RDPRT_SHIFT 1__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)RCC_CFGR3_USART2SW_SHIFT 16FLASH_OBR_USER (0xFF << FLASH_OBR_USER_SHIFT)rcc_osc_ready_int_clear__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URrcc_set_pll_multiplication_factorWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__RCC_CFGR_PPRE2_HCLK_NODIV 0x0rcc_set_pllxtpreFLASH_ACR_PRFTBS (1 << 5)__UINT_LEAST8_TYPE__ unsigned charRCC_AHBENR_GPIOFEN (1 << 22)__ACCUM_FBIT__ 15PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)__UACCUM_IBIT__ 16long intUINT8_MAXIWDG_BASE (PERIPH_BASE_APB1 + 0x3000)SIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17FLASH_OPTKEYR_KEY2 FLASH_KEYR_KEY2__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1FLASH_ACR_LATENCY_048_072MHZ 2__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__ARM_ARCH_7M__ 1NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32USART2_BASE (PERIPH_BASE_APB1 + 0x4400)RCC_CFGR_HPRE_SYSCLK_DIV64 0xc__UINTMAX_C(c) c ## ULLrcc_enable_rtc_clock__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__RCC_AHBENR_DMAEN (1 << 0)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRrcc_ahb_frequencyshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)__ELF__ 1UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)RCC_CFGR_PLLMUL_PLL_CLK_MUL9 0x7__DBL_IS_IEC_60559__ 2USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4RCC_APB2RSTR_TIM15RST (1 << 16)RCC_CFGR2_PREDIV_DIV13 0xcRCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_CFGR2_PREDIV_DIV11 0xaFLASH_OPTKEYR_KEY1 FLASH_KEYR_KEY1RCC_CFGR_MCO_SHIFT 24INFO_BASE (0x1ffff000U)rcc_clock_scaleBIT27 (1<<27)RCC_CFGR_MCO_LSE 3__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9LIBOPENCM3_MEMORYMAP_COMMON_H RCC_LSIsigned charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15FLASH_CR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x50)__LLACCUM_EPSILON__ 0x1P-31LLKRCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2PTRDIFF_MINFLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x02000)__UINT_LEAST16_MAX__ 0xffffPPBI_BASE (0xE0000000U)__STDC_VERSION__ 201710LRCC_CFGR_PPRE_DIV16 0x7RCC_CFGR_PPRE_DIV8 0x6__FLT64_MAX_10_EXP__ 308GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINRCC_APB1RSTR_CECRST (1 << 30)FLASH_OBR_DATA1_SHIFT 24__UINT_FAST32_TYPE__ unsigned intunsigned char__STDC_UTF_32__ 1__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38TIM6_BASE (PERIPH_BASE_APB1 + 0x1000)__FRACT_MAX__ 0X7FFFP-15RTIM3_BASE (PERIPH_BASE_APB1 + 0x0400)INT_LEAST32_MAX __INT_LEAST32_MAX__RCC_CFGR_MCO_SYSCLK 4RCC_CFGR_MCO_MASK 0x7__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5LIBOPENCM3_FLASH_H RCC_AHBENR MMIO32(RCC_BASE + 0x14)rcc_rtc_clock_enabled_flagRCC_CFGR_ADCPRE_DIV2 0x0RCC_CFGR_USBPRE_PLL_CLK_NODIV 0x1RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__TQ_FBIT__ 127FLASH_KEYR_KEY1 ((uint32_t)0x45670123)RCC_CFGR_MCO_HSI 5ahb_frequency__USQ_FBIT__ 32INT_FAST16_MINpll_hse_predivRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)_BoolFLASH_CR_OPTWRE (1 << 9)RCC_CIR_LSIRDYF (1 << 0)UINT_LEAST8_MAXRCC_CFGR_PLLMUL_PLL_CLK_MUL12 0xaUINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8RCC_AHBENR_FLTFEN (1 << 4)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1PTRDIFF_MIN (-PTRDIFF_MAX - 1)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intRCC_APB2ENR_TIM15EN (1 << 16)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7FLASH_CR_OPTPG (1 << 4)__FDPIC__RCC_CIR_HSI14RDYIE (1 << 13)RCC_BDCR_LSERDY (1 << 1)__FLT32_IS_IEC_60559__ 2RCC_CSR_PINRSTF (1 << 26)INT_FAST64_MINFLASH_OBR_OPTERR (1 << 0)rcc_osc_ready_int_enablercc_set_prediv__LDBL_EPSILON__ 2.2204460492503131e-16LWWDG_BASE (PERIPH_BASE_APB1 + 0x2c00)__USFRACT_MIN__ 0.0UHR__ARM_NEON__UINT8_MAX__ 0xffRCC_APB1RSTR_SPI3RST (1 << 15)__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_PLLMUL_PLL_CLK_MUL5 0x3RCC_CFGR_SWS_SYSCLKSEL_HSICLK 0x0__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)RCC_CFGR_PPRE1 (7 << RCC_CFGR_PPRE1_SHIFT)RCC_CFGR_MCO_HSI14 1RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31__GXX_ABI_VERSION 1017GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0c00)__INT_LEAST16_MAX__ 0x7fffRCC_CFGR_USBPRE_PLL_CLK_DIV2 0x3FLASH_CR_PG (1 << 0)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR_ADCPRE_DIV8 0x3INT_LEAST8_MAX __INT_LEAST8_MAX__rcc_osc_on__UINT32_C(c) c ## ULRCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)__FLT_EPSILON__ 1.1920928955078125e-7FRCC_AHBRSTR_OTGFSRST (1 << 12)__PTRDIFF_TYPE__ intFLASH_OBR_USER_SHIFT 8__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6FLASH_OBR_RDPRT (3 << FLASH_OBR_RDPRT_SHIFT)__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2rcc_set_pll_sourceRCC_CFGR_PLLMUL_PLL_CLK_MUL8 0x6RCC_AHBRSTR_ETHMACRST (1 << 14)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1cm3_assert(expr) do { if (CM3_LIKELY(expr)) { (void)0; } else { cm3_assert_failed(); } } while (0)__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)FLASH_ACR_LATENCY_1WS 1RCC_APB2RSTR_USART1RST (1 << 14)__FLT32_HAS_QUIET_NAN__ 1I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1RCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308FLASH_ACR_LATENCY_MASK 7__ARM_ARCH_EXT_IDIV__ 1__ARM_PCS 1bool _Bool__UQQ_IBIT__ 0SYSCFG_COMP_BASE (PERIPH_BASE_APB2 + 0x0000)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)TSC_BASE (PERIPH_BASE_AHB1 + 0x03000)RCC_CR_HSIRDY (1 << 1)INT16_MAX __INT16_MAX__PERIPH_BASE_AHB2 (PERIPH_BASE + 0x8000000)__FLT32X_IS_IEC_60559__ 2PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)FLASH_SR_WRPRTERR (1 << 4)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))rcc_clock_hsircc_css_int_flag__INT_LEAST16_WIDTH__ 16USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2rcc_backupdomain_reset__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHR__WINT_MAX__ 0xffffffffURCC_CFGR_PPRE1_HCLK_DIV8 0x6__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)__UINT32_MAX__ 0xffffffffULRCC_CFGR_HPRE_DIV16 0xb__INT_LEAST8_MAX__ 0x7frcc_osc_ready_int_flag__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1RCC_HSE__ARM_FEATURE_COMPLEXBIT15 (1<<15)RCC_CFGR2_PREDIV_DIV5 0x4FLASH_ACR_LATENCY_0WS 0RCC_CFGR3_ADCSW (1 << 8)RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64INT_FAST64_MIN (-INT_FAST64_MAX - 1)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fCRC_BASE (PERIPH_BASE_AHB1 + 0x03000)BIT14 (1<<14)RCC_CFGR_HPRE (0xF << RCC_CFGR_HPRE_SHIFT)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_CFGR_HPRE_DIV512 0xf__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__rcc_css_int_clear__FLT_EVAL_METHOD_TS_18661_3__ 0RCC_CFGR_HPRE_DIV64 0xc__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RRCC_CFGR_PPRE_NODIV 0x0BIT24 (1<<24)__INT32_MAX__ 0x7fffffffLRCC_CFGR_PLLMUL_PLL_CLK_MUL10 0x8RCC_CFGR_HPRE_DIV256 0xeUINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICFLASH_RDP_L2 ((uint8_t)0xcc)LIBOPENCM3_RCC_H __FLT32_MANT_DIG__ 24RCC_CFGR_ADCPRE_SHIFT 14INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)INT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)cm3_assert_failed__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24clock__UDQ_IBIT__ 0rcc_clock_setup_pllRCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXRCC_CFGR_PPRE2_HCLK_DIV4 0x5__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1FLASH_RDP_L0 ((uint8_t)0xa5)__ULLFRACT_IBIT__ 0__thumb__ 1FLASH_OBR_RDPRT_L2 (3 << FLASH_OBR_RDPRT_SHIFT)rcc_wait_for_osc_readyRCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))RCC_APB2ENR_SPI1EN (1 << 12)DAC_BASE (PERIPH_BASE_APB1 + 0x7400)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)WCHAR_MAXRCC_CFGR_PPRE1_HCLK_DIV4 0x5__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__FLT_HAS_DENORM__ 1RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKRCC_CIR_HSIRDYF (1 << 2)__INT_MAX__ 0x7fffffff__ARM_ARCH 7RCC_LSERCC_CFGR_PLLSRC (1 << 16)__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55rcc_css_enable__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXrcc_apb1_frequency__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)ppre2BIT9 (1<<9)FLASH_ACR_PRFTEN FLASH_ACR_PRFTBE__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLRCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4BACKUP_REGS_BASE (RTC_BASE + 0x50)RCC_APB1ENR_SPI3EN (1 << 15)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URFLASH_OBR_RDPRT_L0 (0 << FLASH_OBR_RDPRT_SHIFT)INT64_MAXFPB_BASE (PPBI_BASE + 0x2000)RCC_CFGR_PPRE2_SHIFT 11__INT_LEAST32_MAX__ 0x7fffffffL__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)STIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__FLASH_OPTION_BYTE(i) MMIO16(INFO_BASE+0x0800 + (i)*2)ID_BASE (SCS_BASE + 0x0FD0)SYS_TICK_BASE (SCS_BASE + 0x0010)rcc_osc__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_APB1ENR_PWREN (1 << 28)__LDBL_MAX_10_EXP__ 308__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ intunsigned intLIBOPENCM3_FLASH_COMMON_F01_H __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1FLASH_CR_STRT (1 << 6)RCC_CIR_HSI14RDYF (1 << 5)FLASH_SR_EOP (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8RCC_CFGR_PPRE1_HCLK_NODIV 0x0GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sectionsRCC_CFGR_PPRE2 (7 << RCC_CFGR_PPRE2_SHIFT)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6_STDBOOL_H RCC_CFGR_HPRE_SYSCLK_DIV4 0x9rcc_system_clock_sourceFLASH_ACR_LATENCY_024_048MHZ 1__FLT_EVAL_METHOD__ 0RCC_CFGR_PLLMUL_0_3_SHIFT 18__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1RCC_CIR_HSI14RDYC (1 << 21)LIBOPENCM3_RCC_COMMON_ALL_H __ARM_FEATURE_LDREX__UQQ_FBIT__ 8RCC_CFGR_HPRE_SHIFT 4RCC_CFGR_PPRE2_HCLK_DIV16 0x7INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4RCC_APB1ENR_DACEN (1 << 29)__STDC__ 1FLASH_OBR_RDPRT_L1 (1 << FLASH_OBR_RDPRT_SHIFT)__ARM_FEATURE_IDIV 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__rcc_set_rtc_clock_source__UINT8_TYPE__ unsigned charRCC_AHBENR_GPIOCEN (1 << 19)rcc_css_disable__ARM_FEATURE_COPROC 15RCC_CFGR_SWS_SYSCLKSEL_PLLCLK 0x2UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINPERIPH_BASE (0x40000000U)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x20000)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)__ULLFRACT_MIN__ 0.0ULLR__FLT32X_MIN_EXP__ (-1021)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 2cm3_assert_not_reached() cm3_assert_failed()__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)rcc_set_adcpreRCC_CFGR_ADCPRE_DIV6 0x2__FLT32_MIN_10_EXP__ (-37)TIM1_BASE (PERIPH_BASE_APB2 + 0x2c00)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)RCC_APB1RSTR_TIM2RST (1 << 0)__TA_IBIT__ 64pllmulRCC_CFGR2_PREDIV_DIV4 0x3RCC_CFGR_HPRE_SYSCLK_NODIV 0x0FLASH_CR_OPTER (1 << 5)__ARM_FEATURE_QRDMXRCC_CFGR_HPRE_NODIV 0x0__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLLpllxtpre__WINT_WIDTH__ 32RCC_CFGR_PPRE_DIV4 0x5SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__RCC_CFGR_MCO_LSI 2RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)RCC_APB1RSTR_I2C1RST (1 << 21)__DBL_MIN_EXP__ (-1021)RCC_CFGR_PLLMUL_PLL_CLK_MUL13 0xb__LDBL_HAS_DENORM__ 1FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)RCC_CIR_LSIRDYIE (1 << 8)INT_FAST32_MIN (-INT_FAST32_MAX - 1)RCC_APB1RSTR_DACRST (1 << 29)FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)__FLT32_DIG__ 6INT_LEAST16_MAXRCC_CFGR_ADCPRE_PCLK2_DIV4 0x1RCC_CFGR_HPRE_SYSCLK_DIV128 0xdrcc_apb2_frequencyRCC_CIR_CSSF (1 << 7)RCC_CFGR_PLLXTPRE_HSE_CLK 0x0BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAXrcc_set_sysclk_sourceRCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PPRE2_HCLK_DIV2 0x4RCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_HPRE_DIV4 0x9USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0__ATOMIC_ACQUIRE 2UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2FLASH_ACR_LATENCY_SHIFT 0BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63FLASH_SR_PGERR (1 << 2)INT_LEAST64_MAX__SACCUM_IBIT__ 8use_hsereg32_REG_BIT(base,bit) (((base) << 5) + (bit))__UHQ_IBIT__ 0TIM2_BASE (PERIPH_BASE_APB1 + 0x0000)INT_LEAST8_MINBIT29 (1<<29)FLASH_CR_EOPIE (1 << 12)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRCC_CFGR2_PREDIV_DIV3 0x2__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15RCC_CFGR_USBPRE_PLL_CLK_DIV1_5 0x0__UTQ_FBIT__ 128RCC_CFGR_HPRE_SYSCLK_DIV256 0xeFLASH_SR_BSY (1 << 0)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_APB1ENR_TIM3EN (1 << 1)PTRDIFF_MAX __PTRDIFF_MAX__RCC_CFGR2_PREDIV_DIV16 0xfRCC_CR_PLLRDY (1 << 25)usbpre__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKRCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)RCC_HSI__ULFRACT_MIN__ 0.0ULRRCC_APB1ENR_I2C1EN (1 << 21)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_CFGR2_PREDIV_DIV12 0xbWCHAR_MINrcc_hse8_configsFLASH_AR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x54)pllsrcRCC_CSR_PORRSTF (1 << 27)BEGIN_DECLS rcc.cRCC_APB2RSTR_SPI1RST (1 << 12)RCC_APB2ENR_SYSCFGCOMPEN (1 << 0)RCC_APB2ENR_TIM16EN (1 << 17)RCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15FLASH_CR_MER (1 << 2)__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CR2 MMIO32(RCC_BASE + 0x34)__FLT32_MIN__ 1.1754943508222875e-38F32INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)RCC_CIR_HSERDYF (1 << 3)RCC_APB1RSTR_TIM6RST (1 << 4)__QQ_IBIT__ 0RCC_CFGR_SW_SYSCLKSEL_HSICLK 0x0RCC_CFGR_USBPRE_PLL_CLK_DIV2_5 0x2RCC_CR_PLLON (1 << 24)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long intrcc_hsi_configs__GCC_ATOMIC_INT_LOCK_FREE 2RCC_APB2RSTR_TIM17RST (1 << 18)TIM16_BASE (PERIPH_BASE_APB2 + 0x4400)RCC_CFGR_HPRE_SYSCLK_DIV512 0xf__UINT_FAST32_MAX__ 0xffffffffUINTMAX_MAXRCC_APB1ENR_SPI2EN (1 << 14)RCC_PLL__ARM_FEATURE_FP16_SCALAR_ARITHMETICUINT_FAST32_MAX __UINT_FAST32_MAX____USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1RCC_CFGR_PLLXTPRE (1 << 17)TIM17_BASE (PERIPH_BASE_APB2 + 0x4800)INT_FAST32_MIN__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CRCC_CFGR_PLLMUL_PLL_CLK_MUL6 0x4/build/libopencm3/lib/gd32/f1x0RCC_CFGR_PPRE1_HCLK_DIV2 0x4INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLRCC_BASE (PERIPH_BASE_AHB1 + 0x01000)RCC_CLOCK_HSE8_END__LDBL_MIN_10_EXP__ (-307)USART1_BASE (PERIPH_BASE_APB2 + 0x3800)DMA1_BASE (PERIPH_BASE_AHB1 + 0x00000)TPIU_BASE (PPBI_BASE + 0x40000)__LDBL_MIN__ 2.2250738585072014e-308L__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1FLASH_BASE (0x08000000U)CORESIGHT_LAR_OFFSET 0xfb0EXTI_BASE (PERIPH_BASE_APB2 + 0x0400)RCC_BDCR_LSEON (1 << 0)short intRCC_AHBENR_GPIOBEN (1 << 18)__UINT16_C(c) c__UDA_IBIT__ 32__FLT_HAS_INFINITY__ 1UINT_LEAST32_MAXRCC_CFGR_PPRE1_HCLK_DIV16 0x7BIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_CLOCK_HSI_48MHZRCC_CFGR_PLLMUL_PLL_CLK_MUL11 0x9__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)BIT5 (1<<5)BIT1 (1<<1)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1RCC_CFGR_PLLMUL_PLL_CLK_MUL16 0xe__DBL_DECIMAL_DIG__ 17FLASH_OBR_DATA0_SHIFT 16BIT8 (1<<8)RCC_APB1ENR_WWDGEN (1 << 11)INT16_C(c) __INT16_C(c)UINT32_MAXRCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__INT16_MAX__ 0x7fffRCC_CFGR_USBPRE (3 << RCC_CFGR_USBPRE_SHIFT)RCC_APB2ENR_TIM17EN (1 << 18)__INT_WIDTH__ 32RCC_APB1ENR_CECEN (1 << 30)RCC_CFGR_PLLMUL_0_3 (0xF << RCC_CFGR_PLLMUL_0_3_SHIFT)RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7RTC_BASE (PERIPH_BASE_APB1 + 0x2800)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR2_PREDIV_DIV2 0x1RCC_CFGR_PPRE1_SHIFT 8__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32RCC_CLOCK_HSI_ENDFLASH_ACR_LATENCY_2WS 1RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0TIM14_BASE (PERIPH_BASE_APB1 + 0x2000)DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7ac)__SIZEOF_WINT_T__ 4__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17CM3_LIKELY(expr) (__builtin_expect(!!(expr), 1))RCC_CFGR_PPRE1_MASK 0x7RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1FLASH_OBR_DATA1 (0xFF << FLASH_OBR_DATA1_SHIFT)__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32rcc_set_hpreRCC_CFGR_HPRE_SYSCLK_DIV2 0x8FLASH_SR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x4C)RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)__ARM_ASM_SYNTAX_UNIFIED__ 1FLASH_CR_OBL_LAUNCH (1 << 13)RCC_APB2ENR_USART1EN (1 << 14)FLASH_CR_LOCK (1 << 7)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)__thumb2__ 1LIBOPENCM3_CM3_ASSERT_H RCC_CFGR_SW_SYSCLKSEL_HSECLK 0x1rcc_osc_ready_int_disableINT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64clock_source__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)RCC_CFGR_HPRE_DIV128 0xdMPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1RCC_CFGR_PLLMUL_4 (1 << RCC_CFGR_PLLMUL_4_SHIFT)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9RCC_CFGR2_PREDIV_DIV9 0x8__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15FLASH_CR_ERRIE (1 << 10)RCC_APB2ENR_TIM1EN (1 << 11)TIM15_BASE (PERIPH_BASE_APB2 + 0x4000)BIT22 (1<<22)__INT_LEAST8_WIDTH__ 8GD32F1X0 1__INT_LEAST16_TYPE__ short intFLASH_ACR_LATENCY_000_024MHZ 0RCC_AHBENR_TSCEN (1 << 24)__DBL_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_ADCPRE_DIV4 0x1INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_Capb2_frequencyrcc_set_ppre1rcc_set_ppre2INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0)__SIZE_MAX__ 0xffffffffUSPI2_BASE (PERIPH_BASE_APB1 + 0x3800)RCC_CFGR_PPRE2_MASK 0x7__ARM_ARCH__LONG_MAX__ 0x7fffffffLRCC_APB2RSTR_TIM1RST (1 << 11)RCC_CFGR_PLLMUL_PLL_CLK_MUL4 0x2apb1_frequency__ARM_FEATURE_LDREX 7PTRDIFF_MAXhpreFLASH_ACR_PRFTBE (1 << 4)__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__WCHAR_WIDTH__ 32predivWINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__USFRACT_IBIT__ 0RCC_CFGR_HPRE_SYSCLK_DIV8 0xa__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)adcpreRCC_CFGR3_CECSW (1 << 6)__ULLFRACT_FBIT__ 64rcc_clock_hse8RCC_CR_CSSON (1 << 19)RCC_CFGR_PPRE_DIV2 0x4RCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_SW_SYSCLKSEL_PLLCLK 0x2__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV2 0x8__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXITR_BASE (SCS_BASE + 0x0000)RCC_CFGR_ADCPRE_PCLK2_DIV6 0x2__ARM_EABI__ 1__INT_LEAST64_TYPE__ long long int__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| HHHDAƒŽDLL$€˜Aƒ„…ŽA,aeabi"7-M M "ñÿ D D D @ @ H H !! ! |!"" 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int__WINT_TYPE__ unsigned intGPIO_PORT_C_BASE (PERIPH_BASE_AHB2 + 0x0800)INT32_MIN (-INT32_MAX - 1)RCC_AHBENR_SRAMEN (1 << 2)__FLT32_MAX_10_EXP__ 38RCC_CFGR_HPRE_DIV8 0xaRCC_CIR MMIO32(RCC_BASE + 0x08)__USFRACT_MAX__ 0XFFP-8UHRRCC_APB1RSTR_TIM3RST (1 << 1)__UINTPTR_MAX__ 0xffffffffURCC_CFGR_PLLMUL_PLL_CLK_MUL7 0x5__FLT32_MIN_EXP__ (-125)RCC_CSR_LPWRRSTF (1 << 31)RCC_CIR_HSIRDYC (1 << 18)__UINT8_MAX__ 0xffRCC_CFGR2_PREDIV_DIV7 0x6UINT32_MAX __UINT32_MAX____ULFRACT_FBIT__ 32RCC_APB2ENR_USART1EN (1 << 14)__FLT64_MIN_10_EXP__ (-307)RCC_APB1ENR_TIM14EN (1 << 8)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64rcc_peripheral_disable_clockRCC_CFGR_HPRE_SHIFT 4RCC_CFGR_MCOPRE_DIV32 (5 << RCC_CFGR_MCOPRE_SHIFT)__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXRCC_CFGR_PLLMUL_PLL_CLK_MUL3 0x1RCC_CFGR_SWS_SYSCLKSEL_HSICLK 0x0__SQ_FBIT__ 31RST_SYSCFGINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)RCC_CFGR_HPRE_SYSCLK_DIV16 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0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__ARM_ARCH_7M__ 1NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32USART2_BASE (PERIPH_BASE_APB1 + 0x4400)__FLT64_MAX_10_EXP__ 308RCC_CFGR_HPRE_SYSCLK_DIV64 0xc__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__RCC_AHBENR_DMAEN (1 << 0)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)__ELF__ 1UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICRCC_SPI2LIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)RCC_CFGR_PLLMUL_PLL_CLK_MUL9 0x7__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__RCC_APB2RSTR_TIM15RST (1 << 16)RCC_CFGR2_PREDIV_DIV13 0xcRCC_BDCR_RTCEN (1 << 15)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32RCC_CFGR2_PREDIV_DIV11 0xaINFO_BASE (0x1ffff000U)BIT27 (1<<27)RCC_CFGR_MCO_LSE 3CRC_BASE (PERIPH_BASE_AHB1 + 0x03000)__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)RCC_CIR_LSERDYC (1 << 17)__FLT_DECIMAL_DIG__ 9__thumb__ 1RCC_LSIsigned charuint8_tRCC_CFGR_ADCPRE_PCLK2_DIV4 0x1INTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__INT64_C(c) c ## LL__FRACT_FBIT__ 15__FLT_HAS_QUIET_NAN__ 1RCC_CFGR2_PREDIV_DIV8 0x7__GNUC_PATCHLEVEL__ 1__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2PTRDIFF_MINFLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB1 + 0x02000)__UINT_LEAST16_MAX__ 0xffffRCC_TIM6__FLT32_HAS_QUIET_NAN__ 1PPBI_BASE (0xE0000000U)__STDC_VERSION__ 201710LRCC_CFGR_PPRE_DIV16 0x7RCC_CFGR_PPRE_DIV8 0x6__FLT_DIG__ 6GPIO_PORT_B_BASE (PERIPH_BASE_AHB2 + 0x0400)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINRCC_APB1RSTR_CECRST (1 << 30)__UINT_FAST32_TYPE__ unsigned intunsigned char__STDC_UTF_32__ 1__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38TIM6_BASE (PERIPH_BASE_APB1 + 0x1000)__FRACT_MAX__ 0X7FFFP-15RTIM3_BASE (PERIPH_BASE_APB1 + 0x0400)INT_LEAST32_MAX __INT_LEAST32_MAX__RCC_CFGR_MCO_SYSCLK 4RCC_CFGR_MCO_MASK 0x7__INT_FAST32_MAX__ 0x7fffffffSPI1_BASE (PERIPH_BASE_APB2 + 0x3000)RCC_AHBENR MMIO32(RCC_BASE + 0x14)RCC_CFGR_ADCPRE_DIV2 0x0RCC_CFGR2_PREDIV_DIV3 0x2RCC_CFGR_USBPRE_PLL_CLK_NODIV 0x1RCC_AHBENR_GPIODEN (1 << 20)RCC_CIR_PLLRDYF (1 << 4)RCC_CSR_LSION (1 << 0)RCC_CFGR2_PREDIV_DIV6 0x5__UINT16_MAX__ 0xffff__TQ_FBIT__ 127RCC_CFGR_MCO_HSI 5__USQ_FBIT__ 32__USES_INITFINI__ 1WCHAR_MAXRCC_CSR_IWDGRSTF (1 << 29)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32RCC_APB1ENR_TIM2EN (1 << 0)_Bool__FLT_DENORM_MIN__ 1.4012984643248171e-45FINT_FAST32_MIN (-INT_FAST32_MAX - 1)RST_SPI3RCC_CIR_LSIRDYF (1 << 0)UINT_LEAST8_MAXRCC_CFGR_PLLMUL_PLL_CLK_MUL12 0xaUINT8_C(c) __UINT8_C(c)RCC_CIR_HSIRDYIE (1 << 10)__SIZEOF_LONG_DOUBLE__ 8RCC_AHBENR_FLTFEN (1 << 4)GPIO_PORT_A_BASE (PERIPH_BASE_AHB2 + 0x0000)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16_RCC_BIT(i) (1 << ((i) & 0x1f))PTRDIFF_MIN (-PTRDIFF_MAX - 1)RCC_CFGR_MCOPRE_DIV16 (4 << RCC_CFGR_MCOPRE_SHIFT)DESIG_UNIQUE_ID2 MMIO32(DESIG_UNIQUE_ID_BASE + 8)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intRCC_APB2ENR_TIM15EN (1 << 16)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__RST_GPIOARCC_GPIOARCC_GPIOBRCC_GPIOCRST_GPIOERST_GPIOFRCC_GPIOFRCC_CSR_PINRSTF (1 << 26)INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LWWDG_BASE (PERIPH_BASE_APB1 + 0x2c00)__USFRACT_MIN__ 0.0UHR__ARM_NEONrcc_periph_clock_disableRCC_APB1RSTR_SPI3RST (1 << 15)__LDBL_MAX_EXP__ 1024RCC_CIR_PLLRDYC (1 << 20)LIBOPENCM3_MEMORYMAP_H RCC_CFGR_PLLMUL_PLL_CLK_MUL5 0x3../../stm32/common/rcc_common_all.c__DBL_HAS_DENORM__ 1DESIG_UNIQUE_ID0 MMIO32(DESIG_UNIQUE_ID_BASE)RCC_CFGR_PPRE1 (7 << RCC_CFGR_PPRE1_SHIFT)RCC_CFGR_MCO_HSI14 1RCC_APB1RSTR_USBRST (1 << 23)__DA_FBIT__ 31__GXX_ABI_VERSION 1017GPIO_PORT_D_BASE (PERIPH_BASE_AHB2 + 0x0c00)__INT_LEAST16_MAX__ 0x7fffRCC_CFGR_USBPRE_PLL_CLK_DIV2 0x3RST_GPIOCID_BASE (SCS_BASE + 0x0FD0)__LDBL_MAX__ 1.7976931348623157e+308LRCC_CFGR_ADCPRE_DIV8 0x3INT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## ULRCC_CFGR_PLLXTPRE_HSE_CLK_DIV2 0x1__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FRCC_AHBRSTR_OTGFSRST (1 << 12)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMBRCC_CR_HSEON (1 << 16)RCC_CFGR_MCO_HSE 6__UACCUM_EPSILON__ 0x1P-16UK__ARM_FEATURE_MATMUL_INT8RCC_CFGR_PLLSRC_HSI_CLK_DIV2 0x0LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2RCC_CFGR_PLLMUL_PLL_CLK_MUL8 0x6RCC_AHBRSTR_ETHMACRST (1 << 14)__USACCUM_FBIT__ 8RST_GPIOB__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)RCC_APB2RSTR_USART1RST (1 << 14)INT8_MAXI2C1_BASE (PERIPH_BASE_APB1 + 0x5400)RCC_CFGR_MCOPRE_DIV4 (2 << RCC_CFGR_MCOPRE_SHIFT)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308DWT_BASE (PPBI_BASE + 0x1000)__ARM_PCS 1bool _BoolRCC_CRCSYSCFG_COMP_BASE (PERIPH_BASE_APB2 + 0x0000)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)RCC_CFGR_PLLMUL_PLL_CLK_MUL13 0xbRCC_CR_HSIRDY (1 << 1)INT16_MAX __INT16_MAX__PERIPH_BASE_AHB2 (PERIPH_BASE + 0x8000000)__FLT32X_IS_IEC_60559__ 2PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)INT_LEAST64_MAX __INT_LEAST64_MAX__RST_GPIODLIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))GD32F1X0 1__INT_LEAST16_WIDTH__ 16USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)RCC_APB1RSTR_TIM14RST (1 << 8)__DEC_EVAL_METHOD__ 2RCC_CFGR_PPRE1_HCLK_NODIV 0x0__ARM_FEATURE_FP16_FMLRCC_BDCR_LSERDY (1 << 1)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRRCC_CFGR_PPRE1_HCLK_DIV8 0x6__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x7ac)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULRCC_DMARCC_CFGR_HPRE_DIV16 0xb__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1RCC_HSE__ARM_FEATURE_COMPLEXRCC_HSIRCC_CFGR2_PREDIV_DIV5 0x4RCC_CIR_LSERDYF (1 << 1)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024RST_TIM16RCC_TIM1RCC_TIM2RCC_TIM3__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64INT_FAST64_MIN (-INT_FAST64_MAX - 1)__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fRST_I2C2BIT14 (1<<14)RCC_CFGR_HPRE (0xF << RCC_CFGR_HPRE_SHIFT)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRCC_CFGR_HPRE_DIV512 0xf__SOFTFP__ 1RCC_CSR_SFTRSTF (1 << 28)UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0RCC_CFGR_HPRE_DIV64 0xc__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RRCC_CFGR_PPRE_NODIV 0x0BIT24 (1<<24)__INT32_MAX__ 0x7fffffffLRCC_CFGR_PLLMUL_PLL_CLK_MUL10 0x8RCC_CFGR_HPRE_DIV256 0xeUINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLRCC_CIR_CSSC (1 << 23)__ARM_FEATURE_BF16_VECTOR_ARITHMETICLIBOPENCM3_RCC_H __FLT32_MANT_DIG__ 24RCC_CFGR_ADCPRE_SHIFT 14INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32rcc_osc_bypass_enable__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__RST_TSCINT8_MAX __INT8_MAX__RCC_CSR_LSIRDY (1 << 1)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0RCC_CR_HSERDY (1 << 17)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64RCC_BDCR MMIO32(RCC_BASE + 0x20)UINTPTR_MAXRCC_CFGR_PPRE2_HCLK_DIV4 0x5__LDBL_DENORM_MIN__ 4.9406564584124654e-324LRCC_APB1RSTR_WWDGRST (1 << 11)__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0RCC_CFGR_MCOPRE_DIV2 (1 << RCC_CFGR_MCOPRE_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))RCC_APB2ENR_SPI1EN (1 << 12)DAC_BASE (PERIPH_BASE_APB1 + 0x7400)__GNUC__ 12RCC_CFGR_SW (3 << RCC_CFGR_SW_SHIFT)mcosrcRCC_CFGR_PPRE1_HCLK_DIV4 0x5__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16RCC_CFGR3_USART2SW_LSE (2 << RCC_CFGR3_USART2SW_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0RCC_CFGR_SWS_SHIFT 2CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKRCC_CIR_HSIRDYF (1 << 2)__INT_MAX__ 0x7fffffff__ARM_ARCH 7RCC_LSERCC_CFGR_PLLSRC (1 << 16)__FLT_RADIX__ 2BIT3 (1<<3)long long intTPIU_BASE (PPBI_BASE + 0x40000)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXRCC_CFGR_HPRE_SYSCLK_DIV256 0xe__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)RCC_APB1ENR_I2C2EN (1 << 22)RCC_CFGR_MCOPRE_SHIFT 28__UINT_FAST64_MAX__ 0xffffffffffffffffULLRCC_APB2RSTR MMIO32(RCC_BASE + 0x0c)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1RCC_CIR_LSIRDYC (1 << 16)RCC_CFGR_MCO_LSI 2BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024RCC_CFGR2_PREDIV_NODIV 0x0UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLRCC_CFGR3_USART2SW_HSI (3 << RCC_CFGR3_USART2SW_SHIFT)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4BACKUP_REGS_BASE (RTC_BASE + 0x50)RCC_APB1ENR_SPI3EN (1 << 15)RCC_CR_HSION (1 << 0)__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXFPB_BASE (PPBI_BASE + 0x2000)RCC_CFGR_PPRE2_SHIFT 11__INT_LEAST32_MAX__ 0x7fffffffL__SFRACT_IBIT__ 0RCC_CFGR3 MMIO32(RCC_BASE + 0x30)USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)STIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__RCC_TIM14RCC_TIM15RCC_TIM16RCC_TIM17SYS_TICK_BASE (SCS_BASE + 0x0010)rcc_osc__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)RCC_APB1ENR_PWREN (1 << 28)__LDBL_MAX_10_EXP__ 308RCC_SRAM__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)reset__INT_FAST32_TYPE__ int__ATOMIC_SEQ_CST 5__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1RCC_CIR_HSI14RDYF (1 << 5)RCC_CFGR_MCOPRE_DIV64 (6 << RCC_CFGR_MCOPRE_SHIFT)__USACCUM_IBIT__ 8GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sectionsRCC_CFGR_PPRE2 (7 << RCC_CFGR_PPRE2_SHIFT)__FLT64_HAS_DENORM__ 1__ULLACCUM_IBIT__ 32_STDBOOL_H RCC_CFGR_HPRE_SYSCLK_DIV4 0x9__FLT_EVAL_METHOD__ 0RCC_CFGR_PLLMUL_0_3_SHIFT 18unsigned int__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1RCC_CIR_HSI14RDYC (1 << 21)LIBOPENCM3_RCC_COMMON_ALL_H __ARM_FEATURE_LDREX__UQQ_FBIT__ 8RCC_SYSCFG_COMPRCC_CFGR_PPRE2_HCLK_DIV16 0x7INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__ARM_FEATURE_IDIV 1RCC_APB2RSTR_SYSCFGRST (1 << 0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__CORESIGHT_LAR_OFFSET 0xfb0__UINT8_TYPE__ unsigned charRCC_AHBENR_GPIOCEN (1 << 19)__ARM_FEATURE_COPROC 15RCC_CFGR_SWS_SYSCLKSEL_PLLCLK 0x2UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MIN__ORDER_PDP_ENDIAN__ 3412PERIPH_BASE (0x40000000U)PERIPH_BASE_AHB1 (PERIPH_BASE + 0x20000)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)RCC_APB2ENR MMIO32(RCC_BASE + 0x18)__FLT32X_MIN_EXP__ (-1021)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GCC_ATOMIC_CHAR_LOCK_FREE 2TSC_BASE (PERIPH_BASE_AHB1 + 0x03000)__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1RCC_CR MMIO32(RCC_BASE + 0x00)RCC_CFGR_ADCPRE_DIV6 0x2__FLT32_MIN_10_EXP__ (-37)TIM1_BASE (PERIPH_BASE_APB2 + 0x2c00)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LRCC_GPIODDESIG_UNIQUE_ID1 MMIO32(DESIG_UNIQUE_ID_BASE + 4)__BIGGEST_ALIGNMENT__ 8RCC_SPI1RCC_APB1RSTR_TIM2RST (1 << 0)RCC_SPI3__TA_IBIT__ 64RCC_CFGR2_PREDIV_DIV4 0x3RCC_CFGR_HPRE_SYSCLK_NODIV 0x0__SACCUM_IBIT__ 8__ARM_FEATURE_QRDMXRCC_CFGR_HPRE_NODIV 0x0__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32RCC_CFGR_PPRE_DIV4 0x5SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____USQ_IBIT__ 0RCC_CFGR2_PREDIV 0xfBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)RCC_APB1RSTR_I2C1RST (1 << 21)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1_RCC_REG(i) MMIO32(RCC_BASE + ((i) >> 5))RCC_CIR_LSIRDYIE (1 << 8)INT8_MIN (-INT8_MAX - 1)RCC_APB1RSTR_DACRST (1 << 29)rcc_peripheral_clear_reset__FLT32_DIG__ 6INT_LEAST16_MAXRCC_CFGR_HPRE_SYSCLK_DIV128 0xdBIT15 (1<<15)RCC_CIR_CSSF (1 << 7)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAXRCC_BDCR_BDRST (1 << 16)__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intRCC_CFGR_PPRE2_HCLK_DIV2 0x4RCC_CFGR_PLLNODIV (1 << 31)RCC_CFGR_HPRE_DIV4 0x9USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0__ATOMIC_ACQUIRE 2UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned intRCC_CFGR_USBPRE (3 << RCC_CFGR_USBPRE_SHIFT)__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)RCC_AHBENR_GPIOAEN (1 << 17)__ULACCUM_IBIT__ 32RCC_AHBENR_GPIOEEN (1 << 21)__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAXuint16_t_REG_BIT(base,bit) (((base) << 5) + (bit))__UHQ_IBIT__ 0TIM2_BASE (PERIPH_BASE_APB1 + 0x0000)LIBOPENCM3_MEMORYMAP_COMMON_H BIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRRST_SPI2__UINT_LEAST16_TYPE__ short unsigned intrcc_periph_reset_hold__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intRCC_CIR_HSERDYIE (1 << 11)__FLT32X_DIG__ 15RCC_CFGR_USBPRE_PLL_CLK_DIV1_5 0x0__UTQ_FBIT__ 128RCC_APB2ENR_TIM17EN (1 << 18)__LLACCUM_EPSILON__ 0x1P-31LLK__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffRCC_APB1ENR_TIM3EN (1 << 1)PTRDIFF_MAX __PTRDIFF_MAX__rcc_periph_reset_releaseRCC_CFGR2_PREDIV_DIV16 0xfRCC_CR_PLLRDY (1 << 25)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKRCC_CFGR3_USART2SW (3 << RCC_CFGR3_USART2SW_SHIFT)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRRCC_APB1ENR_I2C1EN (1 << 21)RCC_AHBRSTR MMIO32(RCC_BASE + 0x28)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intRCC_FLTFRCC_CFGR2_PREDIV_DIV12 0xbWCHAR_MINRCC_CFGR_MCOPRE_DIV1 (0 << RCC_CFGR_MCOPRE_SHIFT)RCC_CFGR_PLLMUL_PLL_CLK_MUL6 0x4RCC_CFGR3_ADCSW (1 << 8)BEGIN_DECLS RST_TIM2div_valRCC_APB2ENR_SYSCFGCOMPEN (1 << 0)RCC_APB2ENR_TIM16EN (1 << 17)RCC_CSR MMIO32(RCC_BASE + 0x24)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_PORT_F_BASE (PERIPH_BASE_AHB2 + 0x1400)RCC_CR2 MMIO32(RCC_BASE + 0x34)__FLT32_MIN__ 1.1754943508222875e-38F32RCC_APB2RSTR_SPI1RST (1 << 12)INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1RCC_CFGR_MCOPRE_DIV8 (3 << RCC_CFGR_MCOPRE_SHIFT)RCC_CIR_HSERDYF (1 << 3)rcc_osc_bypass_disableRST_ADCRST_CEC__QQ_IBIT__ 0RCC_CFGR_SW_SYSCLKSEL_HSICLK 0x0_RCC_BITRCC_CFGR_USBPRE_PLL_CLK_DIV2_5 0x2RCC_CR_PLLON (1 << 24)__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__GNUC_MINOR__ 2__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2RCC_APB2RSTR_TIM17RST (1 << 18)TIM16_BASE (PERIPH_BASE_APB2 + 0x4400)RCC_CFGR_HPRE_SYSCLK_DIV512 0xfINT_LEAST8_MININTMAX_MAXRST_DACrcc_peripheral_resetRCC_APB1ENR_SPI2EN (1 << 14)RCC_PLLRCC_WWDG__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1RCC_CFGR_PLLXTPRE (1 << 17)TIM17_BASE (PERIPH_BASE_APB2 + 0x4800)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C/build/libopencm3/lib/gd32/f1x0RCC_CFGR_PPRE1_HCLK_DIV2 0x4INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRUINT16_C(c) __UINT16_C(c)__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned intRCC_BASE (PERIPH_BASE_AHB1 + 0x01000)__LDBL_MIN_10_EXP__ (-307)USART1_BASE (PERIPH_BASE_APB2 + 0x3800)DMA1_BASE (PERIPH_BASE_AHB1 + 0x00000)RST_SPI1__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDE__ACCUM_IBIT__ 16RCC_CFGR_PLLSRC_HSE_CLK 0x1FLASH_BASE (0x08000000U)RCC_TSCEXTI_BASE (PERIPH_BASE_APB2 + 0x0400)RCC_BDCR_LSEON (1 << 0)short intRCC_AHBENR_GPIOBEN (1 << 18)__FLT32_IS_IEC_60559__ 2__UINT16_C(c) c__UDA_IBIT__ 32__FLT_HAS_INFINITY__ 1UINT_LEAST32_MAXBIT2 (1<<2)RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCRCC_APB1ENR_DACEN (1 << 29)RCC_CFGR_PLLMUL_PLL_CLK_MUL11 0x9__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53RCC_BDCR_LSEBYP (1 << 2)RCC_APB1RSTR_SPI2RST (1 << 14)BIT5 (1<<5)BIT1 (1<<1)INT8_CINT_LEAST32_MAX__ARM_ARCH_EXT_IDIV__ 1RCC_CFGR_PPRE1_HCLK_DIV16 0x7RCC_APB1RSTR_TIM6RST (1 << 4)__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)clkenINT16_C(c) __INT16_C(c)UINT32_MAXRCC_CFGR2 MMIO32(RCC_BASE + 0x2c)__INT16_MAX__ 0x7fffRST_USBTIM15_BASE (PERIPH_BASE_APB2 + 0x4000)_RCC_REG__INT_WIDTH__ 32RCC_APB1ENR_CECEN (1 << 30)RCC_CFGR_PLLMUL_0_3 (0xF << RCC_CFGR_PLLMUL_0_3_SHIFT)RCC_CR_HSEBYP (1 << 18)__QQ_FBIT__ 7RCC_APB1ENR_WWDGEN (1 << 11)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64RCC_CFGR2_PREDIV_DIV2 0x1RCC_CFGR_PPRE1_SHIFT 8__UTA_IBIT__ 64RCC_CFGR MMIO32(RCC_BASE + 0x04)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0TIM14_BASE (PERIPH_BASE_APB1 + 0x2000)__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17RCC_CFGR_PPRE1_MASK 0x7RCC_AHBENR_CRCEN (1 << 6)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1RCC_USART1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32RCC_CFGR_HPRE_SYSCLK_DIV2 0x8RCC_I2C1RCC_I2C2RCC_CFGR_MCOPRE (7 << RCC_CFGR_MCOPRE_SHIFT)__ARM_ASM_SYNTAX_UNIFIED__ 1__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODRCC_APB2RSTR_ADCRST (1 << 9)__thumb2__ 1__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1RST_I2C1__ULLFRACT_MIN__ 0.0ULLRRCC_CFGR_SW_SYSCLKSEL_HSECLK 0x1RCC_CFGR_PLLMUL_PLL_CLK_MUL16 0xeINT_LEAST64_MIN__GCC_CONSTRUCTIVE_SIZE 64RCC_CSR_PORRSTF (1 << 27)RCC_ADC__LLFRACT_IBIT__ 0uint32_tBIT12 (1<<12)RCC_CFGR_SWS (3 << RCC_CFGR_SWS_SHIFT)RCC_CFGR_HPRE_DIV128 0xdMPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1RCC_CFGR_PLLMUL_4 (1 << RCC_CFGR_PLLMUL_4_SHIFT)RCC_CFGR_SW_SHIFT 0RCC_CFGR2_PREDIV_DIV10 0x9RCC_CFGR2_PREDIV_DIV9 0x8__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8RCC_CSR_WWDGRSTF (1 << 30)RCC_APB1RSTR_I2C2RST (1 << 22)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15RCC_APB2ENR_TIM1EN (1 << 11)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8RCC_CEC__INT_LEAST16_TYPE__ short intRCC_AHBENR_TSCEN (1 << 24)__DBL_MAX__ ((double)1.7976931348623157e+308L)RCC_CFGR_ADCPRE_DIV4 0x1INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1RST_TIM1UINTMAX_CRST_TIM3RCC_CFGR_PLLXTPRE_HSE_CLK 0x0RST_TIM6INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__HQ_FBIT__ 15__bool_true_false_are_defined 1RCC_APB1RSTR MMIO32(RCC_BASE + 0x10)BIT26 (1<<26)DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x7e0)__SIZE_MAX__ 0xffffffffUSPI2_BASE (PERIPH_BASE_APB1 + 0x3800)RCC_CFGR_PPRE2_MASK 0x7__ARM_ARCHRST_BACKUPDOMAINrcc_get_div_from_hpreRCC_APB2RSTR_TIM1RST (1 << 11)RCC_CFGR_PLLMUL_PLL_CLK_MUL4 0x2INT_FAST16_MIN__ARM_FEATURE_LDREX 7PTRDIFF_MAX__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53RCC_CFGR_MCO_PLL 7__WCHAR_WIDTH__ 32WINT_MAX__INT16_C(c) cRCC_APB1ENR_USART2EN (1 << 17)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32RCC_USART2__PTRDIFF_WIDTH__ 32RST_TIM14RCC_CFGR_HPRE_SYSCLK_DIV8 0xaRST_TIM15RST_USART1RST_USART2RST_TIM17__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)RCC_CFGR3_CECSW (1 << 6)RCC_CR_CSSON (1 << 19)RST_PWRRCC_CFGR_PPRE_DIV2 0x4RCC_CFGR_MCO_NOCLK 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32RST_WWDGUINT64_C(c) __UINT64_C(c)RCC_CFGR3_USART2SW_PCLK (0 << RCC_CFGR3_USART2SW_SHIFT)RCC_APB2RSTR_TIM16RST (1 << 17)RCC_CFGR_SW_SYSCLKSEL_PLLCLK 0x2__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53RCC_CFGR_HPRE_DIV2 0x8__ULFRACT_IBIT__ 0RCC_APB1RSTR_PWRRST (1 << 28)INT_FAST16_MAXITR_BASE (SCS_BASE + 0x0000)RCC_CFGR_ADCPRE_PCLK2_DIV6 0x2__ARM_EABI__ 1__INT_LEAST64_TYPE__ long long intRCC_DAC__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205ÿÿÿÿ| "((A,aeabi"7-M M "ñÿ $$ "$68&(*,.024:?p¡Ó8l9<š¶ Óè 4"Kaz†(œ(³rcc_common_all.c$t$dwm4.0.e49964f5ef61afced4b3c3d071764ac8wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.8c90486dae5eea2d8efddd23fe5d09d9wm4.memorymap.h.28.9d643caf3497e42de1f9c9da7297e92ewm4.rcc.h.42.dfe00f91dbb5cca3c1cd0101207c1964rcc_peripheral_enable_clockrcc_peripheral_disable_clockrcc_peripheral_resetrcc_peripheral_clear_resetrcc_periph_clock_enablercc_periph_clock_disablercc_periph_reset_pulsercc_periph_reset_holdrcc_periph_reset_releasercc_set_mcorcc_osc_bypass_enablercc_osc_bypass_disablercc_get_div_from_hpreIJ# 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1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__preinit_array_startPTRDIFF_MINSCB_CPUID_VARIANT_LSB 20__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)SCB_CPACR_CP10 (1 << 20)PPBI_BASE (0xE0000000U)__STDC_VERSION__ 201710Lnull_handler__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINSCB_CFSR_MUNSTKERR (1 << 3)NVIC_ADC_COMP_IRQ 12SCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8)unsigned char__STDC_UTF_32__ 1__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15RSCB_ICSR_PENDSVSET (1 << 28)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5SCB_CPACR MMIO32(SCB_BASE + 0x88)NVIC_USAGE_FAULT_IRQ -10NVIC_IPR(ipr_id) MMIO8(NVIC_BASE + 0x300 + (ipr_id))__UINT16_MAX__ 0xffff__TQ_FBIT__ 127NVIC_DMA_CHANNEL1_IRQ 9usage_fault__USQ_FBIT__ 32INT_FAST16_MIN__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32NVIC_EXTI4_15_IRQ 7SCB_SHCSR MMIO32(SCB_BASE + 0x24)__TA_IBIT__ 64SCB_CFSR_DACCVIOL (1 << 1)UINT_LEAST8_MAXSCB_VTOR_TBLOFF (0x7FFFFF << SCB_VTOR_TBLOFF_LSB)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__SCB_SHCSR_PENDSVACT (1 << 10)__USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1PTRDIFF_MIN (-PTRDIFF_MAX - 1)NVIC_SPI1_IRQ 25__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned int__preinit_array_enddebug_monitor__FLT_MIN__ 1.1754943508222875e-38FSCB_AIRCR_PRIGROUP_MASK (0x7 << 8)__FDPIC____FLT32_IS_IEC_60559__ 2NVIC_I2C1_ER_IRQ 32INT_FAST64_MINSCB_CFSR_IACCVIOL (1 << 0)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRSCB_SHCSR_BUSFAULTENA (1 << 17)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024SCB_SHCSR_USGFAULTENA (1 << 18)SCB_ICSR_RETOBASE (1 << 11)__DBL_HAS_DENORM__ 1__DA_FBIT__ 31__GXX_ABI_VERSION 1017NVIC_DMA_CHANNEL4_5_IRQ 11__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45Fvector_tableINT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKSCB_SHCSR_MEMFAULTACT (1 << 0)hard_faultINT_LEAST8_MAX __INT_LEAST8_MAX____UINT32_C(c) c ## ULUINTMAX_MAX__UACCUM_MIN__ 0.0UKSCS_BASE (PPBI_BASE + 0xE000)NVIC_DMA_CHANNEL6_7_IRQ 48__init_array_start__GCC_ATOMIC_SHORT_LOCK_FREE 2SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)__SIZEOF_DOUBLE__ 8__ARM_ARCH_ISA_THUMBSCB_ICSR_VECTPENDING_LSB 12LIBOPENCM3_CM3_MEMORYMAP_H SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)SCB_FPCAR MMIO32(SCB_BASE + 0x238)NVIC_TIM1_BRK_UP_TRG_COM_IRQ 13__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1__ARM_FEATURE_MATMUL_INT8__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))SCB_SHPR_PRI_13_RESERVED 9__FLT32X_MAX_10_EXP__ 308SCB_SHPR_PRI_5_BUSFAULT 1__ARM_ARCH_EXT_IDIV__ 1__ARM_PCS 1NVIC_I2C2_ER_IRQ 34bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SCB_FPCCR MMIO32(SCB_BASE + 0x234)INT16_MAX __INT16_MAX____FLT32X_IS_IEC_60559__ 2SCB_AFSR MMIO32(SCB_BASE + 0x3C)NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16NVIC_RCC_IRQ 4__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLNVIC_TIM6_DAC_IRQ 17INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRSCB_SCR_SEVONPEND (1 << 4)SCB_ICSR_PENDSTCLR (1 << 25)CORESIGHT_LSR_SLI (1<<0)INT64_MINSCB_MVFR0 MMIO32(SCB_BASE + 0x240)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__NVIC_IRQ_COUNT 52__UINT32_MAX__ 0xffffffffULSCB_CCR_UNALIGN_TRP (1 << 3)SCB_CCR_USERSETMPEND (1 << 1)__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1NVIC_RESERVED7_IRQ 43__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXSCB_CFSR_INVPC (1 << 18)NVIC_HARD_FAULT_IRQ -13__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffULNVIC_BUS_FAULT_IRQ -11__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intSCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXNVIC_TIM1_CC_IRQ 14SCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__UINT_LEAST16_TYPE__ short unsigned int__INT32_MAX__ 0x7fffffffLSCB_CFSR_NOCP (1 << 19)SCB_ICSR_NMIPENDSET (1 << 31)SCB_MVFR1 MMIO32(SCB_BASE + 0x244)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICSCB_ID_PFR1 MMIO32(SCB_BASE + 0x44)SCB_CPACR_CP11 (1 << 22)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__BIT28 (1<<28)_ebss__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3NVIC_RESERVED4_IRQ 39UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKSCB_CPUID MMIO32(SCB_BASE + 0x00)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1IRQ_HANDLERS [NVIC_WWDG_IRQ] = wwdg_isr, [NVIC_PVD_IRQ] = pvd_isr, [NVIC_RTC_IRQ] = rtc_isr, [NVIC_FLASH_IRQ] = flash_isr, [NVIC_RCC_IRQ] = rcc_isr, [NVIC_EXTI0_1_IRQ] = exti0_1_isr, [NVIC_EXTI2_3_IRQ] = exti2_3_isr, [NVIC_EXTI4_15_IRQ] = exti4_15_isr, [NVIC_TSC_IRQ] = tsc_isr, [NVIC_DMA_CHANNEL1_IRQ] = dma_channel1_isr, [NVIC_DMA_CHANNEL2_3_IRQ] = dma_channel2_3_isr, [NVIC_DMA_CHANNEL4_5_IRQ] = dma_channel4_5_isr, [NVIC_ADC_COMP_IRQ] = adc_comp_isr, [NVIC_TIM1_BRK_UP_TRG_COM_IRQ] = tim1_brk_up_trg_com_isr, [NVIC_TIM1_CC_IRQ] = tim1_cc_isr, [NVIC_TIM2_IRQ] = tim2_isr, [NVIC_TIM3_IRQ] = tim3_isr, [NVIC_TIM6_DAC_IRQ] = tim6_dac_isr, [NVIC_RESERVED0_IRQ] = reserved0_isr, [NVIC_TIM14_IRQ] = tim14_isr, [NVIC_TIM15_IRQ] = tim15_isr, [NVIC_TIM16_IRQ] = tim16_isr, [NVIC_TIM17_IRQ] = tim17_isr, [NVIC_I2C1_EV_IRQ] = i2c1_ev_isr, [NVIC_I2C2_EV_IRQ] = i2c2_ev_isr, [NVIC_SPI1_IRQ] = spi1_isr, [NVIC_SPI2_IRQ] = spi2_isr, [NVIC_USART1_IRQ] = usart1_isr, [NVIC_USART2_IRQ] = usart2_isr, [NVIC_RESERVED1_IRQ] = reserved1_isr, [NVIC_CEC_CAN_IRQ] = cec_can_isr, [NVIC_RESERVED2_IRQ] = reserved2_isr, [NVIC_I2C1_ER_IRQ] = i2c1_er_isr, [NVIC_RESERVED3_IRQ] = reserved3_isr, [NVIC_I2C2_ER_IRQ] = i2c2_er_isr, [NVIC_I2C3_EV_IRQ] = i2c3_ev_isr, [NVIC_I2C3_ER_IRQ] = i2c3_er_isr, [NVIC_USB_LP_IRQ] = usb_lp_isr, [NVIC_USB_HP_IRQ] = usb_hp_isr, [NVIC_RESERVED4_IRQ] = reserved4_isr, [NVIC_RESERVED5_IRQ] = reserved5_isr, [NVIC_RESERVED6_IRQ] = reserved6_isr, [NVIC_USB_WAKEUP_IRQ] = usb_wakeup_isr, [NVIC_RESERVED7_IRQ] = reserved7_isr, [NVIC_RESERVED8_IRQ] = reserved8_isr, [NVIC_RESERVED9_IRQ] = reserved9_isr, [NVIC_RESERVED10_IRQ] = reserved10_isr, [NVIC_RESERVED11_IRQ] = reserved11_isr, [NVIC_DMA_CHANNEL6_7_IRQ] = dma_channel6_7_isr, [NVIC_RESERVED12_IRQ] = reserved12_isr, [NVIC_RESERVED13_IRQ] = reserved13_isr, [NVIC_SPI3_IRQ] = spi3_isr__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))__GNUC__ 12SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C)WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKSCB_VTOR_TBLOFF_LSB 9__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7memory_manage_fault_stack__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55BIT29 (1<<29)NVIC_RESERVED0_IRQ 18__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)SCB_CPUID_IMPLEMENTER_LSB 24SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xSCB_CCR_DIV_0_TRP (1 << 4)__FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4NVIC_USART1_IRQ 27__UFRACT_MAX__ 0XFFFFP-16URblocking_handlerFPB_BASE (PPBI_BASE + 0x2000)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0STIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__ID_BASE (SCS_BASE + 0x0FD0)SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308reset__INT_FAST32_TYPE__ intNVIC_TIM14_IRQ 19unsigned intSCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68)NVIC_TIM2_IRQ 15__init_array_end__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sections__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKSCB_ICSR MMIO32(SCB_BASE + 0x04)__UTA_IBIT__ 64__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1NVIC_I2C3_ER_IRQ 36__ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8)__UINT8_TYPE__ unsigned charSCB_SHCSR_SYSTICKACT (1 << 11)__ARM_FEATURE_COPROC 15UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINtrue 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)pend_sv__FLT32X_MIN_EXP__ (-1021)INT64_MAXINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 2__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__SCB_CFSR_BFARVALID (1 << 15)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1__FLT32_MIN_10_EXP__ (-37)SCB_SHCSR_USGFAULTPENDED (1 << 12)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)SCB_ICSR_ISRPENDING (1 << 22)__ARM_EABI__ 1SCB_AIRCR_PRIGROUP_SHIFT 8__ARM_FEATURE_QRDMXSCB_SHCSR_USGFAULTACT (1 << 3)__ARM_ARCH_ISA_THUMB 2NVIC_TSC_IRQ 8__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINT_FAST32_TYPE__ unsigned intBIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)NVIC_SYSTICK_IRQ -1NVIC_RESERVED9_IRQ 45BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__FLT_EPSILON__ 1.1920928955078125e-7F__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0SCB_CPACR_PRIV 1UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_ICSR_VECTACTIVE_LSB 0long long unsigned intSCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8)BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0INT_LEAST8_MINSCB_FPDSCR MMIO32(SCB_BASE + 0x23C)SCB_AIRCR_SYSRESETREQ (1 << 2)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)_data_loadaddr__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intNVIC_RESERVED6_IRQ 41__FLT32X_DIG__ 15__UTQ_FBIT__ 128LIBOPENCM3_SCB_H __FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX__SCB_CFSR_PRECISERR (1 << 9)NVIC_EXTI2_3_IRQ 6__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRSCB_CFSR_IBUSERR (1 << 8)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_PVD_IRQ 1NVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))WCHAR_MINBEGIN_DECLS __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKINT_LEAST64_MIN (-INT_LEAST64_MAX - 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__FLT_MAX_10_EXP__ 38__PMT(args) argsSCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15RINT_LEAST32_MAX __INT_LEAST32_MAX__UINTMAX_C__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5_READ_WRITE_RETURN_TYPE int__DEFINED_size_t BIT8 (1<<8)SCB_CPACR MMIO32(SCB_BASE + 0x88)__need_wint_tBEGIN_DECLS __sym_default(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@@" #verid)__alloc_size2(n,x) __attribute__((__alloc_size__(n, x)))__UINT16_MAX__ 0xffff__TQ_FBIT__ 127scb_set_priority_grouping__LDBL_MAX_EXP__ 1024_HAVE_LONG_DOUBLE 1INT_FAST16_MIN__GNUCLIKE_BUILTIN_CONSTANT_P 1__SIZEOF_SHORT__ 2__P(protos) protosSCB_SHCSR MMIO32(SCB_BASE + 0x24)__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))_SYS_FEATURES_H __noinline __attribute__ ((__noinline__))UINT_LEAST8_MAX_MACHSTDLIB_H_ SCB_VTOR_TBLOFF (0x7FFFFF << SCB_VTOR_TBLOFF_LSB)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX 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_impure_ptr__has_feature(x) 0__exported __attribute__((__visibility__("default")))__SCCSID(s) struct __hackBIT7 (1<<7)__DBL_HAS_DENORM__ 1SCB_ICSR_PENDSVSET (1 << 28)prigroup_MB_LEN_MAX 1__DA_FBIT__ 31long long intBIT17 (1<<17)__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__ULLACCUM_EPSILON__ 0x1P-32ULLK__requires_shared(...) __lock_annotate(shared_locks_required(__VA_ARGS__))_END_STD_C SCB_SHPR_PRI_14_PENDSV 10_T_SIZE SCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)_Null_unspecified __FLT_EPSILON__ 1.1920928955078125e-7F__XSTRING(x) __STRING(x)__restrict restrictSCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)BIT11 (1<<11)__ARM_ARCH_ISA_THUMB__GNUCLIKE_BUILTIN_VARARGS 1__ARM_FEATURE_MATMUL_INT8__UINT8_TYPE__ unsigned char_REENT_SIGNGAM(ptr) ((ptr)->_new._reent._gamma_signgam)LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2SCB_FPCAR MMIO32(SCB_BASE + 0x238)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__MISC_VISIBLE 1SCS_BASE (PPBI_BASE + 0xE000)SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1SCB_SCR_SLEEPDEEP (1 << 2)__OBSOLETE_MATH __OBSOLETE_MATH_DEFAULT__LDBL_HAS_INFINITY__ 1SCB_CCR MMIO32(SCB_BASE + 0x14)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))SCB_SHPR_PRI_13_RESERVED 9__FLT32X_MAX_10_EXP__ 308SCB_SHPR_PRI_5_BUSFAULT 1__ARM_ARCH_EXT_IDIV__ 1__ARM_PCS 1__FLT32X_MIN_EXP__ (-1021)__offsetof(type,field) offsetof(type, field)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBIT13 (1<<13)_BSD_WCHAR_T_ _REENT_TM(ptr) (&(ptr)->_new._reent._localtime_buf)SCB_FPCCR MMIO32(SCB_BASE + 0x234)INT16_MAX __INT16_MAX__SCB_MVFR1 MMIO32(SCB_BASE + 0x244)__FLT32X_IS_IEC_60559__ 2INT_LEAST64_MAX __INT_LEAST64_MAX__LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX_REENT_CHECK_EMERGENCY(ptr) __INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRNULL ((void *)0)SCB_SCR_SEVONPEND (1 << 4)__OPTIMIZE_SIZE__ 1___int_least32_t_defined 1__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__need_NULL__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL_ATFILE_SOURCE_REENT_MBTOWC_STATE(ptr) ((ptr)->_new._reent._mbtowc_state)SCB_CCR_UNALIGN_TRP (1 << 3)_REENT_MBLEN_STATE(ptr) ((ptr)->_new._reent._mblen_state)__trylocks_shared(...) __lock_annotate(shared_trylock_function(__VA_ARGS__))__INT_LEAST8_MAX__ 0x7f__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEX__locks_shared(...) __lock_annotate(shared_lock_function(__VA_ARGS__))unsigned signedSCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)__UINT64_TYPE__ long long unsigned int__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024SCB_ICSR MMIO32(SCB_BASE + 0x04)BIT21 (1<<21)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)__lock_acquire(lock) ((void) 0)__section(x) __attribute__((__section__(x)))__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1___int8_t_defined 1__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__UINT_FAST16_TYPE__ unsigned int__GCC_DESTRUCTIVE_SIZE 64__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVE__nonnull_all __attribute__((__nonnull__))__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned int_POSIX_SOURCERAND_MAX __RAND_MAXSCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN_T_SIZE_ __FLT_EVAL_METHOD_TS_18661_3__ 0__attribute_malloc__ __lock_init_recursive(lock) ((void) 0)BIT18 (1<<18)UINT_FAST16_MAX__NULLABILITY_PRAGMA_POP SCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffL__min_size(x) static (x)__GXX_TYPEINFO_EQUALITY_INLINE 0UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__null_sentinel __attribute__((__sentinel__))__ARM_FEATURE_BF16_VECTOR_ARITHMETICSCB_ID_PFR1 MMIO32(SCB_BASE + 0x44)__need_NULL _DEFAULT_SOURCE 1SCB_CPACR_CP11 (1 << 22)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32offsetof(TYPE,MEMBER) __builtin_offsetof (TYPE, MEMBER)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8__LDBL_EPSILON__ 2.2204460492503131e-16LBIT28 (1<<28)__pure2 __attribute__((__const__))__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2INTMAX_C(c) __INTMAX_C(c)__NULLABILITY_PRAGMA_PUSH __DBL_MAX_EXP__ 1024SCB_VTOR_TBLOFF_LSB 9__ATOMIC_RELEASE 3SCB_SHCSR_MEMFAULTENA (1 << 16)__FLT32X_HAS_DENORM__ 1__FLT_MANT_DIG__ 24_RAND48_SEED_1 (0xabcd)__UDQ_IBIT__ 0SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)___int_ptrdiff_t_h __OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__CC_SUPPORTS___FUNC__ 1__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__GNUCLIKE_MATH_BUILTIN_CONSTANTS SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40)UINTPTR_MAX_T_PTRDIFF_ __LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0_ANSI_STDDEF_H _REENT_CHECK_SIGNAL_BUF(ptr) MMIO16(addr) (*(volatile uint16_t *)(addr))UINT16_C(c) __UINT16_C(c)_REENT_SMALL_CHECK_INIT(ptr) __GNUC__ 12SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C)WCHAR_MAX__LONG_WIDTH__ 32_T_WCHAR_ INT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__warn_references(sym,msg) __asm__(".section .gnu.warning." #sym); __asm__(".asciz \"" msg "\""); __asm__(".previous")__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4_NEWLIB_VERSION_H__ 1__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULK_ATEXIT_DYNAMIC_ALLOC 1__need_size_t__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7SCB_CCR_NONBASETHRDENA (1 << 0)_SIZE_T_ __FLT_RADIX__ 2BIT3 (1<<3)__lock_acquire_recursive(lock) ((void) 0)_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__DEFINED_wchar_t SCB_CPUID_IMPLEMENTER_LSB 24__UINT_FAST64_MAX__ 0xffffffffffffffffULLSCB_ID_DFR0 MMIO32(SCB_BASE + 0x48)__ARM_FPSCB_ICSR_PENDSTCLR (1 << 25)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINT_FAST8_MIN (-INT_FAST8_MAX - 1)__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))__FLT64_MAX_EXP__ 1024__WCHAR_T BIT20 (1<<20)MB_CUR_MAX __locale_mb_cur_max()__FLT64_MIN__ 2.2250738585072014e-308F64___int32_t_defined 1__INT_WIDTH__ 32_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1__FLT_MIN_EXP__ (-125)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intSCB_ICSR_VECTACTIVE_LSB 0__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T __predict_false(exp) __builtin_expect((exp), 0)__unused __attribute__((__unused__))__thumb2__ 1_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)SCB_ICSR_VECTPENDING_LSB 12__UFRACT_MAX__ 0XFFFFP-16UR___int_least64_t_defined 1INT64_MAXFPB_BASE (PPBI_BASE + 0x2000)__THROW SCB_SHCSR_BUSFAULTACT (1 << 1)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)_ATFILE_SOURCE 1__EXP(x) __ ##x ##____BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX___NOTHROW _ANSIDECL_H_ SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__SIG_ATOMIC_TYPE__ int__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__GNUCLIKE_BUILTIN_MEMCPY 1__APCS_32__ 1__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ int__ARM_ARCH_PROFILE 77unsigned int_SIZE_T_DEFINED_ SCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68)SCB_AIRCR_SYSRESETREQ (1 << 2)__NEWLIB_MINOR__ 3_SIZET_ __FLT64_HAS_QUIET_NAN__ 1__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_IBIT__ 8GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sections__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK_FVWRITE_IN_STREAMIO 1_WCHAR_T_DECLARED END_DECLS INT_LEAST8_MAX __INT_LEAST8_MAX___SYS_REENT_H_ __FLT_EVAL_METHOD__ 0SCB_ICSR_ISRPENDING (1 << 22)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1_RAND48_MULT_2 (0x0005)__ARM_FEATURE_LDREX_T_PTRDIFF __UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0__requires_unlocked(...) __lock_annotate(locks_excluded(__VA_ARGS__))INT_LEAST16_MAX __INT_LEAST16_MAX__alloca__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4_PTRDIFF_T_DECLARED ___int_least8_t_defined 1__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8)_GCC_WCHAR_T SCB_SHCSR_SYSTICKACT (1 << 11)__unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))__EXPORT __ARM_FEATURE_COPROC 15__OBSOLETE_MATH_DEFAULT 1SCB_SHCSR_MEMFAULTACT (1 << 0)UINT64_MAX __UINT64_MAX__false 0__SHRT_WIDTH__ 16_UNBUF_STREAM_OPT 1__IMPORT true 1_ATEXIT_SIZE 32__USA_FBIT__ 16__volatile volatile_MACHINE__TYPES_H __IEEE_LITTLE_ENDIAN __LDBL_MIN_10_EXP__ (-307)_WANT_REGISTER_FINI 1__FLT_HAS_QUIET_NAN__ 1__ATFILE_VISIBLE 1__LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))__ARM_SIZEOF_MINIMAL_ENUM 1bool _Bool_POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAX__FLT32_MIN_10_EXP__ (-37)SCB_SHCSR_USGFAULTPENDED (1 << 12)__RAND_MAX 0x7fffffff__lock_try_acquire(lock) ((void) 0)__STRING(x) #x_WCHAR_T ../../cm3/scb.cINT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__FBSDID(s) struct __hack__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64SCB_SHCSR_PENDSVACT (1 << 10)__LOCK_INIT(class,lock) static int lock = 0;_SIZE_T _WCHAR_T_H SCB_AIRCR_PRIGROUP_SHIFT 8__ARM_FEATURE_QRDMXSCB_SHCSR_USGFAULTACT (1 << 3)__ARM_ARCH_ISA_THUMB 2__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1SCB_CFSR_MUNSTKERR (1 << 3)long double__arg_type_tag(arg_kind,arg_idx,type_tag_idx) __USQ_IBIT__ 0_REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }STIR_BASE (SCS_BASE + 0x0F00)__COPYRIGHT(s) struct __hack__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)_STDDEF_H_ INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__SIZE_T SCB_CPUID MMIO32(SCB_BASE + 0x00)SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT8_MIN (-INT8_MAX - 1)__printf0like(fmtarg,firstvararg) SCB_AIRCR_PRIGROUP_MASK (0x7 << 8)__FLT32_DIG__ 6INT_LEAST16_MAX__dead2 __attribute__((__noreturn__))BIT15 (1<<15)__compar_fn_t_defined __EXP___int64_t_defined 1__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)_REENT_CHECK_MISC(ptr) __GNUC_VA_LIST_COMPATIBILITY 1__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_SHCSR_MEMFAULTPENDED (1 << 13)SCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)UINT_LEAST16_MAXBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0SCB_CFSR_DACCVIOL (1 << 1)SCB_CPACR_PRIV 1UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0__BSD_VISIBLE 1__ORDER_LITTLE_ENDIAN__ 1234__size_t__CC_SUPPORTS_INLINE 1__DOTS , ...long long unsigned int__alloc_size(x) __attribute__((__alloc_size__(x)))BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int_SIZE_T_DEFINED __DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4__GNU_VISIBLE 0INT_LEAST64_MAX__SACCUM_IBIT__ 8SCB_CFSR_INVPC (1 << 18)__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)SCB_FPDSCR MMIO32(SCB_BASE + 0x23C)BIT29 (1<<29)__INT_FAST16_TYPE__ int__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intSCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58)__FLT32X_DIG__ 15__signed signedSCB_BFAR MMIO32(SCB_BASE + 0x38)__UTQ_FBIT__ 128LIBOPENCM3_SCB_H _REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1PTRDIFF_MAX __PTRDIFF_MAX__SCB_CFSR_PRECISERR (1 << 9)_REENT_MP_P5S(ptr) ((ptr)->_p5s)INT8_MIN_WCHAR_T_DEFINED __ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))SCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRSCB_CFSR_IBUSERR (1 << 8)BIT26 (1<<26)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))INT32_MIN__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})SCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C)_BSD_SIZE_T_ WCHAR_MINSCB_CPUID_REVISION_LSB 0__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ _REENT_STDIO_STREAM(var,index) &(var)->__sf[index]_T_WCHAR alloca(size) __builtin_alloca(size)_CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) SCB_VTOR MMIO32(SCB_BASE + 0x08)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 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__INT_FAST32_WIDTH__ 32_SYS_CDEFS_H_ __GNUCLIKE_BUILTIN_VAALIST 1__sym_compat(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@" #verid)_NEWLIB_ALLOCA_H __ARM_ASM_SYNTAX_UNIFIED__ 1strtodf strtof__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD_NEWLIB_VERSION "3.3.0"SCB_ID_ISAR3 MMIO32(SCB_BASE + 0x6C)__pure __attribute__((__pure__))_GCC_SIZE_T SCB_CCR_STKALIGN (1 << 9)__CC_SUPPORTS_WARNING 1__ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAX_REENT_CHECK_RAND48(ptr) INT_LEAST64_MIN__lock_release(lock) ((void) 0)__GCC_CONSTRUCTIVE_SIZE 64_BSD_WCHAR_T___LLFRACT_IBIT__ 0__CC_SUPPORTS_VARADIC_XXX 1SCB_SHPR_PRI_10_RESERVED 6uint32_tBIT12 (1<<12)SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)SCB_ICSR_RETOBASE (1 << 11)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1_REENT_CHECK_VERIFY 1_POSIX_SOURCE 1_REENT_RAND_NEXT(ptr) ((ptr)->_new._reent._rand_next)__UHA_IBIT__ 8__GNUC_STDC_INLINE__ 1__need_wint_t __ACCUM_EPSILON__ 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X 0SCB_CPACR_FULL 3SCB_SHPR_PRI_4_MEMMANAGE 0SCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64CORESIGHT_LSR_SLK (1<<1)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 2__CHAR_UNSIGNED__ 1SCB_MVFR0 MMIO32(SCB_BASE + 0x240)SCB_CFSR_INVSTATE (1 << 17)__FLT64_HAS_INFINITY__ 1SCB_AIRCR_PRIGROUP_GROUP4_SUB4 (0x5 << 8)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2NVIC_SV_CALL_IRQ -5__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__UACCUM_MAX__ 0XFFFFFFFFP-16UK__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17WINT_MIN __WINT_MIN__INT_FAST64_MAX__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUNVIC_RESERVED8_IRQ 44__SIZEOF_INT__ 4SCB_SHCSR_SVCALLPENDED (1 << 15)INT64_MAX __INT64_MAX__NVIC_PVD_IRQ 1__SIZEOF_LONG_LONG__ 8NVIC_PENDSV_IRQ -2__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned int__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__SHRT_WIDTH__ 16__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__GCC_ATOMIC_LLONG_LOCK_FREE 1__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)SCB_HFSR_FORCED (1 << 30)NVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + ((iser_id) * 4))__UINT8_C(c) c__INT16_TYPE__ short intSCB_AIRCR_VECTRESET (1 << 0)__FLT64_MAX__ 1.7976931348623157e+308F64SCB_SHPR(ipr_id) MMIO8(SCS_BASE + 0xD18 + (ipr_id))UINT_FAST32_MAXBIT24 (1<<24)nvic_enable_irqINT_FAST64_MAX __INT_FAST64_MAX____GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64__SIG_ATOMIC_TYPE__ intSCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8)SCB_CFSR_STKERR (1 << 12)NVIC_DMA_CHANNEL2_3_IRQ 10__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intSCB_CPUID_REVISION_LSB 0INT32_MIN (-INT32_MAX - 1)SCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8)__FLT32_MAX_10_EXP__ 38SCB_AIRCR_ENDIANESS (1 << 15)__USFRACT_MAX__ 0XFFP-8UHRSCB_ICSR_PENDSTSET (1 << 26)__UINTPTR_MAX__ 0xffffffffU__FLT32_MIN_EXP__ (-125)UINT32_MAX __UINT32_MAX__SCB_SHCSR_BUSFAULTACT (1 << 1)__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64INT_LEAST64_MAX __INT_LEAST64_MAX____SFRACT_EPSILON__ 0x1P-7HRSCB_CCR_NONBASETHRDENA (1 << 0)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31DWT_BASE (PPBI_BASE + 0x1000)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)ITM_BASE (PPBI_BASE + 0x0000)__PTRDIFF_WIDTH__ 32__UINT_FAST8_MAX__ 0xffffffffUSCB_ID_DFR0 MMIO32(SCB_BASE + 0x48)NVIC_RESERVED5_IRQ 40UINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1NVIC_CEC_CAN_IRQ 30INT_FAST8_MAXSCB_SHPR_PRI_9_RESERVED 5__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_TYPE__ int__INTPTR_MAX__ 0x7fffffffINT64_C(c) __INT64_C(c)__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0UR__LDBL_HAS_QUIET_NAN__ 1NVIC_RESERVED11_IRQ 47WCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____UINT_LEAST8_TYPE__ unsigned charNVIC_SPI2_IRQ 26NVIC_TIM17_IRQ 22__ACCUM_FBIT__ 15SCB_SCR_SLEEPONEXIT (1 << 1)__UACCUM_IBIT__ 16long intUINT8_MAXSCB_MMFAR MMIO32(SCB_BASE + 0x34)SIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_ARCH_7M__ 1NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32SCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50)__UINTMAX_C(c) c ## ULLNVIC_USART2_IRQ 28__INT_LEAST8_TYPE__ signed charNVIC_MEM_MANAGE_IRQ -12__GCC_ATOMIC_BOOL_LOCK_FREE 2BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)__ELF__ 1UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICNVIC_RESERVED2_IRQ 31LIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4SCB_SCR_SLEEPDEEP (1 << 2)NVIC_I2C2_EV_IRQ 24__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)SCB_HFSR_VECTTBL (1 << 1)NVIC_RESERVED1_IRQ 29BIT27 (1<<27)NVIC_TIM3_IRQ 16__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)NVIC_I2C3_EV_IRQ 35__FLT_DECIMAL_DIG__ 9__thumb__ 1__INT_LEAST32_MAX__ 0x7fffffffLsigned charuint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2SCB_CCR_BFHFNMIGN (1 << 8)PTRDIFF_MINSCB_CPUID_VARIANT_LSB 20__UINT_LEAST16_MAX__ 0xffffSCB_CPACR_CP10 (1 << 20)UINTPTR_MAX __UINTPTR_MAX____STDC_VERSION__ 201710L__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))NVIC_TIM15_IRQ 20SCB_CFSR_MUNSTKERR (1 << 3)NVIC_ADC_COMP_IRQ 12__UINT_FAST32_TYPE__ unsigned intunsigned char__STDC_UTF_32__ 1__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15Rnvic_set_priorityINT_LEAST32_MAX __INT_LEAST32_MAX____INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5SCB_CPACR MMIO32(SCB_BASE + 0x88)NVIC_USAGE_FAULT_IRQ -10NVIC_IPR(ipr_id) MMIO8(NVIC_BASE + 0x300 + (ipr_id))__UINT16_MAX__ 0xffff__TQ_FBIT__ 127NVIC_DMA_CHANNEL1_IRQ 9__USQ_FBIT__ 32INT_FAST16_MIN__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32NVIC_EXTI4_15_IRQ 7SCB_AIRCR_VECTKEY (0x05FA << SCB_AIRCR_VECTKEYSTAT_LSB)SCB_SHCSR MMIO32(SCB_BASE + 0x24)INT_FAST32_MIN (-INT_FAST32_MAX - 1)NVIC_SYSTICK_IRQ -1UINT_LEAST8_MAXINT_LEAST8_MAXSCB_VTOR_TBLOFF (0x7FFFFF << SCB_VTOR_TBLOFF_LSB)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__SCB_SHCSR_PENDSVACT (1 << 10)__USA_IBIT__ 16__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1PTRDIFF_MIN (-PTRDIFF_MAX - 1)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intSCB_CPACR_PRIV 1__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2NVIC_I2C1_ER_IRQ 32INT_FAST64_MINSCB_CFSR_IACCVIOL (1 << 0)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHRSCB_SHCSR_BUSFAULTENA (1 << 17)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024SCB_SHCSR_USGFAULTENA (1 << 18)SCB_ICSR_RETOBASE (1 << 11)__DBL_HAS_DENORM__ 1SCB_ICSR_PENDSVSET (1 << 28)__DA_FBIT__ 31__GXX_ABI_VERSION 1017NVIC_DMA_CHANNEL4_5_IRQ 11__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__ULLACCUM_EPSILON__ 0x1P-32ULLKSCB_SHCSR_MEMFAULTACT (1 << 0)INT_LEAST8_MAX __INT_LEAST8_MAX__UINTMAX_MAX __UINTMAX_MAX__SCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UK__FLT_EPSILON__ 1.1920928955078125e-7FNVIC_DMA_CHANNEL6_7_IRQ 48SCB_SHCSR_MEMFAULTENA (1 << 16)SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)__DBL_MAX_10_EXP__ 308__ARM_ARCH_ISA_THUMBSCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C)LIBOPENCM3_CM3_MEMORYMAP_H __GCC_ATOMIC_SHORT_LOCK_FREE 2SCB_FPCAR MMIO32(SCB_BASE + 0x238)NVIC_TIM1_BRK_UP_TRG_COM_IRQ 13__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)__FLT32_MIN__ 1.1754943508222875e-38F32__FLT32_HAS_QUIET_NAN__ 1__ARM_FEATURE_MATMUL_INT8__LDBL_HAS_INFINITY__ 1SCB_CCR MMIO32(SCB_BASE + 0x14)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))SCB_SHPR_PRI_13_RESERVED 9__FLT32X_MAX_10_EXP__ 308__INT_LEAST8_MAX__ 0x7f__ARM_ARCH_EXT_IDIV__ 1__ARM_PCS 1NVIC_I2C2_ER_IRQ 34bool _BoolLIBOPENCM3_GD32F1X0_NVIC_H __SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)SCB_FPCCR MMIO32(SCB_BASE + 0x234)INT16_MAX __INT16_MAX____FLT32X_IS_IEC_60559__ 2SCB_AFSR MMIO32(SCB_BASE + 0x3C)WINT_MINLIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16NVIC_RCC_IRQ 4__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLNVIC_TIM6_DAC_IRQ 17INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRSCB_SCR_SEVONPEND (1 << 4)__USFRACT_FBIT__ 8CORESIGHT_LSR_SLI (1<<0)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__NVIC_IRQ_COUNT 52__UINT32_MAX__ 0xffffffffULNVIC_RESERVED13_IRQ 50SCB_CCR_USERSETMPEND (1 << 1)NVIC_TIM1_CC_IRQ 14__GCC_ATOMIC_POINTER_LOCK_FREE 2__ARM_FEATURE_QBIT 1__ARM_FEATURE_CLZ 1NVIC_RESERVED7_IRQ 43__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXSCB_ICSR_VECTPENDING_LSB 12NVIC_HARD_FAULT_IRQ -13__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffULNVIC_BUS_FAULT_IRQ -11__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__GCC_DESTRUCTIVE_SIZE 64BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intNVIC_I2C1_EV_IRQ 23__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXSCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RNVIC_EXTI2_3_IRQ 6__INT32_MAX__ 0x7fffffffLSCB_CFSR_NOCP (1 << 19)SCB_ICSR_NMIPENDSET (1 << 31)UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICSCB_ID_PFR1 MMIO32(SCB_BASE + 0x44)PPBI_BASE (0xE0000000U)SCB_CPACR_CP11 (1 << 22)__FLT32_MANT_DIG__ 24LIBOPENCM3_NVIC_H __FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__INT8_MAX __INT8_MAX__BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 2__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3NVIC_RESERVED4_IRQ 39UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)__OPTIMIZE_SIZE__ 1__OPTIMIZE__ 1SCB_CPUID MMIO32(SCB_BASE + 0x00)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40)SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_SAT 1__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))__GNUC__ 12SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C)WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 2__ULACCUM_MIN__ 0.0ULKSCB_VTOR_TBLOFF_LSB 9__LDBL_MAX__ 1.7976931348623157e+308L__ARM_ARCH 7__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55NVIC_RESERVED0_IRQ 18__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXNVIC_RESERVED10_IRQ 46SCB_CFSR_UNDEFINSTR (1 << 16)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)SCB_CPUID_IMPLEMENTER_LSB 24NVIC_SPI1_IRQ 25__ARM_FPSCB_ICSR_PENDSTCLR (1 << 25)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long intSCB_ICSR_VECTACTIVE_LSB 0__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4NVIC_USART1_IRQ 27__UFRACT_MAX__ 0XFFFFP-16URINT64_MAXFPB_BASE (PPBI_BASE + 0x2000)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0STIR_BASE (SCS_BASE + 0x0F00)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__nvic_get_active_irqID_BASE (SCS_BASE + 0x0FD0)SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308../../cm3/nvic.c__INT_FAST32_TYPE__ intNVIC_TIM14_IRQ 19unsigned intSCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68)NVIC_TIM2_IRQ 15__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8GNU C17 12.2.1 20221205 -mcpu=cortex-m3 -mthumb -mfloat-abi=soft -march=armv7-m -ggdb3 -Os -fno-common -ffunction-sections -fdata-sections__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKSCB_ICSR MMIO32(SCB_BASE + 0x04)__FLT_EVAL_METHOD__ 0SCB_ICSR_ISRPENDING (1 << 22)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__STDC_UTF_16__ 1__ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1__ARM_FEATURE_IDIV 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8)__UINT8_TYPE__ unsigned charSCB_SHCSR_SYSTICKACT (1 << 11)__ARM_FEATURE_COPROC 15UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINnvic_generate_software_interrupttrue 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 2__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__SCB_CFSR_BFARVALID (1 << 15)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1__FLT32_MIN_10_EXP__ (-37)SCB_SHCSR_USGFAULTPENDED (1 << 12)MMIO64(addr) (*(volatile uint64_t *)(addr))__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)SCB_AIRCR_SYSRESETREQ (1 << 2)__TA_IBIT__ 64__SACCUM_IBIT__ 8nvic_get_irq_enabledSCB_AIRCR_PRIGROUP_SHIFT 8__ARM_FEATURE_QRDMXSCB_SHCSR_USGFAULTACT (1 << 3)__ARM_ARCH_ISA_THUMB 2NVIC_TSC_IRQ 8__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0__ARM_32BIT_STATE 1_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__NVIC_I2C3_ER_IRQ 36INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54)INT8_MIN (-INT8_MAX - 1)SCB_AIRCR_PRIGROUP_MASK (0x7 << 8)__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)NVIC_RESERVED9_IRQ 45BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_CPUID_CONSTANT_LSB 16long long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)SCB_SHCSR_MONITORACT (1 << 8)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAXuint16_tSCB_CFSR_INVPC (1 << 18)__UHQ_IBIT__ 0INT_LEAST8_MINSCB_FPDSCR MMIO32(SCB_BASE + 0x23C)BIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRSCB_SHCSR_BUSFAULTPENDED (1 << 14)__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15SCB_BFAR MMIO32(SCB_BASE + 0x38)__UTQ_FBIT__ 128LIBOPENCM3_SCB_H __FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX__SCB_CFSR_PRECISERR (1 << 9)SCB_CCR_UNALIGN_TRP (1 << 3)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRSCB_CFSR_IBUSERR (1 << 8)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))WCHAR_MINBEGIN_DECLS nvic_get_pending_irq__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MINNVIC_RESERVED6_IRQ 41__FLT_IS_IEC_60559__ 2__THUMBEL__ 1SCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0SCB_SHPR_PRI_14_PENDSV 10SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 2NVIC_RESERVED12_IRQ 49SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8)INTMAX_MAX__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1SCB_SHPR_PRI_5_BUSFAULT 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C/build/libopencm3/lib/gd32/f1x0INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HKNVIC_WWDG_IRQ 0UINT8_C__UINTPTR_TYPE__ unsigned intNVIC_NMI_IRQ -14UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRNVIC_USB_LP_IRQ 37__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLSCB_SHPR_PRI_6_USAGEFAULT 2__ARM_ARCH_PROFILE 77TPIU_BASE (PPBI_BASE + 0x40000)__LDBL_MIN__ 2.2250738585072014e-308LSCB_CFSR MMIO32(SCB_BASE + 0x28)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16SCB_CFSR_MSTKERR (1 << 4)CORESIGHT_LAR_OFFSET 0xfb0SCB_CFSR_IMPRECISERR (1 << 10)NVIC_RESERVED3_IRQ 33SCB_SHPR_PRI_15_SYSTICK 11short intSCB_CFSR_UNSTKERR (1 << 11)__UINT16_C(c) c__UDA_IBIT__ 32priorityUINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROC__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53BIT5 (1<<5)NVIC_RTC_IRQ 2BIT1 (1<<1)INT8_CINT_LEAST32_MAXirqn__USES_INITFINI__ 1__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fffSCB_SHCSR_MEMFAULTPENDED (1 << 13)__INT_WIDTH__ 32SCB_SHPR_PRI_11_SVCALL 7NVIC_USB_WAKEUP_IRQ 42__QQ_FBIT__ 7SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70)__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64NVIC_TIM16_IRQ 21__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32SCB_VTOR MMIO32(SCB_BASE + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__ARM_FEATURE_UNALIGNED 1__GXX_TYPEINFO_EQUALITY_INLINE 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0x1P-7HK__GCC_ASM_FLAG_OUTPUTS__ 1__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8NVIC_USB_HP_IRQ 38__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15NVIC_EXTI0_1_IRQ 5__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8GD32F1X0 1__INT_LEAST16_TYPE__ short intINTMAX_MIN__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1SCB_CFSR_UNALIGNED (1 << 24)UINTMAX_CSCB_SHPR_PRI_7_RESERVED 3INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)nvic_disable_irq__SIZE_MAX__ 0xffffffffU__ARM_ARCH__LONG_MAX__ 0x7fffffffLSCB_CPACR_NONE 0SCB_CFSR_MMARVALID (1 << 7)SCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58)SCB_AIRCR_VECTKEYSTAT_LSB 16__ARM_FEATURE_LDREX 7PTRDIFF_MAXSCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__LLFRACT_EPSILON__ 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