! / 0 0 0 0 1742 ` ZfffZZZZZZjjjjjjjjjFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFbbbbbbbbbbbbvvvvvvvyvvgpio_setgpio_cleargpio_togglescu_pinmuxi2c0_initi2c0_tx_starti2c0_tx_bytei2c0_rx_bytei2c0_stopssp_disablessp_initssp_transferuart_initdummy_readuart_rx_data_readyuart_readuart_read_timeoutuart_writetimer_resettimer_enable_countertimer_disable_countertimer_set_countertimer_get_countertimer_get_prescalertimer_set_prescalertimer_set_modetimer_set_count_inputblocking_handlerhard_fault_handlerc_can0_isri2s0_or_i2s1_isrusart3_isrusart2_or_c_can1_isruart1_isrusart0_isreventrouter_isrssp0_or_ssp1_isradc1_isrspi_or_dac_isrsgpio_isri2c0_or_irc1_isradc0_isrmcpwm_isrtimer3_isrpin_int4_isrgint1_isrtimer0_isrritimer_or_wwdt_isrsct_isrusb1_isrusb0_isrlcd_isrsdio_isrethernet_isrflasheepromat_isrdma_isrm4core_isrrtc_isrnull_handlersys_tick_handlerpend_sv_handlersv_call_handlernmi_handlerreset_handlervector_tablesystick_set_reloadsystick_get_reloadsystick_set_frequencysystick_get_valuesystick_set_clocksourcesystick_interrupt_enablesystick_interrupt_disablesystick_counter_enablesystick_counter_disablesystick_get_countflagsystick_clearsystick_get_calibscb_reset_systemnvic_enable_irqnvic_disable_irqnvic_get_pending_irqnvic_set_pending_irqnvic_clear_pending_irqnvic_get_irq_enablednvic_set_prioritycm3_assert_failedcm3_assert_failed_verbose__dmbdwt_enable_cycle_counterdwt_read_cycle_countergpio.o/ 0 0 0 644 63368 ` ELF(4(10 !"#$%&#F`D`pG#F`D`pG#F`D`pG- DA? !FAO%4`BlintX"~/ ~/T /.TQM * ~*T'#*-TQ^% ~%T>:%+TQ$ > :!; 9 IB:!; 9 I.?:!; 9!'@z% Uy: ; 9 I$ > .?: ; 9 '@zMP pzP p{P p|,    #$9B(?@)]: L#mb&?IʕCIpg(%xi*}bSNclyaU]Y ^{hm + IyFxoA^t (sS]C,@\j<boxGsnRX^ 'Eg%+Q|m|0[mz~ejM>ƍ! D<&MMPes}R 79aBcEK.'>T>)?fe0ܔ;ЅKsF~ B9B  t2)kG6[pL&q"{LPQ-\ZR<%OUIZXl &S!_M:lt,31"B_v|ogHU;WAY#^/Ѐ'{56_.WFC1b'".Jg7Y-m Gkh%b\ R|˖dU.G fj7-Q R$ uJTRY Yk.pnx@j8+vOaQ%F#:WUB+H-o.<"pk"&EWlf!TMOSfA\B`̗ro}R{~ K7U<n\66|~5Y; {O~jIBM,3IZ~6oVmtNrwHE="()1Ww[Smr([#NJn(x+WiIpu,jQu C507c}`__+ |=>j")a `pHg' 5gyVNQ6vNghiB*qS\xQ=GjCdB??WfCsO{[!,yړ`w@R#aNmXi!M[v,4'e?D=QxCb\zR<o.)V!}8v, '?N~4.F sv7L!ot"%)q;fd "e2Hf _ggj knOo?:pvq<t%Ru7xiyMzH{ ~; T,|&^GI2Yna\*{h\֍_[fLD N&&[9+nSԒ'gk,>y>AFI aߗǏ(EuDc)E ra+ -2UTVO%c7VxJ#yQ"5F9wq)#+ffLrtGӔ&+$fcЂ{/"oZe|.*|&_jxdMp_͉!8&Y_'+52kC8D&LE$FdbI9LQRԁS3T5OUVWPXYĂZQ[\Mf]^_B`habc EdkeXCfZigWh iEjkkؐlmbHnnoeFpldgP5J !/;&-<()U* +E7, -2C.056h7}8 9G:[;y?5%@/8AIB>H I?J.~KsLMVN=OL%PiQhWgXY;Z [abc.wdzeJf3gsh!nkok2pbq-rݕw!{Z LO.^/U0N1/2_}3c4m$5$P89Y:|;3<-=>և?r@ \A#FB,CjDh0EۆF&/GhHjI:J KLr]M|NOP.Qs/R2S`,TWhUiV$W#'^ޑa8d:g#j,m3Aps =vz5y~o $izu),%H@=~'C;x0`pW#k4~-&Q0)gPu  7-2&$]G?2b7ax"ƘL>Li [TW5XA3]M<+i1x =u!#KDi<r&/gd Tw( NiUA496KNc{]`U tdpT5U=.i(2<,ys(: Ez9(jY xIgBW:Cd\0 >oNtZl>KtV:/'tPZPRLms3~f /wEc8.EY/Or@+@bZS}VvndsZCqwTM w@pRscleK4>I$Sq]TcrD1)f_#jyσjXFKiF >ecwiY~/|t{e8 _Fz[ XV~6t &nv7N]o~xq!Oى?S@' 4TJ+xtAW5NK^a6 ?\E*M3X[jdyir4?^|`?yu )Hy+6_Em'r}moWE%/NxV,SPqujQ N;m2u<} pt]~RA F*tXCjK)Vbzj|0d9H7'DPӎG"boG8@)/#/X#I3ewfOj-/Z'_`TF6hAF)6zvV}^Z@s86D0=\KI$* Cd4Ra(Y+ah)w"vSF0R* p"!  )3@H ;FQ X  n&d3PhnSO{:?{< @*  be1Y^g_`OOD|cG<b*35Z-:qaƊ0e!78Ʉ6j2N6iK.5#:D}o+i*S,Zb?Oq 9TEry*]dl"{eS$߈*cU5+Yg*9q,vLnEYWUuTkq3(#2%\M=,xO((`n| g=8E 7ߋlR2${KkHH! lL>]"} 1JLl:" 5 ../usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/lpc43xx../../../include/libopencm3/cm3gpio.cstdint.hgpio.hcommon.hstdbool.hmemorymap.h%!<!*!<!/!<!GPIO_B4 (GPIO_PORT_BASE + 0x0004)GPIO_W247 (GPIO_PORT_BASE + 0x13DC)__DECIMAL_DIG__ 17GPIO_B121 (GPIO_PORT_BASE + 0x0079)__UHA_FBIT__ 8GPIO_B219 (GPIO_PORT_BASE + 0x00DB)GPIO_W67 (GPIO_PORT_BASE + 0x110C)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64GPIO_B171 (GPIO_PORT_BASE + 0x00AB)__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1GPIO_W83 (GPIO_PORT_BASE + 0x114C)GPIO4_SET GPIO_SET(GPIO4)__CHAR_UNSIGNED__ 1ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000)GPIO_W10 (GPIO_PORT_BASE + 0x1028)GPIO_B147 (GPIO_PORT_BASE + 0x0093)GPIO_B38 (GPIO_PORT_BASE + 0x0026)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sectionsGPIO_B202 (GPIO_PORT_BASE + 0x00CA)GPIO_W227 (GPIO_PORT_BASE + 0x138C)__FLT64_HAS_INFINITY__ 1GPIO_W93 (GPIO_PORT_BASE + 0x1174)GPIO_W149 (GPIO_PORT_BASE + 0x1254)GPIO_W221 (GPIO_PORT_BASE + 0x1374)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LKGPIO_W251 (GPIO_PORT_BASE + 0x13EC)__PTRDIFF_MAX__ 0x7fffffff__SACCUM_FBIT__ 7GPIO2 (GPIO_PORT_BASE + 0x2008)GPIO6_PIN GPIO_PIN(GPIO6)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17GPIOPIN5 (1 << 5)I2C0_BASE (PERIPH_BASE_APB1 + 0x01000)GPIOPIN18 (1 << 18)GPIO_B80 (GPIO_PORT_BASE + 0x0050)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUGPIO_B222 (GPIO_PORT_BASE + 0x00DE)__ARM_FEATURE_QBITGPIO_B61 (GPIO_PORT_BASE + 0x003D)GPIO0_CLR GPIO_CLR(GPIO0)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8GPIO_B41 (GPIO_PORT_BASE + 0x0029)__DBL_MAX_10_EXP__ 308GPIO_B135 (GPIO_PORT_BASE + 0x0087)__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLKGPIOPIN19 (1 << 19)__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intgpiosC_CCAN1_BASE (PERIPH_BASE_APB1 + 0x04000)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed charGPIO_B3 (GPIO_PORT_BASE + 0x0003)GPIO_W193 (GPIO_PORT_BASE + 0x1304)__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9GPIO_B120 (GPIO_PORT_BASE + 0x0078)__LDBL_MIN_EXP__ (-1021)GPIO_B218 (GPIO_PORT_BASE + 0x00DA)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)GPIO_W28 (GPIO_PORT_BASE + 0x1070)GPIO_B252 (GPIO_PORT_BASE + 0x00FC)__UINT8_C(c) cGPIO_W52 (GPIO_PORT_BASE + 0x10D0)__INT16_TYPE__ short intGPIO_B130 (GPIO_PORT_BASE + 0x0082)I2S1_BASE (PERIPH_BASE_APB1 + 0x03000)GPIO_B37 (GPIO_PORT_BASE + 0x0025)USB0_BASE (PERIPH_BASE_AHB + 0x06000)GPIO_W157 (GPIO_PORT_BASE + 0x1274)UINT_FAST32_MAXGPIO_B98 (GPIO_PORT_BASE + 0x0062)GPIO_B71 (GPIO_PORT_BASE + 0x0047)GPIO_W153 (GPIO_PORT_BASE + 0x1264)GPIO_W169 (GPIO_PORT_BASE + 0x12A4)GPIO_W183 (GPIO_PORT_BASE + 0x12DC)GPIO_W133 (GPIO_PORT_BASE + 0x1214)INT_FAST64_MAX __INT_FAST64_MAX__gpio_clearGPIO_W168 (GPIO_PORT_BASE + 0x12A0)GPIO7_PIN GPIO_PIN(GPIO7)GPIO_W240 (GPIO_PORT_BASE + 0x13C0)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64GPIO6_CLR GPIO_CLR(GPIO6)GPIO_W32 (GPIO_PORT_BASE + 0x1080)GPIO_B116 (GPIO_PORT_BASE + 0x0074)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intPERIPH_BASE_APB2 (0x400C0000U)GPIO_B150 (GPIO_PORT_BASE + 0x0096)GPIO3_MPIN GPIO_MPIN(GPIO3)GPIO_B57 (GPIO_PORT_BASE + 0x0039)INT32_MIN (-INT32_MAX - 1)GPIO_B221 (GPIO_PORT_BASE + 0x00DD)__FLT32_MAX_10_EXP__ 38GPIO_B235 (GPIO_PORT_BASE + 0x00EB)GPIO_W69 (GPIO_PORT_BASE + 0x1114)WWDT_BASE (PERIPH_BASE_APB0 + 0x00000)GPIO_W188 (GPIO_PORT_BASE + 0x12F0)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZGPIO_W15 (GPIO_PORT_BASE + 0x103C)TIMER1_BASE (PERIPH_BASE_APB0 + 0x05000)GPIO_B67 (GPIO_PORT_BASE + 0x0043)GPIO_B40 (GPIO_PORT_BASE + 0x0028)GPIOPIN0 (1 << 0)__FLT32_MIN_EXP__ (-125)ATIMER_BASE (0x40040000U)UINT32_MAX __UINT32_MAX__GPIO1_SET GPIO_SET(GPIO1)GPIO_B136 (GPIO_PORT_BASE + 0x0088)C_CAN0_BASE (PERIPH_BASE_APB3 + 0x02000)__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32GPIO_W148 (GPIO_PORT_BASE + 0x1250)__FLT64_MIN_10_EXP__ (-307)GPIO_B2 (GPIO_PORT_BASE + 0x0002)BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__GPIO_B175 (GPIO_PORT_BASE + 0x00AF)GPIO_B132 (GPIO_PORT_BASE + 0x0084)TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)__SFRACT_EPSILON__ 0x1P-7HRGPIO_B87 (GPIO_PORT_BASE + 0x0057)GPIO_B251 (GPIO_PORT_BASE + 0x00FB)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXGPIO_W122 (GPIO_PORT_BASE + 0x11E8)__SQ_FBIT__ 31GPIO_W19 (GPIO_PORT_BASE + 0x104C)GPIO_B36 (GPIO_PORT_BASE + 0x0024)GPIO_B114 (GPIO_PORT_BASE + 0x0072)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)GPIO_B97 (GPIO_PORT_BASE + 0x0061)GPIO_B70 (GPIO_PORT_BASE + 0x0046)GPIO_B92 (GPIO_PORT_BASE + 0x005C)__UHQ_FBIT__ 16GPIO_W154 (GPIO_PORT_BASE + 0x1268)__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXGPIO_PIN_INTERRUPT_SIENR MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x008)__UINT_FAST8_MAX__ 0xffffffffUGPIO_B237 (GPIO_PORT_BASE + 0x00ED)UINT16_C(c) __UINT16_C(c)GPIO_B249 (GPIO_PORT_BASE + 0x00F9)__LACCUM_IBIT__ 32GPIO4_NOT GPIO_NOT(GPIO4)GPIO_W33 (GPIO_PORT_BASE + 0x1084)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"GPIO_B220 (GPIO_PORT_BASE + 0x00DC)__VFP_FP__ 1GPIO5_MPIN GPIO_MPIN(GPIO5)__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffff__UINT_FAST16_MAX__ 0xffffffffUSSP1_BASE (PERIPH_BASE_APB2 + 0x05000)INT64_C(c) __INT64_C(c)GPIO_B161 (GPIO_PORT_BASE + 0x00A1)GPIO4_MASK GPIO_MASK(GPIO4)GPIO_PIN_INTERRUPT_IST MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x024)__GCC_IEC_559_COMPLEX 0CREG_BASE (0x40043000U)__UFRACT_MIN__ 0.0URGPIO_B91 (GPIO_PORT_BASE + 0x005B)__LDBL_HAS_QUIET_NAN__ 1WCHAR_MAX __WCHAR_MAX__GPIO_W115 (GPIO_PORT_BASE + 0x11CC)GPIO_B7 (GPIO_PORT_BASE + 0x0007)UINT_FAST16_MAX __UINT_FAST16_MAX__GPIO_B206 (GPIO_PORT_BASE + 0x00CE)GPIO_B217 (GPIO_PORT_BASE + 0x00D9)__UINT_LEAST8_TYPE__ unsigned charGPIO_W195 (GPIO_PORT_BASE + 0x130C)GPIO_W158 (GPIO_PORT_BASE + 0x1278)GPIO_B13 (GPIO_PORT_BASE + 0x000D)GPIO_B145 (GPIO_PORT_BASE + 0x0091)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX__GPIO_W131 (GPIO_PORT_BASE + 0x120C)GPIO_B86 (GPIO_PORT_BASE + 0x0056)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xGPIO_B163 (GPIO_PORT_BASE + 0x00A3)GPIO_W100 (GPIO_PORT_BASE + 0x1190)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32GPIO_W167 (GPIO_PORT_BASE + 0x129C)__UINTMAX_C(c) c ## ULLGPIO_B225 (GPIO_PORT_BASE + 0x00E1)__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed charGPIO_B104 (GPIO_PORT_BASE + 0x0068)__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__GPIO_W179 (GPIO_PORT_BASE + 0x12CC)__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRGPIO5 (GPIO_PORT_BASE + 0x2014)GPIO_B43 (GPIO_PORT_BASE + 0x002B)short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)GPIOPIN4 (1 << 4)GPIO_W12 (GPIO_PORT_BASE + 0x1030)GPIO_W203 (GPIO_PORT_BASE + 0x132C)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)GPIO2_CLR GPIO_CLR(GPIO2)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffUGPIO1_NOT GPIO_NOT(GPIO1)__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__LCD_BASE (PERIPH_BASE_AHB + 0x08000)GPIO_B105 (GPIO_PORT_BASE + 0x0069)GPIO_B122 (GPIO_PORT_BASE + 0x007A)GPIO_B78 (GPIO_PORT_BASE + 0x004E)GPIO_SET(port) MMIO32((port) + 0x200)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32GPIO_W219 (GPIO_PORT_BASE + 0x136C)__FLT32X_MIN_EXP__ (-1021)GPDMA_BASE (PERIPH_BASE_AHB + 0x02000)GPIO_B205 (GPIO_PORT_BASE + 0x00CD)GPIO_W104 (GPIO_PORT_BASE + 0x11A0)GPIO_W250 (GPIO_PORT_BASE + 0x13E8)GPIO_B82 (GPIO_PORT_BASE + 0x0052)GPIO_B12 (GPIO_PORT_BASE + 0x000C)BIT27 (1<<27)GPIO_W220 (GPIO_PORT_BASE + 0x1370)GPIO_B83 (GPIO_PORT_BASE + 0x0053)GPIO_W159 (GPIO_PORT_BASE + 0x127C)GPIO_W11 (GPIO_PORT_BASE + 0x102C)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"GPIO_B85 (GPIO_PORT_BASE + 0x0055)__UTA_FBIT__ 64SDIO_BASE (PERIPH_BASE_AHB + 0x04000)GPIO_W189 (GPIO_PORT_BASE + 0x12F4)GPIO_GROUP0_INTERRUPT_PORT_ENA(x) MMIO32(GPIO_GROUP0_INTERRUPT_BASE + 0x040 + ((x)*4))__FLT_DECIMAL_DIG__ 9__thumb__ 1GPIO_B73 (GPIO_PORT_BASE + 0x0049)GPIO6_SET GPIO_SET(GPIO6)signed charGIMA_BASE (PERIPH_BASE_APB2 + 0x07000)GPIO_B245 (GPIO_PORT_BASE + 0x00F5)INT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)GPIO_W87 (GPIO_PORT_BASE + 0x115C)__GNUC_STDC_INLINE__ 1GPIO_B51 (GPIO_PORT_BASE + 0x0033)GPIO6_NOT GPIO_NOT(GPIO6)__FRACT_FBIT__ 15GPIO_W156 (GPIO_PORT_BASE + 0x1270)__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1PTRDIFF_MINGPIO_W225 (GPIO_PORT_BASE + 0x1384)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)GPIO_PIN_INTERRUPT_CIENR MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x00C)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77GPIO_W252 (GPIO_PORT_BASE + 0x13F0)GPIO_B42 (GPIO_PORT_BASE + 0x002A)GPIO_B188 (GPIO_PORT_BASE + 0x00BC)GPIO6 (GPIO_PORT_BASE + 0x2018)GPIO_W130 (GPIO_PORT_BASE + 0x1208)__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINGPIOPIN30 (1 << 30)GPIO_B6 (GPIO_PORT_BASE + 0x0006)CGU_BASE (0x40050000U)GPIO_PIN_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x07000)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15R__SHRT_WIDTH__ 16INT_LEAST32_MAX __INT_LEAST32_MAX__GPIO_B77 (GPIO_PORT_BASE + 0x004D)GPIO_B28 (GPIO_PORT_BASE + 0x001C)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5GPIO_W172 (GPIO_PORT_BASE + 0x12B0)__ARM_ARCH_EXT_IDIV__GPIOPIN31 (1 << 31)GPIO_W84 (GPIO_PORT_BASE + 0x1150)GPIO_W105 (GPIO_PORT_BASE + 0x11A4)GPIO_B11 (GPIO_PORT_BASE + 0x000B)GPIO_W39 (GPIO_PORT_BASE + 0x109C)__UINT16_MAX__ 0xffff__LDBL_MIN__ 2.2250738585072014e-308L__TQ_FBIT__ 127GPIO_B84 (GPIO_PORT_BASE + 0x0054)GPIO7_MASK GPIO_MASK(GPIO7)GPIO4_PIN GPIO_PIN(GPIO4)GPIO_B107 (GPIO_PORT_BASE + 0x006B)__USQ_FBIT__ 32INT_FAST16_MINGPIO_B119 (GPIO_PORT_BASE + 0x0077)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32GPIO_W139 (GPIO_PORT_BASE + 0x122C)GPIO_W113 (GPIO_PORT_BASE + 0x11C4)GPIO_W91 (GPIO_PORT_BASE + 0x116C)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__STRICT_ANSI__ 1GPIO_W76 (GPIO_PORT_BASE + 0x1130)GPIO_W160 (GPIO_PORT_BASE + 0x1280)GPIO_B31 (GPIO_PORT_BASE + 0x001F)UINT_LEAST8_MAXGPIO2_DIR GPIO_DIR(GPIO2)UINT8_C(c) __UINT8_C(c)GPIO_W71 (GPIO_PORT_BASE + 0x111C)__SIZEOF_LONG_DOUBLE__ 8GPIO_W152 (GPIO_PORT_BASE + 0x1260)GPIO_W234 (GPIO_PORT_BASE + 0x13A8)GPIO_W187 (GPIO_PORT_BASE + 0x12EC)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__GPIO_B68 (GPIO_PORT_BASE + 0x0044)__USA_IBIT__ 16GPIO_W231 (GPIO_PORT_BASE + 0x139C)PTRDIFF_MIN (-PTRDIFF_MAX - 1)__SFRACT_MAX__ 0X7FP-7HRGPIO_W36 (GPIO_PORT_BASE + 0x1090)__UINT_FAST64_TYPE__ long long unsigned intGPIO_B5 (GPIO_PORT_BASE + 0x0005)GPIO_B110 (GPIO_PORT_BASE + 0x006E)GPIOPIN27 (1 << 27)__FLT_MIN__ 1.1754943508222875e-38FGPIO4_DIR GPIO_DIR(GPIO4)__HA_FBIT__ 7__FDPIC__GPIOPIN10 (1 << 10)GPIO_PIN_INTERRUPT_IENF MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x010)__FLT32_IS_IEC_60559__ 2GPIO_B39 (GPIO_PORT_BASE + 0x0027)GPIO_W207 (GPIO_PORT_BASE + 0x133C)GPIO_B27 (GPIO_PORT_BASE + 0x001B)GPIO_W103 (GPIO_PORT_BASE + 0x119C)INT_FAST64_MINADC0_BASE (PERIPH_BASE_APB3 + 0x03000)__USFRACT_IBIT__ 0GPIOPIN24 (1 << 24)__LDBL_EPSILON__ 2.2204460492503131e-16LGPIO_W224 (GPIO_PORT_BASE + 0x1380)__USFRACT_MIN__ 0.0UHRGPIO_B157 (GPIO_PORT_BASE + 0x009D)__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024GPIO_B106 (GPIO_PORT_BASE + 0x006A)GPIO_B212 (GPIO_PORT_BASE + 0x00D4)GPIOPIN14 (1 << 14)GPIO_B139 (GPIO_PORT_BASE + 0x008B)__DBL_HAS_DENORM__ 1GPIOPIN25 (1 << 25)GPIO_B152 (GPIO_PORT_BASE + 0x0098)GPIO_W45 (GPIO_PORT_BASE + 0x10B4)GPIO3 (GPIO_PORT_BASE + 0x200C)GPIO_B159 (GPIO_PORT_BASE + 0x009F)GPIO_B17 (GPIO_PORT_BASE + 0x0011)__DA_FBIT__ 31GPIO_W126 (GPIO_PORT_BASE + 0x11F8)GPIOPIN12 (1 << 12)GPIO_W80 (GPIO_PORT_BASE + 0x1140)__GXX_ABI_VERSION 1017GPIO_W212 (GPIO_PORT_BASE + 0x1350)__INT_LEAST16_MAX__ 0x7fffGPIO_B30 (GPIO_PORT_BASE + 0x001E)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LGPIO_B69 (GPIO_PORT_BASE + 0x0045)GPIO_B193 (GPIO_PORT_BASE + 0x00C1)__ULLACCUM_EPSILON__ 0x1P-32ULLKGPIO_W191 (GPIO_PORT_BASE + 0x12FC)GPIO7_CLR GPIO_CLR(GPIO7)GPIOPIN26 (1 << 26)GPIO_PIN(port) MMIO32((port) + 0x100)INT_LEAST8_MAX __INT_LEAST8_MAX__DAC_BASE (PERIPH_BASE_APB3 + 0x01000)GPIO_B46 (GPIO_PORT_BASE + 0x002E)GPIO_B108 (GPIO_PORT_BASE + 0x006C)__UINT32_C(c) c ## ULGPIO0_SET GPIO_SET(GPIO0)GPIO_W161 (GPIO_PORT_BASE + 0x1284)__UACCUM_MIN__ 0.0UKGPIO_B63 (GPIO_PORT_BASE + 0x003F)GPIO_W173 (GPIO_PORT_BASE + 0x12B4)__FLT_EPSILON__ 1.1920928955078125e-7FGPIOPIN3 (1 << 3)GPIO_W97 (GPIO_PORT_BASE + 0x1184)GPIO_B148 (GPIO_PORT_BASE + 0x0094)GPIO_B186 (GPIO_PORT_BASE + 0x00BA)__ARM_ARCH_ISA_THUMBGPIO_B89 (GPIO_PORT_BASE + 0x0059)GPIO_W135 (GPIO_PORT_BASE + 0x121C)GPIO_B253 (GPIO_PORT_BASE + 0x00FD)__ARM_FEATURE_MATMUL_INT8GPIO_W23 (GPIO_PORT_BASE + 0x105C)GPIO_B26 (GPIO_PORT_BASE + 0x001A)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0GPIO_W206 (GPIO_PORT_BASE + 0x1338)GPIO_B60 (GPIO_PORT_BASE + 0x003C)GPIO_PIN_INTERRUPT_FALL MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x020)GPIO_DIR(port) MMIO32((port) + 0x00)__USACCUM_FBIT__ 8GPIO_W4 (GPIO_PORT_BASE + 0x1010)__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1GPIO_W124 (GPIO_PORT_BASE + 0x11F0)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__LACCUM_FBIT__ 31GPIO_W110 (GPIO_PORT_BASE + 0x11B8)GPIO_W114 (GPIO_PORT_BASE + 0x11C8)GPIO_B233 (GPIO_PORT_BASE + 0x00E9)GPIO_W218 (GPIO_PORT_BASE + 0x1368)GPIO_W215 (GPIO_PORT_BASE + 0x135C)EMC_BASE (PERIPH_BASE_AHB + 0x05000)__FLT32_HAS_QUIET_NAN__ 1GPIO_B239 (GPIO_PORT_BASE + 0x00EF)__LDBL_HAS_INFINITY__ 1GPIO4_MPIN GPIO_MPIN(GPIO4)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))CCU1_BASE (0x40051000U)GPIO_W90 (GPIO_PORT_BASE + 0x1168)__FLT32X_MAX_10_EXP__ 308GPIO1_MPIN GPIO_MPIN(GPIO1)__ARM_PCS 1bool _BoolGPIO_PIN_INTERRUPT_IENR MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x004)GPIO_W216 (GPIO_PORT_BASE + 0x1360)UINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)GPIO_W81 (GPIO_PORT_BASE + 0x1144)__UINT_LEAST8_MAX__ 0xffGPIO_B90 (GPIO_PORT_BASE + 0x005A)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)GPIO_W208 (GPIO_PORT_BASE + 0x1340)INT16_MAX __INT16_MAX__GPIO_B125 (GPIO_PORT_BASE + 0x007D)GPIO_W180 (GPIO_PORT_BASE + 0x12D0)GPIOPIN17 (1 << 17)GPIO5_NOT GPIO_NOT(GPIO5)GPIO_W228 (GPIO_PORT_BASE + 0x1390)__FLT32X_IS_IEC_60559__ 2GPIO_W164 (GPIO_PORT_BASE + 0x1290)PERIPH_BASE_APB3 (0x400E0000U)GPIO_W53 (GPIO_PORT_BASE + 0x10D4)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16I2S0_BASE (PERIPH_BASE_APB1 + 0x02000)GPIO_B15 (GPIO_PORT_BASE + 0x000F)__DEC_EVAL_METHOD__ 2SCT_BASE (PERIPH_BASE_AHB + 0x00000)__ARM_FEATURE_FP16_FMLGPIO_B76 (GPIO_PORT_BASE + 0x004C)GPIO_W182 (GPIO_PORT_BASE + 0x12D8)GPIO_W202 (GPIO_PORT_BASE + 0x1328)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRGPIO_PIN_INTERRUPT_RISE MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x01C)GPIO2_PIN GPIO_PIN(GPIO2)GPIO0_MPIN GPIO_MPIN(GPIO0)GPIO_B72 (GPIO_PORT_BASE + 0x0048)SCU_BASE (PERIPH_BASE_APB0 + 0x06000)GPIO_B10 (GPIO_PORT_BASE + 0x000A)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKGPIO_B187 (GPIO_PORT_BASE + 0x00BB)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__GPIO_B54 (GPIO_PORT_BASE + 0x0036)__UINT32_MAX__ 0xffffffffULGPIO3_CLR GPIO_CLR(GPIO3)USART0_BASE (PERIPH_BASE_APB0 + 0x01000)__INT_LEAST8_MAX__ 0x7f/build/libopencm3/lib/lpc43xx/m0GPIO_W237 (GPIO_PORT_BASE + 0x13B4)__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXGPIO_B45 (GPIO_PORT_BASE + 0x002D)GPIO_W29 (GPIO_PORT_BASE + 0x1074)GPIO_B162 (GPIO_PORT_BASE + 0x00A2)__UINT64_TYPE__ long long unsigned intGPIO_B250 (GPIO_PORT_BASE + 0x00FA)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024GPIO_W162 (GPIO_PORT_BASE + 0x1288)GPIO_W184 (GPIO_PORT_BASE + 0x12E0)GPIO_B9 (GPIO_PORT_BASE + 0x0009)GPIO_W68 (GPIO_PORT_BASE + 0x1110)GPIO_PIN_INTERRUPT_SIENF MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x014)GPIO_W2 (GPIO_PORT_BASE + 0x1008)__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1LPC43XX_GPIO_H __ACCUM_MAX__ 0X7FFFFFFFP-15KGPIO_B124 (GPIO_PORT_BASE + 0x007C)__INT8_MAX__ 0x7fBIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNEDUSB1_BASE (PERIPH_BASE_AHB + 0x07000)BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intGPIO_B14 (GPIO_PORT_BASE + 0x000E)GPIO_W74 (GPIO_PORT_BASE + 0x1128)GPIO_W134 (GPIO_PORT_BASE + 0x1218)GPIO_B75 (GPIO_PORT_BASE + 0x004B)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__GPIO_B192 (GPIO_PORT_BASE + 0x00C0)GPIO_W198 (GPIO_PORT_BASE + 0x1318)INT_FAST32_MINGPIO_W229 (GPIO_PORT_BASE + 0x1394)../gpio.c__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32GPIO_W13 (GPIO_PORT_BASE + 0x1034)__FRACT_EPSILON__ 0x1P-15RGPIO7_DIR GPIO_DIR(GPIO7)BIT24 (1<<24)GPIO_W43 (GPIO_PORT_BASE + 0x10AC)__INT32_MAX__ 0x7fffffffLGPIO_B154 (GPIO_PORT_BASE + 0x009A)GPIOPIN9 (1 << 9)UINTMAX_MAXGPIO_W112 (GPIO_PORT_BASE + 0x11C0)BIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICGPIO_W109 (GPIO_PORT_BASE + 0x11B4)GPIO_B227 (GPIO_PORT_BASE + 0x00E3)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32GPIO_B44 (GPIO_PORT_BASE + 0x002C)EVENTROUTER_BASE (0x40044000U)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__GPIO_W200 (GPIO_PORT_BASE + 0x1320)__USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__GPIO5_SET GPIO_SET(GPIO5)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1GPIO_B8 (GPIO_PORT_BASE + 0x0008)GPIO_W163 (GPIO_PORT_BASE + 0x128C)__DBL_MAX_EXP__ 1024GPIO_W34 (GPIO_PORT_BASE + 0x1088)__ATOMIC_RELEASE 3GPIO_W95 (GPIO_PORT_BASE + 0x117C)UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0GPIO_B123 (GPIO_PORT_BASE + 0x007B)CCU2_BASE (0x40052000U)__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKGPIO_W129 (GPIO_PORT_BASE + 0x1204)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64PERIPH_BASE_APB1 (0x400A0000U)GPIO_B254 (GPIO_PORT_BASE + 0x00FE)UINTPTR_MAXGPIO_NOT(port) MMIO32((port) + 0x300)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LTIMER3_BASE (PERIPH_BASE_APB2 + 0x04000)__INT64_MAX__ 0x7fffffffffffffffLLGPIO_B74 (GPIO_PORT_BASE + 0x004A)GPIO_B201 (GPIO_PORT_BASE + 0x00C9)GPIO_W75 (GPIO_PORT_BASE + 0x112C)GPIO_B185 (GPIO_PORT_BASE + 0x00B9)__ULLFRACT_IBIT__ 0GPIO_W6 (GPIO_PORT_BASE + 0x1018)GPIO_B93 (GPIO_PORT_BASE + 0x005D)SPI_PORT_BASE (0x40100000U)MMIO16(addr) (*(volatile uint16_t *)(addr))GPIO_B143 (GPIO_PORT_BASE + 0x008F)GPIO5_DIR GPIO_DIR(GPIO5)LPC43XX 1__GNUC__ 12GPIO0_NOT GPIO_NOT(GPIO0)GPIO1_CLR GPIO_CLR(GPIO1)GPIO_B55 (GPIO_PORT_BASE + 0x0037)WCHAR_MAXGPIO_B66 (GPIO_PORT_BASE + 0x0042)GPIO_W14 (GPIO_PORT_BASE + 0x1038)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UGPIO_B177 (GPIO_PORT_BASE + 0x00B1)GPIO_B94 (GPIO_PORT_BASE + 0x005E)__UQQ_IBIT__ 0GPIO_W222 (GPIO_PORT_BASE + 0x1378)__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKGPIO_W5 (GPIO_PORT_BASE + 0x1014)__ARM_ARCH 6GPIO_B133 (GPIO_PORT_BASE + 0x0085)GPIO_W46 (GPIO_PORT_BASE + 0x10B8)GPIO_B160 (GPIO_PORT_BASE + 0x00A0)__FLT_RADIX__ 2BIT3 (1<<3)long long intGPIO_W197 (GPIO_PORT_BASE + 0x1314)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXGPIO_W178 (GPIO_PORT_BASE + 0x12C8)GPIO_W238 (GPIO_PORT_BASE + 0x13B8)SGPIO_PORT_BASE (0x40101000U)GPIO_W49 (GPIO_PORT_BASE + 0x10C4)GPIO7 (GPIO_PORT_BASE + 0x201C)GPIO_W85 (GPIO_PORT_BASE + 0x1154)PERIPH_BASE_APB0 (0x40080000U)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)GPIO_B142 (GPIO_PORT_BASE + 0x008E)GPIO_B33 (GPIO_PORT_BASE + 0x0021)__UINT_FAST64_MAX__ 0xffffffffffffffffULLGPIO_B29 (GPIO_PORT_BASE + 0x001D)__ARM_FPGPIO_W165 (GPIO_PORT_BASE + 0x1294)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAXGPIO_W151 (GPIO_PORT_BASE + 0x125C)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLGPIO_B180 (GPIO_PORT_BASE + 0x00B4)GPIO_W136 (GPIO_PORT_BASE + 0x1220)__FLT_EVAL_METHOD_TS_18661_3__ 0__ARM_ARCH_PROFILE__INT64_TYPE__ long long intGPIO_W48 (GPIO_PORT_BASE + 0x10C0)__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4GPIO_W147 (GPIO_PORT_BASE + 0x124C)GPIO_W235 (GPIO_PORT_BASE + 0x13AC)GPIO_B166 (GPIO_PORT_BASE + 0x00A6)GPIO_W177 (GPIO_PORT_BASE + 0x12C4)GPIO_B81 (GPIO_PORT_BASE + 0x0051)GPIO_W241 (GPIO_PORT_BASE + 0x13C4)GPIO_B190 (GPIO_PORT_BASE + 0x00BE)GPIO_W108 (GPIO_PORT_BASE + 0x11B0)__UFRACT_MAX__ 0XFFFFP-16URGPIO_B59 (GPIO_PORT_BASE + 0x003B)INT64_MAXGPIO_B176 (GPIO_PORT_BASE + 0x00B0)GPIO1 (GPIO_PORT_BASE + 0x2004)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0GPIO_B88 (GPIO_PORT_BASE + 0x0058)GPIO_W255 (GPIO_PORT_BASE + 0x13FC)SPIFI_BASE (PERIPH_BASE_AHB + 0x03000)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__GPIO_W47 (GPIO_PORT_BASE + 0x10BC)GPIO_W77 (GPIO_PORT_BASE + 0x1134)GPIO_B138 (GPIO_PORT_BASE + 0x008A)GPIO_W118 (GPIO_PORT_BASE + 0x11D8)__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)GPIO_W42 (GPIO_PORT_BASE + 0x10A8)__LDBL_MAX_10_EXP__ 308GPIO_B21 (GPIO_PORT_BASE + 0x0015)GPIO_W3 (GPIO_PORT_BASE + 0x100C)GPIO1_MASK GPIO_MASK(GPIO1)GPIO_B231 (GPIO_PORT_BASE + 0x00E7)GPIO_W94 (GPIO_PORT_BASE + 0x1178)__INT_FAST32_TYPE__ intGPIO_B200 (GPIO_PORT_BASE + 0x00C8)GPIO_B62 (GPIO_PORT_BASE + 0x003E)unsigned int__GCC_ASM_FLAG_OUTPUTS__GPIO_W73 (GPIO_PORT_BASE + 0x1124)__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1GPIO0_DIR GPIO_DIR(GPIO0)GPIO_B158 (GPIO_PORT_BASE + 0x009E)GPIO_B210 (GPIO_PORT_BASE + 0x00D2)__USACCUM_IBIT__ 8GPIO_W140 (GPIO_PORT_BASE + 0x1230)GPIO_MASK(port) MMIO32((port) + 0x80)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKGPIO_W236 (GPIO_PORT_BASE + 0x13B0)GPIO_B141 (GPIO_PORT_BASE + 0x008D)GPIO_B134 (GPIO_PORT_BASE + 0x0086)GPIO_W120 (GPIO_PORT_BASE + 0x11E0)__FLT_EVAL_METHOD__ 0GPIO_B165 (GPIO_PORT_BASE + 0x00A5)GPIO_PORT_BASE (0x400F4000U)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2__GPIO_W16 (GPIO_PORT_BASE + 0x1040)__ARM_FEATURE_LDREXGPIO_B58 (GPIO_PORT_BASE + 0x003A)__UQQ_FBIT__ 8OTP_BASE (0x40045000U)GPIO_B230 (GPIO_PORT_BASE + 0x00E6)__HQ_FBIT__ 15GPIOPIN8 (1 << 8)__ARM_FP16_ARGS__GCC_IEC_559 0GPIO_W127 (GPIO_PORT_BASE + 0x11FC)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__GPIO_B127 (GPIO_PORT_BASE + 0x007F)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4GPIO4_CLR GPIO_CLR(GPIO4)__STDC__ 1GPIO_W244 (GPIO_PORT_BASE + 0x13D0)GPIO_B240 (GPIO_PORT_BASE + 0x00F0)GPIOPIN20 (1 << 20)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__GPIO_B65 (GPIO_PORT_BASE + 0x0041)__UINT8_TYPE__ unsigned charGPIO_W63 (GPIO_PORT_BASE + 0x10FC)gpio_setGPIO_W7 (GPIO_PORT_BASE + 0x101C)__SIG_ATOMIC_TYPE__ intGPIO_W192 (GPIO_PORT_BASE + 0x1300)GPIO_W119 (GPIO_PORT_BASE + 0x11DC)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"GPIO0 (GPIO_PORT_BASE + 0x2000)INT8_MINGPIO_B195 (GPIO_PORT_BASE + 0x00C3)GPIO_W37 (GPIO_PORT_BASE + 0x1094)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)GPIO_B226 (GPIO_PORT_BASE + 0x00E2)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1GPIO5_PIN GPIO_PIN(GPIO5)__LFRACT_EPSILON__ 0x1P-31LRGPIO_W106 (GPIO_PORT_BASE + 0x11A8)GPIO_B18 (GPIO_PORT_BASE + 0x0012)GPIO_W27 (GPIO_PORT_BASE + 0x106C)GPIO_W196 (GPIO_PORT_BASE + 0x1310)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__GPIO_W141 (GPIO_PORT_BASE + 0x1234)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAXGPIO_W138 (GPIO_PORT_BASE + 0x1228)GPIO_W9 (GPIO_PORT_BASE + 0x1024)GPIO_W210 (GPIO_PORT_BASE + 0x1348)GPIO_B47 (GPIO_PORT_BASE + 0x002F)__FLT32_MIN_10_EXP__ (-37)GPIO_B164 (GPIO_PORT_BASE + 0x00A4)MMIO64(addr) (*(volatile uint64_t *)(addr))GPIO_W88 (GPIO_PORT_BASE + 0x1160)__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LGPIO_W78 (GPIO_PORT_BASE + 0x1138)INTPTR_MINGPIO_W254 (GPIO_PORT_BASE + 0x13F8)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)GPIO_W199 (GPIO_PORT_BASE + 0x131C)GPIO_B155 (GPIO_PORT_BASE + 0x009B)__TA_IBIT__ 64GPIO_B208 (GPIO_PORT_BASE + 0x00D0)GPIO_B191 (GPIO_PORT_BASE + 0x00BF)__FLT32_MIN__ 1.1754943508222875e-38F32GPIO_B126 (GPIO_PORT_BASE + 0x007E)GPIO_B79 (GPIO_PORT_BASE + 0x004F)PERIPH_BASE_AHB (0x40000000U)GPIO_W20 (GPIO_PORT_BASE + 0x1050)__ARM_FEATURE_QRDMXGPIO_W245 (GPIO_PORT_BASE + 0x13D4)GPIO_B184 (GPIO_PORT_BASE + 0x00B8)__ARM_ARCH_ISA_THUMB 1GPIO_B207 (GPIO_PORT_BASE + 0x00CF)GPIO_W190 (GPIO_PORT_BASE + 0x12F8)GPIO_W213 (GPIO_PORT_BASE + 0x1354)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32GPIO_B215 (GPIO_PORT_BASE + 0x00D7)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__GPIO_B194 (GPIO_PORT_BASE + 0x00C2)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0GPIO_B149 (GPIO_PORT_BASE + 0x0095)_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__GPIO_W99 (GPIO_PORT_BASE + 0x118C)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1GPIO_W194 (GPIO_PORT_BASE + 0x1308)GPIO_B32 (GPIO_PORT_BASE + 0x0020)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO_GROUP1_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x09000)GPIOPIN28 (1 << 28)__FLT32_DIG__ 6INT_LEAST16_MAXGPIO_W111 (GPIO_PORT_BASE + 0x11BC)BIT15 (1<<15)BACKUP_REG_BASE (0x40041000U)GPIOPIN15 (1 << 15)GPIO_W142 (GPIO_PORT_BASE + 0x1238)GPIO_B56 (GPIO_PORT_BASE + 0x0038)GPIO_W223 (GPIO_PORT_BASE + 0x137C)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1GPIO_GROUP0_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x08000)INT32_MAXGPIO_W233 (GPIO_PORT_BASE + 0x13A4)GPIOPIN29 (1 << 29)__ACCUM_MIN__ (-0X1P15K-0X1P15K)GPIO_B196 (GPIO_PORT_BASE + 0x00C4)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intGPIO_W79 (GPIO_PORT_BASE + 0x113C)GPIOPIN16 (1 << 16)GPIO_W51 (GPIO_PORT_BASE + 0x10CC)GPIO_W18 (GPIO_PORT_BASE + 0x1048)GPIO_W102 (GPIO_PORT_BASE + 0x1198)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLGPIO5_MASK GPIO_MASK(GPIO5)__FRACT_IBIT__ 0I2C1_BASE (PERIPH_BASE_APB3 + 0x00000)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2GPIO_B25 (GPIO_PORT_BASE + 0x0019)BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234GPIO7_SET GPIO_SET(GPIO7)__FLT_NORM_MAX__ 3.4028234663852886e+38FGPIO_B183 (GPIO_PORT_BASE + 0x00B7)long long unsigned intGPIO_W246 (GPIO_PORT_BASE + 0x13D8)__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)GPIO7_MPIN GPIO_MPIN(GPIO7)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2GPIO_W38 (GPIO_PORT_BASE + 0x1098)__PTRDIFF_TYPE__ intGPIO_W41 (GPIO_PORT_BASE + 0x10A4)__APCS_32__ 1__DQ_FBIT__ 63GPIO_W56 (GPIO_PORT_BASE + 0x10E0)GPIO_B144 (GPIO_PORT_BASE + 0x0090)INT_LEAST64_MAX__SACCUM_IBIT__ 8GPIO_B236 (GPIO_PORT_BASE + 0x00EC)__UHQ_IBIT__ 0INT_LEAST8_MINGPIO_W176 (GPIO_PORT_BASE + 0x12C0)GPIO_W170 (GPIO_PORT_BASE + 0x12A8)BIT29 (1<<29)__INT_FAST16_TYPE__ intGPIO_B169 (GPIO_PORT_BASE + 0x00A9)GPIO6_DIR GPIO_DIR(GPIO6)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRGPIO_B131 (GPIO_PORT_BASE + 0x0083)__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intGPIO_W89 (GPIO_PORT_BASE + 0x1164)GPIO_W59 (GPIO_PORT_BASE + 0x10EC)__FLT32X_DIG__ 15GPIO_B179 (GPIO_PORT_BASE + 0x00B3)GPIO_B100 (GPIO_PORT_BASE + 0x0064)__UTQ_FBIT__ 128GPIO_W155 (GPIO_PORT_BASE + 0x126C)__FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffGPIO_B20 (GPIO_PORT_BASE + 0x0014)GPIO_B244 (GPIO_PORT_BASE + 0x00F4)GPIO3_DIR GPIO_DIR(GPIO3)GPIO_B189 (GPIO_PORT_BASE + 0x00BD)PTRDIFF_MAX __PTRDIFF_MAX__GPIO_W209 (GPIO_PORT_BASE + 0x1344)GPIO_W239 (GPIO_PORT_BASE + 0x13BC)GPIO6_MASK GPIO_MASK(GPIO6)GPIO_B174 (GPIO_PORT_BASE + 0x00AE)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKGPIO_W242 (GPIO_PORT_BASE + 0x13C8)GPIO_W22 (GPIO_PORT_BASE + 0x1058)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRGPIO_W40 (GPIO_PORT_BASE + 0x10A0)GPIOPIN7 (1 << 7)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intGPIO_W121 (GPIO_PORT_BASE + 0x11E4)GPIO_B170 (GPIO_PORT_BASE + 0x00AA)GPIO_B146 (GPIO_PORT_BASE + 0x0092)SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)GPIO_B182 (GPIO_PORT_BASE + 0x00B6)QEI_BASE (PERIPH_BASE_APB2 + 0x06000)WCHAR_MINGPIO_B140 (GPIO_PORT_BASE + 0x008C)GPIO_B137 (GPIO_PORT_BASE + 0x0089)BEGIN_DECLS GPIO_B213 (GPIO_PORT_BASE + 0x00D5)GPIO_B99 (GPIO_PORT_BASE + 0x0063)GPIO_W60 (GPIO_PORT_BASE + 0x10F0)GPIO_W72 (GPIO_PORT_BASE + 0x1120)__FLT64_MAX__ 1.7976931348623157e+308F64GPIO_W57 (GPIO_PORT_BASE + 0x10E4)GPIO2_MASK GPIO_MASK(GPIO2)GPIO_W50 (GPIO_PORT_BASE + 0x10C8)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15GPIO_GROUP1_INTERRUPT_PORT_ENA(x) MMIO32(GPIO_GROUP1_INTERRUPT_BASE + 0x040 + ((x)*4))__FLT32X_MAX__ 1.7976931348623157e+308F32xGPIO_B168 (GPIO_PORT_BASE + 0x00A8)GPIO_W117 (GPIO_PORT_BASE + 0x11D4)GPIO_B238 (GPIO_PORT_BASE + 0x00EE)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1GPIO_B178 (GPIO_PORT_BASE + 0x00B2)USART3_BASE (PERIPH_BASE_APB2 + 0x02000)__QQ_IBIT__ 0GPIO_W98 (GPIO_PORT_BASE + 0x1188)GPIO_B153 (GPIO_PORT_BASE + 0x0099)GPIO_B209 (GPIO_PORT_BASE + 0x00D1)GPIO_W144 (GPIO_PORT_BASE + 0x1240)__LLACCUM_FBIT__ 31GPIO_B243 (GPIO_PORT_BASE + 0x00F3)GPIO3_PIN GPIO_PIN(GPIO3)__UINTMAX_TYPE__ long long unsigned int__FLT32X_MIN_10_EXP__ (-307)GPIO_B16 (GPIO_PORT_BASE + 0x0010)__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intGPIO_B50 (GPIO_PORT_BASE + 0x0032)GPIO_W243 (GPIO_PORT_BASE + 0x13CC)__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1GPIO_W35 (GPIO_PORT_BASE + 0x108C)GPIO_W30 (GPIO_PORT_BASE + 0x1078)GPIO_B198 (GPIO_PORT_BASE + 0x00C6)INTMAX_MAXGPIO_W21 (GPIO_PORT_BASE + 0x1054)TIMER2_BASE (PERIPH_BASE_APB2 + 0x03000)GPIO_B117 (GPIO_PORT_BASE + 0x0075)GPIO_GROUP1_INTERRUPT_PORT_POL(x) MMIO32(GPIO_GROUP1_INTERRUPT_BASE + 0x020 + ((x)*4))__ARM_FEATURE_FP16_SCALAR_ARITHMETICGPIO_B229 (GPIO_PORT_BASE + 0x00E5)__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1GPIO_W181 (GPIO_PORT_BASE + 0x12D4)GPIO_B95 (GPIO_PORT_BASE + 0x005F)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CGPIO2_SET GPIO_SET(GPIO2)GPIO_W248 (GPIO_PORT_BASE + 0x13E0)GPIO_B214 (GPIO_PORT_BASE + 0x00D6)GPIOPIN2 (1 << 2)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intGPIO_W26 (GPIO_PORT_BASE + 0x1068)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRGPIO5_CLR GPIO_CLR(GPIO5)GPIO_W58 (GPIO_PORT_BASE + 0x10E8)GPIO4 (GPIO_PORT_BASE + 0x2010)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4GPIO_B167 (GPIO_PORT_BASE + 0x00A7)PMC_BASE (0x40042000U)GPIO_W230 (GPIO_PORT_BASE + 0x1398)__INT64_C(c) c ## LLgpioportgpio_toggleUART1_BASE (PERIPH_BASE_APB0 + 0x02000)GPIO_B232 (GPIO_PORT_BASE + 0x00E8)__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDE__ACCUM_IBIT__ 16GPIO_W64 (GPIO_PORT_BASE + 0x1100)GPIO_B211 (GPIO_PORT_BASE + 0x00D3)GPIO_B242 (GPIO_PORT_BASE + 0x00F2)GPIO_W145 (GPIO_PORT_BASE + 0x1244)short intGPIO_W175 (GPIO_PORT_BASE + 0x12BC)__UINT16_C(c) cGPIO_W214 (GPIO_PORT_BASE + 0x1358)__UDA_IBIT__ 32GPIO_W232 (GPIO_PORT_BASE + 0x13A0)GPIO_B1 (GPIO_PORT_BASE + 0x0001)UINT_LEAST32_MAXGPIO_B197 (GPIO_PORT_BASE + 0x00C5)BIT2 (1<<2)GPIO_W24 (GPIO_PORT_BASE + 0x1060)__ATOMIC_RELAXED 0GPIO_W31 (GPIO_PORT_BASE + 0x107C)__ARM_FEATURE_COPROCGPIO_W96 (GPIO_PORT_BASE + 0x1180)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53GPIO1_DIR GPIO_DIR(GPIO1)GPIO_W204 (GPIO_PORT_BASE + 0x1330)BIT5 (1<<5)GPIO_B35 (GPIO_PORT_BASE + 0x0023)BIT1 (1<<1)GPIO_B224 (GPIO_PORT_BASE + 0x00E0)INT8_CINT_LEAST32_MAXGPIO3_MASK GPIO_MASK(GPIO3)__USES_INITFINI__ 1GPIO3_SET GPIO_SET(GPIO3)GPIO_W249 (GPIO_PORT_BASE + 0x13E4)__DBL_DECIMAL_DIG__ 17GPIO_B228 (GPIO_PORT_BASE + 0x00E4)BIT8 (1<<8)INT16_C(c) __INT16_C(c)GPIO_W62 (GPIO_PORT_BASE + 0x10F8)GPIO7_NOT GPIO_NOT(GPIO7)GPIO0_PIN GPIO_PIN(GPIO0)GPIO_B248 (GPIO_PORT_BASE + 0x00F8)__INT16_MAX__ 0x7fffGPIO_W0 (GPIO_PORT_BASE + 0x1000)__INT_WIDTH__ 32GPIO_W123 (GPIO_PORT_BASE + 0x11EC)GPIO_B199 (GPIO_PORT_BASE + 0x00C7)__QQ_FBIT__ 7RITIMER_BASE (PERIPH_BASE_APB2 + 0x00000)GPIO_B255 (GPIO_PORT_BASE + 0x00FF)__ACCUM_FBIT__ 15__SIG_ATOMIC_WIDTH__ 32GPIO_B111 (GPIO_PORT_BASE + 0x006F)__FLT64_EPSILON__ 2.2204460492503131e-16F64GPIO_W217 (GPIO_PORT_BASE + 0x1364)INT16_CGPIO_W101 (GPIO_PORT_BASE + 0x1194)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32RGU_BASE (0x40053000U)__ULLFRACT_EPSILON__ 0x1P-64ULLRGPIO_W146 (GPIO_PORT_BASE + 0x1248)__UINT_LEAST32_MAX__ 0xffffffffUL__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17GPIO_B0 (GPIO_PORT_BASE + 0x0000)GPIO_W128 (GPIO_PORT_BASE + 0x1200)GPIO_B241 (GPIO_PORT_BASE + 0x00F1)GPIO_W116 (GPIO_PORT_BASE + 0x11D0)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)GPIOPIN13 (1 << 13)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1GPIO_B24 (GPIO_PORT_BASE + 0x0018)__FLT32X_HAS_DENORM__ 1GPIO_W25 (GPIO_PORT_BASE + 0x1064)__ULLACCUM_MIN__ 0.0ULLKGPIO_W150 (GPIO_PORT_BASE + 0x1258)__INT_FAST32_WIDTH__ 32GPIOPIN6 (1 << 6)GPIO_W55 (GPIO_PORT_BASE + 0x10DC)GPIO_W166 (GPIO_PORT_BASE + 0x1298)GPIO_W92 (GPIO_PORT_BASE + 0x1170)GPIO_W65 (GPIO_PORT_BASE + 0x1104)GPIO_B34 (GPIO_PORT_BASE + 0x0022)GPIO_W82 (GPIO_PORT_BASE + 0x1148)GPIO_W171 (GPIO_PORT_BASE + 0x12AC)GPIO_W253 (GPIO_PORT_BASE + 0x13F4)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODGPIO_B103 (GPIO_PORT_BASE + 0x0067)RTC_BASE (0x40046000U)GPIO_W107 (GPIO_PORT_BASE + 0x11AC)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H GPIO_B247 (GPIO_PORT_BASE + 0x00F7)GPIO_B113 (GPIO_PORT_BASE + 0x0071)AES_BASE (0x400F1000U)GPIO_B156 (GPIO_PORT_BASE + 0x009C)GPIO1_PIN GPIO_PIN(GPIO1)__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0GPIO_W1 (GPIO_PORT_BASE + 0x1004)GPIO_W211 (GPIO_PORT_BASE + 0x134C)uint32_tBIT12 (1<<12)GPIO_W61 (GPIO_PORT_BASE + 0x10F4)GPIO_GROUP1_INTERRUPT_CTRL MMIO32(GPIO_GROUP1_INTERRUPT_BASE + 0x000)GPIOPIN11 (1 << 11)__SACCUM_EPSILON__ 0x1P-7HKGPIO_B64 (GPIO_PORT_BASE + 0x0040)GPIO_W8 (GPIO_PORT_BASE + 0x1020)GPIO6_MPIN GPIO_MPIN(GPIO6)GPIO_W174 (GPIO_PORT_BASE + 0x12B8)GPIO_B181 (GPIO_PORT_BASE + 0x00B5)GPIO_B173 (GPIO_PORT_BASE + 0x00AD)__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8GPIO_W66 (GPIO_PORT_BASE + 0x1108)GPIO_PIN_INTERRUPT_CIENF MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x018)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15GPIO_B204 (GPIO_PORT_BASE + 0x00CC)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXGPIO_B216 (GPIO_PORT_BASE + 0x00D8)BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINGPIO_W125 (GPIO_PORT_BASE + 0x11F4)__FLT64_DIG__ 15GPIO_B23 (GPIO_PORT_BASE + 0x0017)__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8GPIOPIN21 (1 << 21)GPIO_W137 (GPIO_PORT_BASE + 0x1224)__INT_LEAST16_TYPE__ short intGPIO_W86 (GPIO_PORT_BASE + 0x1158)__DBL_MAX__ ((double)1.7976931348623157e+308L)GPIO_W44 (GPIO_PORT_BASE + 0x10B0)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1GPIO3_NOT GPIO_NOT(GPIO3)UINTMAX_CGPIO_W185 (GPIO_PORT_BASE + 0x12E4)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__UINTPTR_MAX__ 0xffffffffUGPIO_B129 (GPIO_PORT_BASE + 0x0081)GPIO_B102 (GPIO_PORT_BASE + 0x0066)GPIOPIN1 (1 << 1)__bool_true_false_are_defined 1USART2_BASE (PERIPH_BASE_APB2 + 0x01000)GPIO_B151 (GPIO_PORT_BASE + 0x0097)BIT26 (1<<26)GPIO_B234 (GPIO_PORT_BASE + 0x00EA)__SIZE_MAX__ 0xffffffffU__FLT32X_HAS_INFINITY__ 1__ARM_FEATURE_SATGPIO_B246 (GPIO_PORT_BASE + 0x00F6)GPIO_B112 (GPIO_PORT_BASE + 0x0070)GPIO_B109 (GPIO_PORT_BASE + 0x006D)GPIO_B19 (GPIO_PORT_BASE + 0x0013)GPIO_PIN_INTERRUPT_ISEL MMIO32(GPIO_PIN_INTERRUPT_BASE + 0x000)__ARM_ARCHGPIO_W143 (GPIO_PORT_BASE + 0x123C)INTMAX_C(c) __INTMAX_C(c)MCPWM_BASE (PERIPH_BASE_APB1 + 0x00000)GPIO0_MASK GPIO_MASK(GPIO0)GPIOPIN23 (1 << 23)LPC43XX_MEMORYMAP_H INT_LEAST64_MINPTRDIFF_MAXGPIO_W54 (GPIO_PORT_BASE + 0x10D8)GPIO_W201 (GPIO_PORT_BASE + 0x1324)GPIO_B48 (GPIO_PORT_BASE + 0x0030)GPIO_B172 (GPIO_PORT_BASE + 0x00AC)__LLFRACT_EPSILON__ 0x1P-63LLRGPIO2_NOT GPIO_NOT(GPIO2)GPIO_W70 (GPIO_PORT_BASE + 0x1118)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53GPIO_W226 (GPIO_PORT_BASE + 0x1388)GPIO_W205 (GPIO_PORT_BASE + 0x1334)__ARM_ASM_SYNTAX_UNIFIED__GPIO_B203 (GPIO_PORT_BASE + 0x00CB)GPIO_GROUP0_INTERRUPT_CTRL MMIO32(GPIO_GROUP0_INTERRUPT_BASE + 0x000)WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32GPIO_CLR(port) MMIO32((port) + 0x280)GPIO2_MPIN GPIO_MPIN(GPIO2)GPIO_B49 (GPIO_PORT_BASE + 0x0031)GPIO_B22 (GPIO_PORT_BASE + 0x0016)GPIO_W17 (GPIO_PORT_BASE + 0x1044)__ATOMIC_ACQ_REL 4ADC1_BASE (PERIPH_BASE_APB3 + 0x04000)LPC43XX_M0 1__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)GPIO_B118 (GPIO_PORT_BASE + 0x0076)GPIO_B96 (GPIO_PORT_BASE + 0x0060)GPIO_B223 (GPIO_PORT_BASE + 0x00DF)GPIO_MPIN(port) MMIO32((port) + 0x180)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32GPIO_W186 (GPIO_PORT_BASE + 0x12E8)GPIOPIN22 (1 << 22)GPIO_B128 (GPIO_PORT_BASE + 0x0080)GPIO_B101 (GPIO_PORT_BASE + 0x0065)UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0INT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intGPIO_B115 (GPIO_PORT_BASE + 0x0073)GPIO_B53 (GPIO_PORT_BASE + 0x0035)GPIO_GROUP0_INTERRUPT_PORT_POL(x) MMIO32(GPIO_GROUP0_INTERRUPT_BASE + 0x020 + ((x)*4))GPIO_B52 (GPIO_PORT_BASE + 0x0034)__ARM_FEATURE_CDE_COPROCGPIO_W132 (GPIO_PORT_BASE + 0x1210)UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205 | A+aeabi!6S-M M         ')!#%+ 2c+*-Z  c  n  gpio.c$twm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.22.395ffb693017d551ed93d11c39ba4361wm4.gpio.h.46.2a912037b60fe08c1ef966b6326bdfdagpio_setgpio_cleargpio_toggle "&-4;BIPUcjx}        (?    $-3<B #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y   #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5;AGMSY_ekqw} %+17=CIOU\ #)/5;AGMSY_ekqw} %+18?FMT[bipw~ &-4;BIPW^elsz ")07>ELSZahov} %,3:AHOV]dkry !(/6=DKRY`gnu|$+29@GNU\cjqx  '.5<CJQX_fmt{#*18?FMT[bipw~     & - 4 ; B I P W ^ e l s z                        " ) 0 7 > E L S Z a h o v }                        % , 3 : A H O V ] d k r y                        ! ( / 6 = D K R Y ` g n u |                        $ + 2 9 @ G N U \ c j q x                      '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BIPW^elsz  $(48 .symtab.strtab.shstrtab.text.data.bss.text.gpio_set.text.gpio_clear.text.gpio_toggle.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group 4 . @ . L . X . d . p .  | .!!', ; L b^ @.n^Q| @.0 @4 . @T.I @lH.G~  @ .  @ . N @./" @(.Q @0.!9a @.# @.%$9 @.'0%/0'<@ @0.+p|,/+ zscu.o/ 0 0 0 644 48624 ` ELF(4(-, !"`pGI &f], : Z!Ddd4`.8int=u `@ `@7`@`@7`@7`@7`@7`@7`@7`@Ff`@8`@zM`@M`@M`@M`@M`@M`@M`@M`@`@M`@O`@ELa@Ca@gLa@lL a@PDa@La@La@Da@L a@L$a@m(a@s,a@^0a@4a@qca@vca@{ca@ca@ca@ca@ca@ca@ca@v b@{ b@ b@ b@ b@ b@ b@ b@_0 b@ $b@b(b@[!b@`!b@e!b@j!b@o!b@t!b@y!b@~!b@)8c@.8c@38c@88 c@=8c@B8c@G8c@L8c@Q8 c@V8$c@_(c@e,c@k0c@Mc@SFc@5Mc@:Mc@|Fc@NMc@SMc@Fc@cd@cd@cd@c d@cd@cd@\d@cd@d d@S d@X d@] d@b d@g d@l d@q d@Ne@Ne@@Le@N e@Ne@de@de@de@de@de@de@de@ f@ f@ f@ f@ f@ f@ f@ f@ f@ $f@W(f@Z,f@X0f@X4f@Z8f@"f@"f@"f@%df@"f@"f@"f@"f@ndf@"f@!f@*kf@!f@!f@!f@!f@!f@e:g@bg@:g@: g@:g@:g@:g@:g@: g@:$g@@Y(g@FY,g@LY0g@RY4g@XY8g@^Y :!;!(9 I% Uy: ; 9 I$ > > I: ;9 : ;9 I .?: ; 9 '@z#$d(?@)A`6yT@ Z,3j4N,H(=$|"X:;FJL <0B #}"U?hN`!O:]B/OcX/KfKlBNT2.=0/BWW!?LlhF3 feg03/^79Gife>lHS[ '^j.L]n15L+_+,G/f!0iJ)k` 1 Y-_'v?Z-"KJ4a?Nl {bl 289 9 "E/?s0#>;'4 >E+7qL#*" .MS*ljXHj3s\f=0-a![VB'eDS=t`U"EY2Z5fJ%1L<2_I? DE] BXk;B<a2Qaf%\ [eOZ 5:p4j:>V'LhN/!-`&RD9z4b_K(6;.h * ! |*K1<G`;7:GSAD >lOMyXf d =WR5c8_JhMMWRd$>cVRY&.2g7"@%$2%1 a@N~\L8BOdKT0=*!7?aM^SsgjZ ?MOJbo@& ThvG=c4NoRk9R/!i%XF;ACiZ_-XH+e]UDB3ID$aU79$dcdH|J.a:@`sAy9gK$2F.8,<]/[85@ TgFD,YC+Eh81=g @dS#F6g/ b9/E@V$*.NP!m<"X&S , i[YlB$a1`>\6!=Q"q)(GdeEf(CgHjkHnn8o(p8Sqa*tL:u&xJyO7zf{B ~)(3;jWWCR2{"U@oIAe)DG-0[M?i Zq[XMq(h=HL-[ ++-cQlgei0|~Rd0O5E ;<x8/RBS{< 5V:y1&h2V:xe.G H+ 6JP2'i?[@\gWZy< $X  m ]ek qC!&&C'$2gC&D)6EF_EI'LwQR[SZTkU{V[W,9XS0Y\Z9[E \G]\^_|.`Iaeb!c0dKeW:fq-g:+hi:1jNhkgl m3n o1pLhF84  !&)(J);*#+@,-b.0y5_T6I7T`89':~@;d?H@H&Ar4B_Hu I+JdYKOLUMNWOj?PjfQ'IWLXYc)Z$\[a^bgcEd5Ve5fRgnPhFnKod3pAq rjw;{? 68.U/yZ0rS12]3-(4\5"Y6C7V8--9X :,;<5<$ =@?l@RAB:CtD"E Fu GJHBgIe(JKP L$MMNSOU6PbQ>RlSbZ]o/^abv cd7eefgAhfki;*jx'k7'l`lmXnpQo Vp*dq;r_>s1CtCbux"Py z{D.|+}~;%T H1& =9&P3KFe`Mg>CoW/~U#BK\IR~,aJ r60PGH(hb[\hHP ( d8D1*T*!9> A\`P<Ze@J a6]@Q Y"E%`ZUzN6\$k%k=6^VI@K(sdN_z&sD|;;4#$$K-d4D?( R BqSklOSWJQ?iYK $)=#z7haD YF%4 5Qt_hlC3_5,]kQS3Gc#>5H(_*S3^#+E G P Y b k t }                $-3<B     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                            ! ' - 3 9 ? E K Q W ] c i o u {                            # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                            ! ' - 3 9 ? E K Q W ] c i o u {                            # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                            ! ' - 3 9 ? E K Q W ] c i o u {                                #  )  /  5  ;  A  G  M  S  Y  _  e  k  q  w  }                                  %  +  1  7  =  C  I  O  U  [  a  g  m  s  y           # ) / 5 ; A G M S Y _ e k q x                         ' . 5 < C J Q X _ f m t {                        # * 1 8 ? F M T [ b i p w ~                        & - 4 ; B I           # ) / 5 ; A G M S Y _ e k q w }                       # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U \      # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                         " ) 0 7 > E L S Z a h o v }                        % , 3 : A H O V ] d k r y                        ! ( / 6 = D K R Y ` g n u |                        $ + 2 9 @ G N U \ c j q x                         ' . 5 < C J Q X _ f m t {              .symtab.strtab.shstrtab.text.data.bss.text.scu_pinmux.rel.debug_info.debug_abbrev.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 *@ *L *X *d *p *| *!',A= @@* M_% [ @X*rEn @h*XI @pH*~  @ * @ *;N @Ц*" @(* @Ъ0*a @* @Э *! @*#0 m0э'  @*'p,Dp+& ci2c.o/ 0 0 0 644 75304 ` ELF(4(76 !"#$%&'()*+,KJ`l"K`K`K`K,:`pGl@ @ @ @ @"K!` #J`hB "K`pG @ @Kh #BJ`"KI`K` hBpGF @ @ @Kh #BJ`"KI` hBKhpG @ @ @Kh #BJ`"K`K:`pG @ @ 8} M   J_'.Q+01hX!4zQ܁intHiJ\$8Q F0 NF0qFFPn=$ ,4|D,cP$ > :!; 9 I.?:!; 9!'@z:!; 9 I% Uy&I$ > .?: ; 9 'I@z .?: ; 9 '@z .?: ; 9 '@z<4$00$'4$00$(# ?'?@()*n \g')'-MWuXl&-?#"jaanlkRI._>XmkjD+"']5@>;1 P)zsWxQh,MO)9ԕ" _ 8h; u(6{Zz&CJV=|_UVWw`X!YZhb[\y]^_P` }ab!c^SderQf}gh"icTjkl%mzWnIo[Up2pwA`Y !G&I(%)f*&+B,e -LQ.J#05[6}789V:Rm;Ъ?@CAXBHI%MJ!KLoMDNKO5+P!~Q{W@XNYHZ> [ abcdeZfgJh'n o=pqz6r1w{Jl[_-.345?4Bb5CDGkHxInL7MWNQiR6S]V"W`X,[\y]`a;b*GefFgj+kB[lCo'plqct uv[y cz4{k~_NMأ"o@q/?&0މr0D9$.t/:0*1&2K3245j6q7l89=:$N;]Z<=l?!@AB?#CS1Dm;EFF5G~HIJK5L@MNO.\PQJkRJSZs(]m^/a%bcOde25f ,g ohҺiqJjFk*El"mƘnop^q.erjsptC=u0xy|SzH2{SP|#}"T~2#T06P57ibJDzcn7"q)Rkdpp=0)o\~, \kozèX $5_!~TJr7Jj9m&٠285*@}:\Un*%H̚>]:X4֊Bi[qWs7.m Mi%֌G X|y>9ZzJWYWLsdE,(8{ Ber9U`\R%Iovvo$%I/sh2E5a8;E>)ADՔ΃%^l=5:` &@IKxB*jї_\of*xgD-r,Y<[(dݭ_$:Dd;( P:Y͟ .XLXshozyKqh)%s0)>I-3?& 9S\5JvF?,vQJi@7i БL]k:iI8OzXҴ!;vtAtim N>1>CE>Au9X_n ../usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/lpc43xx../../../include/libopencm3/cm3i2c.cstdint.hi2c.hcommon.hstdbool.hmemorymap.hscu.hcgu.h, .u" / 12= =0!=    /=. /0 "!/    /. /0 /!    / =. /0"/=CGU_PLL1_CTRL_FBSEL (1 << CGU_PLL1_CTRL_FBSEL_SHIFT)CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT (24)SCU_SFSP5_2 SCU_SFS(PIN_GROUP5, PIN2)SCU_SFSP2_12 SCU_SFS(PIN_GROUP2, PIN12)SCU_SFSPB_5 SCU_SFS(PIN_GROUPB, PIN5)__DECIMAL_DIG__ 17CGU_BASE_SPIFI_CLK_AUTOBLOCK_SHIFT (11)__UHA_FBIT__ 8CGU_BASE_OUT_CLK_PD (1 << CGU_BASE_OUT_CLK_PD_SHIFT)SCU_SFSP1_2 SCU_SFS(PIN_GROUP1, PIN2)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1__CHAR_UNSIGNED__ 1ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000)PIN2 0x008CGU_PLL0USB_STAT_FR (1 << CGU_PLL0USB_STAT_FR_SHIFT)SCU_SFSPD_14 SCU_SFS(PIN_GROUPD, PIN14)CGU_BASE_PHY_RX_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT (24)__FLT64_HAS_INFINITY__ 1CGU_IDIVC_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVC_CTRL_CLK_SEL_SHIFT)SCU_SFSPE_2 SCU_SFS(PIN_GROUPE, PIN2)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2I2C1_STAT I2C_STAT(I2C1)__LACCUM_EPSILON__ 0x1P-31LKSCU_SFSP4_0 SCU_SFS(PIN_GROUP4, PIN0)__PTRDIFF_MAX__ 0x7fffffff__SACCUM_FBIT__ 7SCU_SFSP8_5 SCU_SFS(PIN_GROUP8, PIN5)CGU_PLL0AUDIO_CTRL_SEL_EXT_SHIFT (13)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)SCU_SFSP5_1 SCU_SFS(PIN_GROUP5, PIN1)__INTMAX_MAX__ 0x7fffffffffffffffLLSCU_SFSPB_1 SCU_SFS(PIN_GROUPB, PIN1)CGU_IDIVD_CTRL_CLK_SEL_SHIFT (24)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LI2C0_BASE (PERIPH_BASE_APB1 + 0x01000)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUCGU_BASE_CGU_OUT1_CLK_PD (1 << CGU_BASE_CGU_OUT1_CLK_PD_SHIFT)CGU_PLL0USB_MDIV_SELR(x) ((x) << CGU_PLL0USB_MDIV_SELR_SHIFT)__ARM_FEATURE_QBITCGU_BASE_APLL_CLK MMIO32(CGU_BASE + 0x0C0)CGU_BASE_SSP1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT)CGU_PLL0AUDIO_MDIV MMIO32(CGU_BASE + 0x034)CGU_PLL0USB_CTRL_CLK_SEL_SHIFT (24)signed charINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8SCU_SFSP2_13 SCU_SFS(PIN_GROUP2, PIN13)__DBL_MAX_10_EXP__ 308CGU_BASE_APLL_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APLL_CLK_CLK_SEL_SHIFT)__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intCGU_IDIVE_CTRL_AUTOBLOCK_SHIFT (11)SCU_CONF_FUNCTION4 (0x4)C_CCAN1_BASE (PERIPH_BASE_APB1 + 0x04000)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32CGU_BASE_SDIO_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT)__USACCUM_MIN__ 0.0UHKSCU_SFSPB_4 SCU_SFS(PIN_GROUPB, PIN4)__FLT32_DECIMAL_DIG__ 9CGU_BASE_UART1_CLK_AUTOBLOCK (1 << CGU_BASE_UART1_CLK_AUTOBLOCK_SHIFT)SCU_SFSPF_9 SCU_SFS(PIN_GROUPF, PIN9)__LDBL_MIN_EXP__ (-1021)INT_FAST16_MIN__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)SCU_SFSP5_7 SCU_SFS(PIN_GROUP5, PIN7)__UINT8_C(c) cI2C_MASK1(port) MMIO32((port) + 0x034)__INT16_TYPE__ short intCGU_BASE_PHY_RX_CLK_CLK_SEL(x) ((x) << CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT)CGU_BASE_CGU_OUT1_CLK_CLK_SEL(x) ((x) << CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT)CGU_BASE_USB0_CLK_CLK_SEL(x) ((x) << CGU_BASE_USB0_CLK_CLK_SEL_SHIFT)I2S1_BASE (PERIPH_BASE_APB1 + 0x03000)USB0_BASE (PERIPH_BASE_AHB + 0x06000)CGU_BASE_PERIPH_CLK_AUTOBLOCK (1 << CGU_BASE_PERIPH_CLK_AUTOBLOCK_SHIFT)UINT_FAST32_MAXCGU_BASE_PHY_TX_CLK MMIO32(CGU_BASE + 0x07C)CGU_BASE_SDIO_CLK_PD_SHIFT (0)CGU_PLL0USB_CTRL_PD (1 << CGU_PLL0USB_CTRL_PD_SHIFT)INT_FAST64_MAX __INT_FAST64_MAX__CGU_PLL0AUDIO_CTRL_FRM (1 << CGU_PLL0AUDIO_CTRL_FRM_SHIFT)__INT_FAST8_TYPE__ int__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64CGU_PLL0AUDIO_NP_DIV_PDEC(x) ((x) << CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT)CGU_BASE_SPIFI_CLK_CLK_SEL(x) ((x) << CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intPERIPH_BASE_APB2 (0x400C0000U)PIN_GROUPE (SCU_BASE + 0x700)CGU_BASE_SPIFI_CLK_AUTOBLOCK (1 << CGU_BASE_SPIFI_CLK_AUTOBLOCK_SHIFT)I2C1_MASK2 I2C_MASK2(I2C1)INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38CGU_SRC_32K 0x00WWDT_BASE (PERIPH_BASE_APB0 + 0x00000)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZSCU_SFSP9_1 SCU_SFS(PIN_GROUP9, PIN1)TIMER1_BASE (PERIPH_BASE_APB0 + 0x05000)SCU_SFSP0_0 SCU_SFS(PIN_GROUP0, PIN0)__FLT32_MIN_EXP__ (-125)CGU_BASE_VADC_CLK_PD_SHIFT (0)I2C_ADR3(port) MMIO32((port) + 0x028)../i2c.cCGU_PLL0AUDIO_CTRL_DIRECTO (1 << CGU_PLL0AUDIO_CTRL_DIRECTO_SHIFT)PIN_GROUPB (SCU_BASE + 0x580)ATIMER_BASE (0x40040000U)UINT32_MAX __UINT32_MAX__CGU_IDIVB_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVB_CTRL_CLK_SEL_SHIFT)C_CAN0_BASE (PERIPH_BASE_APB3 + 0x02000)__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32SCU_SFSP4_2 SCU_SFS(PIN_GROUP4, PIN2)SCU_SFSPA_2 SCU_SFS(PIN_GROUPA, PIN2)__FLT64_MIN_10_EXP__ (-307)I2C1_ADR0 I2C_ADR0(I2C1)SCU_SFSPE_7 SCU_SFS(PIN_GROUPE, PIN7)BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__SCU_CONF_FUNCTION1 (0x1)CGU_PLL0USB_MDIV MMIO32(CGU_BASE + 0x024)TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)SCU_SFSP1_1 SCU_SFS(PIN_GROUP1, PIN1)__SFRACT_EPSILON__ 0x1P-7HRCGU_PLLAUDIO_FRAC_PLLFRACT_CTRL(x) ((x) << CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT)SCU_SFSP5_6 SCU_SFS(PIN_GROUP5, PIN6)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXCGU_PLL0USB_STAT_FR_SHIFT (1)SCU_SFSPF_0 SCU_SFS(PIN_GROUPF, PIN0)I2C1_SCLL I2C_SCLL(I2C1)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)I2C_MASK0(port) MMIO32((port) + 0x030)CGU_PLL1_STAT_LOCK_SHIFT (0)CGU_IDIVD_CTRL_IDIV_MASK (0xf << CGU_IDIVD_CTRL_IDIV_SHIFT)__UHQ_FBIT__ 16CGU_IDIVB_CTRL_IDIV_SHIFT (2)__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXSCU_SFSP8_3 SCU_SFS(PIN_GROUP8, PIN3)CGU_IDIVA_CTRL MMIO32(CGU_BASE + 0x048)CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT (0)__UINT_FAST8_MAX__ 0xffffffffUSCU_SFSP6_9 SCU_SFS(PIN_GROUP6, PIN9)i2c0_initUINT16_C(c) __UINT16_C(c)CGU_BASE_CGU_OUT0_CLK_CLK_SEL(x) ((x) << CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT)I2C0_ADR2 I2C_ADR2(I2C0)CGU_PLL0AUDIO_CTRL_BYPASS (1 << CGU_PLL0AUDIO_CTRL_BYPASS_SHIFT)CGU_BASE_SDIO_CLK_CLK_SEL(x) ((x) << CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT)__INT_FAST16_WIDTH__ 32CGU_PLL0USB_MDIV_SELI(x) ((x) << CGU_PLL0USB_MDIV_SELI_SHIFT)INTMAX_CCGU_BASE_VADC_CLK_AUTOBLOCK_SHIFT (11)__VFP_FP__ 1SCU_SFSP3_7 SCU_SFS(PIN_GROUP3, PIN7)__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffSCU_CONF_FUNCTION5 (0x5)CGU_PLL0USB_MDIV_MDEC_SHIFT (0)I2C0_MASK3 I2C_MASK3(I2C0)__UINT_FAST16_MAX__ 0xffffffffUCGU_PLL0AUDIO_CTRL_PD_SHIFT (0)CGU_IDIVC_CTRL_PD_SHIFT (0)CGU_BASE_PHY_TX_CLK_PD_SHIFT (0)SSP1_BASE (PERIPH_BASE_APB2 + 0x05000)INT64_C(c) __INT64_C(c)SCU_SFSPD_12 SCU_SFS(PIN_GROUPD, PIN12)CGU_IDIVD_CTRL_CLK_SEL(x) ((x) << CGU_IDIVD_CTRL_CLK_SEL_SHIFT)SCU_SFSCLK3 MMIO32(SCU_BASE + 0xC0C)__GCC_IEC_559_COMPLEX 0CREG_BASE (0x40043000U)__UFRACT_MIN__ 0.0URSCU_SFSP2_8 SCU_SFS(PIN_GROUP2, PIN8)__LDBL_HAS_QUIET_NAN__ 1CGU_PLL0AUDIO_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT)WCHAR_MAX __WCHAR_MAX__CGU_BASE_M4_CLK_PD (1 << CGU_BASE_M4_CLK_PD_SHIFT)__FLT32X_HAS_INFINITY__ 1I2C_ADR2(port) MMIO32((port) + 0x024)CGU_FREQ_MON_CLK_SEL_SHIFT (24)SCU_SFSPA_1 SCU_SFS(PIN_GROUPA, PIN1)__UINT_LEAST8_TYPE__ unsigned charSCU_SFSP0_1 SCU_SFS(PIN_GROUP0, PIN1)SCU_SFSPE_6 SCU_SFS(PIN_GROUPE, PIN6)CGU_BASE_SPIFI_CLK MMIO32(CGU_BASE + 0x070)__ACCUM_FBIT__ 15CGU_PLL0USB_CTRL_PD_SHIFT (0)SCU_SFSP6_11 SCU_SFS(PIN_GROUP6, PIN11)__UACCUM_IBIT__ 16long intUINT8_MAXSCU_SFSP1_0 SCU_SFS(PIN_GROUP1, PIN0)SIZE_MAX __SIZE_MAX__CGU_PLL0USB_STAT MMIO32(CGU_BASE + 0x01C)I2C_DAT(port) MMIO32((port) + 0x008)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17CGU_PLL1_CTRL_NSEL_MASK (0x3 << CGU_PLL1_CTRL_NSEL_SHIFT)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xCGU_IDIVB_CTRL_PD (1 << CGU_IDIVB_CTRL_PD_SHIFT)PIN11 0x02CI2C1_ADR3 I2C_ADR3(I2C1)BIT13 (1<<13)__UDA_FBIT__ 32CGU_BASE (0x40050000U)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1__SQ_FBIT__ 31BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRCGU_BASE_UART3_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART3_CLK_CLK_SEL_SHIFT)CGU_IDIVA_CTRL_CLK_SEL_SHIFT (24)CGU_PLL0AUDIO_CTRL_SEL_EXT (1 << CGU_PLL0AUDIO_CTRL_SEL_EXT_SHIFT)short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)SCU_SFSP7_0 SCU_SFS(PIN_GROUP7, PIN0)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK_SHIFT (11)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)I2C_CONCLR_SIC (1 << 3)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffUI2C_MMCTRL(port) MMIO32((port) + 0x01C)__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__PIN3 0x00CLCD_BASE (PERIPH_BASE_AHB + 0x08000)CGU_BASE_OUT_CLK MMIO32(CGU_BASE + 0x0AC)SCU_SFSP2_4 SCU_SFS(PIN_GROUP2, PIN4)CGU_PLL1_CTRL_DIRECT (1 << CGU_PLL1_CTRL_DIRECT_SHIFT)SCU_SFSP2_7 SCU_SFS(PIN_GROUP2, PIN7)SCU_SFSPD_4 SCU_SFS(PIN_GROUPD, PIN4)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32SCU_SSP_IO (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_EZI_EN_IN_BUFFER | SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)__FLT32X_MIN_EXP__ (-1021)GPDMA_BASE (PERIPH_BASE_AHB + 0x02000)CGU_BASE_UART0_CLK_PD (1 << CGU_BASE_UART0_CLK_PD_SHIFT)I2C_STAT(port) MMIO32((port) + 0x004)SCU_SFSPA_0 SCU_SFS(PIN_GROUPA, PIN0)SCU_SFSPE_5 SCU_SFS(PIN_GROUPE, PIN5)CGU_BASE_PHY_RX_CLK_PD_SHIFT (0)BIT27 (1<<27)UINTMAX_MAX __UINTMAX_MAX__CGU_IDIVE_CTRL MMIO32(CGU_BASE + 0x058)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"SCU_SFSP8_0 SCU_SFS(PIN_GROUP8, PIN0)__UTA_FBIT__ 64SDIO_BASE (PERIPH_BASE_AHB + 0x04000)PIN_GROUP3 (SCU_BASE + 0x180)CGU_BASE_PHY_TX_CLK_PD (1 << CGU_BASE_PHY_TX_CLK_PD_SHIFT)__FLT_DECIMAL_DIG__ 9CGU_FREQ_MON_CLK_SEL(x) ((x) << CGU_FREQ_MON_CLK_SEL_SHIFT)__thumb__ 1CGU_BASE_SSP1_CLK MMIO32(CGU_BASE + 0x098)__VERSION__ "12.2.1 20221205"GIMA_BASE (PERIPH_BASE_APB2 + 0x07000)uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)CGU_BASE_LCD_CLK_AUTOBLOCK_SHIFT (11)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1SCU_SFS(group,pin) MMIO32((group) + (pin))SCU_CONF_FUNCTION6 (0x6)__FRACT_FBIT__ 15CGU_BASE_VADC_CLK_CLK_SEL(x) ((x) << CGU_BASE_VADC_CLK_CLK_SEL_SHIFT)__FLT_HAS_QUIET_NAN__ 1__GNUC_PATCHLEVEL__ 1CGU_BASE_SPI_CLK_AUTOBLOCK (1 << CGU_BASE_SPI_CLK_AUTOBLOCK_SHIFT)PTRDIFF_MIN__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)CGU_BASE_UART0_CLK_AUTOBLOCK (1 << CGU_BASE_UART0_CLK_AUTOBLOCK_SHIFT)CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ_SHIFT (12)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77CGU_BASE_APB3_CLK_PD_SHIFT (0)SCU_SFSP9_6 SCU_SFS(PIN_GROUP9, PIN6)__FLT64_MAX_10_EXP__ 308CGU_PLL1_CTRL_PSEL_SHIFT (8)PIN_GROUP2 (SCU_BASE + 0x100)WINT_MINI2C_DATA_BUFFER(port) MMIO32((port) + 0x02C)GPIO_PIN_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x07000)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SCU_SFSP1_5 SCU_SFS(PIN_GROUP1, PIN5)CGU_BASE_USB0_CLK_AUTOBLOCK_SHIFT (11)__FRACT_MAX__ 0X7FFFP-15RCGU_IDIVA_CTRL_IDIV_SHIFT (2)__SHRT_WIDTH__ 16INT_LEAST32_MAX __INT_LEAST32_MAX__CGU_IDIVE_CTRL_PD (1 << CGU_IDIVE_CTRL_PD_SHIFT)CGU_PLL0AUDIO_CTRL_DIRECTO_SHIFT (3)CGU_BASE_PHY_RX_CLK MMIO32(CGU_BASE + 0x078)CGU_BASE_UART0_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART0_CLK_CLK_SEL_SHIFT)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5CGU_BASE_SPIFI_CLK_PD (1 << CGU_BASE_SPIFI_CLK_PD_SHIFT)__ARM_ARCH_EXT_IDIV__SCU_SFSPD_3 SCU_SFS(PIN_GROUPD, PIN3)SCU_SFSPF_8 SCU_SFS(PIN_GROUPF, PIN8)CGU_IDIVB_CTRL_PD_SHIFT (0)CGU_PLL0USB_MDIV_SELP_MASK (0x1f << CGU_PLL0USB_MDIV_SELP_SHIFT)CGU_PLL0AUDIO_STAT_FR (1 << CGU_PLL0AUDIO_STAT_FR_SHIFT)CGU_BASE_SSP0_CLK_PD_SHIFT (0)CGU_BASE_SAFE_CLK_CLK_SEL(x) ((x) << CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT)CGU_IDIVE_CTRL_AUTOBLOCK (1 << CGU_IDIVE_CTRL_AUTOBLOCK_SHIFT)__UINT16_MAX__ 0xffffSCU_SFSPD_0 SCU_SFS(PIN_GROUPD, PIN0)CGU_PLL0USB_CTRL_AUTOBLOCK (1 << CGU_PLL0USB_CTRL_AUTOBLOCK_SHIFT)__TQ_FBIT__ 127I2C_CONSET_SI (1 << 3)SCU_SFSP4_9 SCU_SFS(PIN_GROUP4, PIN9)__USQ_FBIT__ 32CGU_BASE_UART0_CLK_AUTOBLOCK_SHIFT (11)CGU_IDIVC_CTRL_CLK_SEL_SHIFT (24)uint16_tSCU_SFSP2_10 SCU_SFS(PIN_GROUP2, PIN10)SCU_SFSP1_20 SCU_SFS(PIN_GROUP1, PIN20)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32CGU_SRC_ENET_TX 0x03PIN4 0x010CGU_BASE_SSP0_CLK MMIO32(CGU_BASE + 0x094)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__STRICT_ANSI__ 1CGU_BASE_SPI_CLK_PD (1 << CGU_BASE_SPI_CLK_PD_SHIFT)UINT_LEAST8_MAXCGU_IDIVD_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVD_CTRL_CLK_SEL_SHIFT)SCU_SFSP2_2 SCU_SFS(PIN_GROUP2, PIN2)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CGU_FREQ_MON_FCNT(x) ((x) << CGU_FREQ_MON_FCNT_SHIFT)SCU_SFSP2_6 SCU_SFS(PIN_GROUP2, PIN6)SCU_SFSP8_4 SCU_SFS(PIN_GROUP8, PIN4)__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__CGU_IDIVE_CTRL_PD_SHIFT (0)CGU_FREQ_MON_FCNT_SHIFT (9)CGU_BASE_VADC_CLK MMIO32(CGU_BASE + 0x08C)__USA_IBIT__ 16CGU_PLL0USB_CTRL_AUTOBLOCK_SHIFT (11)CGU_FREQ_MON_MEAS (1 << CGU_FREQ_MON_MEAS_SHIFT)PTRDIFF_MIN (-PTRDIFF_MAX - 1)SCU_SFSPE_13 SCU_SFS(PIN_GROUPE, PIN13)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intCGU_PLL0AUDIO_STAT_FR_SHIFT (1)I2C0_MASK2 I2C_MASK2(I2C0)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7SCU_SFSP1_4 SCU_SFS(PIN_GROUP1, PIN4)__FDPIC__I2C_ADR0(port) MMIO32((port) + 0x00C)SCU_SFSP6_10 SCU_SFS(PIN_GROUP6, PIN10)PIN12 0x030__FLT32_IS_IEC_60559__ 2PIN7 0x01CCGU_BASE_UART2_CLK_AUTOBLOCK_SHIFT (11)CGU_FREQ_MON_CLK_SEL_MASK (0x1f << CGU_FREQ_MON_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_BYPASS_SHIFT (1)INT_FAST64_MINADC0_BASE (PERIPH_BASE_APB3 + 0x03000)I2C0_CONCLR I2C_CONCLR(I2C0)SCU_SFSP2_11 SCU_SFS(PIN_GROUP2, PIN11)__LDBL_EPSILON__ 2.2204460492503131e-16LI2C_SCLL(port) MMIO32((port) + 0x014)SCU_SFSP3_0 SCU_SFS(PIN_GROUP3, PIN0)__USFRACT_MIN__ 0.0UHRSCU_SFSP7_5 SCU_SFS(PIN_GROUP7, PIN5)__ARM_NEONCGU_BASE_UART3_CLK_CLK_SEL_SHIFT (24)SCU_SFSP4_1 SCU_SFS(PIN_GROUP4, PIN1)__UINT8_MAX__ 0xffCGU_PLL0AUDIO_CTRL_AUTOBLOCK (1 << CGU_PLL0AUDIO_CTRL_AUTOBLOCK_SHIFT)CGU_BASE_APLL_CLK_PD (1 << CGU_BASE_APLL_CLK_PD_SHIFT)SCU_SFSP8_6 SCU_SFS(PIN_GROUP8, PIN6)__LDBL_MAX_EXP__ 1024SCU_CONF_FUNCTION7 (0x7)CGU_XTAL_OSC_CTRL_HF_SHIFT (2)i2c0_rx_byteCGU_PLL1_CTRL_FBSEL_SHIFT (6)__DBL_HAS_DENORM__ 1CGU_PLL0USB_MDIV_SELP(x) ((x) << CGU_PLL0USB_MDIV_SELP_SHIFT)SCU_CONF_ZIF_DIS_IN_GLITCH_FILT (BIT7)SCU_SFSP7_7 SCU_SFS(PIN_GROUP7, PIN7)I2C_READ 1CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT (24)CGU_SRC_IDIVB 0x0DCGU_BASE_PHY_RX_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT)CGU_BASE_SDIO_CLK_PD (1 << CGU_BASE_SDIO_CLK_PD_SHIFT)CGU_FREQ_MON_RCNT(x) ((x) << CGU_FREQ_MON_RCNT_SHIFT)__DA_FBIT__ 31SCU_SFSPE_11 SCU_SFS(PIN_GROUPE, PIN11)CGU_BASE_OUT_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_OUT_CLK_CLK_SEL_SHIFT)__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fffPIN5 0x014CGU_FREQ_MON_RCNT_SHIFT (0)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LCGU_XTAL_OSC_CTRL_BYPASS (1 << CGU_XTAL_OSC_CTRL_BYPASS_SHIFT)__ULLACCUM_EPSILON__ 0x1P-32ULLKCGU_BASE_SPI_CLK MMIO32(CGU_BASE + 0x074)CGU_IDIVE_CTRL_CLK_SEL_SHIFT (24)CGU_PLL0USB_NP_DIV_PDEC_MASK (0x7f << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX__CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT (12)DAC_BASE (PERIPH_BASE_APB3 + 0x01000)SCU_SFSP1_19 SCU_SFS(PIN_GROUP1, PIN19)__UINT32_C(c) c ## ULCGU_BASE_PHY_RX_CLK_AUTOBLOCK (1 << CGU_BASE_PHY_RX_CLK_AUTOBLOCK_SHIFT)__UACCUM_MIN__ 0.0UKCGU_FREQ_MON_FCNT_MASK (0x3fff << CGU_FREQ_MON_FCNT_SHIFT)SCU_SFSPA_4 SCU_SFS(PIN_GROUPA, PIN4)__FLT_EPSILON__ 1.1920928955078125e-7FCGU_BASE_SPI_CLK_CLK_SEL_SHIFT (24)SCU_SFSPE_9 SCU_SFS(PIN_GROUPE, PIN9)CGU_BASE_UART0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART0_CLK_CLK_SEL_SHIFT)SCU_ENAIO0 MMIO32(SCU_BASE + 0xC88)LPC43XX_I2C_H I2C_CONSET_AA (1 << 2)CGU_BASE_UART2_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART2_CLK_CLK_SEL_SHIFT)__ARM_ARCH_ISA_THUMBCGU_PLL0USB_CTRL_FRM_SHIFT (6)CGU_PLL0AUDIO_CTRL_CLKEN_SHIFT (4)CGU_BASE_UART1_CLK_AUTOBLOCK_SHIFT (11)__ARM_FEATURE_MATMUL_INT8SCU_SFSP8_8 SCU_SFS(PIN_GROUP8, PIN8)__GCC_ATOMIC_SHORT_LOCK_FREE 1I2C_CONCLR_STAC (1 << 5)PIN13 0x034CGU_BASE_UART3_CLK_AUTOBLOCK_SHIFT (11)SCU_SFSPD_1 SCU_SFS(PIN_GROUPD, PIN1)CGU_BASE_PHY_TX_CLK_AUTOBLOCK (1 << CGU_BASE_PHY_TX_CLK_AUTOBLOCK_SHIFT)__USACCUM_FBIT__ 8CGU_SRC_PLL1 0x09__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1CGU_BASE_CGU_OUT0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT)CGU_PLL0USB_MDIV_MDEC_MASK (0x1ffff << CGU_PLL0USB_MDIV_MDEC_SHIFT)SCU_CONF_EPUN_DIS_PULLUP (BIT4)__LACCUM_FBIT__ 31SCU_SFSPB_0 SCU_SFS(PIN_GROUPB, PIN0)SCU_SFSPC_1 SCU_SFS(PIN_GROUPC, PIN1)CGU_BASE_APB1_CLK_PD_SHIFT (0)EMC_BASE (PERIPH_BASE_AHB + 0x05000)__FLT32_HAS_QUIET_NAN__ 1SCU_SFSPE_15 SCU_SFS(PIN_GROUPE, PIN15)INT32_MAX __INT32_MAX____LDBL_HAS_INFINITY__ 1CGU_SRC_GP_CLKIN 0x04__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))CCU1_BASE (0x40051000U)__FLT32X_MAX_10_EXP__ 308I2C1_DATA_BUFFER I2C_DATA_BUFFER(I2C1)CGU_BASE_PERIPH_CLK_CLK_SEL(x) ((x) << CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT)SCU_SFSP3_3 SCU_SFS(PIN_GROUP3, PIN3)__ARM_PCS 1duty_cycle_countI2C_WRITE 0bool _Bool__FLT_MAX_EXP__ 128CGU_BASE_APB3_CLK_AUTOBLOCK (1 << CGU_BASE_APB3_CLK_AUTOBLOCK_SHIFT)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)SCU_SFSP1_10 SCU_SFS(PIN_GROUP1, PIN10)UINT_FAST16_MAX __UINT_FAST16_MAX____UINT_LEAST8_MAX__ 0xffCGU_PLL0AUDIO_MDIV_MDEC_SHIFT (0)CGU_XTAL_OSC_CTRL MMIO32(CGU_BASE + 0x018)CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT (0)SCU_SFSP1_9 SCU_SFS(PIN_GROUP1, PIN9)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)PIN6 0x018CGU_IDIVE_CTRL_CLK_SEL(x) ((x) << CGU_IDIVE_CTRL_CLK_SEL_SHIFT)INT16_MAX __INT16_MAX__CGU_IDIVA_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVA_CTRL_CLK_SEL_SHIFT)I2C1_ADR2 I2C_ADR2(I2C1)__FLT32X_IS_IEC_60559__ 2CGU_BASE_LCD_CLK MMIO32(CGU_BASE + 0x088)CGU_BASE_M4_CLK_CLK_SEL(x) ((x) << CGU_BASE_M4_CLK_CLK_SEL_SHIFT)PERIPH_BASE_APB3 (0x400E0000U)SCU_SFSPD_7 SCU_SFS(PIN_GROUPD, PIN7)SCU_SFSPC_7 SCU_SFS(PIN_GROUPC, PIN7)CGU_PLL1_CTRL_CLK_SEL_SHIFT (24)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXCGU_PLL1_STAT MMIO32(CGU_BASE + 0x040)SCU_SFSPE_8 SCU_SFS(PIN_GROUPE, PIN8)__INT_LEAST16_WIDTH__ 16I2S0_BASE (PERIPH_BASE_APB1 + 0x02000)SCU_LCD (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_EZI_EN_IN_BUFFER | SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)__DEC_EVAL_METHOD__ 2SCT_BASE (PERIPH_BASE_AHB + 0x00000)__ARM_FEATURE_FP16_FMLCGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT (24)CGU_PLL0USB_MDIV_MDEC(x) ((x) << CGU_PLL0USB_MDIV_MDEC_SHIFT)CGU_BASE_UART3_CLK_PD_SHIFT (0)SCU_SFSP1_8 SCU_SFS(PIN_GROUP1, PIN8)INT16_MIN (-INT16_MAX - 1)i2c0_stopSCU_PINTSEL1 MMIO32(SCU_BASE + 0xE04)SCU_SFSP7_3 SCU_SFS(PIN_GROUP7, PIN3)CGU_IDIVD_CTRL MMIO32(CGU_BASE + 0x054)CGU_BASE_USB0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_USB0_CLK_CLK_SEL_SHIFT)CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT (24)SCU_BASE (PERIPH_BASE_APB0 + 0x06000)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKCGU_IDIVD_CTRL_AUTOBLOCK_SHIFT (11)CGU_BASE_SSP0_CLK_AUTOBLOCK (1 << CGU_BASE_SSP0_CLK_AUTOBLOCK_SHIFT)SCU_SCL_ZIF_DIS (BIT7)CGU_IDIVC_CTRL_PD (1 << CGU_IDIVC_CTRL_PD_SHIFT)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULUSART0_BASE (PERIPH_BASE_APB0 + 0x01000)I2C1_MASK3 I2C_MASK3(I2C1)__INT_LEAST8_MAX__ 0x7fSCU_SFSPF_10 SCU_SFS(PIN_GROUPF, PIN10)/build/libopencm3/lib/lpc43xx/m0__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXi2c0_tx_byteCGU_SRC_IRC 0x01PIN_GROUPC (SCU_BASE + 0x600)__UINT64_TYPE__ long long unsigned intCGU_BASE_SAFE_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024CGU_IDIVC_CTRL_AUTOBLOCK_SHIFT (11)SCU_SFSPD_2 SCU_SFS(PIN_GROUPD, PIN2)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)CGU_BASE_APLL_CLK_AUTOBLOCK (1 << CGU_BASE_APLL_CLK_AUTOBLOCK_SHIFT)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15KSCU_SFSP2_3 SCU_SFS(PIN_GROUP2, PIN3)__INT8_MAX__ 0x7fCGU_OUTCLK_21_CTRL MMIO32(CGU_BASE + 0x0B0)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNEDUSB1_BASE (PERIPH_BASE_AHB + 0x07000)BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intCGU_PLL0USB_CTRL_CLKEN (1 << CGU_PLL0USB_CTRL_CLKEN_SHIFT)CGU_IDIVB_CTRL_CLK_SEL_SHIFT (24)SCU_SFSP4_5 SCU_SFS(PIN_GROUP4, PIN5)__SOFTFP__ 1SCU_CONF_EHD_NORMAL_DRIVE_20MILLIA (0x300)UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0SCU_SFSPC_6 SCU_SFS(PIN_GROUPC, PIN6)__SCHAR_WIDTH__ 8CGU_PLL0AUDIO_NP_DIV_PDEC_MASK (0x7f << CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT)BIT18 (1<<18)UINT_FAST16_MAXSCU_SFSP2_1 SCU_SFS(PIN_GROUP2, PIN1)__UINT_FAST8_TYPE__ unsigned intCGU_BASE_UART1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART1_CLK_CLK_SEL_SHIFT)__LLACCUM_IBIT__ 32SCU_SFSP2_5 SCU_SFS(PIN_GROUP2, PIN5)__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)CGU_PLL1_CTRL_MSEL_MASK (0xff << CGU_PLL1_CTRL_MSEL_SHIFT)SCU_SFSP2_9 SCU_SFS(PIN_GROUP2, PIN9)__INT32_MAX__ 0x7fffffffLSCU_SFSP7_2 SCU_SFS(PIN_GROUP7, PIN2)CGU_PLL0AUDIO_STAT_LOCK (1 << CGU_PLL0AUDIO_STAT_LOCK_SHIFT)UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLLSCU_CONF_EHD_NORMAL_DRIVE_8MILLIA (0x100)__ARM_FEATURE_BF16_VECTOR_ARITHMETICCGU_IDIVA_CTRL_CLK_SEL(x) ((x) << CGU_IDIVA_CTRL_CLK_SEL_SHIFT)CGU_BASE_PERIPH_CLK_AUTOBLOCK_SHIFT (11)__FLT32_MANT_DIG__ 24CGU_IDIVA_CTRL_PD_SHIFT (0)INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32EVENTROUTER_BASE (0x40044000U)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__CGU_IDIVD_CTRL_PD_SHIFT (0)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1SCU_SFSPF_6 SCU_SFS(PIN_GROUPF, PIN6)__DBL_MAX_EXP__ 1024SCU_SCL_EHD (BIT2)__ATOMIC_RELEASE 3SCU_SFSUSB MMIO32(SCU_BASE + 0xC80)UINT_FAST8_MAX__FLT_MANT_DIG__ 24SCU_SFSPC_13 SCU_SFS(PIN_GROUPC, PIN13)CGU_BASE_APLL_CLK_CLK_SEL_SHIFT (24)__UDQ_IBIT__ 0CCU2_BASE (0x40052000U)__OPTIMIZE__ 1CGU_BASE_SSP0_CLK_PD (1 << CGU_BASE_SSP0_CLK_PD_SHIFT)__UACCUM_MAX__ 0XFFFFFFFFP-16UKCGU_BASE_APB3_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APB3_CLK_CLK_SEL_SHIFT)SCU_SFSPD_5 SCU_SFS(PIN_GROUPD, PIN5)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64PERIPH_BASE_APB1 (0x400A0000U)CGU_BASE_SDIO_CLK_AUTOBLOCK (1 << CGU_BASE_SDIO_CLK_AUTOBLOCK_SHIFT)UINTPTR_MAXSCU_ENAIO2 MMIO32(SCU_BASE + 0xC90)PIN_GROUPD (SCU_BASE + 0x680)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LTIMER3_BASE (PERIPH_BASE_APB2 + 0x04000)__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0CGU_IDIVA_CTRL_IDIV(x) ((x) << CGU_IDIVA_CTRL_IDIV_SHIFT)I2C0_DATA_BUFFER I2C_DATA_BUFFER(I2C0)SCU_SFSPF_1 SCU_SFS(PIN_GROUPF, PIN1)SPI_PORT_BASE (0x40100000U)CGU_BASE_LCD_CLK_PD (1 << CGU_BASE_LCD_CLK_PD_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))CGU_PLL0USB_NP_DIV_PDEC_SHIFT (0)PIN16 0x040SCU_SFSP9_2 SCU_SFS(PIN_GROUP9, PIN2)LPC43XX 1SCU_SFSPC_3 SCU_SFS(PIN_GROUPC, PIN3)__GNUC__ 12SCU_SFSP6_0 SCU_SFS(PIN_GROUP6, PIN0)CGU_BASE_UART1_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART1_CLK_CLK_SEL_SHIFT)WCHAR_MAXSCU_SFSPB_6 SCU_SFS(PIN_GROUPB, PIN6)__LONG_WIDTH__ 32CGU_BASE_OUT_CLK_AUTOBLOCK (1 << CGU_BASE_OUT_CLK_AUTOBLOCK_SHIFT)__FLT_MAX__ 3.4028234663852886e+38FI2C1_CONCLR I2C_CONCLR(I2C1)__UACCUM_FBIT__ 16SCU_SFSPE_10 SCU_SFS(PIN_GROUPE, PIN10)CGU_XTAL_OSC_CTRL_ENABLE_SHIFT (0)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__USFRACT_EPSILON__ 0x1P-8UHR__ARM_ARCH 6SCU_SFSP1_15 SCU_SFS(PIN_GROUP1, PIN15)CGU_BASE_PHY_RX_CLK_PD (1 << CGU_BASE_PHY_RX_CLK_PD_SHIFT)__FLT_RADIX__ 2BIT3 (1<<3)long long intCGU_SRC_IDIVE 0x10__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXSCU_SFSP6_12 SCU_SFS(PIN_GROUP6, PIN12)SGPIO_PORT_BASE (0x40101000U)I2C_MASK3(port) MMIO32((port) + 0x03C)CGU_PLL0USB_MDIV_SELI_MASK (0x3f << CGU_PLL0USB_MDIV_SELI_SHIFT)PERIPH_BASE_APB0 (0x40080000U)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)CGU_FREQ_MON_MEAS_SHIFT (23)I2C0_MMCTRL I2C_MMCTRL(I2C0)CGU_PLL0USB_CTRL_DIRECTO (1 << CGU_PLL0USB_CTRL_DIRECTO_SHIFT)CGU_BASE_APB1_CLK MMIO32(CGU_BASE + 0x080)CGU_IDIVE_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVE_CTRL_CLK_SEL_SHIFT)__UINT_FAST64_MAX__ 0xffffffffffffffffULLCGU_BASE_M4_CLK_AUTOBLOCK_SHIFT (11)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1CGU_BASE_USB1_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_CTRL MMIO32(CGU_BASE + 0x030)BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xSCU_SFSP3_2 SCU_SFS(PIN_GROUP3, PIN2)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024CGU_BASE_SAFE_CLK_PD_SHIFT (0)UINT16_MAXI2C_MASK2(port) MMIO32((port) + 0x038)CGU_PLL0USB_NP_DIV_PDEC(x) ((x) << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLSCU_SFSP3_6 SCU_SFS(PIN_GROUP3, PIN6)SCU_SFSPD_6 SCU_SFS(PIN_GROUPD, PIN6)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intCGU_BASE_VADC_CLK_AUTOBLOCK (1 << CGU_BASE_VADC_CLK_AUTOBLOCK_SHIFT)__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4CGU_BASE_LCD_CLK_AUTOBLOCK (1 << CGU_BASE_LCD_CLK_AUTOBLOCK_SHIFT)CGU_BASE_USB1_CLK MMIO32(CGU_BASE + 0x068)SCU_SFSP1_16 SCU_SFS(PIN_GROUP1, PIN16)CGU_PLL1_CTRL_CLK_SEL(x) ((x) << CGU_PLL1_CTRL_CLK_SEL_SHIFT)SCU_CONF_EHS_FAST (BIT5)__UFRACT_MAX__ 0XFFFFP-16URSCU_SFSPC_12 SCU_SFS(PIN_GROUPC, PIN12)INT64_MAXCGU_BASE_USB1_CLK_PD_SHIFT (0)CGU_PLL0AUDIO_STAT_LOCK_SHIFT (0)CGU_IDIVA_CTRL_AUTOBLOCK (1 << CGU_IDIVA_CTRL_AUTOBLOCK_SHIFT)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0CGU_BASE_USB1_CLK_CLK_SEL(x) ((x) << CGU_BASE_USB1_CLK_CLK_SEL_SHIFT)SPIFI_BASE (PERIPH_BASE_AHB + 0x03000)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__CGU_BASE_APB3_CLK_AUTOBLOCK_SHIFT (11)__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)CGU_XTAL_OSC_CTRL_BYPASS_SHIFT (1)CGU_FREQ_MON MMIO32(CGU_BASE + 0x014)__LDBL_MAX_10_EXP__ 308CGU_BASE_UART0_CLK_PD_SHIFT (0)SCU_SFSPC_2 SCU_SFS(PIN_GROUPC, PIN2)__INT_FAST32_TYPE__ intCGU_BASE_UART3_CLK_PD (1 << CGU_BASE_UART3_CLK_PD_SHIFT)unsigned intCGU_BASE_SPI_CLK_PD_SHIFT (0)__GCC_ASM_FLAG_OUTPUTS__I2C_CONCLR(port) MMIO32((port) + 0x018)SCU_SFSP3_1 SCU_SFS(PIN_GROUP3, PIN1)CGU_IDIVD_CTRL_AUTOBLOCK (1 << CGU_IDIVD_CTRL_AUTOBLOCK_SHIFT)__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1SCU_SFSP7_6 SCU_SFS(PIN_GROUP7, PIN6)CGU_PLL1_CTRL_PSEL(x) ((x) << CGU_PLL1_CTRL_PSEL_SHIFT)CGU_BASE_APB1_CLK_AUTOBLOCK_SHIFT (11)SCU_SFSP1_17 SCU_SFS(PIN_GROUP1, PIN17)PIN_GROUP7 (SCU_BASE + 0x380)__USACCUM_IBIT__ 8CGU_PLL0USB_CTRL_BYPASS_SHIFT (1)PIN18 0x048__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKCGU_BASE_OUT_CLK_CLK_SEL_SHIFT (24)SCU_SFSP4_6 SCU_SFS(PIN_GROUP4, PIN6)__FLT_EVAL_METHOD__ 0I2C_SCLH(port) MMIO32((port) + 0x010)CGU_OUTCLK_24_CTRL MMIO32(CGU_BASE + 0x0BC)GPIO_PORT_BASE (0x400F4000U)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32I2C0_MASK0 I2C_MASK0(I2C0)__thumb2__PIN_GROUPF (SCU_BASE + 0x780)CGU_IDIVB_CTRL_AUTOBLOCK_SHIFT (11)__ARM_FEATURE_LDREXSCU_SFSPC_5 SCU_SFS(PIN_GROUPC, PIN5)__UQQ_FBIT__ 8OTP_BASE (0x40045000U)CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK (1 << CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK_SHIFT)INT16_CCGU_PLL0USB_CTRL_FRM (1 << CGU_PLL0USB_CTRL_FRM_SHIFT)__ARM_FP16_ARGS__GCC_IEC_559 0SCU_SFSP9_4 SCU_SFS(PIN_GROUP9, PIN4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__I2C1_SCLH I2C_SCLH(I2C1)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1i2c0_tx_startCGU_BASE_USB0_CLK_PD_SHIFT (0)SCU_SFSP1_6 SCU_SFS(PIN_GROUP1, PIN6)SCU_SFSPD_9 SCU_SFS(PIN_GROUPD, PIN9)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned charCGU_BASE_APB1_CLK_CLK_SEL(x) ((x) << CGU_BASE_APB1_CLK_CLK_SEL_SHIFT)SCU_GPIO_PUP (SCU_CONF_EZI_EN_IN_BUFFER)__SIG_ATOMIC_TYPE__ intCGU_PLL0USB_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT)SCU_SFSP4_8 SCU_SFS(PIN_GROUP4, PIN8)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINSCU_SFSP1_18 SCU_SFS(PIN_GROUP1, PIN18)SCU_SFSPF_5 SCU_SFS(PIN_GROUPF, PIN5)true 1I2C1_CONSET I2C_CONSET(I2C1)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)SCU_SFSP4_3 SCU_SFS(PIN_GROUP4, PIN3)bytePIN_GROUP8 (SCU_BASE + 0x400)I2C_CONCLR_I2ENC (1 << 6)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GCC_ATOMIC_CHAR_LOCK_FREE 1CGU_BASE_APB3_CLK_CLK_SEL_SHIFT (24)SCU_SFSPC_11 SCU_SFS(PIN_GROUPC, PIN11)CGU_PLL1_CTRL_PD (1 << CGU_PLL1_CTRL_PD_SHIFT)__LFRACT_EPSILON__ 0x1P-31LRI2C_CONSET_STA (1 << 5)CGU_PLLAUDIO_FRAC MMIO32(CGU_BASE + 0x03C)CGU_OUTCLK_22_CTRL MMIO32(CGU_BASE + 0x0B4)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xSCU_SDA_EHD (BIT10)__arm__ 1INT_FAST64_MAXCGU_BASE_SSP0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT)CGU_BASE_CGU_OUT1_CLK_PD_SHIFT (0)__FLT32_MIN_10_EXP__ (-37)CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT (24)MMIO64(addr) (*(volatile uint64_t *)(addr))CGU_PLL1_CTRL_MSEL(x) ((x) << CGU_PLL1_CTRL_MSEL_SHIFT)CGU_PLL0USB_MDIV_SELI_SHIFT (22)__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MINSCU_SFSPC_0 SCU_SFS(PIN_GROUPC, PIN0)CGU_BASE_USB0_CLK_CLK_SEL_SHIFT (24)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)CGU_PLL1_CTRL_BYPASS (1 << CGU_PLL1_CTRL_BYPASS_SHIFT)CGU_BASE_UART2_CLK_CLK_SEL_SHIFT (24)CGU_BASE_UART2_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART2_CLK_CLK_SEL_SHIFT)__TA_IBIT__ 64SCU_GPIO_FAST (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EHS_FAST | SCU_CONF_EZI_EN_IN_BUFFER | SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT (24)CGU_BASE_USB1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_USB1_CLK_CLK_SEL_SHIFT)PERIPH_BASE_AHB (0x40000000U)CGU_IDIVC_CTRL_IDIV_SHIFT (2)CGU_XTAL_OSC_CTRL_HF (1 << CGU_XTAL_OSC_CTRL_HF_SHIFT)__ARM_FEATURE_QRDMXCGU_IDIVD_CTRL_IDIV_SHIFT (2)CGU_PLL0USB_MDIV_SELR_MASK (0xf << CGU_PLL0USB_MDIV_SELR_SHIFT)CGU_BASE_M4_CLK_CLK_SEL_SHIFT (24)__ARM_ARCH_ISA_THUMB 1I2C0_SCLH I2C_SCLH(I2C0)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32CGU_BASE_PHY_TX_CLK_CLK_SEL(x) ((x) << CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__CGU_BASE_CGU_OUT0_CLK MMIO32(CGU_BASE + 0x0C4)SCU_SFSI2C0 MMIO32(SCU_BASE + 0xC84)I2C0_ADR1 I2C_ADR1(I2C0)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)SCU_SFSP6_3 SCU_SFS(PIN_GROUP6, PIN3)__LDBL_HAS_DENORM__ 1SCU_EMCDELAYCLK MMIO32(SCU_BASE + 0xD00)CGU_IDIVC_CTRL_AUTOBLOCK (1 << CGU_IDIVC_CTRL_AUTOBLOCK_SHIFT)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO_GROUP1_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x09000)CGU_PLL0USB_NP_DIV_NDEC_MASK (0x3ff << CGU_PLL0USB_NP_DIV_NDEC_SHIFT)CGU_PLL1_STAT_LOCK (1 << CGU_PLL1_STAT_LOCK_SHIFT)__FLT32_DIG__ 6INT_LEAST16_MAXCGU_BASE_M4_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_M4_CLK_CLK_SEL_SHIFT)CGU_PLL0USB_STAT_LOCK (1 << CGU_PLL0USB_STAT_LOCK_SHIFT)CGU_IDIVD_CTRL_PD (1 << CGU_IDIVD_CTRL_PD_SHIFT)BIT15 (1<<15)BACKUP_REG_BASE (0x40041000U)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sectionsSCU_SFSP9_0 SCU_SFS(PIN_GROUP9, PIN0)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1GPIO_GROUP0_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x08000)CGU_BASE_SAFE_CLK_PD (1 << CGU_BASE_SAFE_CLK_PD_SHIFT)INT32_MAXSCU_SFSP5_5 SCU_SFS(PIN_GROUP5, PIN5)__ACCUM_MIN__ (-0X1P15K-0X1P15K)PIN8 0x020__ARM_FEATURE_CRYPTOCGU_IDIVB_CTRL_CLK_SEL(x) ((x) << CGU_IDIVB_CTRL_CLK_SEL_SHIFT)__INT_LEAST32_TYPE__ long intCGU_BASE_LCD_CLK_CLK_SEL(x) ((x) << CGU_BASE_LCD_CLK_CLK_SEL_SHIFT)SCU_SFSPE_12 SCU_SFS(PIN_GROUPE, PIN12)SCU_SFSPE_4 SCU_SFS(PIN_GROUPE, PIN4)CGU_PLL0AUDIO_MDIV_MDEC_MASK (0x1ffff << CGU_PLL0AUDIO_MDIV_MDEC_SHIFT)CGU_BASE_UART1_CLK_CLK_SEL_SHIFT (24)CGU_BASE_APB1_CLK_CLK_SEL_SHIFT (24)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLCGU_BASE_CGU_OUT0_CLK_PD (1 << CGU_BASE_CGU_OUT0_CLK_PD_SHIFT)__FRACT_IBIT__ 0I2C1_BASE (PERIPH_BASE_APB3 + 0x00000)I2C1_DAT I2C_DAT(I2C1)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2CGU_SRC_IDIVA 0x0CBIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned intSCU_SFSP3_5 SCU_SFS(PIN_GROUP3, PIN5)__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)CGU_BASE_USB0_CLK MMIO32(CGU_BASE + 0x060)__ULACCUM_IBIT__ 32I2C1 I2C1_BASE__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2SCU_SFSPF_4 SCU_SFS(PIN_GROUPF, PIN4)__PTRDIFF_TYPE__ int__APCS_32__ 1__DQ_FBIT__ 63CGU_BASE_APB3_CLK_CLK_SEL(x) ((x) << CGU_BASE_APB3_CLK_CLK_SEL_SHIFT)INT_LEAST64_MAX__SACCUM_IBIT__ 8CGU_BASE_SSP1_CLK_AUTOBLOCK (1 << CGU_BASE_SSP1_CLK_AUTOBLOCK_SHIFT)__UHQ_IBIT__ 0CGU_BASE_SPI_CLK_CLK_SEL(x) ((x) << CGU_BASE_SPI_CLK_CLK_SEL_SHIFT)INT_LEAST8_MINPIN0 0x000I2C1_MMCTRL I2C_MMCTRL(I2C1)BIT29 (1<<29)__INT_FAST16_TYPE__ intSCU_SFSP6_2 SCU_SFS(PIN_GROUP6, PIN2)PIN14 0x038INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15I2C1_MASK0 I2C_MASK0(I2C1)__UTQ_FBIT__ 128SCU_CONF_FUNCTION0 (0x0)CGU_PLL0AUDIO_CTRL_MOD_PD_SHIFT (14)__LLACCUM_EPSILON__ 0x1P-31LLK__FINITE_MATH_ONLY__ 0CGU_PLL1_CTRL_AUTOBLOCK_SHIFT (11)__INT_FAST16_MAX__ 0x7fffffffSCU_SFSPC_14 SCU_SFS(PIN_GROUPC, PIN14)PIN_GROUP9 (SCU_BASE + 0x480)CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT (24)PIN_GROUPA (SCU_BASE + 0x500)PTRDIFF_MAX __PTRDIFF_MAX__CGU_BASE_UART2_CLK_PD (1 << CGU_BASE_UART2_CLK_PD_SHIFT)CGU_BASE_VADC_CLK_PD (1 << CGU_BASE_VADC_CLK_PD_SHIFT)I2C1_MASK1 I2C_MASK1(I2C1)SCU_GPIO_PDN (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EZI_EN_IN_BUFFER)CGU_BASE_SAFE_CLK MMIO32(CGU_BASE + 0x05C)CGU_PLL0USB_CTRL_DIRECTI (1 << CGU_PLL0USB_CTRL_DIRECTI_SHIFT)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKSCU_SFSPD_15 SCU_SFS(PIN_GROUPD, PIN15)CGU_BASE_M4_CLK_AUTOBLOCK (1 << CGU_BASE_M4_CLK_AUTOBLOCK_SHIFT)CGU_PLL1_CTRL_BYPASS_SHIFT (1)CGU_IDIVE_CTRL_IDIV_SHIFT (2)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRCGU_BASE_UART0_CLK MMIO32(CGU_BASE + 0x09C)CGU_PLL0USB_CTRL_DIRECTI_SHIFT (2)CGU_BASE_USB0_CLK_PD (1 << CGU_BASE_USB0_CLK_PD_SHIFT)__DQ_IBIT__ 0I2C_CONSET_STO (1 << 4)__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intCGU_BASE_SDIO_CLK MMIO32(CGU_BASE + 0x090)CGU_PLL0USB_MDIV_SELR_SHIFT (28)CGU_BASE_APB3_CLK_PD (1 << CGU_BASE_APB3_CLK_PD_SHIFT)SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)SCU_SFSPE_14 SCU_SFS(PIN_GROUPE, PIN14)SCU_SFSP2_0 SCU_SFS(PIN_GROUP2, PIN0)SCU_SFSP6_8 SCU_SFS(PIN_GROUP6, PIN8)QEI_BASE (PERIPH_BASE_APB2 + 0x06000)WCHAR_MINSCU_SFSP3_4 SCU_SFS(PIN_GROUP3, PIN4)CGU_SRC_ENET_RX 0x02SCU_CLK_OUT (SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EHS_FAST | SCU_CONF_EZI_EN_IN_BUFFER | SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)BEGIN_DECLS CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK (1 << CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK_SHIFT)SCU_SFSPE_1 SCU_SFS(PIN_GROUPE, PIN1)SCU_SFSP1_13 SCU_SFS(PIN_GROUP1, PIN13)SCU_SFSCLK1 MMIO32(SCU_BASE + 0xC04)SCU_SFSP9_5 SCU_SFS(PIN_GROUP9, PIN5)CGU_IDIVA_CTRL_IDIV_MASK (0x3 << CGU_IDIVA_CTRL_IDIV_SHIFT)CGU_IDIVD_CTRL_IDIV(x) ((x) << CGU_IDIVD_CTRL_IDIV_SHIFT)SCU_SFSPF_2 SCU_SFS(PIN_GROUPF, PIN2)__FLT64_MAX__ 1.7976931348623157e+308F64CGU_BASE_SAFE_CLK_AUTOBLOCK_SHIFT (11)SCU_SFSPD_8 SCU_SFS(PIN_GROUPD, PIN8)CGU_BASE_UART1_CLK_PD (1 << CGU_BASE_UART1_CLK_PD_SHIFT)CGU_BASE_UART3_CLK MMIO32(CGU_BASE + 0x0A8)SCU_SFSP5_0 SCU_SFS(PIN_GROUP5, PIN0)CGU_BASE_SDIO_CLK_AUTOBLOCK_SHIFT (11)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15CGU_BASE_CGU_OUT1_CLK MMIO32(CGU_BASE + 0x0C8)__FLT32X_MAX__ 1.7976931348623157e+308F32xPIN1 0x004CGU_PLL0USB_STAT_LOCK_SHIFT (0)__ARM_EABI__ 1SCU_SFSCLK2 MMIO32(SCU_BASE + 0xC08)INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1CGU_BASE_USB0_CLK_AUTOBLOCK (1 << CGU_BASE_USB0_CLK_AUTOBLOCK_SHIFT)CGU_BASE_APB1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APB1_CLK_CLK_SEL_SHIFT)CGU_SRC_PLL0AUDIO 0x08USART3_BASE (PERIPH_BASE_APB2 + 0x02000)PIN15 0x03CSCU_SFSPD_11 SCU_SFS(PIN_GROUPD, PIN11)SCU_SCL_EFP (BIT0)__QQ_IBIT__ 0SCU_SFSPD_16 SCU_SFS(PIN_GROUPD, PIN16)CGU_IDIVC_CTRL MMIO32(CGU_BASE + 0x050)CGU_PLL0AUDIO_NP_DIV MMIO32(CGU_BASE + 0x038)SCU_SDA_ZIF_DIS (BIT15)CGU_BASE_OUT_CLK_PD_SHIFT (0)CGU_SRC_PLL0USB 0x07__LLACCUM_FBIT__ 31CGU_BASE_UART2_CLK_PD_SHIFT (0)__UINTMAX_TYPE__ long long unsigned intCGU_PLL1_CTRL_AUTOBLOCK (1 << CGU_PLL1_CTRL_AUTOBLOCK_SHIFT)CGU_BASE_PHY_TX_CLK_AUTOBLOCK_SHIFT (11)__USQ_IBIT__ 0CGU_PLL0USB_NP_DIV_NDEC_SHIFT (12)__UINT_LEAST32_TYPE__ long unsigned intSCU_SFSP7_4 SCU_SFS(PIN_GROUP7, PIN4)CGU_SRC_XTAL 0x06__ARM_FEATURE_NUMERIC_MAXMINPIN_GROUP0 (SCU_BASE + 0x000)__INTMAX_TYPE__ long long intSCU_CONF_EZI_EN_IN_BUFFER (BIT6)__GCC_ATOMIC_INT_LOCK_FREE 1I2C0 I2C0_BASECGU_IDIVC_CTRL_CLK_SEL(x) ((x) << CGU_IDIVC_CTRL_CLK_SEL_SHIFT)I2C0_STAT I2C_STAT(I2C0)SCU_SFSPB_3 SCU_SFS(PIN_GROUPB, PIN3)CGU_BASE_SPI_CLK_AUTOBLOCK_SHIFT (11)INTMAX_MAXSCU_SFSP1_14 SCU_SFS(PIN_GROUP1, PIN14)CGU_BASE_SPI_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SPI_CLK_CLK_SEL_SHIFT)TIMER2_BASE (PERIPH_BASE_APB2 + 0x03000)SCU_SFSPC_4 SCU_SFS(PIN_GROUPC, PIN4)SCU_SFSP6_1 SCU_SFS(PIN_GROUP6, PIN1)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1CGU_PLL1_CTRL_MSEL_SHIFT (16)SCU_SFSP6_7 SCU_SFS(PIN_GROUP6, PIN7)I2C_CONSET_I2EN (1 << 6)CGU_LPC43XX_CGU_H __LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CSCU_SFSP4_4 SCU_SFS(PIN_GROUP4, PIN4)CGU_BASE_SSP0_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_NP_DIV_NDEC_MASK (0x3ff << CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT)CGU_PLL1_CTRL MMIO32(CGU_BASE + 0x044)SCU_SFSPE_0 SCU_SFS(PIN_GROUPE, PIN0)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intCGU_BASE_APB1_CLK_AUTOBLOCK (1 << CGU_BASE_APB1_CLK_AUTOBLOCK_SHIFT)CGU_IDIVC_CTRL_IDIV_MASK (0xf << CGU_IDIVC_CTRL_IDIV_SHIFT)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRSCU_SFSP1_12 SCU_SFS(PIN_GROUP1, PIN12)__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4PMC_BASE (0x40042000U)CGU_BASE_UART2_CLK MMIO32(CGU_BASE + 0x0A4)__INT64_C(c) c ## LL__LACCUM_IBIT__ 32SCU_SDA_EFP (BIT8)__LDBL_MIN_10_EXP__ (-307)CGU_BASE_SSP1_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ (1 << CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ_SHIFT)UART1_BASE (PERIPH_BASE_APB0 + 0x02000)__LONG_MAX__ 0x7fffffffLCGU_PLL0AUDIO_NP_DIV_NDEC(x) ((x) << CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16SCU_SFSPA_3 SCU_SFS(PIN_GROUPA, PIN3)CGU_BASE_SPIFI_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT)CGU_PLL1_CTRL_PD_SHIFT (0)CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT (24)CGU_BASE_USB1_CLK_CLK_SEL_SHIFT (24)__GCC_DESTRUCTIVE_SIZE 64I2C_CONSET(port) MMIO32((port) + 0x000)CGU_BASE_VADC_CLK_CLK_SEL_SHIFT (24)short intI2C0_DAT I2C_DAT(I2C0)CGU_BASE_APB1_CLK_PD (1 << CGU_BASE_APB1_CLK_PD_SHIFT)CGU_BASE_USB1_CLK_AUTOBLOCK (1 << CGU_BASE_USB1_CLK_AUTOBLOCK_SHIFT)__UINT16_C(c) cCGU_OUTCLK_23_CTRL MMIO32(CGU_BASE + 0x0B8)CGU_PLL0AUDIO_CTRL_CLK_SEL(x) ((x) << CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT)__UDA_IBIT__ 32PIN_GROUP1 (SCU_BASE + 0x080)UINT_LEAST32_MAXCGU_BASE_APLL_CLK_PD_SHIFT (0)SCU_SFSPB_2 SCU_SFS(PIN_GROUPB, PIN2)BIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCCGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_MASK (0x3fffff << CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT)CGU_BASE_VADC_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_VADC_CLK_CLK_SEL_SHIFT)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53CGU_IDIVE_CTRL_IDIV_MASK (0xff << CGU_IDIVE_CTRL_IDIV_SHIFT)SCU_SFSP6_6 SCU_SFS(PIN_GROUP6, PIN6)CGU_PLL0AUDIO_CTRL_DIRECTI (1 << CGU_PLL0AUDIO_CTRL_DIRECTI_SHIFT)BIT5 (1<<5)CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT (24)BIT1 (1<<1)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1SCU_SFSP4_10 SCU_SFS(PIN_GROUP4, PIN10)__DBL_DECIMAL_DIG__ 17CGU_BASE_SSP1_CLK_PD_SHIFT (0)BIT8 (1<<8)CGU_BASE_SSP1_CLK_CLK_SEL(x) ((x) << CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT)SCU_SFSP8_2 SCU_SFS(PIN_GROUP8, PIN2)INT16_C(c) __INT16_C(c)PIN_GROUP6 (SCU_BASE + 0x300)CGU_BASE_SPIFI_CLK_PD_SHIFT (0)SCU_SFSP9_3 SCU_SFS(PIN_GROUP9, PIN3)SCU_CONF_EPD_EN_PULLDOWN (BIT3)CGU_BASE_CGU_OUT1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT)__INT16_MAX__ 0x7fffI2C0_CONSET I2C_CONSET(I2C0)CGU_BASE_PERIPH_CLK MMIO32(CGU_BASE + 0x064)PIN_GROUP4 (SCU_BASE + 0x200)SCU_SFSPF_11 SCU_SFS(PIN_GROUPF, PIN11)CGU_XTAL_OSC_CTRL_ENABLE (1 << CGU_XTAL_OSC_CTRL_ENABLE_SHIFT)__INT_WIDTH__ 32SCU_EMC_IO (SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EHS_FAST | SCU_CONF_EZI_EN_IN_BUFFER | SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)SCU_SCL_EZI_EN (BIT3)CGU_IDIVA_CTRL_AUTOBLOCK_SHIFT (11)I2C0_ADR0 I2C_ADR0(I2C0)CGU_BASE_UART1_CLK MMIO32(CGU_BASE + 0x0A0)I2C_CONCLR_AAC (1 << 2)RITIMER_BASE (PERIPH_BASE_APB2 + 0x00000)CGU_SRC_IDIVD 0x0F__SIG_ATOMIC_WIDTH__ 32SCU_I2C0_NOMINAL (SCU_SCL_EZI_EN | SCU_SDA_EZI_EN)__FLT64_EPSILON__ 2.2204460492503131e-16F64SCU_PINTSEL0 MMIO32(SCU_BASE + 0xE00)SCU_SFSPC_9 SCU_SFS(PIN_GROUPC, PIN9)SCU_SFSPF_3 SCU_SFS(PIN_GROUPF, PIN3)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32CGU_PLL1_CTRL_NSEL(x) ((x) << CGU_PLL1_CTRL_NSEL_SHIFT)SCU_SFSPF_7 SCU_SFS(PIN_GROUPF, PIN7)RGU_BASE (0x40053000U)CGU_BASE_M4_CLK MMIO32(CGU_BASE + 0x06C)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0SCU_SFSP3_8 SCU_SFS(PIN_GROUP3, PIN8)__SIZEOF_WINT_T__ 4CGU_BASE_LCD_CLK_PD_SHIFT (0)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17CGU_PLL0AUDIO_CTRL_MOD_PD (1 << CGU_PLL0AUDIO_CTRL_MOD_PD_SHIFT)I2C_ADR1(port) MMIO32((port) + 0x020)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1CGU_IDIVC_CTRL_IDIV(x) ((x) << CGU_IDIVC_CTRL_IDIV_SHIFT)__FLT32X_HAS_DENORM__ 1CGU_IDIVB_CTRL_IDIV_MASK (0xf << CGU_IDIVB_CTRL_IDIV_SHIFT)__ULLACCUM_MIN__ 0.0ULLKSCU_SFSP5_4 SCU_SFS(PIN_GROUP5, PIN4)__INT_FAST32_WIDTH__ 32I2C0_SCLL I2C_SCLL(I2C0)CGU_IDIVE_CTRL_IDIV(x) ((x) << CGU_IDIVE_CTRL_IDIV_SHIFT)SCU_CONF_FUNCTION2 (0x2)SCU_SFSP6_5 SCU_SFS(PIN_GROUP6, PIN5)CGU_PLL0AUDIO_STAT MMIO32(CGU_BASE + 0x02C)PIN20 0x050CGU_IDIVB_CTRL MMIO32(CGU_BASE + 0x04C)CGU_PLL0AUDIO_MDIV_MDEC(x) ((x) << CGU_PLL0AUDIO_MDIV_MDEC_SHIFT)PIN17 0x044SCU_UART_RX_TX (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EZI_EN_IN_BUFFER)CGU_BASE_PERIPH_CLK_PD (1 << CGU_BASE_PERIPH_CLK_PD_SHIFT)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODPIN10 0x028I2C1_ADR1 I2C_ADR1(I2C1)SCU_SFSP8_1 SCU_SFS(PIN_GROUP8, PIN1)RTC_BASE (0x40046000U)CGU_BASE_OUT_CLK_CLK_SEL(x) ((x) << CGU_BASE_OUT_CLK_CLK_SEL_SHIFT)SCU_SFSPD_10 SCU_SFS(PIN_GROUPD, PIN10)CGU_PLL0USB_CTRL_CLKEN_SHIFT (4)CGU_PLL0AUDIO_CTRL_CLKEN (1 << CGU_PLL0AUDIO_CTRL_CLKEN_SHIFT)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H SCU_SFSPC_10 SCU_SFS(PIN_GROUPC, PIN10)AES_BASE (0x400F1000U)__GCC_CONSTRUCTIVE_SIZE 64PIN_GROUP5 (SCU_BASE + 0x280)__LLFRACT_IBIT__ 0CGU_IDIVB_CTRL_AUTOBLOCK (1 << CGU_IDIVB_CTRL_AUTOBLOCK_SHIFT)uint32_tBIT12 (1<<12)CGU_BASE_UART1_CLK_PD_SHIFT (0)__SACCUM_EPSILON__ 0x1P-7HKCGU_BASE_APLL_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_APLL_CLK_CLK_SEL(x) ((x) << CGU_BASE_APLL_CLK_CLK_SEL_SHIFT)SCU_SFSPC_8 SCU_SFS(PIN_GROUPC, PIN8)LPC43XX_SCU_H CGU_BASE_SSP0_CLK_CLK_SEL(x) ((x) << CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT)CGU_BASE_LCD_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_LCD_CLK_CLK_SEL_SHIFT)__UINT_FAST16_TYPE__ unsigned intCGU_BASE_SAFE_CLK_AUTOBLOCK (1 << CGU_BASE_SAFE_CLK_AUTOBLOCK_SHIFT)__UHA_IBIT__ 8CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT (24)CGU_BASE_PERIPH_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKI2C0_ADR3 I2C_ADR3(I2C0)__LDBL_DIG__ 15CGU_BASE_SSP1_CLK_PD (1 << CGU_BASE_SSP1_CLK_PD_SHIFT)SCU_SFSP1_3 SCU_SFS(PIN_GROUP1, PIN3)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)SCU_GPIO_NOPULL (SCU_CONF_EPUN_DIS_PULLUP | SCU_CONF_EZI_EN_IN_BUFFER)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8CGU_PLL0USB_CTRL MMIO32(CGU_BASE + 0x020)SCU_SFSP5_3 SCU_SFS(PIN_GROUP5, PIN3)__INT_LEAST16_TYPE__ short intCGU_PLL0USB_NP_DIV MMIO32(CGU_BASE + 0x028)__QQ_FBIT__ 7CGU_IDIVA_CTRL_PD (1 << CGU_IDIVA_CTRL_PD_SHIFT)CGU_PLL0USB_CTRL_DIRECTO_SHIFT (3)__DBL_MAX__ ((double)1.7976931348623157e+308L)CGU_SRC_IDIVC 0x0EINT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CCGU_PLL1_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL1_CTRL_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_FRM_SHIFT (6)CGU_PLL0USB_CTRL_CLK_SEL(x) ((x) << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1PIN9 0x024__UINTPTR_MAX__ 0xffffffffUSCU_SFSP8_7 SCU_SFS(PIN_GROUP8, PIN7)__HQ_FBIT__ 15__bool_true_false_are_defined 1USART2_BASE (PERIPH_BASE_APB2 + 0x01000)BIT26 (1<<26)I2C0_MASK1 I2C_MASK1(I2C0)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATCGU_BASE_UART0_CLK_CLK_SEL_SHIFT (24)CGU_PLL1_CTRL_NSEL_SHIFT (12)CGU_BASE_PHY_TX_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT)CGU_FREQ_MON_RCNT_MASK (0x1ff << CGU_FREQ_MON_RCNT_SHIFT)CGU_BASE_CGU_OUT0_CLK_PD_SHIFT (0)__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)SCU_SFSP6_4 SCU_SFS(PIN_GROUP6, PIN4)MCPWM_BASE (PERIPH_BASE_APB1 + 0x00000)CGU_PLL0AUDIO_CTRL_AUTOBLOCK_SHIFT (11)CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK_SHIFT (11)LPC43XX_MEMORYMAP_H INT_LEAST64_MINPTRDIFF_MAXMMIO32(addr) (*(volatile uint32_t *)(addr))CGU_BASE_APB3_CLK MMIO32(CGU_BASE + 0x084)CGU_PLL0USB_MDIV_SELP_SHIFT (17)SCU_SDA_EZI_EN (BIT11)__LLFRACT_EPSILON__ 0x1P-63LLRCGU_PLL0USB_NP_DIV_NDEC(x) ((x) << CGU_PLL0USB_NP_DIV_NDEC_SHIFT)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53SCU_CONF_FUNCTION3 (0x3)__ARM_ASM_SYNTAX_UNIFIED__CGU_PLL1_CTRL_DIRECT_SHIFT (7)WINT_MAXSCU_SFSP4_7 SCU_SFS(PIN_GROUP4, PIN7)__INT16_C(c) cSCU_SFSPE_3 SCU_SFS(PIN_GROUPE, PIN3)INT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__USFRACT_IBIT__ 0SCU_CLK_IN (SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EHS_FAST | SCU_CONF_EZI_EN_IN_BUFFER | SCU_CONF_ZIF_DIS_IN_GLITCH_FILT)SCU_SFSP7_1 SCU_SFS(PIN_GROUP7, PIN1)SCU_I2C0_FAST (SCU_SCL_EFP | SCU_SCL_EHD | SCU_SCL_EZI_EN | SCU_SCL_ZIF_DIS | SCU_SDA_EFP | SCU_SDA_EHD | SCU_SDA_EZI_EN)__ATOMIC_ACQ_REL 4ADC1_BASE (PERIPH_BASE_APB3 + 0x04000)LPC43XX_M0 1__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)SCU_SFSPD_13 SCU_SFS(PIN_GROUPD, PIN13)SCU_ENAIO1 MMIO32(SCU_BASE + 0xC8C)CGU_BASE_PERIPH_CLK_PD_SHIFT (0)CGU_PLL0AUDIO_CTRL_DIRECTI_SHIFT (2)CGU_BASE_LCD_CLK_CLK_SEL_SHIFT (24)CGU_BASE_M4_CLK_PD_SHIFT (0)SCU_CONF_EHD_NORMAL_DRIVE_14MILLIA (0x200)CGU_BASE_UART3_CLK_AUTOBLOCK (1 << CGU_BASE_UART3_CLK_AUTOBLOCK_SHIFT)SCU_SFSP1_7 SCU_SFS(PIN_GROUP1, PIN7)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32SCU_SFSCLK0 MMIO32(SCU_BASE + 0xC00)CGU_BASE_UART2_CLK_AUTOBLOCK (1 << CGU_BASE_UART2_CLK_AUTOBLOCK_SHIFT)UINT64_C(c) __UINT64_C(c)CGU_BASE_UART3_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART3_CLK_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_PD (1 << CGU_PLL0AUDIO_CTRL_PD_SHIFT)CGU_BASE_USB1_CLK_PD (1 << CGU_BASE_USB1_CLK_PD_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULLCGU_BASE_OUT_CLK_AUTOBLOCK_SHIFT (11)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0CGU_IDIVB_CTRL_IDIV(x) ((x) << CGU_IDIVB_CTRL_IDIV_SHIFT)INT_FAST16_MAXSCU_SFSP1_11 SCU_SFS(PIN_GROUP1, PIN11)PIN19 0x04C__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int__ARM_FEATURE_CDE_COPROCCGU_PLL0USB_CTRL_BYPASS (1 << CGU_PLL0USB_CTRL_BYPASS_SHIFT)CGU_PLL1_CTRL_PSEL_MASK (0x3 << CGU_PLL1_CTRL_PSEL_SHIFT)UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205 | 4 $ 0 0 $A+aeabi!6S-M M         $ $ -/!#%')+1 4e-[ 03 4 $00$i2c.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.22.395ffb693017d551ed93d11c39ba4361wm4.i2c.h.45.c4ca94c213d8887803b1366d0112f9b7wm4.scu.h.36.013ea3915138f7d9730501011396d638wm4.cgu.h.37.c480a83e7590bba775f2472229e8edb0i2c0_initi2c0_tx_starti2c0_tx_bytei2c0_rx_bytei2c0_stop "&-4;BGTYkp}   (0  %$-3< B!K"T# #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y   #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5;AGMSY_ekqw} %+17=CIOU\ #)/5;AGMSY_ekqw} %,3:AHOV]dkry #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !(/6=DKRY`gnu|$+29@GNU\cjqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BIPW^elsz #)/5;AGMSY_ekqw} %,3:AHOV]dkry !(/6=DKRY`gnu|$+29@GNU\cjqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BIPW^elsz ")07>ELSZahov} %,3:AHOV]dkry    ! ( / 6 = D K R Y ` g n u |                        $ + 2 9 @ G N U \ c j q x            3 7$$$(4$8 D$HT$X.symtab.strtab.shstrtab.text.data.bss.text.i2c0_init.text.i2c0_tx_start.text.i2c0_tx_byte.text.i2c0_rx_byte.text.i2c0_stop.rel.debug_info.debug_abbrev.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group!4 4%!@ 4&!L 4'!X 4(!d 4)!p 4*!| 4+! 4,! 4-!',4<$P0c(0vX$| @4L@ @04+ @(4[ @X4~  @X 4 @P 4N @p4" @H(4! @p04#a @4%e~ @p4' @X(4)  @p 4+'r @(4-0*)0)'P` @P41p,59 h(ssp.o/ 0 0 0 644 62648 ` ELF(4(43 !"#$%&'()CA#@B@KF#`D`pG0@NFWFEFFൃ x xFxx6xF(#KHFNK-FKFSFZF`#3`KF`CF:CC)C`cF"C#CC3`FFFFKHFNF0@0@0@@ P @P @P @0(MJ$hBCA)`!CB @ I FcDhB!hB(h0MJFP @ P @ 0@0@qd <=z ~K .R#T{1eu4x/@iintdSRr6WBgpuR{zvG0: "  6 Cs .DXR9e/j RhY@!YUER2R܂tR30ARE+XR :j YTJ j! sj3Y0*6ll J  W c \ n \/6^l27D 7PHE8wqC998B:hF; Fs< FR=)>`T?6Al@FBlh' '6)l( :!; 9 IB: ; 9 I$ > >! !I:!; 9!4:!; 9! I% Uy$ >  .?: ; 9 'I@z 1RB UX Y W 1 U 41.: ; 9 ' : ; 9 I.?: ; 9 '@z.?: ; 9 '@zP<P+yzL0UjT|JBI-AH$ILa5ڌJO>.;7H?ǂcC$H-&<o<$=aic09=C]{G?h7 / ~m>1dhDCUEm$3XGxM`MI&W0UA9K,FTSig#Ini+^20F`?ZszfbYEsf>!.Fx0Q {'R\ƅ]IEG~b5L(jrDc \9 Fz<uQD`R5l,r1N"rfG!ODTXSiHflTZI1>96r\YNoZ#8XQ@%+6E?-w-= :0!h*.$BTRaP~JOa>W[Ppkz>]?xҒ] GH25jyԊ*4OT q(x|fw?P4J 2FT,5l,yjKEok1uB;!#(E@jtK2ojqp'dVJj'ugRkFlr+MrA@/֓s_Z*zBzX<!(ZEbtX3FJNO4Ebe?8PSWЖFfP@M`?Ո=BR@K VX ?v3[>Oy"K\GKajSC Us2`=#A M@]Wx2: l,-Q{6r_+F%]=_|+3 Dpf>;I>!q"#) 9ad e]fYgbjkpnKov8psqwRtNu5xEuyJz4{ ~A9Pyf #zYD51w?W*)OcdW!Za:AMZ$UmWL~jMFbiJ<<>v['IBrpA( ,pU\  -3QRKsQG]"$wN C7V n!+2aa Izq`5*#,#V{.x!kcy)zdьikZ!6&Y'w32C5DHE"F ]I7LQR StTKUVWLX/YZMN[\a]^l_?`sdab;cdVhe@fseg[hiBjCikl)mEnkoCpi1_lLG T !8& :()jQ*+^5, -h@.056d7={89W8:sV;?!#@!6AzFBH I<J,|KqLM N;O8#PeQbW X?Y9Z [a bʐc]d}weGf<g_qh nho|1p|q-rw{rUHK.#a/S5p6 #7!:Q;|x`AŇD!NG}JtM;[PL9S} VXY/\t_:b7qenhiknPqOtgtw,z$}  Mboof(O dkуr?[~FUV~0/g*qeL, w]R0:.`#s dSsJbTD9oώL0@2V*&l3Y׏z4I:%.q]+Lp`%KO'N&_+cQ}Cj+%Ε,/wR-Df2Q \%-{d2lޅP/~Y.gW7TW1+ym|72qc"}Yo^.zGJ"gw"mu+^xB9]quBPD+Ap;n%W^džI9f '<_gz3I>4e`qvrEBda`::2'G:){K*~$p&CKb&15MTNe=9&WTa/s^$; x;/7< zmS6P`Oy~b}_M(=Mo`cWg %os \| qS(v/D5Vjs9TK15A,u313*?5B~S"z1htX\qH }FgH FFg an-ZtB!/Xdp&y;=}d\xl{jm;#$''"P9Fr΄^2f[pIR(n-'F,m^m+S3 7)}T06QI-~?FFhr{I_s4/wAxYBV/vuy =q8(5-vuPt=40iv/!5K ../usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/lpc43xx../../../include/libopencm3/cm3ssp.cstdint.hssp.hcommon.hstdbool.hmemorymap.hcgu.h'5ylz &!?t.. .. @J58 u X%1/!0<$8f!t.#Q)  ) 0i.  Z Pz  4  .)  ) 0 /  CGU_PLL1_CTRL_FBSEL (1 << CGU_PLL1_CTRL_FBSEL_SHIFT)CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT (24)__DECIMAL_DIG__ 17CGU_BASE_SPIFI_CLK_AUTOBLOCK_SHIFT (11)__UHA_FBIT__ 8CGU_BASE_OUT_CLK_AUTOBLOCK (1 << CGU_BASE_OUT_CLK_AUTOBLOCK_SHIFT)ssp_frame_format_tCGU_BASE_UART0_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART0_CLK_CLK_SEL_SHIFT)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1SSP1_IMSC SSP_IMSC(SSP1)__CHAR_UNSIGNED__ 1ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000)slave_optionmaster_slaveCGU_BASE_PHY_RX_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT (24)__FLT64_HAS_INFINITY__ 1CGU_IDIVC_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVC_CTRL_CLK_SEL_SHIFT)CGU_IDIVB_CTRL_CLK_SEL_SHIFT (24)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)SSP1_SR SSP_SR(SSP1)__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffCGU_PLL0AUDIO_CTRL_SEL_EXT_SHIFT (13)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INTMAX_MAX__ 0x7fffffffffffffffLLCGU_IDIVD_CTRL_CLK_SEL_SHIFT (24)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LI2C0_BASE (PERIPH_BASE_APB1 + 0x01000)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUCGU_PLL0USB_MDIV_SELR(x) ((x) << CGU_PLL0USB_MDIV_SELR_SHIFT)__ARM_FEATURE_QBITCGU_BASE_APLL_CLK MMIO32(CGU_BASE + 0x0C0)CGU_BASE_SSP1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT)CGU_PLL0USB_CTRL_CLK_SEL_SHIFT (24)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308CGU_BASE_APLL_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APLL_CLK_CLK_SEL_SHIFT)__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intC_CCAN1_BASE (PERIPH_BASE_APB1 + 0x04000)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32CGU_BASE_SDIO_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT)__UINT_LEAST8_TYPE__ unsigned char__USACCUM_MIN__ 0.0UHKSSP_IMSC(port) MMIO32((port) + 0x014)__FLT32_DECIMAL_DIG__ 9CGU_BASE_UART1_CLK_AUTOBLOCK (1 << CGU_BASE_UART1_CLK_AUTOBLOCK_SHIFT)CGU_IDIVB_CTRL_IDIV(x) ((x) << CGU_IDIVB_CTRL_IDIV_SHIFT)__LDBL_MIN_EXP__ (-1021)CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_MASK (0x3fffff << CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT)__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)__UINT8_C(c) c__INT16_TYPE__ short intCGU_BASE_USB0_CLK_CLK_SEL(x) ((x) << CGU_BASE_USB0_CLK_CLK_SEL_SHIFT)I2S1_BASE (PERIPH_BASE_APB1 + 0x03000)USB0_BASE (PERIPH_BASE_AHB + 0x06000)CGU_BASE_PERIPH_CLK_AUTOBLOCK (1 << CGU_BASE_PERIPH_CLK_AUTOBLOCK_SHIFT)UINT_FAST32_MAXCGU_BASE_PHY_TX_CLK MMIO32(CGU_BASE + 0x07C)SSP_DATA_12BITSINT_FAST64_MAX __INT_FAST64_MAX__CGU_PLL0AUDIO_CTRL_FRM (1 << CGU_PLL0AUDIO_CTRL_FRM_SHIFT)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64__SIG_ATOMIC_TYPE__ intCGU_BASE_APB3_CLK_AUTOBLOCK (1 << CGU_BASE_APB3_CLK_AUTOBLOCK_SHIFT)CGU_BASE_SPIFI_CLK_CLK_SEL(x) ((x) << CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intPERIPH_BASE_APB2 (0x400C0000U)CGU_BASE_SPIFI_CLK_AUTOBLOCK (1 << CGU_BASE_SPIFI_CLK_AUTOBLOCK_SHIFT)ssp_wait_until_not_busyINT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38CGU_SRC_32K 0x00WWDT_BASE (PERIPH_BASE_APB0 + 0x00000)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZSSP_FRAM_MICROWIRECGU_PLL1_CTRL MMIO32(CGU_BASE + 0x044)TIMER1_BASE (PERIPH_BASE_APB0 + 0x05000)__FLT32_MIN_EXP__ (-125)CGU_BASE_VADC_CLK_PD_SHIFT (0)ATIMER_BASE (0x40040000U)UINT32_MAX __UINT32_MAX__CGU_IDIVB_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVB_CTRL_CLK_SEL_SHIFT)C_CAN0_BASE (PERIPH_BASE_APB3 + 0x02000)__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__CGU_BASE_APB3_CLK_PD (1 << CGU_BASE_APB3_CLK_PD_SHIFT)CGU_PLL0USB_MDIV MMIO32(CGU_BASE + 0x024)TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)SSP1_DMACR SSP_DMACR(SSP1)__SFRACT_EPSILON__ 0x1P-7HRCGU_PLLAUDIO_FRAC_PLLFRACT_CTRL(x) ((x) << CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT)CGU_IDIVB_CTRL_AUTOBLOCK (1 << CGU_IDIVB_CTRL_AUTOBLOCK_SHIFT)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXCGU_PLL0USB_STAT_FR_SHIFT (1)__SQ_FBIT__ 31CGU_BASE_CGU_OUT1_CLK_PD_SHIFT (0)UINT32_CINT_LEAST32_MIN (-INT_LEAST32_MAX - 1)CGU_PLL1_STAT_LOCK_SHIFT (0)CGU_IDIVD_CTRL_IDIV_MASK (0xf << CGU_IDIVD_CTRL_IDIV_SHIFT)__UHQ_FBIT__ 16CGU_IDIVB_CTRL_IDIV_SHIFT (2)__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAXCGU_IDIVA_CTRL MMIO32(CGU_BASE + 0x048)CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT (0)__UINT_FAST8_MAX__ 0xffffffffUCGU_IDIVA_CTRL_AUTOBLOCK (1 << CGU_IDIVA_CTRL_AUTOBLOCK_SHIFT)UINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32CGU_PLL0AUDIO_CTRL_BYPASS (1 << CGU_PLL0AUDIO_CTRL_BYPASS_SHIFT)CGU_BASE_SDIO_CLK_CLK_SEL(x) ((x) << CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT)__INT_FAST16_WIDTH__ 32SSP1_ICR SSP_ICR(SSP1)INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LDBL_MAX__ 1.7976931348623157e+308L__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffCGU_PLL0USB_MDIV_MDEC_SHIFT (0)CGU_BASE_APB3_CLK_CLK_SEL(x) ((x) << CGU_BASE_APB3_CLK_CLK_SEL_SHIFT)__UINT_FAST16_MAX__ 0xffffffffUCGU_PLL0AUDIO_CTRL_PD_SHIFT (0)CGU_IDIVC_CTRL_PD_SHIFT (0)SSP1_BASE (PERIPH_BASE_APB2 + 0x05000)INT64_C(c) __INT64_C(c)CGU_IDIVD_CTRL_CLK_SEL(x) ((x) << CGU_IDIVD_CTRL_CLK_SEL_SHIFT)CGU_BASE_CGU_OUT1_CLK MMIO32(CGU_BASE + 0x0C8)__GCC_IEC_559_COMPLEX 0CREG_BASE (0x40043000U)__UFRACT_MIN__ 0.0URCGU_PLL0AUDIO_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT)WCHAR_MAX __WCHAR_MAX__CGU_BASE_M4_CLK_PD (1 << CGU_BASE_M4_CLK_PD_SHIFT)__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__CGU_FREQ_MON_CLK_SEL_SHIFT (24)INT8_C(c) __INT8_C(c)CGU_BASE_UART0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART0_CLK_CLK_SEL_SHIFT)__ACCUM_FBIT__ 15CGU_PLL0USB_CTRL_PD_SHIFT (0)SSP1_CPSR SSP_CPSR(SSP1)__UACCUM_IBIT__ 16long intUINT8_MAXCGU_BASE_SAFE_CLK_CLK_SEL_SHIFT (24)SIZE_MAX __SIZE_MAX__CGU_PLL0USB_STAT MMIO32(CGU_BASE + 0x01C)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17CGU_PLL1_CTRL_NSEL_MASK (0x3 << CGU_PLL1_CTRL_NSEL_SHIFT)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1SSP_DATA_8BITSCGU_BASE_UART2_CLK_AUTOBLOCK_SHIFT (11)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____TA_FBIT__ 63__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRCGU_BASE_UART3_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART3_CLK_CLK_SEL_SHIFT)CGU_BASE_UART3_CLK_CLK_SEL_SHIFT (24)CGU_PLL0AUDIO_CTRL_SEL_EXT (1 << CGU_PLL0AUDIO_CTRL_SEL_EXT_SHIFT)short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)CGU_BASE_PHY_RX_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)__ELF__ 1UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ_SHIFT (12)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__LCD_BASE (PERIPH_BASE_AHB + 0x08000)CGU_BASE_OUT_CLK MMIO32(CGU_BASE + 0x0AC)CGU_BASE_SSP0_CLK_PD (1 << CGU_BASE_SSP0_CLK_PD_SHIFT)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32CGU_BASE_CGU_OUT0_CLK MMIO32(CGU_BASE + 0x0C4)GPDMA_BASE (PERIPH_BASE_AHB + 0x02000)CGU_BASE_UART0_CLK_PD (1 << CGU_BASE_UART0_CLK_PD_SHIFT)BIT18 (1<<18)__LONG_LONG_MAX__ 0x7fffffffffffffffLLSSP_DATA_5BITSBIT27 (1<<27)CGU_PLL0AUDIO_NP_DIV_PDEC_MASK (0x7f << CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT)__UTA_FBIT__ 64SDIO_BASE (PERIPH_BASE_AHB + 0x04000)CGU_BASE_PHY_TX_CLK_PD (1 << CGU_BASE_PHY_TX_CLK_PD_SHIFT)__FLT_DECIMAL_DIG__ 9CGU_FREQ_MON_CLK_SEL(x) ((x) << CGU_FREQ_MON_CLK_SEL_SHIFT)__thumb__ 1CGU_BASE_SSP1_CLK MMIO32(CGU_BASE + 0x098)signed charGIMA_BASE (PERIPH_BASE_APB2 + 0x07000)uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)CGU_BASE_LCD_CLK_AUTOBLOCK_SHIFT (11)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15CGU_BASE_VADC_CLK_CLK_SEL(x) ((x) << CGU_BASE_VADC_CLK_CLK_SEL_SHIFT)__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1SSP1_CR0 SSP_CR0(SSP1)PTRDIFF_MIN__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)CGU_BASE_UART0_CLK_AUTOBLOCK (1 << CGU_BASE_UART0_CLK_AUTOBLOCK_SHIFT)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77SSP_DATA_11BITS__FLT64_MAX_10_EXP__ 308CGU_PLL1_CTRL_PSEL_SHIFT (8)MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINSSP0_CR0 SSP_CR0(SSP0)CGU_BASE (0x40050000U)GPIO_PIN_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x07000)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38CGU_BASE_UART0_CLK_PD_SHIFT (0)__FRACT_MAX__ 0X7FFFP-15R__SHRT_WIDTH__ 16INT_LEAST32_MAX __INT_LEAST32_MAX__CGU_IDIVE_CTRL_PD (1 << CGU_IDIVE_CTRL_PD_SHIFT)CGU_BASE_PHY_RX_CLK MMIO32(CGU_BASE + 0x078)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5CGU_BASE_SPIFI_CLK_PD (1 << CGU_BASE_SPIFI_CLK_PD_SHIFT)__ARM_ARCH_EXT_IDIV__CGU_PLL0AUDIO_CTRL_AUTOBLOCK_SHIFT (11)CGU_IDIVB_CTRL_PD_SHIFT (0)CGU_PLL0USB_MDIV_SELP_MASK (0x1f << CGU_PLL0USB_MDIV_SELP_SHIFT)CGU_PLL0AUDIO_STAT_FR (1 << CGU_PLL0AUDIO_STAT_FR_SHIFT)CGU_BASE_SSP0_CLK_PD_SHIFT (0)CGU_BASE_SAFE_CLK_CLK_SEL(x) ((x) << CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT)CGU_IDIVE_CTRL_AUTOBLOCK (1 << CGU_IDIVE_CTRL_AUTOBLOCK_SHIFT)__UINT16_MAX__ 0xffffCGU_PLL0USB_CTRL_AUTOBLOCK (1 << CGU_PLL0USB_CTRL_AUTOBLOCK_SHIFT)__TQ_FBIT__ 127CGU_BASE_UART0_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0USB_NP_DIV_PDEC_MASK (0x7f << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)__LDBL_MAX_EXP__ 1024__USQ_FBIT__ 32INT_FAST16_MINCGU_BASE_UART2_CLK_AUTOBLOCK (1 << CGU_BASE_UART2_CLK_AUTOBLOCK_SHIFT)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32CGU_SRC_ENET_TX 0x03CGU_BASE_USB1_CLK_CLK_SEL(x) ((x) << CGU_BASE_USB1_CLK_CLK_SEL_SHIFT)CGU_BASE_SSP0_CLK MMIO32(CGU_BASE + 0x094)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__STRICT_ANSI__ 1CGU_BASE_SPI_CLK_PD (1 << CGU_BASE_SPI_CLK_PD_SHIFT)UINT_LEAST8_MAXCGU_IDIVD_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVD_CTRL_CLK_SEL_SHIFT)SSP_RIS(port) MMIO32((port) + 0x018)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CGU_BASE_OUT_CLK_PD (1 << CGU_BASE_OUT_CLK_PD_SHIFT)__GNUC_MINOR__ 2__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__CGU_IDIVE_CTRL_PD_SHIFT (0)CGU_FREQ_MON_FCNT_SHIFT (9)__USA_IBIT__ 16CGU_PLL0USB_CTRL_AUTOBLOCK_SHIFT (11)CGU_BASE_PHY_TX_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT)PTRDIFF_MIN (-PTRDIFF_MAX - 1)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intCGU_PLL0AUDIO_STAT_FR_SHIFT (1)CGU_PLL1_CTRL_NSEL(x) ((x) << CGU_PLL1_CTRL_NSEL_SHIFT)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__CGU_IDIVA_CTRL_IDIV_SHIFT (2)CGU_BASE_SPI_CLK MMIO32(CGU_BASE + 0x074)CGU_BASE_UART2_CLK_CLK_SEL_SHIFT (24)__FLT32_IS_IEC_60559__ 2CGU_BASE_PHY_TX_CLK_PD_SHIFT (0)CGU_FREQ_MON_CLK_SEL_MASK (0x1f << CGU_FREQ_MON_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_BYPASS_SHIFT (1)INT_FAST64_MINADC0_BASE (PERIPH_BASE_APB3 + 0x03000)__USFRACT_IBIT__ 0CGU_PLL0AUDIO_CTRL_DIRECTO_SHIFT (3)__USFRACT_MIN__ 0.0UHR__ARM_NEON__UINT8_MAX__ 0xffCGU_PLL0AUDIO_CTRL_AUTOBLOCK (1 << CGU_PLL0AUDIO_CTRL_AUTOBLOCK_SHIFT)CGU_BASE_APLL_CLK_PD (1 << CGU_BASE_APLL_CLK_PD_SHIFT)SSP_SR_TFE BIT0CGU_XTAL_OSC_CTRL_HF_SHIFT (2)CGU_PLL0AUDIO_MDIV_MDEC_SHIFT (0)INT16_C(c) __INT16_C(c)SSP_DATA_15BITSCGU_PLL1_CTRL_FBSEL_SHIFT (6)__DBL_HAS_DENORM__ 1CGU_PLL0USB_MDIV_SELP(x) ((x) << CGU_PLL0USB_MDIV_SELP_SHIFT)CGU_BASE_USB0_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_PERIPH_CLK_PD (1 << CGU_BASE_PERIPH_CLK_PD_SHIFT)CGU_SRC_IDIVB 0x0DCGU_BASE_SDIO_CLK_PD (1 << CGU_BASE_SDIO_CLK_PD_SHIFT)CGU_FREQ_MON_RCNT(x) ((x) << CGU_FREQ_MON_RCNT_SHIFT)__DA_FBIT__ 31CGU_BASE_OUT_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_OUT_CLK_CLK_SEL_SHIFT)__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fffCGU_FREQ_MON_RCNT_SHIFT (0)__FLT_DENORM_MIN__ 1.4012984643248171e-45FSSP_DATA_7BITSCGU_XTAL_OSC_CTRL_BYPASS (1 << CGU_XTAL_OSC_CTRL_BYPASS_SHIFT)CGU_IDIVE_CTRL_CLK_SEL_SHIFT (24)INT_LEAST8_MAX __INT_LEAST8_MAX__CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT (12)DAC_BASE (PERIPH_BASE_APB3 + 0x01000)__UINT32_C(c) c ## ULCGU_BASE_PHY_RX_CLK_AUTOBLOCK (1 << CGU_BASE_PHY_RX_CLK_AUTOBLOCK_SHIFT)ssp_init__UACCUM_MIN__ 0.0UKSSP0_DMACR SSP_DMACR(SSP0)CGU_IDIVD_CTRL_AUTOBLOCK_SHIFT (11)__FLT_EPSILON__ 1.1920928955078125e-7FCGU_BASE_UART1_CLK_CLK_SEL_SHIFT (24)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMBCGU_PLL0USB_CTRL_FRM_SHIFT (6)CGU_PLL0AUDIO_CTRL_CLKEN_SHIFT (4)__ARM_FEATURE_MATMUL_INT8CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT (24)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0CGU_BASE_UART3_CLK_AUTOBLOCK_SHIFT (11)CGU_IDIVC_CTRL_IDIV(x) ((x) << CGU_IDIVC_CTRL_IDIV_SHIFT)CGU_BASE_PHY_TX_CLK_AUTOBLOCK (1 << CGU_BASE_PHY_TX_CLK_AUTOBLOCK_SHIFT)__USACCUM_FBIT__ 8CGU_SRC_PLL1 0x09__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1CGU_BASE_CGU_OUT0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT)CGU_PLL0USB_MDIV_MDEC_MASK (0x1ffff << CGU_PLL0USB_MDIV_MDEC_SHIFT)CGU_BASE_SPI_CLK_CLK_SEL_SHIFT (24)__LACCUM_FBIT__ 31CGU_BASE_APB1_CLK_PD_SHIFT (0)EMC_BASE (PERIPH_BASE_AHB + 0x05000)__FLT32_HAS_QUIET_NAN__ 1__LDBL_HAS_INFINITY__ 1CGU_SRC_GP_CLKIN 0x04__SACCUM_FBIT__ 7UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))CCU1_BASE (0x40051000U)__FLT32X_MAX_10_EXP__ 308CGU_BASE_PERIPH_CLK_CLK_SEL(x) ((x) << CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT)CGU_BASE_OUT_CLK_CLK_SEL(x) ((x) << CGU_BASE_OUT_CLK_CLK_SEL_SHIFT)__ARM_PCS 1ssp_portbool _BoolUINTMAX_MAX __UINTMAX_MAX__CGU_BASE_OUT_CLK_PD_SHIFT (0)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffCGU_BASE_PERIPH_CLK_AUTOBLOCK_SHIFT (11)CGU_XTAL_OSC_CTRL MMIO32(CGU_BASE + 0x018)CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT (0)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)EVENTROUTER_BASE (0x40044000U)INT16_MAX __INT16_MAX____PRAGMA_REDEFINE_EXTNAME 1__FLT32X_IS_IEC_60559__ 2PERIPH_BASE_APB3 (0x400E0000U)SSP_CPSR(port) MMIO32((port) + 0x010)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXCGU_PLL1_STAT MMIO32(CGU_BASE + 0x040)CGU_BASE_PHY_RX_CLK_PD_SHIFT (0)__INT_LEAST16_WIDTH__ 16I2S0_BASE (PERIPH_BASE_APB1 + 0x02000)CGU_PLL0USB_CTRL_DIRECTI_SHIFT (2)__DEC_EVAL_METHOD__ 2SCT_BASE (PERIPH_BASE_AHB + 0x00000)__ARM_FEATURE_FP16_FMLCGU_PLL0USB_MDIV_MDEC(x) ((x) << CGU_PLL0USB_MDIV_MDEC_SHIFT)SSP_DATA_10BITS__USFRACT_EPSILON__ 0x1P-8UHRssp_transferCGU_IDIVD_CTRL_IDIV(x) ((x) << CGU_IDIVD_CTRL_IDIV_SHIFT)CGU_IDIVD_CTRL MMIO32(CGU_BASE + 0x054)CGU_BASE_USB0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_USB0_CLK_CLK_SEL_SHIFT)CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT (24)SCU_BASE (PERIPH_BASE_APB0 + 0x06000)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKCGU_BASE_SSP0_CLK_AUTOBLOCK (1 << CGU_BASE_SSP0_CLK_AUTOBLOCK_SHIFT)CGU_IDIVC_CTRL_PD (1 << CGU_IDIVC_CTRL_PD_SHIFT)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULUSART0_BASE (PERIPH_BASE_APB0 + 0x01000)CGU_BASE_M4_CLK_PD_SHIFT (0)__INT_LEAST8_MAX__ 0x7f/build/libopencm3/lib/lpc43xx/m0__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXCGU_SRC_IRC 0x01__UINT64_TYPE__ long long unsigned intCGU_BASE_SAFE_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024CGU_IDIVC_CTRL_AUTOBLOCK_SHIFT (11)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)CGU_BASE_APLL_CLK_AUTOBLOCK (1 << CGU_BASE_APLL_CLK_AUTOBLOCK_SHIFT)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fCGU_OUTCLK_21_CTRL MMIO32(CGU_BASE + 0x0B0)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNEDUSB1_BASE (PERIPH_BASE_AHB + 0x07000)BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intCGU_PLL0USB_CTRL_CLKEN (1 << CGU_PLL0USB_CTRL_CLKEN_SHIFT)__SOFTFP__ 1SSP_SLAVEUINT_LEAST16_MAX __UINT_LEAST16_MAX__SSP_SR_BSY BIT4INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0CGU_IDIVA_CTRL_IDIV_MASK (0x3 << CGU_IDIVA_CTRL_IDIV_SHIFT)__SCHAR_WIDTH__ 8CGU_BASE_PHY_RX_CLK_CLK_SEL(x) ((x) << CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT)cpol_cpha_formatUINT_FAST16_MAXCGU_BASE_CGU_OUT1_CLK_AUTOBLOCK_SHIFT (11)__UINT_FAST8_TYPE__ unsigned intSSP1_NUM__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)CGU_PLL1_CTRL_MSEL_MASK (0xff << CGU_PLL1_CTRL_MSEL_SHIFT)CGU_IDIVE_CTRL_IDIV_MASK (0xff << CGU_IDIVE_CTRL_IDIV_SHIFT)__INT32_MAX__ 0x7fffffffLCGU_PLL0AUDIO_STAT_LOCK (1 << CGU_PLL0AUDIO_STAT_LOCK_SHIFT)frame_formatUINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICCGU_BASE_SPI_CLK_AUTOBLOCK (1 << CGU_BASE_SPI_CLK_AUTOBLOCK_SHIFT)__FLT32_MANT_DIG__ 24CGU_IDIVA_CTRL_PD_SHIFT (0)INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32SSP_DATA_16BITS__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned int__USFRACT_FBIT__ 8__LDBL_EPSILON__ 2.2204460492503131e-16LCGU_IDIVD_CTRL_PD_SHIFT (0)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1__DBL_MAX_EXP__ 1024SSP_SLAVE_OUT_ENABLE__ATOMIC_RELEASE 3data_sizeSSP1_DR SSP_DR(SSP1)serial_clock_rate__FLT_MANT_DIG__ 24clockCGU_BASE_APLL_CLK_CLK_SEL_SHIFT (24)__UDQ_IBIT__ 0CCU2_BASE (0x40052000U)__GCC_ATOMIC_INT_LOCK_FREE 1__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKCGU_BASE_APB3_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APB3_CLK_CLK_SEL_SHIFT)CGU_IDIVD_CTRL_AUTOBLOCK (1 << CGU_IDIVD_CTRL_AUTOBLOCK_SHIFT)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64PERIPH_BASE_APB1 (0x400A0000U)SSP_DATA_6BITSUINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324LTIMER3_BASE (PERIPH_BASE_APB2 + 0x04000)__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0SSP_DMACR(port) MMIO32((port) + 0x024)SPI_PORT_BASE (0x40100000U)CGU_BASE_LCD_CLK_PD (1 << CGU_BASE_LCD_CLK_PD_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))CGU_BASE_APB3_CLK_AUTOBLOCK_SHIFT (11)SSP_DMACR_TXDMAE 0x2LPC43XX 1__GNUC__ 12CGU_BASE_APLL_CLK_PD_SHIFT (0)CGU_BASE_UART1_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART1_CLK_CLK_SEL_SHIFT)WCHAR_MAXCGU_IDIVB_CTRL_AUTOBLOCK_SHIFT (11)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16CGU_PLL1_CTRL_DIRECT (1 << CGU_PLL1_CTRL_DIRECT_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UCGU_PLL0USB_CTRL_PD (1 << CGU_PLL0USB_CTRL_PD_SHIFT)__UQQ_IBIT__ 0__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKCGU_PLL0USB_NP_DIV_PDEC_SHIFT (0)__ARM_ARCH 6CGU_BASE_PHY_RX_CLK_PD (1 << CGU_BASE_PHY_RX_CLK_PD_SHIFT)__FLT_RADIX__ 2BIT3 (1<<3)long long intCGU_SRC_IDIVE 0x10__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXSGPIO_PORT_BASE (0x40101000U)__LDBL_HAS_QUIET_NAN__ 1CGU_PLL0USB_MDIV_SELI_MASK (0x3f << CGU_PLL0USB_MDIV_SELI_SHIFT)PERIPH_BASE_APB0 (0x40080000U)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)CGU_FREQ_MON_MEAS_SHIFT (23)CGU_PLL0USB_CTRL_DIRECTO (1 << CGU_PLL0USB_CTRL_DIRECTO_SHIFT)CGU_BASE_APB1_CLK MMIO32(CGU_BASE + 0x080)CGU_IDIVE_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVE_CTRL_CLK_SEL_SHIFT)__UINT_FAST64_MAX__ 0xffffffffffffffffULLCGU_BASE_M4_CLK_AUTOBLOCK_SHIFT (11)__ARM_FP__HA_IBIT__ 8INT_LEAST32_MAX__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1CGU_PLL0AUDIO_CTRL MMIO32(CGU_BASE + 0x030)BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024CGU_BASE_SAFE_CLK_PD_SHIFT (0)UINT16_MAXCGU_PLL0USB_NP_DIV_PDEC(x) ((x) << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LLCGU_BASE_USB1_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_M4_CLK MMIO32(CGU_BASE + 0x06C)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4CGU_BASE_USB1_CLK MMIO32(CGU_BASE + 0x068)CGU_PLL1_CTRL_CLK_SEL(x) ((x) << CGU_PLL1_CTRL_CLK_SEL_SHIFT)__UFRACT_MAX__ 0XFFFFP-16URCGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT (24)CGU_BASE_UART0_CLK_CLK_SEL_SHIFT (24)INT64_MAXCGU_BASE_USB1_CLK_PD_SHIFT (0)CGU_PLL0AUDIO_STAT_LOCK_SHIFT (0)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0SPIFI_BASE (PERIPH_BASE_AHB + 0x03000)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SSP_MODE_NORMAL__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64INT16_MIN (-INT16_MAX - 1)CGU_XTAL_OSC_CTRL_BYPASS_SHIFT (1)CGU_FREQ_MON MMIO32(CGU_BASE + 0x014)__LDBL_MAX_10_EXP__ 308CGU_BASE_UART2_CLK_PD_SHIFT (0)__INT_FAST32_TYPE__ intCGU_BASE_UART3_CLK_PD (1 << CGU_BASE_UART3_CLK_PD_SHIFT)unsigned intCGU_BASE_SPI_CLK_PD_SHIFT (0)__GCC_ASM_FLAG_OUTPUTS____FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1SSP1 SSP1_BASECGU_BASE_APB1_CLK_AUTOBLOCK_SHIFT (11)CGU_IDIVE_CTRL_CLK_SEL(x) ((x) << CGU_IDIVE_CTRL_CLK_SEL_SHIFT)__USACCUM_IBIT__ 8CGU_PLL0USB_CTRL_BYPASS_SHIFT (1)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKCGU_BASE_OUT_CLK_CLK_SEL_SHIFT (24)CGU_PLL0AUDIO_NP_DIV_PDEC(x) ((x) << CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT)__FLT_EVAL_METHOD__ 0CGU_OUTCLK_24_CTRL MMIO32(CGU_BASE + 0x0BC)GPIO_PORT_BASE (0x400F4000U)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32SSP_MIS(port) MMIO32((port) + 0x01C)__thumb2__ssp_cpol_cpha_t__ARM_FEATURE_LDREXCGU_BASE_SPI_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SPI_CLK_CLK_SEL_SHIFT)__UQQ_FBIT__ 8OTP_BASE (0x40045000U)CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK (1 << CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK_SHIFT)INT16_CCGU_PLL0USB_CTRL_FRM (1 << CGU_PLL0USB_CTRL_FRM_SHIFT)__ARM_FP16_ARGS__GCC_IEC_559 0SSP0_NUMINT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1CGU_BASE_USB0_CLK_PD_SHIFT (0)CGU_BASE_M4_CLK_CLK_SEL(x) ((x) << CGU_BASE_M4_CLK_CLK_SEL_SHIFT)SSP_SLAVE_OUT_DISABLESSP0_RIS SSP_RIS(SSP0)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned charCGU_BASE_APB1_CLK_CLK_SEL(x) ((x) << CGU_BASE_APB1_CLK_CLK_SEL_SHIFT)CGU_BASE_SDIO_CLK_AUTOBLOCK_SHIFT (11)SSP_CPOL_1_CPHA_0SSP_CPOL_1_CPHA_1CGU_PLL0USB_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINtrue 1CGU_PLL1_CTRL_PD (1 << CGU_PLL1_CTRL_PD_SHIFT)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)CGU_BASE_VADC_CLK_AUTOBLOCK_SHIFT (11)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1SSP_SR(port) MMIO32((port) + 0x00C)__LFRACT_EPSILON__ 0x1P-31LRCGU_PLLAUDIO_FRAC MMIO32(CGU_BASE + 0x03C)CGU_BASE_UART1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART1_CLK_CLK_SEL_SHIFT)CGU_OUTCLK_22_CTRL MMIO32(CGU_BASE + 0x0B4)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAXCGU_BASE_SSP0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT)CGU_BASE_APB3_CLK_PD_SHIFT (0)__FLT32_MIN_10_EXP__ (-37)CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT (24)MMIO64(addr) (*(volatile uint64_t *)(addr))CGU_PLL1_CTRL_MSEL(x) ((x) << CGU_PLL1_CTRL_MSEL_SHIFT)CGU_PLL0USB_MDIV_SELI_SHIFT (22)INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LUSART3_BASE (PERIPH_BASE_APB2 + 0x02000)CGU_BASE_USB0_CLK_CLK_SEL_SHIFT (24)__BIGGEST_ALIGNMENT__ 8CGU_IDIVB_CTRL_PD (1 << CGU_IDIVB_CTRL_PD_SHIFT)CGU_PLL1_CTRL_BYPASS (1 << CGU_PLL1_CTRL_BYPASS_SHIFT)CGU_BASE_UART2_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART2_CLK_CLK_SEL_SHIFT)SSP_SR_TNF BIT1__TA_IBIT__ 64CGU_PLL0USB_NP_DIV_NDEC_SHIFT (12)CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT (24)__ARM_EABI__ 1CGU_BASE_USB1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_USB1_CLK_CLK_SEL_SHIFT)PERIPH_BASE_AHB (0x40000000U)CGU_IDIVC_CTRL_IDIV_SHIFT (2)CGU_XTAL_OSC_CTRL_HF (1 << CGU_XTAL_OSC_CTRL_HF_SHIFT)SSP_SR_RFF BIT3__ARM_FEATURE_QRDMXCGU_IDIVD_CTRL_IDIV_SHIFT (2)CGU_PLL0USB_MDIV_SELR_MASK (0xf << CGU_PLL0USB_MDIV_SELR_SHIFT)CGU_BASE_M4_CLK_CLK_SEL_SHIFT (24)__ARM_ARCH_ISA_THUMB 1WCHAR_MIN __WCHAR_MIN____WINT_WIDTH__ 32SSP0 SSP0_BASESIG_ATOMIC_MAX __SIG_ATOMIC_MAX__CGU_BASE_USB0_CLK_PD (1 << CGU_BASE_USB0_CLK_PD_SHIFT)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1CGU_IDIVE_CTRL_AUTOBLOCK_SHIFT (11)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO_GROUP1_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x09000)CGU_PLL0USB_NP_DIV_NDEC_MASK (0x3ff << CGU_PLL0USB_NP_DIV_NDEC_SHIFT)CGU_PLL1_STAT_LOCK (1 << CGU_PLL1_STAT_LOCK_SHIFT)__FLT32_DIG__ 6INT_LEAST16_MAXCGU_BASE_M4_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_M4_CLK_CLK_SEL_SHIFT)CGU_PLL0USB_STAT_LOCK (1 << CGU_PLL0USB_STAT_LOCK_SHIFT)CGU_IDIVD_CTRL_PD (1 << CGU_IDIVD_CTRL_PD_SHIFT)BIT15 (1<<15)BACKUP_REG_BASE (0x40041000U)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sectionsCGU_IDIVC_CTRL_AUTOBLOCK (1 << CGU_IDIVC_CTRL_AUTOBLOCK_SHIFT)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1GPIO_GROUP0_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x08000)CGU_BASE_SAFE_CLK_PD (1 << CGU_BASE_SAFE_CLK_PD_SHIFT)__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)CGU_PLL0AUDIO_CTRL_DIRECTO (1 << CGU_PLL0AUDIO_CTRL_DIRECTO_SHIFT)__ACCUM_MIN__ (-0X1P15K-0X1P15K)CGU_BASE_SDIO_CLK MMIO32(CGU_BASE + 0x090)__ARM_FEATURE_CRYPTOCGU_IDIVB_CTRL_CLK_SEL(x) ((x) << CGU_IDIVB_CTRL_CLK_SEL_SHIFT)__INT_LEAST32_TYPE__ long intCGU_BASE_LCD_CLK_CLK_SEL(x) ((x) << CGU_BASE_LCD_CLK_CLK_SEL_SHIFT)CGU_PLL1_CTRL_PSEL_MASK (0x3 << CGU_PLL1_CTRL_PSEL_SHIFT)CGU_PLL0AUDIO_MDIV_MDEC_MASK (0x1ffff << CGU_PLL0AUDIO_MDIV_MDEC_SHIFT)SSP_ICR(port) MMIO32((port) + 0x020)CGU_BASE_APB1_CLK_CLK_SEL_SHIFT (24)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLCGU_BASE_CGU_OUT0_CLK_PD (1 << CGU_BASE_CGU_OUT0_CLK_PD_SHIFT)__FRACT_IBIT__ 0I2C1_BASE (PERIPH_BASE_APB3 + 0x00000)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2CGU_SRC_IDIVA 0x0CBIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)CGU_BASE_USB0_CLK MMIO32(CGU_BASE + 0x060)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8CGU_BASE_SSP1_CLK_AUTOBLOCK (1 << CGU_BASE_SSP1_CLK_AUTOBLOCK_SHIFT)__UHQ_IBIT__ 0CGU_BASE_SPI_CLK_CLK_SEL(x) ((x) << CGU_BASE_SPI_CLK_CLK_SEL_SHIFT)SSP0_SR SSP_SR(SSP0)SSP1_MIS SSP_MIS(SSP1)CGU_BASE_UART0_CLK MMIO32(CGU_BASE + 0x09C)BIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15CGU_BASE_SSP0_CLK_CLK_SEL(x) ((x) << CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT)SSP0_MIS SSP_MIS(SSP0)__UTQ_FBIT__ 128CGU_PLL0AUDIO_CTRL_MOD_PD_SHIFT (14)__FINITE_MATH_ONLY__ 0CGU_PLL1_CTRL_AUTOBLOCK_SHIFT (11)__INT_FAST16_MAX__ 0x7fffffffSSP0_ICR SSP_ICR(SSP0)CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT (24)CGU_BASE_UART3_CLK_PD_SHIFT (0)CGU_BASE_UART2_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART2_CLK_CLK_SEL_SHIFT)PTRDIFF_MAX __PTRDIFF_MAX__CGU_BASE_UART2_CLK_PD (1 << CGU_BASE_UART2_CLK_PD_SHIFT)CGU_BASE_VADC_CLK_PD (1 << CGU_BASE_VADC_CLK_PD_SHIFT)CGU_IDIVA_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVA_CTRL_CLK_SEL_SHIFT)CGU_BASE_SAFE_CLK MMIO32(CGU_BASE + 0x05C)CGU_PLL0USB_CTRL_DIRECTI (1 << CGU_PLL0USB_CTRL_DIRECTI_SHIFT)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKCGU_BASE_LCD_CLK MMIO32(CGU_BASE + 0x088)CGU_BASE_M4_CLK_AUTOBLOCK (1 << CGU_BASE_M4_CLK_AUTOBLOCK_SHIFT)CGU_PLL1_CTRL_BYPASS_SHIFT (1)SSP0_DR SSP_DR(SSP0)CGU_IDIVE_CTRL_IDIV_SHIFT (2)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRssp_num_t__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intCGU_IDIVA_CTRL_IDIV(x) ((x) << CGU_IDIVA_CTRL_IDIV_SHIFT)CGU_PLL0USB_MDIV_SELR_SHIFT (28)SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)CGU_IDIVE_CTRL MMIO32(CGU_BASE + 0x058)QEI_BASE (PERIPH_BASE_APB2 + 0x06000)WCHAR_MINCGU_SRC_ENET_RX 0x02BEGIN_DECLS CGU_FREQ_MON_FCNT_MASK (0x3fff << CGU_FREQ_MON_FCNT_SHIFT)SSP_SR_RNE BIT2CGU_PLL1_CTRL_CLK_SEL_SHIFT (24)__FLT64_MAX__ 1.7976931348623157e+308F64CGU_BASE_UART1_CLK_PD (1 << CGU_BASE_UART1_CLK_PD_SHIFT)CGU_BASE_UART3_CLK MMIO32(CGU_BASE + 0x0A8)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xclk_prescaleCGU_PLL0USB_STAT_LOCK_SHIFT (0)SSP_DATA_14BITSCGU_PLL0USB_STAT_FR (1 << CGU_PLL0USB_STAT_FR_SHIFT)INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1CGU_BASE_USB0_CLK_AUTOBLOCK (1 << CGU_BASE_USB0_CLK_AUTOBLOCK_SHIFT)CGU_BASE_APB1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APB1_CLK_CLK_SEL_SHIFT)CGU_SRC_PLL0AUDIO 0x08CGU_BASE_SPIFI_CLK MMIO32(CGU_BASE + 0x070)__QQ_IBIT__ 0CGU_IDIVC_CTRL MMIO32(CGU_BASE + 0x050)CGU_PLL0AUDIO_NP_DIV MMIO32(CGU_BASE + 0x038)CGU_BASE_VADC_CLK_CLK_SEL_SHIFT (24)CGU_SRC_PLL0USB 0x07__LLACCUM_FBIT__ 31INT32_MAXSSP0_IMSC SSP_IMSC(SSP0)__UINTMAX_TYPE__ long long unsigned intCGU_PLL1_CTRL_AUTOBLOCK (1 << CGU_PLL1_CTRL_AUTOBLOCK_SHIFT)CGU_BASE_PHY_TX_CLK_AUTOBLOCK_SHIFT (11)__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned intCGU_SRC_XTAL 0x06__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long intSSP_DATA_4BITSSSP1_CR1 SSP_CR1(SSP1)CGU_IDIVC_CTRL_CLK_SEL(x) ((x) << CGU_IDIVC_CTRL_CLK_SEL_SHIFT)UINT_FAST8_MAXCGU_BASE_SPI_CLK_AUTOBLOCK_SHIFT (11)INT_LEAST8_MININTMAX_MAXCGU_BASE_CGU_OUT0_CLK_CLK_SEL(x) ((x) << CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT)TIMER2_BASE (PERIPH_BASE_APB2 + 0x03000)CGU_PLL0AUDIO_CTRL_DIRECTI_SHIFT (2)SSP_DMACR_RXDMAE 0x1CGU_XTAL_OSC_CTRL_ENABLE_SHIFT (0)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1CGU_PLL1_CTRL_MSEL_SHIFT (16)SSP0_CR1 SSP_CR1(SSP0)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CCGU_BASE_CGU_OUT1_CLK_PD (1 << CGU_BASE_CGU_OUT1_CLK_PD_SHIFT)CGU_BASE_SSP0_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_NP_DIV_NDEC_MASK (0x3ff << CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT)CGU_BASE_CGU_OUT1_CLK_CLK_SEL(x) ((x) << CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intCGU_BASE_APB1_CLK_AUTOBLOCK (1 << CGU_BASE_APB1_CLK_AUTOBLOCK_SHIFT)CGU_IDIVC_CTRL_IDIV_MASK (0xf << CGU_IDIVC_CTRL_IDIV_SHIFT)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4PMC_BASE (0x40042000U)uint16_t__INT64_C(c) c ## LLCGU_BASE_CGU_OUT0_CLK_AUTOBLOCK_SHIFT (11)__LDBL_MIN_10_EXP__ (-307)CGU_BASE_SSP1_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ (1 << CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ_SHIFT)UART1_BASE (PERIPH_BASE_APB0 + 0x02000)__LONG_MAX__ 0x7fffffffLCGU_PLL0AUDIO_NP_DIV_NDEC(x) ((x) << CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16CGU_BASE_SPIFI_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT)CGU_PLL1_CTRL_PD_SHIFT (0)CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT (24)CGU_BASE_USB1_CLK_CLK_SEL_SHIFT (24)CGU_BASE_APB3_CLK_CLK_SEL_SHIFT (24)CGU_PLL0AUDIO_MDIV MMIO32(CGU_BASE + 0x034)CGU_BASE_OUT_CLK_AUTOBLOCK_SHIFT (11)CGU_LPC43XX_CGU_H short intCGU_BASE_APLL_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_APB1_CLK_PD (1 << CGU_BASE_APB1_CLK_PD_SHIFT)CGU_BASE_USB1_CLK_AUTOBLOCK (1 << CGU_BASE_USB1_CLK_AUTOBLOCK_SHIFT)__UINT16_C(c) cCGU_OUTCLK_23_CTRL MMIO32(CGU_BASE + 0x0B8)CGU_PLL0AUDIO_CTRL_CLK_SEL(x) ((x) << CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT)__UDA_IBIT__ 32modeUINT_LEAST32_MAXssp_disableBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCCGU_BASE_VADC_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_VADC_CLK_CLK_SEL_SHIFT)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53SSP_DR(port) MMIO32((port) + 0x008)CGU_PLL0AUDIO_CTRL_DIRECTI (1 << CGU_PLL0AUDIO_CTRL_DIRECTI_SHIFT)BIT5 (1<<5)CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT (24)BIT1 (1<<1)INT8_CSSP_MASTER__USES_INITFINI__ 1ssp_slave_option_tSSP_FRAME_SPI__DBL_DECIMAL_DIG__ 17CGU_BASE_SSP1_CLK_PD_SHIFT (0)BIT8 (1<<8)CGU_BASE_SSP1_CLK_CLK_SEL(x) ((x) << CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT)ssp_master_slave_tCGU_BASE_LCD_CLK_AUTOBLOCK (1 << CGU_BASE_LCD_CLK_AUTOBLOCK_SHIFT)SSP_CR1(port) MMIO32((port) + 0x004)CGU_BASE_CGU_OUT1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT)__INT16_MAX__ 0x7fffssp_mode_tCGU_BASE_PERIPH_CLK MMIO32(CGU_BASE + 0x064)CGU_BASE_SAFE_CLK_AUTOBLOCK_SHIFT (11)CGU_IDIVA_CTRL_CLK_SEL_SHIFT (24)CGU_XTAL_OSC_CTRL_ENABLE (1 << CGU_XTAL_OSC_CTRL_ENABLE_SHIFT)__INT_WIDTH__ 32CGU_IDIVA_CTRL_AUTOBLOCK_SHIFT (11)CGU_BASE_UART1_CLK MMIO32(CGU_BASE + 0x0A0)__QQ_FBIT__ 7RITIMER_BASE (PERIPH_BASE_APB2 + 0x00000)CGU_SRC_IDIVD 0x0F__SIG_ATOMIC_WIDTH__ 32CGU_IDIVC_CTRL_CLK_SEL_SHIFT (24)__FLT64_EPSILON__ 2.2204460492503131e-16F64CGU_BASE_UART1_CLK_PD_SHIFT (0)CGU_BASE_UART1_CLK_AUTOBLOCK_SHIFT (11)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32RGU_BASE (0x40053000U)__ULLFRACT_EPSILON__ 0x1P-64ULLR__SIZEOF_WINT_T__ 4CGU_BASE_LCD_CLK_PD_SHIFT (0)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17CGU_PLL0AUDIO_CTRL_MOD_PD (1 << CGU_PLL0AUDIO_CTRL_MOD_PD_SHIFT)__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1CGU_PLL1_CTRL_PSEL(x) ((x) << CGU_PLL1_CTRL_PSEL_SHIFT)__FLT32X_HAS_DENORM__ 1CGU_IDIVB_CTRL_IDIV_MASK (0xf << CGU_IDIVB_CTRL_IDIV_SHIFT)__ULLACCUM_MIN__ 0.0ULLKSSP1_RIS SSP_RIS(SSP1)__INT_FAST32_WIDTH__ 32CGU_IDIVE_CTRL_IDIV(x) ((x) << CGU_IDIVE_CTRL_IDIV_SHIFT)CGU_IDIVA_CTRL_CLK_SEL(x) ((x) << CGU_IDIVA_CTRL_CLK_SEL_SHIFT)CGU_PLL0AUDIO_STAT MMIO32(CGU_BASE + 0x02C)CGU_PLL0USB_MDIV_SELI(x) ((x) << CGU_PLL0USB_MDIV_SELI_SHIFT)CGU_IDIVB_CTRL MMIO32(CGU_BASE + 0x04C)CGU_PLL0AUDIO_MDIV_MDEC(x) ((x) << CGU_PLL0AUDIO_MDIV_MDEC_SHIFT)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODSSP_ENABLE BIT1RTC_BASE (0x40046000U)CGU_PLL1_CTRL_NSEL_SHIFT (12)CGU_PLL0USB_CTRL_CLKEN_SHIFT (4)CGU_PLL0AUDIO_CTRL_CLKEN (1 << CGU_PLL0AUDIO_CTRL_CLKEN_SHIFT)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H CGU_FREQ_MON_MEAS (1 << CGU_FREQ_MON_MEAS_SHIFT)AES_BASE (0x400F1000U)__GCC_CONSTRUCTIVE_SIZE 64CGU_BASE_VADC_CLK_AUTOBLOCK (1 << CGU_BASE_VADC_CLK_AUTOBLOCK_SHIFT)__LLFRACT_IBIT__ 0SSP_CR0(port) MMIO32((port) + 0x000)uint32_tBIT12 (1<<12)LPC43XX_SSP_H SSP0_CPSR SSP_CPSR(SSP0)__SACCUM_EPSILON__ 0x1P-7HKCGU_BASE_APLL_CLK_CLK_SEL(x) ((x) << CGU_BASE_APLL_CLK_CLK_SEL_SHIFT)SSP_DATA_13BITSCGU_BASE_LCD_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_LCD_CLK_CLK_SEL_SHIFT)__UINT_FAST16_TYPE__ unsigned intCGU_BASE_SAFE_CLK_AUTOBLOCK (1 << CGU_BASE_SAFE_CLK_AUTOBLOCK_SHIFT)__UHA_IBIT__ 8CGU_BASE_PERIPH_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15CGU_BASE_SSP1_CLK_PD (1 << CGU_BASE_SSP1_CLK_PD_SHIFT)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)ssp_num__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8CGU_PLL0USB_CTRL MMIO32(CGU_BASE + 0x020)CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK (1 << CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK_SHIFT)CGU_BASE_PHY_TX_CLK_CLK_SEL(x) ((x) << CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT)__INT_LEAST16_TYPE__ short intCGU_PLL0USB_NP_DIV MMIO32(CGU_BASE + 0x028)SSP_MODE_LOOPBACKCGU_IDIVA_CTRL_PD (1 << CGU_IDIVA_CTRL_PD_SHIFT)CGU_PLL0USB_CTRL_DIRECTO_SHIFT (3)__DBL_MAX__ ((double)1.7976931348623157e+308L)CGU_SRC_IDIVC 0x0EINT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CCGU_PLL1_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL1_CTRL_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_FRM_SHIFT (6)CGU_PLL0USB_CTRL_CLK_SEL(x) ((x) << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__UINTPTR_MAX__ 0xffffffffUCGU_FREQ_MON_FCNT(x) ((x) << CGU_FREQ_MON_FCNT_SHIFT)__HQ_FBIT__ 15__bool_true_false_are_defined 1USART2_BASE (PERIPH_BASE_APB2 + 0x01000)CGU_BASE_UART2_CLK MMIO32(CGU_BASE + 0x0A4)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATssp_datasize_tCGU_BASE_SPIFI_CLK_PD_SHIFT (0)CGU_FREQ_MON_RCNT_MASK (0x1ff << CGU_FREQ_MON_RCNT_SHIFT)CGU_BASE_CGU_OUT0_CLK_PD_SHIFT (0)__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)MCPWM_BASE (PERIPH_BASE_APB1 + 0x00000)LPC43XX_MEMORYMAP_H INT_LEAST64_MINPTRDIFF_MAXCGU_BASE_APB3_CLK MMIO32(CGU_BASE + 0x084)CGU_PLL0USB_MDIV_SELP_SHIFT (17)SSP_CPOL_0_CPHA_0SSP_CPOL_0_CPHA_1__LLFRACT_EPSILON__ 0x1P-63LLRCGU_PLL0USB_NP_DIV_NDEC(x) ((x) << CGU_PLL0USB_NP_DIV_NDEC_SHIFT)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__CGU_PLL1_CTRL_DIRECT_SHIFT (7)WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32CGU_BASE_SDIO_CLK_PD_SHIFT (0)__ATOMIC_ACQ_REL 4ADC1_BASE (PERIPH_BASE_APB3 + 0x04000)LPC43XX_M0 1__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)dataCGU_BASE_PERIPH_CLK_PD_SHIFT (0)CGU_BASE_LCD_CLK_CLK_SEL_SHIFT (24)CGU_BASE_VADC_CLK MMIO32(CGU_BASE + 0x08C)CGU_BASE_UART3_CLK_AUTOBLOCK (1 << CGU_BASE_UART3_CLK_AUTOBLOCK_SHIFT)SSP_FRAME_TI__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)CGU_BASE_UART3_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART3_CLK_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_PD (1 << CGU_PLL0AUDIO_CTRL_PD_SHIFT)CGU_BASE_USB1_CLK_PD (1 << CGU_BASE_USB1_CLK_PD_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULLCGU_BASE_SDIO_CLK_AUTOBLOCK (1 << CGU_BASE_SDIO_CLK_AUTOBLOCK_SHIFT)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0__ARM_FEATURE_DSPINT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int__ARM_FEATURE_CDE_COPROCCGU_PLL0USB_CTRL_BYPASS (1 << CGU_PLL0USB_CTRL_BYPASS_SHIFT)../ssp.cSSP_DATA_9BITSGCC: (15:12.2.rel1-1) 12.2.1 20221205 | (AE$ A0TA A+aeabi!6S-M M          D*, "$&(. 4e-[-0  Tssp.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.22.395ffb693017d551ed93d11c39ba4361wm4.ssp.h.46.fffaf39f115091980571760c0a31a002wm4.cgu.h.37.c480a83e7590bba775f2472229e8edb0ssp_disablessp_initssp_transfer "&-4;BGUZhm{ '-3:PV\bi  , 1>KXdov '+0:ELWaej 1 Qx*a   & $-3<BK #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y   #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5;AGMSY_ekqw} %+17=CIOU\ #)/5;AGMSY_ekqw} #)/5;AGMSY_ekqw} %,3:AHOV]dkry !(/6=DKRY`gnu|$+29@GNU\cjqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BIPW^elsz ")07>ELSZahov} %,3:AHOV]dkry    ! ( / 6 = D K R Y ` g n u |                        $ + 2 9 @ G N U \ c j q x             $(PT .symtab.strtab.shstrtab.text.data.bss.text.ssp_disable.text.ssp_init.text.ssp_transfer.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 1@ 1 L 1!X 1"d 1#p 1$| 1% 1&!',>MTTdu` @0P1p:~ @`10 @ 1C, @ 1oR @ P1~  @p 1? @h 1[N @1" @`(1  @01"a @1$ @@1&   @p 1($ @81*0&0'h @P01.p,D@21 uart.o/ 0 0 0 644 68564 ` ELF(4(87 !"#$%&'()*+,-FGF$xFF $xF-LBOG,LBO+LB=+L+M%`$`$`Ei&(O4h=`%h.B% &e%h.B$%eD``bDi<`h,C` D`$#@`#h3@`CF@NF#3@Cbh@cFC#C)C`eFF LB L M%` LM%` LM%` @@ @@ @@@@"CiB @pG F"1 hBhpGFp&$5)+hB#hpp6B#  "4#hB`F l tY_ b#/&lR #.Q& 1co ʕ4u}Fq int,[QrZl'{'ZnwQ|.]9QmpUW+:(8gL@ @v @_ @`QprKyWQ~K.|C{ D* j![LP.FQ! j bn F,{&L!gU9jQ${R! jQG# FywR jp e FL! j# F :4L! j F'%20v//LP~/4A;0d^901^1X1%F1=FHd3 j\P!4 j( 4:!; 9 IB$ > :!; 9 IB>! I:!;9!:!;9!I:!; 9 I( :!; 9 I .?:!; 9 'I@z % Uy $ >  4: ; 9 I?.?: ; 9 '@z I.?: ; 9 '@zPPul P *P*,ulPul P *P*,ulP 0 V ,VPqlPqlP P PPP P PPPS PQQQRRRSSs  t s4ts4U qu!qr!u!qR!u! QR!u! QP<,(, ?@cL4PH@\obom i!Dy" #0$]&j(r0` O $f(CLgMvjy+' =-VfqMY`b@8 Uuake eV`G=C]oATX_F!/Kf11 @$q'XIYiAWQV-j_d{HyuHO0=M Ns;Gs9W\7ÁnEIP}a7e_\1~YބK<|0(C,ц8zJyt:OX!${"&)>jd#eKffbg*kj/knRoJ>p}q@tUu-;xtnyPz>{e ~7?-XV K'aJh6 t_,tk_MRci~G'^7sԝjSq|BBELd[%-+LH/+|GB, vyeW 01XYR_#}YfNo%n#PJ<w$. +i?jq*P{Kf-3&zf_+g#uÃ%-jt^s9,ub!<&b'-92țCG;DPOE&FeI=LQ#RnST`RUV=WkSX)YZU[\i]ӕ^X_!F`la/b5cHdpeFfmghisIjqk=l!m3Lnto\JpIrg5S,N !>&@( !)&Y*q"+:, -F.056l78)9NK:^;?&@q;AOMBxH IBJJKqzLMENvAO&P*nQekWFXY?Zb [ahbcxfdeNfcgzhn#n,qoKpCq?1r1wɔ{]NRO <&%z(+.$1p4j\7 :?(KBE HKNQΓT^W-ZD]!`g~mzscvd|>r\m6}(!n6~!KA 0Q!$UDajKNLU8\|O|iI7BƟwNvs Z"8ߍ%;^.Z%"- YXuXƉtV*{2z9f&91U8.-dGxXeWim!S-ĢRCh<%/Z2=5k8͘;`>|A<DTGʇJT~MdPB?SV2Yb\,~_AbePxhWrknqeVt}w/0z(} Scn,7#y.{! ESd]MiQ5k4.v7V-wS!0"B jZ52g|V+CkTxlhkZ`Cy(o tW 9[y,ЀkP:\^si?R75EH0~ W1.~:`[~pڞa%4|O vM֏O# mowc ~*$ \4aaBtIt0)K A["eu֋օYsQAZ4!*%v {+47HO~w<+Y06wf}@l]59W<}S=b>4<29;EM'p`tngnoH^? C{+;&E}9}q4+zR ../usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/lpc43xx../../../include/libopencm3/cm3uart.cstdint.huart.hcommon.hstdbool.hmemorymap.hcgu.h1zJ < &z & >11 . .=  A##    1 g ####   / !."  /&<$<$ " 4 z ##!J<>x >r >#0      .  . 0" !w  !  !.- .  .  # u r  ! > z &  /  / 0!CGU_PLL1_CTRL_FBSEL (1 << CGU_PLL1_CTRL_FBSEL_SHIFT)CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT (24)__DECIMAL_DIG__ 17CGU_BASE_SPIFI_CLK_AUTOBLOCK_SHIFT (11)__UHA_FBIT__ 8CGU_BASE_OUT_CLK_PD (1 << CGU_BASE_OUT_CLK_PD_SHIFT)uart_statusUART1_IER_CTSINT_EN (1 << 7)CGU_BASE_UART0_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART0_CLK_CLK_SEL_SHIFT)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1CGU_BASE_PHY_TX_CLK_PD (1 << CGU_BASE_PHY_TX_CLK_PD_SHIFT)__CHAR_UNSIGNED__ 1ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000)CGU_BASE_PHY_RX_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT (24)__FLT64_HAS_INFINITY__ 1CGU_IDIVC_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVC_CTRL_CLK_SEL_SHIFT)CGU_IDIVB_CTRL_CLK_SEL_SHIFT (24)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffffCGU_PLL0AUDIO_CTRL_SEL_EXT_SHIFT (13)__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)CGU_BASE_SSP1_CLK_CLK_SEL(x) ((x) << CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT)__INTMAX_MAX__ 0x7fffffffffffffffLLCGU_IDIVD_CTRL_CLK_SEL_SHIFT (24)__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LI2C0_BASE (PERIPH_BASE_APB1 + 0x01000)data_readyUART0_NUM__ATOMIC_CONSUME 1__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MAX__ 0xffffffffUCGU_PLL0USB_MDIV_SELR(x) ((x) << CGU_PLL0USB_MDIV_SELR_SHIFT)CGU_IDIVA_CTRL_PD (1 << CGU_IDIVA_CTRL_PD_SHIFT)__ARM_FEATURE_QBITCGU_BASE_APLL_CLK MMIO32(CGU_BASE + 0x0C0)CGU_BASE_SSP1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SSP1_CLK_CLK_SEL_SHIFT)CGU_BASE_OUT_CLK_CLK_SEL_SHIFT (24)CGU_PLL0USB_CTRL_CLK_SEL_SHIFT (24)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308CGU_BASE_APLL_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APLL_CLK_CLK_SEL_SHIFT)__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intC_CCAN1_BASE (PERIPH_BASE_APB1 + 0x04000)__FLT_HAS_DENORM__ 1UART_SYNCCTRL(port) MMIO32((port) + 0x058)__FLT32_MIN__ 1.1754943508222875e-38F32CGU_BASE_SDIO_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT)__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__WCHAR_TYPE__ unsigned intUART_FCR(port) MMIO32((port) + 0x008)__LDBL_MIN_EXP__ (-1021)CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_MASK (0x3fffff << CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT)__LDBL_MANT_DIG__ 53UART_SRC_IDIVC 0x0EINT64_MIN (-INT64_MAX - 1)LPC43XX_UART_H __UINT8_C(c) c__INT16_TYPE__ short intCGU_BASE_USB0_CLK_CLK_SEL(x) ((x) << CGU_BASE_USB0_CLK_CLK_SEL_SHIFT)I2S1_BASE (PERIPH_BASE_APB1 + 0x03000)USB0_BASE (PERIPH_BASE_AHB + 0x06000)UART_LSR_THRE (1 << 5)UINT_FAST32_MAXCGU_BASE_PHY_TX_CLK MMIO32(CGU_BASE + 0x07C)CGU_BASE_SDIO_CLK_PD_SHIFT (0)CGU_PLL0USB_CTRL_PD (1 << CGU_PLL0USB_CTRL_PD_SHIFT)INT_FAST64_MAX __INT_FAST64_MAX__CGU_PLL0AUDIO_CTRL_FRM (1 << CGU_PLL0AUDIO_CTRL_FRM_SHIFT)UART_IIR_ABEO_INT (1 << 8)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64CGU_BASE_APB3_CLK_AUTOBLOCK (1 << CGU_BASE_APB3_CLK_AUTOBLOCK_SHIFT)CGU_BASE_SPIFI_CLK_CLK_SEL(x) ((x) << CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intPERIPH_BASE_APB2 (0x400C0000U)CGU_BASE_SPIFI_CLK_AUTOBLOCK (1 << CGU_BASE_SPIFI_CLK_AUTOBLOCK_SHIFT)CGU_XTAL_OSC_CTRL_ENABLE_SHIFT (0)INT32_MIN (-INT32_MAX - 1)UART_ICR(port) MMIO32((port) + 0x024)uart_rx_data_readyCGU_SRC_32K 0x00WWDT_BASE (PERIPH_BASE_APB0 + 0x00000)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZCGU_PLL1_CTRL MMIO32(CGU_BASE + 0x044)TIMER1_BASE (PERIPH_BASE_APB0 + 0x05000)UART1_IER_BITMASK ((uint32_t)(0x38F))__FLT32_MIN_EXP__ (-125)CGU_BASE_VADC_CLK_PD_SHIFT (0)ATIMER_BASE (0x40040000U)UINT32_MAX __UINT32_MAX__CGU_IDIVB_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVB_CTRL_CLK_SEL_SHIFT)C_CAN0_BASE (PERIPH_BASE_APB3 + 0x02000)__DA_IBIT__ 32__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__CGU_BASE_APB3_CLK_PD (1 << CGU_BASE_APB3_CLK_PD_SHIFT)CGU_BASE_SPI_CLK_AUTOBLOCK (1 << CGU_BASE_SPI_CLK_AUTOBLOCK_SHIFT)TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)UART_ICR_IRDAINV (1 << 1)__SFRACT_EPSILON__ 0x1P-7HRCGU_PLLAUDIO_FRAC_PLLFRACT_CTRL(x) ((x) << CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT)__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAXCGU_PLL0USB_STAT_FR_SHIFT (1)__SQ_FBIT__ 31CGU_BASE_CGU_OUT1_CLK_PD_SHIFT (0)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)CGU_PLL1_STAT_LOCK_SHIFT (0)UART_RS485DLY(port) MMIO32((port) + 0x054)__UHQ_FBIT__ 16CGU_IDIVB_CTRL_IDIV_SHIFT (2)__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__FLT32_MAX_10_EXP__ 38CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT (0)__UINT_FAST8_MAX__ 0xffffffffUCGU_IDIVA_CTRL_AUTOBLOCK (1 << CGU_IDIVA_CTRL_AUTOBLOCK_SHIFT)UINT16_C(c) __UINT16_C(c)CGU_BASE_CGU_OUT0_CLK_CLK_SEL(x) ((x) << CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT)__LACCUM_IBIT__ 32CGU_PLL0AUDIO_CTRL_BYPASS (1 << CGU_PLL0AUDIO_CTRL_BYPASS_SHIFT)CGU_BASE_SDIO_CLK_CLK_SEL(x) ((x) << CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT)__INT_FAST16_WIDTH__ 32CGU_BASE_USB1_CLK MMIO32(CGU_BASE + 0x068)INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1CGU_PLL0AUDIO_CTRL_SEL_EXT (1 << CGU_PLL0AUDIO_CTRL_SEL_EXT_SHIFT)__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffCGU_PLL0USB_MDIV_MDEC_SHIFT (0)CGU_BASE_APB3_CLK_CLK_SEL(x) ((x) << CGU_BASE_APB3_CLK_CLK_SEL_SHIFT)__UINT_FAST16_MAX__ 0xffffffffUCGU_PLL0AUDIO_CTRL_PD_SHIFT (0)CGU_IDIVC_CTRL_PD_SHIFT (0)UART_SCICTRL_GUARDTIME(n) ((uint32_t)(((n)&0xFF)<<8))SSP1_BASE (PERIPH_BASE_APB2 + 0x05000)INT64_C(c) __INT64_C(c)CGU_IDIVD_CTRL_CLK_SEL(x) ((x) << CGU_IDIVD_CTRL_CLK_SEL_SHIFT)CGU_BASE_CGU_OUT1_CLK MMIO32(CGU_BASE + 0x0C8)__GCC_IEC_559_COMPLEX 0CREG_BASE (0x40043000U)__UFRACT_MIN__ 0.0URCGU_PLL0AUDIO_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT)uart_divaddvalCGU_BASE_M4_CLK_PD (1 << CGU_BASE_M4_CLK_PD_SHIFT)__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__CGU_FREQ_MON_CLK_SEL_SHIFT (24)__UINT_LEAST8_TYPE__ unsigned charUART_DLL_MASKBIT ((uint8_t)0xFF)CGU_BASE_UART0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART0_CLK_CLK_SEL_SHIFT)__ACCUM_FBIT__ 15CGU_PLL0USB_CTRL_PD_SHIFT (0)UART_ACR(port) MMIO32((port) + 0x020)long intUINT8_MAXCGU_BASE_SAFE_CLK_CLK_SEL_SHIFT (24)uart_divisorCGU_PLL0USB_STAT MMIO32(CGU_BASE + 0x01C)__INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17CGU_PLL1_CTRL_NSEL_MASK (0x3 << CGU_PLL1_CTRL_NSEL_SHIFT)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1CGU_BASE_PERIPH_CLK_AUTOBLOCK (1 << CGU_BASE_PERIPH_CLK_AUTOBLOCK_SHIFT)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUART_SRC_PLL0USB 0x07CGU_IDIVB_CTRL_PD (1 << CGU_IDIVB_CTRL_PD_SHIFT)CGU_BASE_UART2_CLK_AUTOBLOCK_SHIFT (11)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32uart_init__UINTMAX_C(c) c ## ULLCGU_IDIVD_CTRL_PD_SHIFT (0)__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON__UART_TIMEOUT_ERROR__FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____TA_FBIT__ 63__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRCGU_BASE_UART3_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART3_CLK_CLK_SEL_SHIFT)CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT (24)UART_LSR_RXFE (1 << 7)short unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)CGU_BASE_PHY_RX_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK_SHIFT (11)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ_SHIFT (12)DAC_BASE (PERIPH_BASE_APB3 + 0x01000)__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__UART_FDR_MULVAL(n) ((uint32_t)(((n)<<4)&0xF0))LCD_BASE (PERIPH_BASE_AHB + 0x08000)CGU_BASE_OUT_CLK MMIO32(CGU_BASE + 0x0AC)CGU_BASE_SSP0_CLK_PD (1 << CGU_BASE_SSP0_CLK_PD_SHIFT)CGU_BASE_LCD_CLK_AUTOBLOCK (1 << CGU_BASE_LCD_CLK_AUTOBLOCK_SHIFT)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)GPDMA_BASE (PERIPH_BASE_AHB + 0x02000)CGU_BASE_UART0_CLK_PD (1 << CGU_BASE_UART0_CLK_PD_SHIFT)UART_SYNCCTRL_NOSTARTSTOP (1 << 5)UART_IER_BITMASK ((uint32_t)(0x307))UART_FCR_FIFO_EN (1 << 0)uart_portBIT27 (1<<27)UART_IIR_INTID_RLS (3 << 1)UART_LSR_FE (1 << 3)CGU_PLL0AUDIO_NP_DIV_PDEC_MASK (0x7f << CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT)__UTA_FBIT__ 64SDIO_BASE (PERIPH_BASE_AHB + 0x04000)CGU_PLL0USB_NP_DIV_PDEC(x) ((x) << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)__FLT_DECIMAL_DIG__ 9CGU_FREQ_MON_CLK_SEL(x) ((x) << CGU_FREQ_MON_CLK_SEL_SHIFT)__thumb__ 1CGU_BASE_SSP1_CLK MMIO32(CGU_BASE + 0x098)signed charGIMA_BASE (PERIPH_BASE_APB2 + 0x07000)uint8_tINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)CGU_BASE_LCD_CLK_AUTOBLOCK_SHIFT (11)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15CGU_BASE_VADC_CLK_CLK_SEL(x) ((x) << CGU_BASE_VADC_CLK_CLK_SEL_SHIFT)__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1UART_DLM(port) MMIO32((port) + 0x004)PTRDIFF_MINerror__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)CGU_BASE_UART0_CLK_AUTOBLOCK (1 << CGU_BASE_UART0_CLK_AUTOBLOCK_SHIFT)UART_LSR_PE (1 << 2)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77CGU_BASE_APB3_CLK_PD_SHIFT (0)UART_LCR_BREAK_EN (1 << 6)__FLT64_MAX_10_EXP__ 308__WCHAR_WIDTH__ 32MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINUART3 USART3_BASE__INT_FAST32_WIDTH__ 32UART_ICR_IRDAEN (1 << 0)CGU_BASE (0x40050000U)GPIO_PIN_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x07000)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38UART_DATABIT_6UART_DATABIT_7__FRACT_MAX__ 0X7FFFP-15R__GCC_IEC_559 0__SHRT_WIDTH__ 16INT_LEAST32_MAX __INT_LEAST32_MAX__CGU_IDIVE_CTRL_PD (1 << CGU_IDIVE_CTRL_PD_SHIFT)CGU_BASE_PHY_RX_CLK MMIO32(CGU_BASE + 0x078)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5CGU_BASE_SPIFI_CLK_PD (1 << CGU_BASE_SPIFI_CLK_PD_SHIFT)__ARM_ARCH_EXT_IDIV__CGU_PLL0AUDIO_CTRL_AUTOBLOCK_SHIFT (11)UART_IER_ABTOINT_EN (1 << 9)CGU_IDIVB_CTRL_PD_SHIFT (0)CGU_PLL0USB_MDIV_SELP_MASK (0x1f << CGU_PLL0USB_MDIV_SELP_SHIFT)CGU_PLL0AUDIO_STAT_FR (1 << CGU_PLL0AUDIO_STAT_FR_SHIFT)CGU_BASE_SSP0_CLK_PD_SHIFT (0)CGU_BASE_SAFE_CLK_CLK_SEL(x) ((x) << CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT)CGU_IDIVE_CTRL_AUTOBLOCK (1 << CGU_IDIVE_CTRL_AUTOBLOCK_SHIFT)__UINT16_MAX__ 0xffffCGU_PLL0USB_CTRL_AUTOBLOCK (1 << CGU_PLL0USB_CTRL_AUTOBLOCK_SHIFT)__TQ_FBIT__ 127CGU_BASE_UART0_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0USB_NP_DIV_PDEC_MASK (0x7f << CGU_PLL0USB_NP_DIV_PDEC_SHIFT)__USQ_FBIT__ 32INT_FAST16_MINCGU_BASE_UART2_CLK_AUTOBLOCK (1 << CGU_BASE_UART2_CLK_AUTOBLOCK_SHIFT)__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32CGU_SRC_ENET_TX 0x03UART_PARITY_EVENCGU_BASE_USB1_CLK_CLK_SEL(x) ((x) << CGU_BASE_USB1_CLK_CLK_SEL_SHIFT)CGU_BASE_SSP0_CLK MMIO32(CGU_BASE + 0x094)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__STRICT_ANSI__ 1CGU_BASE_SPI_CLK_PD (1 << CGU_BASE_SPI_CLK_PD_SHIFT)UINT_LEAST8_MAXCGU_IDIVD_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVD_CTRL_CLK_SEL_SHIFT)UART_FDR_BITMASK ((uint32_t)(0xFF))UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8CGU_FREQ_MON_FCNT(x) ((x) << CGU_FREQ_MON_FCNT_SHIFT)UART_LSR_BI (1 << 4)__PRAGMA_REDEFINE_EXTNAME 1UART_RS485ADRMATCH(port) MMIO32((port) + 0x050)WINT_MAX __WINT_MAX__CGU_IDIVE_CTRL_PD_SHIFT (0)CGU_FREQ_MON_FCNT_SHIFT (9)__USA_IBIT__ 16UART_RX_DATA_ERRORUART_LCR_BITMASK ((uint8_t)(0xFF))CGU_BASE_PHY_TX_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT)PTRDIFF_MIN (-PTRDIFF_MAX - 1)UART_SCICTRL_TXRETRY(n) ((uint32_t)(((n)&0x07)<<5))__SFRACT_MAX__ 0X7FP-7HR__DBL_IS_IEC_60559__ 2__UINT_FAST64_TYPE__ long long unsigned intCGU_PLL0AUDIO_STAT_FR_SHIFT (1)CGU_PLL1_CTRL_NSEL(x) ((x) << CGU_PLL1_CTRL_NSEL_SHIFT)__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC__CGU_IDIVA_CTRL_IDIV_SHIFT (2)CGU_BASE_SPI_CLK MMIO32(CGU_BASE + 0x074)CGU_BASE_UART2_CLK_CLK_SEL_SHIFT (24)__FLT32_IS_IEC_60559__ 2CGU_BASE_PHY_TX_CLK_PD_SHIFT (0)CGU_FREQ_MON_CLK_SEL_MASK (0x1f << CGU_FREQ_MON_CLK_SEL_SHIFT)UART_SRC_IDIVD 0x0FCGU_PLL0AUDIO_CTRL_BYPASS_SHIFT (1)INT_FAST64_MINADC0_BASE (PERIPH_BASE_APB3 + 0x03000)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LCGU_PLL0AUDIO_CTRL_DIRECTO_SHIFT (3)__USFRACT_MIN__ 0.0UHR__ARM_NEONUART_HDEN_HDEN (1 << 0)CGU_IDIVA_CTRL MMIO32(CGU_BASE + 0x048)__UINT8_MAX__ 0xffCGU_PLL0AUDIO_CTRL_AUTOBLOCK (1 << CGU_PLL0AUDIO_CTRL_AUTOBLOCK_SHIFT)CGU_BASE_APLL_CLK_PD (1 << CGU_BASE_APLL_CLK_PD_SHIFT)__LDBL_MAX_EXP__ 1024UART_ACR_ABTOINT_CLR (1 << 9)CGU_XTAL_OSC_CTRL_HF_SHIFT (2)CGU_PLL0AUDIO_MDIV_MDEC_SHIFT (0)CGU_PLL1_CTRL_FBSEL_SHIFT (6)__DBL_HAS_DENORM__ 1CGU_PLL0USB_MDIV_SELP(x) ((x) << CGU_PLL0USB_MDIV_SELP_SHIFT)CGU_BASE_USB0_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_PERIPH_CLK_PD (1 << CGU_BASE_PERIPH_CLK_PD_SHIFT)CGU_SRC_IDIVB 0x0DCGU_BASE_UART1_CLK_AUTOBLOCK (1 << CGU_BASE_UART1_CLK_AUTOBLOCK_SHIFT)CGU_BASE_SDIO_CLK_PD (1 << CGU_BASE_SDIO_CLK_PD_SHIFT)CGU_FREQ_MON_RCNT(x) ((x) << CGU_FREQ_MON_RCNT_SHIFT)__DA_FBIT__ 31CGU_BASE_OUT_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_OUT_CLK_CLK_SEL_SHIFT)__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fffCGU_FREQ_MON_RCNT_SHIFT (0)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LCGU_XTAL_OSC_CTRL_BYPASS (1 << CGU_XTAL_OSC_CTRL_BYPASS_SHIFT)CGU_IDIVE_CTRL_CLK_SEL_SHIFT (24)CGU_BASE_USB0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_USB0_CLK_CLK_SEL_SHIFT)INT_LEAST8_MAX __INT_LEAST8_MAX__CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT (12)UART_IIR_INTSTAT_PEND (1 << 0)__UINT32_C(c) c ## ULUART1_IER_MSINT_EN (1 << 3)CGU_BASE_PHY_RX_CLK_AUTOBLOCK (1 << CGU_BASE_PHY_RX_CLK_AUTOBLOCK_SHIFT)UART_LCR_WLEN7 (2 << 0)__UACCUM_MIN__ 0.0UKCGU_FREQ_MON_FCNT_MASK (0x3fff << CGU_FREQ_MON_FCNT_SHIFT)CGU_IDIVD_CTRL_AUTOBLOCK_SHIFT (11)__FLT_EPSILON__ 1.1920928955078125e-7FCGU_BASE_UART1_CLK_CLK_SEL_SHIFT (24)UART_LCR_PARITY_SP_1 (1 << 5)__PTRDIFF_TYPE__ intUART_FCR_TRG_LEV2 (2 << 6)__ARM_ARCH_ISA_THUMBCGU_PLL0USB_CTRL_FRM_SHIFT (6)CGU_PLL0AUDIO_CTRL_CLKEN_SHIFT (4)UART_SCICTRL_PROTSEL_T1 (1 << 2)__ARM_FEATURE_MATMUL_INT8data_parity__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0CGU_BASE_UART3_CLK_AUTOBLOCK_SHIFT (11)uart_stopbit_t__HQ_IBIT__ 0UART_ACR_BITMASK ((uint32_t)(0x307))__USACCUM_FBIT__ 8CGU_SRC_PLL1 0x09__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1UART_ICR_BITMASK ((uint32_t)(0x3F))CGU_PLL0USB_MDIV_MDEC_MASK (0x1ffff << CGU_PLL0USB_MDIV_MDEC_SHIFT)CGU_BASE_SPI_CLK_CLK_SEL_SHIFT (24)__ELF__ 1CGU_BASE_APB1_CLK_PD_SHIFT (0)EMC_BASE (PERIPH_BASE_AHB + 0x05000)__FLT32_HAS_QUIET_NAN__ 1UART_PARITY_SP_1__LDBL_HAS_INFINITY__ 1CGU_SRC_GP_CLKIN 0x04__SACCUM_FBIT__ 7UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))CCU1_BASE (0x40051000U)__FLT32X_MAX_10_EXP__ 308UART_LCR_DLAB_EN (1 << 7)CGU_BASE_PERIPH_CLK_CLK_SEL(x) ((x) << CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT)CGU_BASE_OUT_CLK_CLK_SEL(x) ((x) << CGU_BASE_OUT_CLK_CLK_SEL_SHIFT)__ARM_PCS 1CGU_BASE_UART3_CLK_AUTOBLOCK (1 << CGU_BASE_UART3_CLK_AUTOBLOCK_SHIFT)UART_FIFOLVL_BITMASK ((uint32_t)(0x0F0F))bool _BoolCGU_PLL0USB_CTRL_CLKEN_SHIFT (4)UINTMAX_MAX __UINTMAX_MAX__CGU_BASE_OUT_CLK_PD_SHIFT (0)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffCGU_BASE_PERIPH_CLK_AUTOBLOCK_SHIFT (11)CGU_XTAL_OSC_CTRL MMIO32(CGU_BASE + 0x018)CGU_PLLAUDIO_FRAC_PLLFRACT_CTRL_SHIFT (0)BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX__CGU_BASE_OUT_CLK_AUTOBLOCK (1 << CGU_BASE_OUT_CLK_AUTOBLOCK_SHIFT)__FLT32X_IS_IEC_60559__ 2PERIPH_BASE_APB3 (0x400E0000U)UART_DLM_MASKBIT ((uint8_t)0xFF)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAXCGU_PLL1_STAT MMIO32(CGU_BASE + 0x040)CGU_BASE_PHY_RX_CLK_PD_SHIFT (0)__INT_LEAST16_WIDTH__ 16I2S0_BASE (PERIPH_BASE_APB1 + 0x02000)CGU_PLL0USB_CTRL_DIRECTI_SHIFT (2)__DEC_EVAL_METHOD__ 2SCT_BASE (PERIPH_BASE_AHB + 0x00000)__ARM_FEATURE_FP16_FMLCGU_PLL0USB_MDIV_MDEC(x) ((x) << CGU_PLL0USB_MDIV_MDEC_SHIFT)CGU_BASE_UART3_CLK_PD_SHIFT (0)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRCGU_IDIVD_CTRL_IDIV(x) ((x) << CGU_IDIVD_CTRL_IDIV_SHIFT)CGU_IDIVD_CTRL MMIO32(CGU_BASE + 0x054)__WINT_MAX__ 0xffffffffUCGU_BASE_SSP1_CLK_CLK_SEL_SHIFT (24)SCU_BASE (PERIPH_BASE_APB0 + 0x06000)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKUART_IIR_FIFO_EN (3 << 6)CGU_BASE_SSP0_CLK_AUTOBLOCK (1 << CGU_BASE_SSP0_CLK_AUTOBLOCK_SHIFT)CGU_IDIVC_CTRL_PD (1 << CGU_IDIVC_CTRL_PD_SHIFT)__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX__UART_LCR_WLEN8 (3 << 0)__UINT32_MAX__ 0xffffffffULUSART0_BASE (PERIPH_BASE_APB0 + 0x01000)CGU_BASE_M4_CLK_PD_SHIFT (0)__INT_LEAST8_MAX__ 0x7fUART_FIFOLVL_RX(n) ((uint32_t)((n)&0x0F))uart_rx_data_ready_t__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXCGU_SRC_IRC 0x01__UINT64_TYPE__ long long unsigned intCGU_BASE_SAFE_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SAFE_CLK_CLK_SEL_SHIFT)__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024CGU_IDIVC_CTRL_AUTOBLOCK_SHIFT (11)dummy_read__UINT_LEAST32_MAX__ 0xffffffffULUART_FCR_TX_RS (1 << 2)__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)CGU_BASE_APLL_CLK_AUTOBLOCK (1 << CGU_BASE_APLL_CLK_AUTOBLOCK_SHIFT)CGU_SRC_PLL0USB 0x07__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fCGU_OUTCLK_21_CTRL MMIO32(CGU_BASE + 0x0B0)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNEDUSB1_BASE (PERIPH_BASE_AHB + 0x07000)BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intCGU_PLL0USB_CTRL_CLKEN (1 << CGU_PLL0USB_CTRL_CLKEN_SHIFT)__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINUART_SYNCCTRL_CSRC_MASTER (1 << 1)__FLT_EVAL_METHOD_TS_18661_3__ 0CGU_IDIVA_CTRL_IDIV_MASK (0x3 << CGU_IDIVA_CTRL_IDIV_SHIFT)__SCHAR_WIDTH__ 8CGU_BASE_PHY_RX_CLK_CLK_SEL(x) ((x) << CGU_BASE_PHY_RX_CLK_CLK_SEL_SHIFT)BIT18 (1<<18)UINT_FAST16_MAXCGU_BASE_CGU_OUT1_CLK_AUTOBLOCK_SHIFT (11)__UINT_FAST8_TYPE__ unsigned intCGU_BASE_UART1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART1_CLK_CLK_SEL_SHIFT)__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)CGU_PLL1_CTRL_MSEL_MASK (0xff << CGU_PLL1_CTRL_MSEL_SHIFT)CGU_IDIVE_CTRL_IDIV_MASK (0xff << CGU_IDIVE_CTRL_IDIV_SHIFT)__INT32_MAX__ 0x7fffffffLCGU_PLL0AUDIO_STAT_LOCK (1 << CGU_PLL0AUDIO_STAT_LOCK_SHIFT)UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__FLT32_MANT_DIG__ 24CGU_IDIVA_CTRL_PD_SHIFT (0)INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32UART_LSR(port) MMIO32((port) + 0x014)EVENTROUTER_BASE (0x40044000U)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN__UART_IIR_INTID_CTI (6 << 1)__USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__INT_FAST16_MIN (-INT_FAST16_MAX - 1)BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1UART_SRC_32K 0x00__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3CGU_IDIVD_CTRL_IDIV_MASK (0xf << CGU_IDIVD_CTRL_IDIV_SHIFT)UINT_FAST8_MAX__FLT_MANT_DIG__ 24UART_FCR_TRG_LEV1 (1 << 6)CGU_BASE_APLL_CLK_CLK_SEL_SHIFT (24)__LACCUM_FBIT__ 31CCU2_BASE (0x40052000U)__OPTIMIZE__ 1CGU_BASE_APB3_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APB3_CLK_CLK_SEL_SHIFT)CGU_IDIVD_CTRL_AUTOBLOCK (1 << CGU_IDIVD_CTRL_AUTOBLOCK_SHIFT)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64PERIPH_BASE_APB1 (0x400A0000U)UART_FCR_TRG_LEV0 (0 << 6)UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324LTIMER3_BASE (PERIPH_BASE_APB2 + 0x04000)__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0SPI_PORT_BASE (0x40100000U)CGU_BASE_LCD_CLK_PD (1 << CGU_BASE_LCD_CLK_PD_SHIFT)MMIO16(addr) (*(volatile uint16_t *)(addr))CGU_BASE_APB3_CLK_AUTOBLOCK_SHIFT (11)UART0 USART0_BASEUART_TX_FIFO_SIZE (16)LPC43XX 1__GNUC__ 12CGU_BASE_UART1_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART1_CLK_CLK_SEL_SHIFT)WCHAR_MAXUART_SRC_IRC 0x01CGU_IDIVB_CTRL_AUTOBLOCK_SHIFT (11)__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16CGU_PLL1_CTRL_DIRECT (1 << CGU_PLL1_CTRL_DIRECT_SHIFT)__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UUART_IIR_BITMASK ((uint32_t)(0x3CF))__UQQ_IBIT__ 0CGU_BASE_PERIPH_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT)__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULKCGU_PLL0USB_NP_DIV_PDEC_SHIFT (0)__ARM_ARCH 6CGU_BASE_PHY_RX_CLK_PD (1 << CGU_BASE_PHY_RX_CLK_PD_SHIFT)__FLT_RADIX__ 2BIT3 (1<<3)long long intCGU_SRC_IDIVE 0x10__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXcounterSGPIO_PORT_BASE (0x40101000U)__LDBL_HAS_QUIET_NAN__ 1CGU_PLL0USB_MDIV_SELI_MASK (0x3f << CGU_PLL0USB_MDIV_SELI_SHIFT)PERIPH_BASE_APB0 (0x40080000U)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)CGU_FREQ_MON_MEAS_SHIFT (23)CGU_PLL0USB_CTRL_DIRECTO (1 << CGU_PLL0USB_CTRL_DIRECTO_SHIFT)CGU_BASE_APB1_CLK MMIO32(CGU_BASE + 0x080)CGU_IDIVE_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVE_CTRL_CLK_SEL_SHIFT)__UINT_FAST64_MAX__ 0xffffffffffffffffULLCGU_BASE_M4_CLK_AUTOBLOCK_SHIFT (11)__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1CGU_PLL0AUDIO_CTRL MMIO32(CGU_BASE + 0x030)BIT9 (1<<9)UART_FCR_RX_RS (1 << 1)__FLT32X_MIN__ 2.2250738585072014e-308F32xrx_timeout_nb_cycles__FLT64_MAX_EXP__ 1024CGU_BASE_SAFE_CLK_PD_SHIFT (0)UINT16_MAXUART_SCICTRL_SCIEN (1 << 0)__FLT64_MIN__ 2.2250738585072014e-308F64CGU_PLL0USB_CTRL_AUTOBLOCK_SHIFT (11)__INTMAX_C(c) c ## LLCGU_BASE_USB1_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_M4_CLK MMIO32(CGU_BASE + 0x06C)__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4UART_ACR_MODE (1 << 1)CGU_BASE_PHY_TX_CLK_AUTOBLOCK (1 << CGU_BASE_PHY_TX_CLK_AUTOBLOCK_SHIFT)UART_PARITY_ODDUART_SYNCCTRL_TSBYPASS (1 << 3)CGU_PLL1_CTRL_CLK_SEL(x) ((x) << CGU_PLL1_CTRL_CLK_SEL_SHIFT)__UFRACT_MAX__ 0XFFFFP-16URCGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT (24)__UINT_LEAST32_TYPE__ long unsigned intINT64_MAXCGU_BASE_USB1_CLK_PD_SHIFT (0)CGU_PLL0AUDIO_STAT_LOCK_SHIFT (0)UART_SYNCCTRL_FES (1 << 2)INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0UART_LSR_ERROR_MASK (UART_LSR_OE | UART_LSR_PE | UART_LSR_FE | UART_LSR_BI | UART_LSR_RXFE)SPIFI_BASE (PERIPH_BASE_AHB + 0x03000)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__../uart.c__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__UART_LSR_TEMT (1 << 6)__ARM_32BIT_STATE__UFRACT_FBIT__ 16UART_LCR_PARITY_ODD (0 << 4)__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)CGU_XTAL_OSC_CTRL_BYPASS_SHIFT (1)CGU_FREQ_MON MMIO32(CGU_BASE + 0x014)__LDBL_MAX_10_EXP__ 308CGU_BASE_UART0_CLK_PD_SHIFT (0)UART_DATABIT_5UART_DATABIT_8__INT_FAST32_TYPE__ intuart_writeunsigned intCGU_BASE_SPI_CLK_PD_SHIFT (0)__GCC_ASM_FLAG_OUTPUTS____FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1CGU_PLL1_CTRL_PSEL(x) ((x) << CGU_PLL1_CTRL_PSEL_SHIFT)CGU_BASE_APB1_CLK_AUTOBLOCK_SHIFT (11)CGU_IDIVE_CTRL_CLK_SEL(x) ((x) << CGU_IDIVE_CTRL_CLK_SEL_SHIFT)UART_SRC_GP_CLKIN 0x04__USACCUM_IBIT__ 8UART_IIR(port) MMIO32((port) + 0x008)CGU_PLL0USB_CTRL_BYPASS_SHIFT (1)__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKUART_IER_RBRINT_EN (1 << 0)CGU_PLL0AUDIO_NP_DIV_PDEC(x) ((x) << CGU_PLL0AUDIO_NP_DIV_PDEC_SHIFT)__FLT_EVAL_METHOD__ 0CGU_BASE_UART3_CLK_PD (1 << CGU_BASE_UART3_CLK_PD_SHIFT)CGU_OUTCLK_24_CTRL MMIO32(CGU_BASE + 0x0BC)GPIO_PORT_BASE (0x400F4000U)__SCHAR_MAX__ 0x7fINT_LEAST32_MINUART_RS485CTRL(port) MMIO32((port) + 0x04C)__thumb2____ARM_FEATURE_LDREXCGU_BASE_SPI_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SPI_CLK_CLK_SEL_SHIFT)__UQQ_FBIT__ 8OTP_BASE (0x40045000U)CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK (1 << CGU_BASE_CGU_OUT1_CLK_AUTOBLOCK_SHIFT)INT16_CCGU_PLL0USB_CTRL_FRM (1 << CGU_PLL0USB_CTRL_FRM_SHIFT)__ARM_FP16_ARGS__UACCUM_MAX__ 0XFFFFFFFFP-16UKUART3_NUMINT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__/build/libopencm3/lib/lpc43xx/m0__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1CGU_BASE_USB0_CLK_PD_SHIFT (0)CGU_BASE_M4_CLK_CLK_SEL(x) ((x) << CGU_BASE_M4_CLK_CLK_SEL_SHIFT)uart_num_tCGU_PLL0USB_MDIV MMIO32(CGU_BASE + 0x024)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned charCGU_BASE_APB1_CLK_CLK_SEL(x) ((x) << CGU_BASE_APB1_CLK_CLK_SEL_SHIFT)CGU_BASE_SDIO_CLK_AUTOBLOCK_SHIFT (11)__SIG_ATOMIC_TYPE__ intCGU_PLL0USB_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT)UINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"CGU_BASE_SAFE_CLK_PD (1 << CGU_BASE_SAFE_CLK_PD_SHIFT)INT8_MINUART_SRC_XTAL 0x06CGU_PLL1_STAT_LOCK (1 << CGU_PLL1_STAT_LOCK_SHIFT)true 1CGU_IDIVB_CTRL MMIO32(CGU_BASE + 0x04C)__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)CGU_BASE_VADC_CLK_AUTOBLOCK_SHIFT (11)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1UART_LOAD_DLL(div) ((div) & 0xFF)CGU_PLL1_CTRL_PD (1 << CGU_PLL1_CTRL_PD_SHIFT)__LFRACT_EPSILON__ 0x1P-31LRCGU_PLLAUDIO_FRAC MMIO32(CGU_BASE + 0x03C)lcr_configCGU_OUTCLK_22_CTRL MMIO32(CGU_BASE + 0x0B4)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__UART_SYNCCTRL_SYNC (1 << 0)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAXCGU_BASE_SSP0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT)__INT8_TYPE__ signed charuart_read__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))CGU_PLL1_CTRL_MSEL(x) ((x) << CGU_PLL1_CTRL_MSEL_SHIFT)CGU_PLL0USB_MDIV_SELI_SHIFT (22)__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LUSART3_BASE (PERIPH_BASE_APB2 + 0x02000)CGU_BASE_USB0_CLK_CLK_SEL_SHIFT (24)__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)CGU_BASE_UART2_CLK_CLK_SEL(x) ((x) << CGU_BASE_UART2_CLK_CLK_SEL_SHIFT)__TA_IBIT__ 64CGU_PLL0USB_NP_DIV_NDEC_SHIFT (12)CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT (24)uart_parity_tPERIPH_BASE_AHB (0x40000000U)CGU_IDIVC_CTRL_IDIV_SHIFT (2)CGU_XTAL_OSC_CTRL_HF (1 << CGU_XTAL_OSC_CTRL_HF_SHIFT)__ARM_FEATURE_QRDMXCGU_PLL0USB_MDIV_SELR_MASK (0xf << CGU_PLL0USB_MDIV_SELR_SHIFT)CGU_BASE_M4_CLK_CLK_SEL_SHIFT (24)__ARM_ARCH_ISA_THUMB 1__LONG_LONG_MAX__ 0x7fffffffffffffffLLUART_FIFOLVL_TX(n) ((uint32_t)(((n)>>8)&0x0F))__WINT_WIDTH__ 32UART_SYNCCTRL_CSCEN (1 << 4)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__CGU_BASE_CGU_OUT0_CLK MMIO32(CGU_BASE + 0x0C4)UART_LCR_WLEN6 (1 << 0)CGU_BASE_USB0_CLK_PD (1 << CGU_BASE_USB0_CLK_PD_SHIFT)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0UART_SRC_IDIVA 0x0C_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__UART_FCR_DMAMODE_SEL (1 << 3)__SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1CGU_IDIVE_CTRL_AUTOBLOCK_SHIFT (11)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO_GROUP1_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x09000)CGU_FREQ_MON_RCNT_MASK (0x1ff << CGU_FREQ_MON_RCNT_SHIFT)__FLT32_DIG__ 6INT_LEAST16_MAXCGU_BASE_M4_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_M4_CLK_CLK_SEL_SHIFT)CGU_PLL0USB_STAT_LOCK (1 << CGU_PLL0USB_STAT_LOCK_SHIFT)CGU_IDIVD_CTRL_PD (1 << CGU_IDIVD_CTRL_PD_SHIFT)BIT15 (1<<15)BACKUP_REG_BASE (0x40041000U)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sectionsCGU_PLL0AUDIO_CTRL_DIRECTI (1 << CGU_PLL0AUDIO_CTRL_DIRECTI_SHIFT)UART_SRC_PLL1 0x09CGU_IDIVC_CTRL_AUTOBLOCK (1 << CGU_IDIVC_CTRL_AUTOBLOCK_SHIFT)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1GPIO_GROUP0_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x08000)uart_read_timeoutINT32_MAXCGU_PLL0AUDIO_CTRL_DIRECTO (1 << CGU_PLL0AUDIO_CTRL_DIRECTO_SHIFT)__ACCUM_MIN__ (-0X1P15K-0X1P15K)uart_databit_tCGU_BASE_SDIO_CLK MMIO32(CGU_BASE + 0x090)UART_SRC_PLL0AUDIO 0x08__ARM_FEATURE_CRYPTOCGU_IDIVB_CTRL_CLK_SEL(x) ((x) << CGU_IDIVB_CTRL_CLK_SEL_SHIFT)__INT_LEAST32_TYPE__ long intCGU_BASE_LCD_CLK_CLK_SEL(x) ((x) << CGU_BASE_LCD_CLK_CLK_SEL_SHIFT)CGU_PLL1_CTRL_PSEL_MASK (0x3 << CGU_PLL1_CTRL_PSEL_SHIFT)CGU_PLL0AUDIO_MDIV_MDEC_MASK (0x1ffff << CGU_PLL0AUDIO_MDIV_MDEC_SHIFT)UART_PARITY_NONECGU_BASE_APB1_CLK_CLK_SEL_SHIFT (24)BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLCGU_BASE_CGU_OUT0_CLK_PD (1 << CGU_BASE_CGU_OUT0_CLK_PD_SHIFT)__FRACT_IBIT__ 0I2C1_BASE (PERIPH_BASE_APB3 + 0x00000)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2CGU_SRC_IDIVA 0x0CBIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234SIZE_MAX __SIZE_MAX____FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned intUART_CGU_BASE_CLK_SEL_SHIFT 24__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)CGU_BASE_USB0_CLK MMIO32(CGU_BASE + 0x060)__ULACCUM_IBIT__ 32UART_NO_ERROR__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8CGU_BASE_SSP1_CLK_AUTOBLOCK (1 << CGU_BASE_SSP1_CLK_AUTOBLOCK_SHIFT)UART_LCR_PARITY_EN (1 << 3)__UHQ_IBIT__ 0CGU_BASE_SPI_CLK_CLK_SEL(x) ((x) << CGU_BASE_SPI_CLK_CLK_SEL_SHIFT)INT_LEAST8_MINCGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT (24)CGU_BASE_SDIO_CLK_AUTOBLOCK (1 << CGU_BASE_SDIO_CLK_AUTOBLOCK_SHIFT)BIT29 (1<<29)__INT_FAST16_TYPE__ intCGU_BASE_CGU_OUT0_CLK_AUTOBLOCK (1 << CGU_BASE_CGU_OUT0_CLK_AUTOBLOCK_SHIFT)UART_ACR_START (1 << 0)INT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned intUART_LSR_BITMASK ((uint8_t)(0xFF))__FLT32X_DIG__ 15CGU_BASE_SSP0_CLK_CLK_SEL(x) ((x) << CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT)__UTQ_FBIT__ 128UART_LCR_NO_PARITY (0 << 3)CGU_PLL0AUDIO_CTRL_MOD_PD_SHIFT (14)__FINITE_MATH_ONLY__ 0CGU_PLL1_CTRL_AUTOBLOCK_SHIFT (11)__INT_FAST16_MAX__ 0x7fffffffUART2_NUMCGU_BASE_PERIPH_CLK_CLK_SEL_SHIFT (24)UART_LCR_TWO_STOPBIT (1 << 2)CGU_BASE_UART2_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART2_CLK_CLK_SEL_SHIFT)PTRDIFF_MAX __PTRDIFF_MAX__CGU_BASE_UART2_CLK_PD (1 << CGU_BASE_UART2_CLK_PD_SHIFT)CGU_BASE_VADC_CLK_PD (1 << CGU_BASE_VADC_CLK_PD_SHIFT)CGU_IDIVA_CTRL_CLK_SEL_MASK (0x1f << CGU_IDIVA_CTRL_CLK_SEL_SHIFT)CGU_BASE_SAFE_CLK MMIO32(CGU_BASE + 0x05C)CGU_PLL0USB_CTRL_DIRECTI (1 << CGU_PLL0USB_CTRL_DIRECTI_SHIFT)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKCGU_BASE_M4_CLK_AUTOBLOCK (1 << CGU_BASE_M4_CLK_AUTOBLOCK_SHIFT)CGU_PLL1_CTRL_BYPASS_SHIFT (1)UART_SRC_IDIVB 0x0DCGU_IDIVE_CTRL_IDIV_SHIFT (2)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRuart_error_tCGU_BASE_UART0_CLK MMIO32(CGU_BASE + 0x09C)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVECGU_IDIVA_CTRL_IDIV(x) ((x) << CGU_IDIVA_CTRL_IDIV_SHIFT)CGU_PLL0USB_MDIV_SELR_SHIFT (28)SSP0_BASE (PERIPH_BASE_APB0 + 0x03000)UART_THR_MASKBIT ((uint8_t)0xFF)UART_RBR(port) MMIO32((port) + 0x000)QEI_BASE (PERIPH_BASE_APB2 + 0x06000)WCHAR_MINCGU_SRC_ENET_RX 0x02BEGIN_DECLS CGU_IDIVD_CTRL_IDIV_SHIFT (2)CGU_PLL1_CTRL_CLK_SEL_SHIFT (24)__FLT64_MAX__ 1.7976931348623157e+308F64UART_ACR_ABEOINT_CLR (1 << 8)CGU_BASE_UART1_CLK_PD (1 << CGU_BASE_UART1_CLK_PD_SHIFT)CGU_BASE_UART3_CLK MMIO32(CGU_BASE + 0x0A8)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15UART_FCR_TRG_LEV3 (3 << 6)__FLT32X_MAX__ 1.7976931348623157e+308F32xCGU_PLL0USB_STAT_LOCK_SHIFT (0)__ARM_EABI__ 1CGU_PLL0USB_STAT_FR (1 << CGU_PLL0USB_STAT_FR_SHIFT)__UACCUM_IBIT__ 16INT16_MININTPTR_MIN__FLT_IS_IEC_60559__ 2__THUMBEL__ 1CGU_BASE_USB0_CLK_AUTOBLOCK (1 << CGU_BASE_USB0_CLK_AUTOBLOCK_SHIFT)UART_IER_ABEOINT_EN (1 << 8)CGU_SRC_PLL0AUDIO 0x08CGU_BASE_UART3_CLK_CLK_SEL_SHIFT (24)CGU_BASE_SPIFI_CLK MMIO32(CGU_BASE + 0x070)__QQ_IBIT__ 0CGU_IDIVC_CTRL MMIO32(CGU_BASE + 0x050)CGU_PLL0AUDIO_NP_DIV MMIO32(CGU_BASE + 0x038)CGU_BASE_VADC_CLK_CLK_SEL_SHIFT (24)data_nb_bitsUART_RX_NO_DATA__LLACCUM_FBIT__ 31CGU_BASE_UART2_CLK_PD_SHIFT (0)UART_RBR_MASKBIT ((uint8_t)0xFF)__UINTMAX_TYPE__ long long unsigned intCGU_PLL1_CTRL_AUTOBLOCK (1 << CGU_PLL1_CTRL_AUTOBLOCK_SHIFT)CGU_BASE_PHY_TX_CLK_AUTOBLOCK_SHIFT (11)__USQ_IBIT__ 0CGU_BASE_USB1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_USB1_CLK_CLK_SEL_SHIFT)UART_HDEN(port) MMIO32((port) + 0x040)CGU_SRC_XTAL 0x06__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1CGU_IDIVC_CTRL_CLK_SEL(x) ((x) << CGU_IDIVC_CTRL_CLK_SEL_SHIFT)CGU_BASE_SPI_CLK_AUTOBLOCK_SHIFT (11)INTMAX_MAXUART_LCR_WLEN5 (0 << 0)TIMER2_BASE (PERIPH_BASE_APB2 + 0x03000)CGU_PLL0AUDIO_CTRL_DIRECTI_SHIFT (2)CGU_PLL1_CTRL_BYPASS (1 << CGU_PLL1_CTRL_BYPASS_SHIFT)__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1CGU_PLL1_CTRL_MSEL_SHIFT (16)UART_THR(port) MMIO32((port) + 0x000)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CCGU_BASE_CGU_OUT1_CLK_PD (1 << CGU_BASE_CGU_OUT1_CLK_PD_SHIFT)CGU_BASE_SSP0_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_NP_DIV_NDEC_MASK (0x3ff << CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT)CGU_BASE_CGU_OUT1_CLK_CLK_SEL(x) ((x) << CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT)UART_IER_THREINT_EN (1 << 1)INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intCGU_BASE_APB1_CLK_AUTOBLOCK (1 << CGU_BASE_APB1_CLK_AUTOBLOCK_SHIFT)CGU_IDIVC_CTRL_IDIV_MASK (0xf << CGU_IDIVC_CTRL_IDIV_SHIFT)UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4PMC_BASE (0x40042000U)uint16_t__INT64_C(c) c ## LLCGU_PLL1_CTRL_PSEL_SHIFT (8)CGU_IDIVB_CTRL_IDIV(x) ((x) << CGU_IDIVB_CTRL_IDIV_SHIFT)CGU_PLL0USB_NP_DIV_NDEC_MASK (0x3ff << CGU_PLL0USB_NP_DIV_NDEC_SHIFT)CGU_BASE_SSP1_CLK_AUTOBLOCK_SHIFT (11)CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ (1 << CGU_PLL0AUDIO_CTRL_PLLFRACT_REQ_SHIFT)UART1_BASE (PERIPH_BASE_APB0 + 0x02000)__LONG_MAX__ 0x7fffffffLCGU_PLL0AUDIO_NP_DIV_NDEC(x) ((x) << CGU_PLL0AUDIO_NP_DIV_NDEC_SHIFT)__ARM_FEATURE_CDE__ACCUM_IBIT__ 16CGU_BASE_SPIFI_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_SPIFI_CLK_CLK_SEL_SHIFT)CGU_PLL1_CTRL_PD_SHIFT (0)CGU_BASE_SSP0_CLK_CLK_SEL_SHIFT (24)CGU_BASE_USB1_CLK_CLK_SEL_SHIFT (24)CGU_BASE_APB3_CLK_CLK_SEL_SHIFT (24)CGU_PLL0AUDIO_MDIV MMIO32(CGU_BASE + 0x034)CGU_BASE_OUT_CLK_AUTOBLOCK_SHIFT (11)CGU_LPC43XX_CGU_H short intCGU_BASE_APLL_CLK_AUTOBLOCK_SHIFT (11)CGU_BASE_APB1_CLK_PD (1 << CGU_BASE_APB1_CLK_PD_SHIFT)CGU_BASE_USB1_CLK_AUTOBLOCK (1 << CGU_BASE_USB1_CLK_AUTOBLOCK_SHIFT)__UINT16_C(c) cCGU_OUTCLK_23_CTRL MMIO32(CGU_BASE + 0x0B8)CGU_PLL0AUDIO_CTRL_CLK_SEL(x) ((x) << CGU_PLL0AUDIO_CTRL_CLK_SEL_SHIFT)__UDA_IBIT__ 32UART_IER(port) MMIO32((port) + 0x004)UINT_LEAST32_MAXCGU_BASE_APLL_CLK_PD_SHIFT (0)UART_SCR_BIMASK ((uint8_t)(0xFF))BIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCCGU_BASE_VADC_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_VADC_CLK_CLK_SEL_SHIFT)__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53UART_LCR_PARITY_EVEN (1 << 4)UART_FCR_BITMASK ((uint8_t)(0xCF))BIT5 (1<<5)CGU_BASE_SDIO_CLK_CLK_SEL_SHIFT (24)BIT1 (1<<1)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1INTMAX_MAX __INTMAX_MAX____DBL_DECIMAL_DIG__ 17CGU_BASE_SSP1_CLK_PD_SHIFT (0)BIT8 (1<<8)UART_LSR_RDR (1 << 0)__ULACCUM_FBIT__ 32INT16_C(c) __INT16_C(c)CGU_BASE_SPIFI_CLK_PD_SHIFT (0)CGU_BASE_LCD_CLK MMIO32(CGU_BASE + 0x088)CGU_BASE_CGU_OUT1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_CGU_OUT1_CLK_CLK_SEL_SHIFT)__INT16_MAX__ 0x7fffUART_FDR(port) MMIO32((port) + 0x028)CGU_BASE_PERIPH_CLK MMIO32(CGU_BASE + 0x064)CGU_BASE_SAFE_CLK_AUTOBLOCK_SHIFT (11)CGU_IDIVA_CTRL_CLK_SEL_SHIFT (24)CGU_XTAL_OSC_CTRL_ENABLE (1 << CGU_XTAL_OSC_CTRL_ENABLE_SHIFT)__INT_WIDTH__ 32UART_LCR_PARITY_SP_0 ((1 << 5) | (1 << 4))CGU_IDIVA_CTRL_AUTOBLOCK_SHIFT (11)CGU_BASE_UART1_CLK MMIO32(CGU_BASE + 0x0A0)__QQ_FBIT__ 7RITIMER_BASE (PERIPH_BASE_APB2 + 0x00000)CGU_SRC_IDIVD 0x0F__SIG_ATOMIC_WIDTH__ 32CGU_IDIVC_CTRL_CLK_SEL_SHIFT (24)__FLT64_EPSILON__ 2.2204460492503131e-16F64CGU_BASE_UART1_CLK_PD_SHIFT (0)CGU_BASE_UART1_CLK_AUTOBLOCK_SHIFT (11)__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32RGU_BASE (0x40053000U)__ULLFRACT_EPSILON__ 0x1P-64ULLRUART2 USART2_BASE__SIZEOF_WINT_T__ 4CGU_BASE_LCD_CLK_PD_SHIFT (0)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17CGU_PLL0AUDIO_CTRL_MOD_PD (1 << CGU_PLL0AUDIO_CTRL_MOD_PD_SHIFT)UART1_NUM__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1CGU_IDIVC_CTRL_IDIV(x) ((x) << CGU_IDIVC_CTRL_IDIV_SHIFT)__FLT32X_HAS_DENORM__ 1CGU_IDIVB_CTRL_IDIV_MASK (0xf << CGU_IDIVB_CTRL_IDIV_SHIFT)__ULLACCUM_MIN__ 0.0ULLK__FLT32_EPSILON__ 1.1920928955078125e-7F32CGU_IDIVE_CTRL_IDIV(x) ((x) << CGU_IDIVE_CTRL_IDIV_SHIFT)CGU_IDIVA_CTRL_CLK_SEL(x) ((x) << CGU_IDIVA_CTRL_CLK_SEL_SHIFT)CGU_PLL0AUDIO_STAT MMIO32(CGU_BASE + 0x02C)CGU_PLL0USB_MDIV_SELI(x) ((x) << CGU_PLL0USB_MDIV_SELI_SHIFT)UART_IIR_ABTO_INT (1 << 9)UART_IIR_INTID_RDA (2 << 1)CGU_PLL0AUDIO_MDIV_MDEC(x) ((x) << CGU_PLL0AUDIO_MDIV_MDEC_SHIFT)UART_STOPBIT_1UART_STOPBIT_2__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODCGU_IDIVE_CTRL MMIO32(CGU_BASE + 0x058)RTC_BASE (0x40046000U)UART_SCICTRL(port) MMIO32((port) + 0x048)data_nb_stopuart_numUART_OSR(port) MMIO32((port) + 0x02C)CGU_PLL0AUDIO_CTRL_CLKEN (1 << CGU_PLL0AUDIO_CTRL_CLKEN_SHIFT)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H CGU_FREQ_MON_MEAS (1 << CGU_FREQ_MON_MEAS_SHIFT)AES_BASE (0x400F1000U)__UDQ_IBIT__ 0__GCC_CONSTRUCTIVE_SIZE 64CGU_BASE_VADC_CLK_AUTOBLOCK (1 << CGU_BASE_VADC_CLK_AUTOBLOCK_SHIFT)__LLFRACT_IBIT__ 0CGU_IDIVB_CTRL_AUTOBLOCK (1 << CGU_IDIVB_CTRL_AUTOBLOCK_SHIFT)UART_SRC_ENET_RX 0x02UART_RX_DATA_READYuint32_tBIT12 (1<<12)UART_SCICTRL_NACKDIS (1 << 1)__SACCUM_EPSILON__ 0x1P-7HKuart_mulvalCGU_BASE_APLL_CLK_CLK_SEL(x) ((x) << CGU_BASE_APLL_CLK_CLK_SEL_SHIFT)CGU_BASE_LCD_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_LCD_CLK_CLK_SEL_SHIFT)__UINT_FAST16_TYPE__ unsigned intCGU_BASE_SAFE_CLK_AUTOBLOCK (1 << CGU_BASE_SAFE_CLK_AUTOBLOCK_SHIFT)__UHA_IBIT__ 8UART_ACR_AUTO_RESTART (1 << 2)__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKUART_TER(port) MMIO32((port) + 0x05C)__LDBL_DIG__ 15CGU_BASE_SSP1_CLK_PD (1 << CGU_BASE_SSP1_CLK_PD_SHIFT)UART_LSR_OE (1 << 1)UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MINUART_SRC_IDIVE 0x10__FLT64_DIG__ 15UART_LCR(port) MMIO32((port) + 0x00C)BIT22 (1<<22)__INT_LEAST8_WIDTH__ 8CGU_PLL0USB_CTRL MMIO32(CGU_BASE + 0x020)UART_IER_RLSINT_EN (1 << 2)CGU_BASE_PHY_TX_CLK_CLK_SEL(x) ((x) << CGU_BASE_PHY_TX_CLK_CLK_SEL_SHIFT)__INT_LEAST16_TYPE__ short intCGU_PLL0USB_NP_DIV MMIO32(CGU_BASE + 0x028)UART_ICR_PULSEDIV(n) ((uint32_t)(((n)&0x07)<<3))CGU_PLL0USB_CTRL_DIRECTO_SHIFT (3)__DBL_MAX__ ((double)1.7976931348623157e+308L)CGU_SRC_IDIVC 0x0EINT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CCGU_PLL1_CTRL_CLK_SEL_MASK (0x1f << CGU_PLL1_CTRL_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_FRM_SHIFT (6)CGU_PLL0USB_CTRL_CLK_SEL(x) ((x) << CGU_PLL0USB_CTRL_CLK_SEL_SHIFT)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1UART_FDR_DIVADDVAL(n) ((uint32_t)((n)&0x0F))__UINTPTR_MAX__ 0xffffffffUUART_SYNCCTRL_CCCLR (1 << 6)__HQ_FBIT__ 15__bool_true_false_are_defined 1USART2_BASE (PERIPH_BASE_APB2 + 0x01000)CGU_BASE_UART2_CLK MMIO32(CGU_BASE + 0x0A4)BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATCGU_BASE_UART0_CLK_CLK_SEL_SHIFT (24)CGU_PLL1_CTRL_NSEL_SHIFT (12)UART_DLL(port) MMIO32((port) + 0x000)UART_ICR_FIXPULSE_EN (1 << 2)CGU_BASE_CGU_OUT0_CLK_PD_SHIFT (0)__ARM_ARCHINTMAX_C(c) __INTMAX_C(c)MCPWM_BASE (PERIPH_BASE_APB1 + 0x00000)CGU_BASE_CGU_OUT0_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_CGU_OUT0_CLK_CLK_SEL_SHIFT)LPC43XX_MEMORYMAP_H INT_LEAST64_MINUART_PARITY_SP_0PTRDIFF_MAXCGU_BASE_APB3_CLK MMIO32(CGU_BASE + 0x084)CGU_PLL0USB_MDIV_SELP_SHIFT (17)__LLFRACT_EPSILON__ 0x1P-63LLRCGU_PLL0USB_NP_DIV_NDEC(x) ((x) << CGU_PLL0USB_NP_DIV_NDEC_SHIFT)__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53CGU_BASE_APB1_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_APB1_CLK_CLK_SEL_SHIFT)uart_val__ARM_ASM_SYNTAX_UNIFIED__CGU_PLL1_CTRL_DIRECT_SHIFT (7)WINT_MAX__INT16_C(c) cUART1_IIR_INTID_MODEM (0 << 1)UART1 UART1_BASEWCHAR_MAX __WCHAR_MAX__UART_LCR_ONE_STOPBIT (0 << 2)UART_IIR_INTID_THRE (1 << 1)UART_IIR_INTID_MASK (7 << 1)__ATOMIC_ACQ_REL 4ADC1_BASE (PERIPH_BASE_APB3 + 0x04000)LPC43XX_M0 1__INT32_TYPE__ long int__DBL_MIN_10_EXP__ (-307)dataCGU_BASE_PERIPH_CLK_PD_SHIFT (0)CGU_BASE_LCD_CLK_CLK_SEL_SHIFT (24)CGU_BASE_VADC_CLK MMIO32(CGU_BASE + 0x08C)__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)CGU_BASE_UART3_CLK_CLK_SEL_MASK (0x1f << CGU_BASE_UART3_CLK_CLK_SEL_SHIFT)CGU_PLL0AUDIO_CTRL_PD (1 << CGU_PLL0AUDIO_CTRL_PD_SHIFT)CGU_BASE_USB1_CLK_PD (1 << CGU_BASE_USB1_CLK_PD_SHIFT)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0INT_FAST16_MAXUART_CGU_AUTOBLOCK_CLOCK_BIT 11__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intUART_TER_TXEN (1 << 0)__INT_FAST8_WIDTH__ 32__ARM_FEATURE_CDE_COPROCCGU_PLL0USB_CTRL_BYPASS (1 << CGU_PLL0USB_CTRL_BYPASS_SHIFT)UART_SRC_ENET_TX 0x03UINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205 | AC  ,AAA+aeabi!6S-M M       .0 "$&(*,25f.]14 ,uart.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.22.395ffb693017d551ed93d11c39ba4361wm4.uart.h.29.91cd6c3f394a9fd992df7cfff7c074edwm4.cgu.h.37.c480a83e7590bba775f2472229e8edb0uart_initdummy_readuart_rx_data_readyuart_readuart_read_timeoutuart_write6 "&-4;BGTYfkx (1:CMdjq6 #(5BLPU_chrv  "'15;BMZdhmw{" R z     (3Be]  ( 0   &$-3<B K!RX^djpv| #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y   #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5;AGMSY_ekqw} %+17=CIOU\ #)/5;AGMSY_ekqw}#*18?FMT[bipw~ &-4;BIPW^elsz  #)/5;AGMSY_ekqw} %,3:AHOV]dkry !(/6=DKRY`gnu|$+29@GNU\cjqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BIPW^elsz ")07>ELSZahov} %,3:AHOV]dkry    ! ( / 6 = D K R Y ` g n u |                        $ + 2 9 @ G N U \ c j q x            @|  D"8"<H"L X"\ t"x.symtab.strtab.shstrtab.text.data.bss.rel.text.uart_init.text.uart_rx_data_ready.text.uart_read.text.uart_read_timeout.text.uart_write.bss.dummy_read.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.groupQ4 5#Q@ 5$QL 5%QX 5&Qd 5'Qp 5(Q| 5)Q 5*!'0, @t5 @Yi, @|5 @L5 @ @05 , @(53  @D5 ~  @ 5c @ 5 N @,5"" @(5$ @,05&a @\5(8 @,5*Q  @p 5,)  @D(5.0,g'0 '440 @lP52Ap,65 Xtimer.o/ 0 0 0 644 40608 ` ELF(4(76 !"#$%&'()*+,"ChCC`ChCC`pG"ChCC`pGF"ChCC`pGF`pGhpGhpG`pG#o@ CgpG #o@ CgpGa: %0" DG: ,KN4`[$0=int<1IC w?C%TP/C@TQ[.= w?=TPG=9TQ8 w?8#TP$8>TQJ3T5w?3'T L.Taw?.%T'#P)w?)!TP|0) .?:!; 9!'@z.?:!; 9! 'I@z:!; 9 IB% Uy: ; 9 I$ >  .?: ; 9 '@z6PPPP\  ?    #''?@(x36*H( GPd"p(,SD))9p)H2QF.6< /34C9C>37R@.3$L"O;T |>pC':>$1e%lN)EE2=TF7k~+POO]NQ%I+,C-8h Nj. T|>HJ#TI-& *!f!"8wO)R K} &F#$CNG# <'K>2? 2PLc   !-t [-P2$ 1~%G +(1b1G=\+=?hD"#5BFTFY9S[(IO0 "#HD N40HKo6)q9,=':06UESQ/@'K?PH?ON .kA6)2.J01Dy1<R?X"x {B5- dK  j\/=$a 'U2 t]<&08T .a+.8w#A3U5VZT@Z>F+PMS E\BS0*nMJx=kEPN51MD F;#NN+' {)1l `K>@Wn=+R@N%C%%!<JL!=ICPsS =@t2+> >aC0(?Bc;-MBm$S7(/N}4BuG_JEO!]5(9`C+o-H&M89; $d.Ja3I-gQ;|$7)$Lw"0$J,`2MCoR5".86yQ+=I1U2B7P%F 2-$62oD >Hl0]RBqcQ"RGFU&@'KB*fS!A"Y)8dew6fE4g9jC kun],oXpBq t'.uxu;y6+z!P{~/IE(31'>2Ik%:3/O48,%H.2 G\H=  R9<H} !!T#(5TPR% 9+BR%|@!67//0g,L60CD-q&R?O?88 M * A'RH62 EE 7U NS QXP4M!&v4''2PCD`*EFK6ILQ-RHSGT,UVHW,X>Y0IZ-[\~8]N^4_#`5:aObJc%d;e$f;giOhi&j<k#Ql,m(n,>o}&p`=Qm7,d) !&] ()n/*o+:,-$.056C:7eF8< 9o':2;M?@FA(BJH I!JFKAL8 MrN OP=;Q9WQXY Z[aIbPcBdFDe)f guAhnn<opqr?SwM{1D*,-_. /*0H65<7/8C9:Q=!,>r5?>(@AA@RDiIEZAF9GMH KN4L7MhLNAOpR@SR7TLUV=Y'NZa8[\]U`S0a b4Mc;d(gh8iHjIk57njopqrGu%?v7wa%xyKJ|}85~NDSM<)O&/$3N?L?r,mT! QM4F( j1Q"R;AbP 9@Q@:'M4k38i   E*^yl6LhJ2!Q5|FwD7+-?^GK)RSEG-ROK1G&*y"DAT  ../usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/lpc43xx../../../include/libopencm3/cm3timer.cstdint.htimer.hcommon.hstdbool.hmemorymap.h" / /! /$! /)!. !3 !8!=!!! & "!!! ' "__DECIMAL_DIG__ 17TIMER2_CCR TIMER_CCR(TIMER2)__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1timer_set_prescaler__CHAR_UNSIGNED__ 1ETHERNET_BASE (PERIPH_BASE_AHB + 0x10000)TIMER2_IR TIMER_IR(TIMER2)__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_FBIT__ 7__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LI2C0_BASE (PERIPH_BASE_APB1 + 0x01000)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffUTIMER2_MR2 TIMER_MR2(TIMER2)__ARM_FEATURE_QBITINT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned intC_CCAN1_BASE (PERIPH_BASE_APB1 + 0x04000)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32TIMER_CCR_CAP0FE (1 << 1)__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9TIMER_MR1(timer) MMIO32((timer) + 0x01C)__LDBL_MIN_EXP__ (-1021)INT_FAST16_MIN__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)__UINT8_C(c) c__INT16_TYPE__ short intTIMER_MCR_MR0R (1 << 1)I2S1_BASE (PERIPH_BASE_APB1 + 0x03000)USB0_BASE (PERIPH_BASE_AHB + 0x06000)UINT_FAST32_MAXINT_FAST64_MAX __INT_FAST64_MAX__TIMER_MCR_MR2S (1 << 8)__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1TIMER1_MR1 TIMER_MR1(TIMER1)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intPERIPH_BASE_APB2 (0x400C0000U)TIMER_EMR_EM0 (1 << 0)INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38WWDT_BASE (PERIPH_BASE_APB0 + 0x00000)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZTIMER0 TIMER0_BASETIMER1_BASE (PERIPH_BASE_APB0 + 0x05000)__FLT32_MIN_EXP__ (-125)TIMER_CCR_CAP2RE (1 << 6)TIMER_TCR_CRST (1 << 1)ATIMER_BASE (0x40040000U)UINT32_MAX __UINT32_MAX__C_CAN0_BASE (PERIPH_BASE_APB3 + 0x02000)__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32TIMER_MR2(timer) MMIO32((timer) + 0x020)__FLT64_MIN_10_EXP__ (-307)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__TIMER0_BASE (PERIPH_BASE_APB0 + 0x04000)__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)TIMER0_MR0 TIMER_MR0(TIMER0)TIMER0_CR3 TIMER_CR3(TIMER0)__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__UINT_FAST8_MAX__ 0xffffffffUTIMER1 TIMER1_BASEUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32TIMER0_EMR TIMER_EMR(TIMER0)__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffTIMER_MCR_MR2I (1 << 6)__UINT_FAST16_MAX__ 0xffffffffUTIMER3_CTCR TIMER_CTCR(TIMER3)SSP1_BASE (PERIPH_BASE_APB2 + 0x05000)INT64_C(c) __INT64_C(c)__GCC_IEC_559_COMPLEX 0CREG_BASE (0x40043000U)__UFRACT_MIN__ 0.0URTIMER_MCR_MR1R (1 << 4)WCHAR_MAX __WCHAR_MAX__TIMER3_TC TIMER_TC(TIMER3)__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32TIMER_EMR_EMC_CLEAR 0x1TIMER1_EMR TIMER_EMR(TIMER1)TIMER0_CTCR TIMER_CTCR(TIMER0)__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffUTIMER2_PR TIMER_PR(TIMER2)__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN__LCD_BASE (PERIPH_BASE_AHB + 0x08000)__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32__FLT32X_MIN_EXP__ (-1021)GPDMA_BASE (PERIPH_BASE_AHB + 0x02000)BIT27 (1<<27)EMC_BASE (PERIPH_BASE_AHB + 0x05000)__UTA_FBIT__ 64SDIO_BASE (PERIPH_BASE_AHB + 0x04000)__FLT_DECIMAL_DIG__ 9__thumb__ 1signed charGIMA_BASE (PERIPH_BASE_APB2 + 0x07000)INT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)TIMER2_MR3 TIMER_MR3(TIMER2)INT32_C(c) __INT32_C(c)TIMER_MCR_MR3I (1 << 9)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLKTIMER2_MCR TIMER_MCR(TIMER2)PTRDIFF_MIN__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)TIMER_MCR_MR2R (1 << 7)UINTPTR_MAX __UINTPTR_MAX____ARM_ARCH_PROFILE 77TIMER1_CCR TIMER_CCR(TIMER1)__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MINTIMER_CTCR_CINSEL_CAPN_3 (0x3 << 2)CGU_BASE (0x40050000U)GPIO_PIN_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x07000)__UINT_FAST32_TYPE__ unsigned intunsigned charEND_DECLS __FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38__FRACT_MAX__ 0X7FFFP-15R__SHRT_WIDTH__ 16INT_LEAST32_MAX __INT_LEAST32_MAX__TIMER_CTCR_MODE_COUNTER_FALLING (0x2 << 0)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__TIMER_CTCR_MODE_MASK (0x3 << 0)__UINT16_MAX__ 0xffff__TQ_FBIT__ 127TIMER1_MR2 TIMER_MR2(TIMER1)__USQ_FBIT__ 32TIMER_EMR(timer) MMIO32((timer) + 0x03C)__USES_INITFINI__ 1__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32TIMER3_IR TIMER_IR(TIMER3)TIMER_CCR_CAP0I (1 << 2)INT_FAST32_MIN (-INT_FAST32_MAX - 1)__STRICT_ANSI__ 1TIMER1_MCR TIMER_MCR(TIMER1)TIMER0_MR2 TIMER_MR2(TIMER0)TIMER_CTCR_CINSEL_CAPN_1 (0x1 << 2)UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8TIMER_EMR_EMC_TOGGLE 0x3__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)TIMER_MCR_MR3S (1 << 11)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned int__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____UACCUM_MIN__ 0.0UK__FLT32_IS_IEC_60559__ 2TIMER3_CR2 TIMER_CR2(TIMER3)INT_FAST64_MINADC0_BASE (PERIPH_BASE_APB3 + 0x03000)__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16LTIMER0_MR1 TIMER_MR1(TIMER0)__USFRACT_MIN__ 0.0UHR__ARM_NEONTIMER_CCR_CAP3I (1 << 11)__UINT8_MAX__ 0xffTIMER_IR_MR1INT (1 << 1)__LDBL_MAX_EXP__ 1024__DBL_HAS_DENORM__ 1TIMER2_PC TIMER_PC(TIMER2)__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308LTIMER0_CR1 TIMER_CR1(TIMER0)INT_LEAST8_MAX __INT_LEAST8_MAX__DAC_BASE (PERIPH_BASE_APB3 + 0x01000)__UINT32_C(c) c ## ULBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)__FLT_EPSILON__ 1.1920928955078125e-7FTIMER2_CR1 TIMER_CR1(TIMER2)TIMER_MCR_MR0I (1 << 0)__PTRDIFF_TYPE__ int__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0input__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31TIMER_CCR(timer) MMIO32((timer) + 0x028)__FLT32_HAS_QUIET_NAN__ 1TIMER_IR_CR3INT (1 << 7)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))CCU1_BASE (0x40051000U)TIMER_CCR_CAP0RE (1 << 0)__FLT32X_MAX_10_EXP__ 308TIMER_EMR_EMC2_MASK (0x3 << TIMER_EMR_EMC2_SHIFT)__ARM_PCS 1bool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffTIMER3_PC TIMER_PC(TIMER3)INT16_MAX __INT16_MAX__TIMER3_PR TIMER_PR(TIMER3)__FLT32X_IS_IEC_60559__ 2PERIPH_BASE_APB3 (0x400E0000U)LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16I2S0_BASE (PERIPH_BASE_APB1 + 0x02000)__DEC_EVAL_METHOD__ 2SCT_BASE (PERIPH_BASE_AHB + 0x00000)__ARM_FEATURE_FP16_FMLTIMER_MCR_MR1S (1 << 5)INT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRtimer_enable_counterSCU_BASE (PERIPH_BASE_APB0 + 0x06000)__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULUSART0_BASE (PERIPH_BASE_APB0 + 0x01000)TIMER_CCR_CAP2FE (1 << 7)__INT_LEAST8_MAX__ 0x7f/build/libopencm3/lib/lpc43xx/m0__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEX__UINT64_TYPE__ long long unsigned int__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024TIMER3_EMR TIMER_EMR(TIMER3)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fBIT14 (1<<14)prescaler__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNEDUSB1_BASE (PERIPH_BASE_AHB + 0x07000)BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned int../timer.c__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MINTIMER1_MR3 TIMER_MR3(TIMER1)__FLT_EVAL_METHOD_TS_18661_3__ 0__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAX__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffLTIMER_CTCR_MODE_COUNTER_RISING (0x1 << 0)UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETICTIMER_CR1(timer) MMIO32((timer) + 0x030)TIMER_IR_CR1INT (1 << 5)__FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32EVENTROUTER_BASE (0x40044000U)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8LPC43XX_TIMER_H BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1TIMER1_TCR TIMER_TCR(TIMER1)__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0TIMER3_MR0 TIMER_MR0(TIMER3)TIMER3_CR3 TIMER_CR3(TIMER3)CCU2_BASE (0x40052000U)__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__FLT64_NORM_MAX__ 1.7976931348623157e+308F64PERIPH_BASE_APB1 (0x400A0000U)__FINITE_MATH_ONLY__ 0TIMER2_CR0 TIMER_CR0(TIMER2)__LDBL_DENORM_MIN__ 4.9406564584124654e-324LTIMER3_BASE (PERIPH_BASE_APB2 + 0x04000)__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0SPI_PORT_BASE (0x40100000U)MMIO16(addr) (*(volatile uint16_t *)(addr))TIMER_CTCR_MODE_COUNTER_BOTH (0x3 << 0)TIMER2 TIMER2_BASELPC43XX 1__GNUC__ 12TIMER_MCR_MR3R (1 << 10)WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UTIMER_EMR_EM3 (1 << 3)__UQQ_IBIT__ 0__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6__FLT_RADIX__ 2BIT3 (1<<3)long long intTIMER_TCR(timer) MMIO32((timer) + 0x004)__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAXTIMER2_CR2 TIMER_CR2(TIMER2)SGPIO_PORT_BASE (0x40101000U)__LDBL_HAS_QUIET_NAN__ 1PERIPH_BASE_APB0 (0x40080000U)__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)TIMER_EMR_EMC_NOTHING 0x0__FLT32X_MIN__ 2.2250738585072014e-308F32xTIMER_EMR_EMC0_SHIFT 4INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64timer_set_mode__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4__UFRACT_MAX__ 0XFFFFP-16URTIMER0_IR TIMER_IR(TIMER0)INT64_MAX__UHA_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0SPIFI_BASE (PERIPH_BASE_AHB + 0x03000)TIMER1_CR1 TIMER_CR1(TIMER1)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__TIMER_MR0(timer) MMIO32((timer) + 0x018)count__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308TIMER_CTCR_MODE_TIMER (0x0 << 0)__INT_FAST32_TYPE__ intunsigned int__GCC_ASM_FLAG_OUTPUTS____FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK__FLT_EVAL_METHOD__ 0GPIO_PORT_BASE (0x400F4000U)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32__thumb2____ARM_FEATURE_LDREX__UQQ_FBIT__ 8OTP_BASE (0x40045000U)INT16_CTIMER_CCR_CAP1I (1 << 5)__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX__TIMER3_CR1 TIMER_CR1(TIMER3)__LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1TIMER_MCR_MR0S (1 << 2)__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned char__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINTIMER_PR(timer) MMIO32((timer) + 0x00C)true 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)TIMER_TCR_CEN (1 << 0)__LDBL_MIN_10_EXP__ (-307)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1TIMER0_CCR TIMER_CCR(TIMER0)__LFRACT_EPSILON__ 0x1P-31LRTIMER0_TCR TIMER_TCR(TIMER0)__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX__TIMER_CCR_CAP3RE (1 << 9)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAX__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))INT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)__TA_IBIT__ 64TIMER_EMR_EM2 (1 << 2)TIMER3_MR1 TIMER_MR1(TIMER3)TIMER0_PC TIMER_PC(TIMER0)PERIPH_BASE_AHB (0x40000000U)TIMER0_PR TIMER_PR(TIMER0)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1TIMER0_MR3 TIMER_MR3(TIMER0)__LONG_LONG_MAX__ 0x7fffffffffffffffLLTIMER_MCR_MR1I (1 << 3)__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__TIMER0_MCR TIMER_MCR(TIMER0)BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1TIMER1_TC TIMER_TC(TIMER1)INT8_MIN (-INT8_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1GPIO_GROUP1_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x09000)__FLT32_DIG__ 6INT_LEAST16_MAXBIT15 (1<<15)BACKUP_REG_BASE (0x40041000U)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sectionsTIMER_IR_CR0INT (1 << 4)BIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1GPIO_GROUP0_INTERRUPT_BASE (PERIPH_BASE_APB0 + 0x08000)INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)TIMER2_MR0 TIMER_MR0(TIMER2)__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long inttimer_resetBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULLTIMER_IR(timer) MMIO32((timer) + 0x000)__FRACT_IBIT__ 0I2C1_BASE (PERIPH_BASE_APB3 + 0x00000)TIMER1_CR0 TIMER_CR0(TIMER1)UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38Flong long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__ULLACCUM_EPSILON__ 0x1P-32ULLK__APCS_32__ 1__DQ_FBIT__ 63INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned int__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128TIMER_MR3(timer) MMIO32((timer) + 0x024)TIMER_CR2(timer) MMIO32((timer) + 0x034)timer_peripheralTIMER1_CR2 TIMER_CR2(TIMER1)__INT_FAST16_MAX__ 0x7fffffffTIMER_EMR_EMC0_MASK (0x3 << TIMER_EMR_EMC0_SHIFT)PTRDIFF_MAX __PTRDIFF_MAX__TIMER_PC(timer) MMIO32((timer) + 0x010)TIMER_IR_MR0INT (1 << 0)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRTIMER_IR_MR3INT (1 << 3)__DQ_IBIT__ 0__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intSSP0_BASE (PERIPH_BASE_APB0 + 0x03000)TIMER1_CTCR TIMER_CTCR(TIMER1)TIMER0_TC TIMER_TC(TIMER0)QEI_BASE (PERIPH_BASE_APB2 + 0x06000)WCHAR_MINBEGIN_DECLS TIMER_CTCR_CINSEL_CAPN_2 (0x2 << 2)TIMER2_TCR TIMER_TCR(TIMER2)__FLT64_MAX__ 1.7976931348623157e+308F64__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__LLFRACT_EPSILON__ 0x1P-63LLR__FLT32X_MAX__ 1.7976931348623157e+308F32x__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1USART3_BASE (PERIPH_BASE_APB2 + 0x02000)__QQ_IBIT__ 0__LLACCUM_FBIT__ 31__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMINTIMER1_IR TIMER_IR(TIMER1)__INTMAX_TYPE__ long long intUINTPTR_MAX__GCC_ATOMIC_INT_LOCK_FREE 1INTMAX_MAXTIMER_CTCR_CINSEL_CAPN_0 (0x0 << 2)TIMER2_BASE (PERIPH_BASE_APB2 + 0x03000)__ARM_FEATURE_FP16_SCALAR_ARITHMETICTIMER_EMR_EM1 (1 << 1)__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__FLT64_HAS_INFINITY__ 1TIMER3_CCR TIMER_CCR(TIMER3)__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_CINT64_MINTIMER_EMR_EMC3_SHIFT 10__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRTIMER2_CR3 TIMER_CR3(TIMER2)__SIZEOF_SIZE_T__ 4PMC_BASE (0x40042000U)TIMER_CCR_CAP3FE (1 << 10)__INT64_C(c) c ## LLUART1_BASE (PERIPH_BASE_APB0 + 0x02000)__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDE__ACCUM_IBIT__ 16TIMER3_MR2 TIMER_MR2(TIMER3)timer_disable_countershort int__UINT16_C(c) cTIMER_EMR_EMC1_SHIFT 6__UDA_IBIT__ 32modeUINT_LEAST32_MAXTIMER_EMR_EMC3_MASK (0x3 << TIMER_EMR_EMC3_SHIFT)BIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROC__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53TIMER3 TIMER3_BASEBIT5 (1<<5)__GNUC_PATCHLEVEL__ 1BIT1 (1<<1)INT8_CINT_LEAST32_MAX__SIZEOF_FLOAT__ 4timer_set_count_input__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fffTIMER_TC(timer) MMIO32((timer) + 0x008)__INT_WIDTH__ 32TIMER2_MR1 TIMER_MR1(TIMER2)__QQ_FBIT__ 7RITIMER_BASE (PERIPH_BASE_APB2 + 0x00000)UINT_LEAST8_MAX__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64TIMER3_MR3 TIMER_MR3(TIMER3)TIMER_CCR_CAP1FE (1 << 4)timer_get_prescaler__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32RGU_BASE (0x40053000U)__ULLFRACT_EPSILON__ 0x1P-64ULLR__SIZEOF_WINT_T__ 4__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)TIMER_EMR_EMC1_MASK (0x3 << TIMER_EMR_EMC1_SHIFT)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1TIMER1_PC TIMER_PC(TIMER1)__ULLACCUM_MIN__ 0.0ULLKTIMER_CCR_CAP1RE (1 << 3)__INT_FAST32_WIDTH__ 32TIMER1_PR TIMER_PR(TIMER1)timer_get_counter__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODTIMER0_CR2 TIMER_CR2(TIMER0)TIMER_IR_CR2INT (1 << 6)RTC_BASE (0x40046000U)TIMER1_MR0 TIMER_MR0(TIMER1)TIMER1_CR3 TIMER_CR3(TIMER1)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H AES_BASE (0x400F1000U)TIMER2_TC TIMER_TC(TIMER2)__GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0TIMER0_CR0 TIMER_CR0(TIMER0)uint32_tBIT12 (1<<12)TIMER_MCR(timer) MMIO32((timer) + 0x014)__SACCUM_EPSILON__ 0x1P-7HK__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULK__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXBIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__INT_LEAST16_TYPE__ short intTIMER3_CR0 TIMER_CR0(TIMER3)TIMER_EMR_EMC_SET 0x2__DBL_MAX__ ((double)1.7976931348623157e+308L)timer_set_counterINT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CTIMER2_CTCR TIMER_CTCR(TIMER2)INT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__UINTPTR_MAX__ 0xffffffffU__HQ_FBIT__ 15__bool_true_false_are_defined 1USART2_BASE (PERIPH_BASE_APB2 + 0x01000)BIT26 (1<<26)TIMER2_EMR TIMER_EMR(TIMER2)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SAT__ARM_ARCHTIMER_CCR_CAP2I (1 << 8)TIMER_IR_MR2INT (1 << 2)INTMAX_C(c) __INTMAX_C(c)MCPWM_BASE (PERIPH_BASE_APB1 + 0x00000)LPC43XX_MEMORYMAP_H INT_LEAST64_MINPTRDIFF_MAXTIMER_EMR_EMC2_SHIFT 8TIMER3_TCR TIMER_TCR(TIMER3)__ARM_ARCH_6M__ 1__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53TIMER_CTCR(timer) MMIO32((timer) + 0x070)__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__ATOMIC_ACQ_REL 4ADC1_BASE (PERIPH_BASE_APB3 + 0x04000)LPC43XX_M0 1__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)__ULLFRACT_FBIT__ 64__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)TIMER_CR0(timer) MMIO32((timer) + 0x02C)__UINTMAX_MAX__ 0xffffffffffffffffULL__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0TIMER_CR3(timer) MMIO32((timer) + 0x038)INT_FAST16_MAXTIMER_CTCR_CINSEL_MASK (0x3 << 2)__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long intTIMER3_MCR TIMER_MCR(TIMER3)__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205 |      A+aeabi!6S-M M            -/!#%')+1 3d,03\ h  }    timer.c$twm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.22.395ffb693017d551ed93d11c39ba4361wm4.timer.h.45.f974f2d0aadff31f08efbc4412bbe219timer_resettimer_enable_countertimer_disable_countertimer_set_countertimer_get_countertimer_get_prescalertimer_set_prescalertimer_set_modetimer_set_count_input "&-4;BIPUcjx} ",06? NX\bg v (   ( 0 8@HP   % +17= $!-"3#<$B% #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y   #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5;AGMSY_ekqw} %+17=CIOU\ #)/5;AGMSY_ekqw} %+17=CIOU[bipw~ &-4;BIPW^elsz ")07>ELSZahov} - Q l &$&(4&8 D&H T&X d&ht&x&&.symtab.strtab.shstrtab.text.data.bss.text.timer_reset.text.timer_enable_counter.text.timer_disable_counter.text.timer_set_counter.text.timer_get_counter.text.timer_get_prescaler.text.timer_set_prescaler.text.timer_set_mode.text.timer_set_count_input.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 4'@ 4(L 4)X 4*d 4+p 4,| 4-!',> Y u    @ w4,:( @x4@`< @xP4SCO @ yH4gaIc @hyH4g~ c @y 4g(c @ 4!gDNc @ȇ4#g"c @(4%gc @ȋ04'gac @4)gc @Ȏ4+x t @pH4-0@U0'p'Pp @41pp,q57 uHvector.o/ 0 0 0 644 39904 ` ELF(В4(:9 !"#$%&'()*+,-./FpGF)K*JpB :'J4B#JB :23`Bр#JhMN C`B $>v͘G#4BMNB $>v͘G#4BMNB $>v͘G#4Bp 3  6@o )'m "I4` 6 int+ u=N-/ O;0O+1nmi23 &456=7T@8,90::4#/;8U?<<irq=d@<?udutuQ@7Cu;C!u C(u0C0u'C7uDt?*' + $QM!!$( #n k )fL> src@ :@1) fpA _M*|  :!; 9 I8 4: ; 9 I?<$ > : ; 9 I !I :!; 9!I8 I!I/ .?:!; 9!'@z 4:!; 9 IB % Uy $ >  5I' : ; 9 4G: ; 9 .?: ; 9 'I<.?: ; 9 '@|4: ; 9 IBH}.: ; 9 ' Rr| RQq| Q *S^Uu| UU u| (U<>U>@u|@HU,58"#?@&)  7 ?  3 4A.% @j$Mm$G8H2g>)05N@*=. .h6<;7.C9f)j. )> J4xN !W<Ep d7+z!rIKy==,n6aN!Lk1u&JXJ$K)!> E%'H18  Ja=)M @3FuE"%%i2JL 2Gj_">m@@z75G-^8 LH [ H %' O(K- , % '1$},+36r` &5T'7(w/:N]>27M#EJY+ e@X=xIC:?+0sGb0?Q$2'6"(3'0T 985>Mg*"G3K@AxJ ($)KF,f,,k5L8+/\b^ B:($ G  .*`N#>z~mI5!6+1 )X&)2-/[*N87l>KH p=dLdMX%H FR4&7?=VIA>,:=- ?n4WIE&\ M|$,x G7Z6&8I;!9FG%Fo;K)M@6d-& 875<I+E$$8:/(3: M PI.1 P@6, >ou /#3,H<&TH224)F.=(K4& @1H$+^ {'P-<L/KS)0L&_+vE-:T1xK  &(p 0{-=;7G * >9":}L@?N"%9RG:A%.J*b<*?R BE9IJ<[&\?_\ac7'!9"4)1de#f.gojx kyn'ojp:qRt )uxd4y-&zK{~F/D:.G7-j 83-hJP/1 A-r@A7HL9Z5@M I;"$/RNVKLI! 8 : 2-80=/ * *'jH0*$\<(\E"XL|8@AJ1&2 % 9s#LB}A0s-E=|7h =>z N~JM FLK/H!&.'F2KC4Dl%EFB0IL Q, RqAS@T'U VeAW'XBYEZ([\1]+I^ _`3aJJbNc;!d5eP f$4gJhi!j:LkKlm#nV7oQ"pL6+$.,1F47:B#H.KY!'?LB#FY2I&<4"/Mm:"1H36 #]?MH5`1+? Hx)-6. I F;};@#;&"3y3&=~VAwFE{H%_9 !Q,n0 !T$";#&.$7%&?'+,(`@)*>+,yM. ../../cm3/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/cm3../../cm3/../dispatch../../../include/libopencm3/dispatch../../../include/libopencm3/lpc43xx/m0../../cm3/../dispatch/../lpc43xx/m0vector.cstdint.hvector.hvector_chipset.cscb.hmemorymap.hcommon.hstdbool.hnvic.hnvic.hnvic.hvector_nvic.cvector_nvic.c>)%#-  /$ =t  4    '& z.1'g A'$M ;$O1$ ;$NSCB_BASE (SCS_BASE + 0x0D00)__UHA_FBIT__ 8__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64CORESIGHT_LSR_SLK (1<<1)__CHAR_UNSIGNED__ 1pre_mainbus_fault__FLT64_HAS_INFINITY__ 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GNUC_MINOR__ 2__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17WINT_MIN __WINT_MIN__LPC43XX_M0 1__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__ARM_FEATURE_QBITSCB_SHCSR_SVCALLPENDED (1 << 15)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8NVIC_PENDSV_IRQ -2__FRACT_MIN__ (-0.5R-0.5R)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__USACCUM_MAX__ 0XFFFFP-8UHK__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned int__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHKSCB_CCR MMIO32(SCB_BASE + 0x14)__GCC_ATOMIC_LLONG_LOCK_FREE 1__DECIMAL_DIG__ 17__LDBL_MIN_EXP__ (-1021)UINTPTR_MAX __UINTPTR_MAX____LDBL_MANT_DIG__ 53__fini_array_endNVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + ((iser_id) * 4))__UINT8_C(c) c__INT16_TYPE__ short int__FLT64_MAX__ 1.7976931348623157e+308F64UINT_FAST32_MAXINT_FAST64_MAX __INT_FAST64_MAX____APCS_32__ 1__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1SCB_SHPR_PRI_4_MEMMANAGE 0NVIC_MCPWM_IRQ 16__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned intSCB_CPUID_REVISION_LSB 0INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38vector_table_tSCB_AIRCR_ENDIANESS (1 << 15)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZSCB_ICSR_PENDSTSET (1 << 26)SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)__FLT32_MIN_EXP__ (-125)UINT32_MAX __UINT32_MAX__NVIC_ADC1_IRQ 21__WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32INT8_MIN (-INT8_MAX - 1)__FLT64_MIN_10_EXP__ (-307)NVIC_LCD_IRQ 7__GNUC_EXECUTION_CHARSET_NAME "UTF-8"BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901LINT_LEAST64_MAX __INT_LEAST64_MAX__openblt_signature__SFRACT_EPSILON__ 0x1P-7HR__INT32_C(c) c ## LUINT32_C(c) __UINT32_C(c)__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__SQ_FBIT__ 31INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)NVIC_USART2_OR_C_CAN1_IRQ 26__UHQ_FBIT__ 16__FLT64_MIN_EXP__ (-1021)__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__UINT_FAST8_MAX__ 0xffffffffUUINT16_C(c) __UINT16_C(c)__LACCUM_IBIT__ 32__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffSCB_SHPR_PRI_9_RESERVED 5__UINT_FAST16_MAX__ 0xffffffffUINT64_C(c) __INT64_C(c)_edata__GCC_IEC_559_COMPLEX 0__UFRACT_MIN__ 0.0URWCHAR_MAX __WCHAR_MAX____FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____UINT_LEAST8_TYPE__ unsigned char__ACCUM_FBIT__ 15SCB_SCR_SLEEPONEXIT (1 << 1)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32xNVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ intBIT13 (1<<13)__UDA_FBIT__ 32__UINTMAX_C(c) c ## ULL__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX__main__THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRshort unsigned intBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)BIT7 (1<<7)BIT17 (1<<17)__FLT32X_MIN_10_EXP__ (-307)UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__UINT_LEAST64_TYPE__ long long unsigned int__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4LIBOPENCM3_VECTOR_H __SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32NVIC_I2S0_OR_I2S1_IRQ 28BIT27 (1<<27)SCB_CPUID_CONSTANT_LSB 16SCB_SHPR_PRI_13_RESERVED 9__UTA_FBIT__ 64INTMAX_C(c) __INTMAX_C(c)__FLT_DECIMAL_DIG__ 9__thumb__ 1signed charINT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__GNUC_STDC_INLINE__ 1__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__preinit_array_startPTRDIFF_MINSCB_CPUID_VARIANT_LSB 20__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_C(c) c ## ULLPPBI_BASE (0xE0000000U)__ARM_ARCH_PROFILE 77NVIC_SDIO_IRQ 6null_handler__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MIN__UINT_FAST32_TYPE__ unsigned intunsigned charNVIC_ETHERNET_IRQ 5__SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xUINT64_MAX__FLT_MAX_10_EXP__ 38SCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15RSCB_ICSR_PENDSVSET (1 << 28)__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5__ARM_ARCH_EXT_IDIV__NVIC_GINT1_IRQ 13__DQ_IBIT__ 0__UINT16_MAX__ 0xffff__TQ_FBIT__ 127usage_faultNVIC_M4CORE_IRQ 1INT_FAST16_MIN__SIZEOF_SHORT__ 2__ULLACCUM_FBIT__ 32SCB_SHCSR MMIO32(SCB_BASE + 0x24)__TA_IBIT__ 64NVIC_USB1_IRQ 9__STRICT_ANSI__ 1NVIC_SYSTICK_IRQ -1UINT_LEAST8_MAXINT_LEAST8_MAXUINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8SCB_SHPR_PRI_7_RESERVED 3__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX____USA_IBIT__ 16PTRDIFF_MIN (-PTRDIFF_MAX - 1)__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned int__preinit_array_enddebug_monitor__FLT_MIN__ 1.1754943508222875e-38F__HA_FBIT__ 7__FDPIC____FLT32_IS_IEC_60559__ 2NVIC_TIMER0_IRQ 12INT_FAST64_MIN__USFRACT_IBIT__ 0__LDBL_EPSILON__ 2.2204460492503131e-16L__USFRACT_MIN__ 0.0UHR__ARM_NEON__UINT8_MAX__ 0xff__LDBL_MAX_EXP__ 1024SCB_ICSR_RETOBASE (1 << 11)__DBL_HAS_DENORM__ 1__DA_FBIT__ 31__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308Lvector_tableINT_LEAST32_MAX __INT_LEAST32_MAX____ULLACCUM_EPSILON__ 0x1P-32ULLKhard_faultINT_LEAST8_MAX __INT_LEAST8_MAX____FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKSCS_BASE (PPBI_BASE + 0xE000)NVIC_IRQ_COUNT 30__init_array_start__DBL_MAX_10_EXP__ 308__ARM_ARCH_ISA_THUMB__ARM_FEATURE_MATMUL_INT8__GCC_ATOMIC_SHORT_LOCK_FREE 1SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__LACCUM_FBIT__ 31SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1SCB_SCR_SLEEPDEEP (1 << 2)__LDBL_HAS_INFINITY__ 1__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))__FLT32X_MAX_10_EXP__ 308SCB_SHPR_PRI_5_BUSFAULT 1../../cm3/vector.cbool _BoolUINTMAX_MAX __UINTMAX_MAX____SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xffBBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX____PRAGMA_REDEFINE_EXTNAME 1__FLT32X_IS_IEC_60559__ 2NVIC_ADC0_IRQ 17LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX__INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__USFRACT_EPSILON__ 0x1P-8UHRNVIC_SSP0_OR_SSP1_IRQ 22SCB_SCR_SEVONPEND (1 << 4)SCB_ICSR_PENDSTCLR (1 << 25)CORESIGHT_LSR_SLI (1<<0)INT64_MIN__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffULSCB_CCR_UNALIGN_TRP (1 << 3)__INT_LEAST8_MAX__ 0x7f/build/libopencm3/lib/lpc43xx/m0__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEXSCB_ICSR_VECTPENDING_LSB 12NVIC_HARD_FAULT_IRQ -13__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)INT_FAST8_MIN (-INT_FAST8_MAX - 1)__LFRACT_MIN__ (-0.5LR-0.5LR)__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1NVIC_EVENTROUTER_IRQ 23__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)__GCC_HAVE_DWARF2_CFI_ASM 1__ARM_FEATURE_CRC32__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__SHRT_WIDTH__ 16BIT20 (1<<20)__ARM_FEATURE_MVE__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned int__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN__FLT_EVAL_METHOD_TS_18661_3__ 0NVIC_RITIMER_OR_WWDT_IRQ 11__SCHAR_WIDTH__ 8BIT18 (1<<18)UINT_FAST16_MAXSCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__UINT_LEAST16_TYPE__ short unsigned int__INT32_MAX__ 0x7fffffffLSCB_ICSR_NMIPENDSET (1 << 31)__ARM_PCS 1UINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__FLT32_MANT_DIG__ 24LIBOPENCM3_NVIC_H __FLT32_DENORM_MIN__ 1.4012984643248171e-45F32SCB_SHPR32(ipr_id) MMIO32(SCS_BASE + 0xD18 + ((ipr_id) * 4))SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)WCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8INT8_MAX __INT8_MAX__BIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1SCB_VTOR_TBLOFF_LSB 7__DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3UINT_FAST8_MAX__FLT_MANT_DIG__ 24__UDQ_IBIT__ 0NVIC_I2C0_OR_IRC1_IRQ 18__OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UKSCB_CPUID MMIO32(SCB_BASE + 0x00)__FLT64_NORM_MAX__ 1.7976931348623157e+308F64UINTPTR_MAX__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLLNVIC_USB0_IRQ 8__ULLFRACT_IBIT__ 0MMIO16(addr) (*(volatile uint16_t *)(addr))NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))LPC43XX 1__GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32__FLT_MAX__ 3.4028234663852886e+38FINT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0U__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4__GCC_ATOMIC_LONG_LOCK_FREE 1__ULACCUM_MIN__ 0.0ULK__ARM_ARCH 6memory_manage_fault_stack__FLT_RADIX__ 2BIT3 (1<<3)long long intCORESIGHT_LAR_KEY 0xC5ACCE55__FLT_EPSILON__ 1.1920928955078125e-7F__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)SCB_CPUID_IMPLEMENTER_LSB 24__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FP__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024UINT16_MAX__FLT64_MIN__ 2.2250738585072014e-308F64__INTMAX_C(c) c ## LL__ARM_ARCH_PROFILE__INT64_TYPE__ long long int__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4__UFRACT_MAX__ 0XFFFFP-16URblocking_handler__UINT32_TYPE__ long unsigned intINT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__LDBL_MAX_10_EXP__ 308reset__INT_FAST32_TYPE__ intunsigned int__GCC_ASM_FLAG_OUTPUTS____init_array_end__FLT_MIN_EXP__ (-125)__FLT64_HAS_QUIET_NAN__ 1NVIC_USART0_IRQ 24__USACCUM_IBIT__ 8NVIC_PIN_INT4_IRQ 14__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UKSCB_ICSR MMIO32(SCB_BASE + 0x04)__UTA_IBIT__ 64__FLT_EVAL_METHOD__ 0__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32SCB_SHPR_PRI_6_USAGEFAULT 2__thumb2____ARM_FEATURE_LDREX__UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4__STDC__ 1NVIC_SPI_OR_DAC_IRQ 20__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____UINT8_TYPE__ unsigned char__SIG_ATOMIC_TYPE__ intUINT64_MAX __UINT64_MAX____GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"INT8_MINtrue 1__USA_FBIT__ 16UINTMAX_C(c) __UINTMAX_C(c)pend_sv__FLT32X_MIN_EXP__ (-1021)INT64_MAXINT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1__LFRACT_EPSILON__ 0x1P-31LR__ARM_SIZEOF_MINIMAL_ENUM 1UINT_FAST8_MAX __UINT_FAST8_MAX___ebss__arm__ 1INT_FAST64_MAX__FLT32_MIN_10_EXP__ (-37)MMIO64(addr) (*(volatile uint64_t *)(addr))NVIC_TIMER3_IRQ 15__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN__BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)SCB_AIRCR_SYSRESETREQ (1 << 2)SCB_ICSR_ISRPENDING (1 << 22)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1__LONG_LONG_MAX__ 0x7fffffffffffffffLL__WINT_WIDTH__ 32SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__BIT11 (1<<11)UINT_LEAST16_MAX__UFRACT_IBIT__ 0_GCC_STDINT_H __INT8_C(c) c__LFRACT_IBIT__ 0SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____SIZEOF_INT__ 4SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__LDBL_HAS_DENORM__ 1INT_FAST32_MIN (-INT_FAST32_MAX - 1)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__FLT32_DIG__ 6INT_LEAST16_MAXSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT15 (1<<15)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sectionsBIT21 (1<<21)__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__ACCUM_MIN__ (-0X1P15K-0X1P15K)END_DECLS __ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)__USQ_FBIT__ 32BIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2SCB_AIRCR_VECTKEY (0x05FA << SCB_AIRCR_VECTKEYSTAT_LSB)__ORDER_LITTLE_ENDIAN__ 1234__FLT_NORM_MAX__ 3.4028234663852886e+38FSCB_ICSR_VECTACTIVE_LSB 0long long unsigned int__FLT_MIN_10_EXP__ (-37)BIT31 (1<<31)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ intNVIC_IPR32(ipr_id) MMIO32(NVIC_BASE + 0x300 + ((ipr_id) * 4))__DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4INT_LEAST64_MAX__SACCUM_IBIT__ 8__UHQ_IBIT__ 0INT_LEAST8_MINBIT29 (1<<29)__INT_FAST16_TYPE__ intINT64_C__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR_data_loadaddr__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__UTQ_FBIT__ 128LIBOPENCM3_SCB_H __FINITE_MATH_ONLY__ 0__INT_FAST16_MAX__ 0x7fffffffPTRDIFF_MAX __PTRDIFF_MAX____FLT32_DECIMAL_DIG__ 9__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULKUINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRNVIC_SCT_IRQ 10__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long intNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))WCHAR_MINBEGIN_DECLS __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKINT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1reserved_x0034INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1INT64_MIN (-INT64_MAX - 1)destSCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0SCB_SHPR_PRI_14_PENDSV 10NVIC_SGPIO_IRQ 19SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31_datainitial_sp_value__UINTMAX_TYPE__ long long unsigned int__USQ_IBIT__ 0SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN__INTMAX_TYPE__ long long int__GCC_ATOMIC_INT_LOCK_FREE 1INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__ARM_FEATURE_FP16_SCALAR_ARITHMETICNVIC_SV_CALL_IRQ -5__USACCUM_EPSILON__ 0x1P-8UHK__DBL_HAS_QUIET_NAN__ 1__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_Creserved_x001c__SACCUM_MAX__ 0X7FFFP-7HK__INTPTR_TYPE__ intUINT8_C__UINTPTR_TYPE__ unsigned intNVIC_NMI_IRQ -14UINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULRNVIC_USART3_IRQ 27__ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__UINT64_TYPE__ long long unsigned int__INT64_C(c) c ## LLSCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__LDBL_MIN_10_EXP__ (-307)systickSCB_VTOR_TBLOFF (0x1FFFFFF << SCB_VTOR_TBLOFF_LSB)__LDBL_MIN__ 2.2250738585072014e-308L__ARM_FEATURE_CDE__ACCUM_IBIT__ 16funcp_tCORESIGHT_LAR_OFFSET 0xfb0LIBOPENCM3_LPC43xx_M0_NVIC_H SCB_SHPR_PRI_15_SYSTICK 11short int__UINT16_C(c) c__UDA_IBIT__ 32NVIC_UART1_IRQ 25UINT_LEAST32_MAXBIT2 (1<<2)__ATOMIC_RELAXED 0__ARM_FEATURE_COPROCsv_call__DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX____FLT64_MANT_DIG__ 53NVIC_RTC_IRQ 0BIT5 (1<<5)BIT1 (1<<1)INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1IRQ_HANDLERS [NVIC_RTC_IRQ] = rtc_isr, [NVIC_M4CORE_IRQ] = m4core_isr, [NVIC_DMA_IRQ] = dma_isr, [NVIC_FLASHEEPROMAT_IRQ] = flasheepromat_isr, [NVIC_ETHERNET_IRQ] = ethernet_isr, [NVIC_SDIO_IRQ] = sdio_isr, [NVIC_LCD_IRQ] = lcd_isr, [NVIC_USB0_IRQ] = usb0_isr, [NVIC_USB1_IRQ] = usb1_isr, [NVIC_SCT_IRQ] = sct_isr, [NVIC_RITIMER_OR_WWDT_IRQ] = ritimer_or_wwdt_isr, [NVIC_TIMER0_IRQ] = timer0_isr, [NVIC_GINT1_IRQ] = gint1_isr, [NVIC_PIN_INT4_IRQ] = pin_int4_isr, [NVIC_TIMER3_IRQ] = timer3_isr, [NVIC_MCPWM_IRQ] = mcpwm_isr, [NVIC_ADC0_IRQ] = adc0_isr, [NVIC_I2C0_OR_IRC1_IRQ] = i2c0_or_irc1_isr, [NVIC_SGPIO_IRQ] = sgpio_isr, [NVIC_SPI_OR_DAC_IRQ] = spi_or_dac_isr, [NVIC_ADC1_IRQ] = adc1_isr, [NVIC_SSP0_OR_SSP1_IRQ] = ssp0_or_ssp1_isr, [NVIC_EVENTROUTER_IRQ] = eventrouter_isr, [NVIC_USART0_IRQ] = usart0_isr, [NVIC_UART1_IRQ] = uart1_isr, [NVIC_USART2_OR_C_CAN1_IRQ] = usart2_or_c_can1_isr, [NVIC_USART3_IRQ] = usart3_isr, [NVIC_I2S0_OR_I2S1_IRQ] = i2s0_or_i2s1_isr, [NVIC_C_CAN0_IRQ] = c_can0_isr__DBL_DECIMAL_DIG__ 17BIT8 (1<<8)INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fffNVIC_FLASHEEPROMAT_IRQ 4__INT_WIDTH__ 32SCB_SHPR_PRI_11_SVCALL 7__QQ_FBIT__ 7__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64NVIC_DMA_IRQ 2__ULLACCUM_IBIT__ 32SCB_VTOR MMIO32(SCB_BASE + 0x08)__ULLFRACT_EPSILON__ 0x1P-64ULLRfalse 0__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__INT_LEAST32_MAX__ 0x7fffffffL__GXX_TYPEINFO_EQUALITY_INLINE 0__LDBL_DECIMAL_DIG__ 17__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1__FLT32X_HAS_DENORM__ 1__ULLACCUM_MIN__ 0.0ULLK__INT_FAST32_WIDTH__ 32__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1SCB_AIRCR_VECTKEYSTAT_LSB 16INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPRODSCB_CCR_STKALIGN (1 << 9)__ULLFRACT_MIN__ 0.0ULLR_STDBOOL_H __GCC_CONSTRUCTIVE_SIZE 64__LLFRACT_IBIT__ 0SCB_SHPR_PRI_10_RESERVED 6uint32_tBIT12 (1<<12)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK__UINT_FAST16_TYPE__ unsigned int__UHA_IBIT__ 8__ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15UINT64_C__SIZE_WIDTH__ 32SIG_ATOMIC_MAXLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__INT_LEAST16_TYPE__ short int__DBL_MAX__ ((double)1.7976931348623157e+308L)INT32_MIN__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1UINTMAX_CINT_FAST16_MAX __INT_FAST16_MAX____ARMEL__ 1__UINTPTR_MAX__ 0xffffffffU__HQ_FBIT__ 15__bool_true_false_are_defined 1BIT26 (1<<26)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SATreset_handler__ARM_ARCH__LONG_MAX__ 0x7fffffffLBIT25 (1<<25)INT_LEAST64_MINPTRDIFF_MAX__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__DBL_MIN_10_EXP__ (-307)__fini_array_start__ULLFRACT_FBIT__ 64NVIC_C_CAN0_IRQ 29__FLT32_NORM_MAX__ 3.4028234663852886e+38F32UINT64_C(c) __UINT64_C(c)__UINTMAX_MAX__ 0xffffffffffffffffULLSCB_ICSR_PENDSVCLR (1 << 27)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0vector_table_entry_tINT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205 |  CA+aeabi!6S-M M         02 "$&(*,.47k0^ 36  " " " " " " &" 1" A" R" [" j" t" " " " " " " " " " " " " " " #" +" 6" >K"\"l"|"" /<vector.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.scb.h.43.009db5889753775abc8c2139d8c04e70wm4.nvic.h.38.6372f4ef3eec3be5d298b9c4fcf80cd9wm4.nvic.h.16.e780f22c8916f7a06287ff79598c63b9blocking_handlerhard_fault_handlerc_can0_isri2s0_or_i2s1_isrusart3_isrusart2_or_c_can1_isruart1_isrusart0_isreventrouter_isrssp0_or_ssp1_isradc1_isrspi_or_dac_isrsgpio_isri2c0_or_irc1_isradc0_isrmcpwm_isrtimer3_isrpin_int4_isrgint1_isrtimer0_isrritimer_or_wwdt_isrsct_isrusb1_isrusb0_isrlcd_isrsdio_isrethernet_isrflasheepromat_isrdma_isrm4core_isrrtc_isrnull_handlersys_tick_handlerpend_sv_handlersv_call_handlernmi_handlerreset_handlermain_data_edata_data_loadaddr_ebss__preinit_array_start__preinit_array_end__init_array_start__init_array_end__fini_array_start__fini_array_endvector_table_stack YZ[\]^_`abceXW 5,V8U<T@RDQHPPOTNXM\L`KdJhIlHpGtFxE|DCBA@?>=<;:9876 "&-4;BIPUcjx ,Cu&d+7<GLW^ w{  2 `    %-6<BLTaj~ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y  #)/5;AGM  #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5<CJQX_fmt{#*18?FMT[bipw~ #)/6=D #)/5;AGMSY_ekqw} $(48 .symtab.strtab.shstrtab.text.data.bss.text.blocking_handler.text.null_handler.rel.text.reset_handler.rel.vectors.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group*4 7 *@ 7!*L 7"*X 7#*d 7$*p 7%*| 7&* 7'* 7(!',CZV @TvX7r|n @v 78{ @w7ID @y70 @y 7   @y7, @ zp7~  @|z 70R @th7  @܈ 7"N @7$" @Ԍ(7& @07( @,7*I @ X7, @d7. @T700SN0k' 8kL  @l074pk,k`84 rC1systick.o/ 0 0 0 644 34400 ` ELF((}4(;:#$%&'()*+,-./0K `pGFKh pGF$I h"C `8K ` Kh pGF"I hC@C `pG!Jh C`pG!JhC`pG!Jh C`pG!JhC`pGKhpGF"K`pGKh pGFA : -$ *+<.Xz45:q 4q(2 int] f 7 M;Z zz&M m f 'R, R%f ahbR4f0*@T fNH W c;'&$C fl8|*8"f   ; P..$ > .?:!; 9!'@z.?:!; 9 'I@z1B:!; 9 I.?:!; 9!' !:!; 9 I1RB UX!Y W! .1@z % Uy $ >  .?: ; 9 'I@z : ; 9 IB: ; 9 IB4: ; 9 IBH}1.?<nPS,P Q P,Q q*s* p*s* $Q*P*4p*s*1Q*P*1PPt, i, )8-:;?@"j22m## !I4 f81"1#,JQ)-&/<56"844S'h>,g+@.n/9A/:`(Ho8 ~5%5 *!E)u#.>,-;$) ^#.0/'*k0x&]8B>a:%&)O5#*%f! `3 ;!$ =;5.N+~?, 1w;Y)" ?2^-3s<q"U;835\ ;754])-6_$q/5(? 84\"9? a9<\8^sH V%/+A<;<-A?O%4>%,B =u)Q60 0 %' O7O,N 3% 2C 7+Y<1498$ks:9cA''an1.|54!7>%%!$2o$R*` ,t=J#E;0aj>o &% E>v'0 ;?I5(p#Z& Kv/Uq !r1K$  (L=s6%X  l?e:-.'+)(6p-x m*1- 2)+]02` Pu%V: <.# $7(<-;:2@>1, 0nJ![3&95' B<z Tw& !?6=| _&!:  /9,+@4w3.0>=#<w)   $0>'  $0N Q+ )"#!{ 62*\4<? BE(J3[ \_8acy!")K.#d#efg"!jk*nd/o.*p6q] tu$xy.z;{= ~.:% '6<2632=}k< >&/PFx,)F*?#H:w3}K<1&==9%w72 9.% (,*Pp=   " 5?U 3`0-`5" s8. h$4Y6'!:8+<k=(&38W'$+ '2 (k! &-'=2VCy6DEH=F*I[ L6QRIS/TU*3VW XYZ'5[#"\=]3^"_<`a#b /cdT-eRf gi7h1i$jb-kl(mAno\2p,BLSZ+e=g3mtu'u?1}C" 0"0 ../../cm3/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/cm3systick.cstdint.hsystick.hmemorymap.hcommon.hstdbool.h8   !!=) i n2#  +  gU < W   . *!=" .!+ " ! ./ ! ./ ! ./ ! ./ ! + / ! /!=__ARM_FEATURE_FP16_VECTOR_ARITHMETIC__SIG_ATOMIC_MAX__ 0x7fffffff__FLT64_HAS_QUIET_NAN__ 1systick_get_calib__UFRACT_IBIT__ 0__FLT32_HAS_INFINITY__ 1clocksourceUINT8_MAX__UINT_FAST8_TYPE__ unsigned int__FLT64_MAX_EXP__ 1024__FLT32X_MAX_EXP__ 1024__INT_FAST16_WIDTH__ 32__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1INT_LEAST16_MIN__ULACCUM_EPSILON__ 0x1P-32ULKINT_LEAST16_MAX __INT_LEAST16_MAX____ARM_FEATURE_SIMD32UINT16_C__FLT32_MANT_DIG__ 24__USQ_IBIT__ 0__UINT8_C(c) c__ARM_NEON____SIZEOF_WINT_T__ 4STK_CALIB_SKEW (1 << 30)__QQ_IBIT__ 0__UDQ_IBIT__ 0CORESIGHT_LSR_SLK (1<<1)__ARM_FEATURE_MATMUL_INT8INT16_C(c) __INT16_C(c)__GCC_ATOMIC_SHORT_LOCK_FREE 1__FLT32X_DECIMAL_DIG__ 17__DBL_MIN_EXP__ (-1021)__LONG_LONG_WIDTH__ 64__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1__ARM_FEATURE_CDE_COPROC__ARM_SIZEOF_WCHAR_T 4__ARM_FP16_FORMAT_IEEE__ARM_FEATURE_COMPLEX__LLFRACT_IBIT__ 0INT_LEAST16_MAXSTK_CSR_CLKSOURCE (1 << STK_CSR_CLKSOURCE_LSB)UINT16_C(c) __UINT16_C(c)__DBL_MAX__ ((double)1.7976931348623157e+308L)__UINT_FAST32_MAX__ 0xffffffffUINT_FAST32_MAX__USFRACT_MIN__ 0.0UHRINT_FAST16_MAX __INT_FAST16_MAX____GNUC_MINOR__ 2__UINT_LEAST8_MAX__ 0xffUINT16_MAXINT_LEAST32_MAXunsigned intBIT5 (1<<5)../../cm3/systick.c__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)INT8_MIN__UINT16_C(c) c__SIZEOF_SIZE_T__ 4ratioUINT_LEAST32_MAX __UINT_LEAST32_MAX__systick_set_reload__SIZEOF_LONG_DOUBLE__ 8BIT29 (1<<29)__INT_FAST8_MAX__ 0x7fffffff__ORDER_BIG_ENDIAN__ 4321__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__GCC_CONSTRUCTIVE_SIZE 64__UTA_FBIT__ 64__DBL_MANT_DIG__ 53__UINT_LEAST64_TYPE__ long long unsigned int__INT_MAX__ 0x7fffffff__ATOMIC_RELEASE 3__FLT_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__FLT32_HAS_QUIET_NAN__ 1MMIO16(addr) (*(volatile uint16_t *)(addr))__INT16_TYPE__ short intUINT8_MAX __UINT8_MAX____ARM_FEATURE_QRDMX__LDBL_DIG__ 15__OPTIMIZE__ 1__FLT32_MAX__ 3.4028234663852886e+38F32__LLACCUM_IBIT__ 32__ATOMIC_SEQ_CST 5BIT8 (1<<8)BIT0 (1<<0)__SIZEOF_SHORT__ 2__INT_LEAST8_MAX__ 0x7f__INT_LEAST8_TYPE__ signed char__FLT64_MANT_DIG__ 53UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_C(c) c ## ULLCORESIGHT_LAR_KEY 0xC5ACCE55__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__systick_interrupt_disable__FLT32_MIN_10_EXP__ (-37)__LFRACT_IBIT__ 0__ARM_ARCH 6SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____INT_LEAST16_MAX__ 0x7fff__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__ARM_FEATURE_NUMERIC_MAXMIN__ULLFRACT_IBIT__ 0__FLT64_DIG__ 15INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__ATOMIC_RELAXED 0INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_FP16_FML__SIZE_MAX__ 0xffffffffU__LDBL_IS_IEC_60559__ 2systick_counter_enable__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__ULACCUM_MIN__ 0.0ULKUINT64_C(c) __UINT64_C(c)systick_get_value__FLT_HAS_INFINITY__ 1__ARM_FEATURE_CRYPTO__FLT32_EPSILON__ 1.1920928955078125e-7F32BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)CORESIGHT_LSR_OFFSET 0xfb4__UDA_IBIT__ 32__INT_FAST64_TYPE__ long long int__INT8_C(c) csigned char__FDPIC____INT_LEAST16_WIDTH__ 16INT32_MIN (-INT32_MAX - 1)__ULLACCUM_MIN__ 0.0ULLKuint32_t__ARM_FEATURE_DOTPROD__ARM_NEONbool _BoolNVIC_BASE (SCS_BASE + 0x0100)__ARM_FEATURE_CMSE__UINTPTR_TYPE__ unsigned int__FLT64_IS_IEC_60559__ 2__FLT32_HAS_DENORM__ 1__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64INTMAX_MAX__SA_IBIT__ 16__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRUINTMAX_C__INT_FAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_FP16_SCALAR_ARITHMETICSIG_ATOMIC_MAX__FLT_DIG__ 6__DBL_EPSILON__ ((double)2.2204460492503131e-16L)UINT_LEAST64_MAX__DA_FBIT__ 31__ARM_SIZEOF_MINIMAL_ENUM 1__USES_INITFINI__ 1__GCC_IEC_559 0INT32_MAXINT_FAST8_MAX __INT_FAST8_MAX____USACCUM_EPSILON__ 0x1P-8UHKLPC43XX_M0 1__PTRDIFF_MAX__ 0x7fffffffsystick_interrupt_enable__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__UFRACT_MAX__ 0XFFFFP-16UR__SFRACT_MAX__ 0X7FP-7HR__GNUC__ 12SYS_TICK_BASE (SCS_BASE + 0x0010)__ARM_EABI__ 1long long unsigned intSTK_CVR MMIO32(SYS_TICK_BASE + 0x08)__INT64_MAX__ 0x7fffffffffffffffLL__VERSION__ "12.2.1 20221205"BIT28 (1<<28)__INT8_MAX__ 0x7f__ULFRACT_EPSILON__ 0x1P-32ULR__INT_LEAST32_TYPE__ long int__ULFRACT_IBIT__ 0__UTQ_IBIT__ 0STK_RVR_RELOAD 0x00FFFFFF__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FLT_RADIX__ 2UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT32_MIN__ULLFRACT_MIN__ 0.0ULLR__DBL_HAS_QUIET_NAN__ 1__UACCUM_MIN__ 0.0UK__ARM_FEATURE_QBIT__LFRACT_EPSILON__ 0x1P-31LR__INT_FAST8_TYPE__ intINTMAX_MIN (-INTMAX_MAX - 1)__FLT64_HAS_INFINITY__ 1UINTPTR_MAX __UINTPTR_MAX____FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32x__bool_true_false_are_defined 1__SACCUM_FBIT__ 7__WCHAR_TYPE__ unsigned int__ARM_ASM_SYNTAX_UNIFIED__BIT26 (1<<26)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT64_MIN__ 2.2250738585072014e-308F64__FRACT_MIN__ (-0.5R-0.5R)__GCC_ATOMIC_INT_LOCK_FREE 1__INTMAX_MAX__ 0x7fffffffffffffffLLWCHAR_MAX __WCHAR_MAX____UACCUM_EPSILON__ 0x1P-16UK__GCC_ASM_FLAG_OUTPUTS____ACCUM_IBIT__ 16__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__FLT64_MAX_10_EXP__ 308__SACCUM_IBIT__ 8__SIZEOF_PTRDIFF_T__ 4UINT_LEAST32_MAX__SFRACT_MIN__ (-0.5HR-0.5HR)__USA_IBIT__ 16BIT15 (1<<15)PTRDIFF_MIN (-PTRDIFF_MAX - 1)CORESIGHT_LAR_OFFSET 0xfb0BIT3 (1<<3)PTRDIFF_MIN__SIZEOF_FLOAT__ 4END_DECLS __UINT32_C(c) c ## UL__UDA_FBIT__ 32DEBUG_BASE (SCS_BASE + 0x0DF0)BIT20 (1<<20)INTMAX_MIN_STDBOOL_H UINT_FAST8_MAX__ARM_FEATURE_UNALIGNEDCORESIGHT_LSR_SLI (1<<0)__THUMBEL__ 1systick_set_clocksource__DA_IBIT__ 32__BIGGEST_ALIGNMENT__ 8__LACCUM_IBIT__ 32__USFRACT_MAX__ 0XFFP-8UHR__UINT_FAST8_MAX__ 0xffffffffU__ORDER_LITTLE_ENDIAN__ 1234__HAVE_SPECULATION_SAFE_VALUE 1BEGIN_DECLS __LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__SA_FBIT__ 15__FLT64_MIN_10_EXP__ (-307)BIT7 (1<<7)STK_CSR MMIO32(SYS_TICK_BASE + 0x00)SCB_BASE (SCS_BASE + 0x0D00)__SACCUM_EPSILON__ 0x1P-7HKUINT8_C(c) __UINT8_C(c)__INT_FAST16_TYPE__ int__FLT32_DECIMAL_DIG__ 9BIT18 (1<<18)__UINT16_TYPE__ short unsigned int__WCHAR_WIDTH__ 32freq__UHQ_IBIT__ 0__UFRACT_FBIT__ 16INT_FAST64_MAX__LONG_LONG_MAX__ 0x7fffffffffffffffLL__INT64_TYPE__ long long int__FLT_MAX_10_EXP__ 38__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKLIBOPENCM3_CM3_COMMON_H PTRDIFF_MAX __PTRDIFF_MAX____LLACCUM_EPSILON__ 0x1P-31LLKWINT_MIN__FLT32X_MANT_DIG__ 53INT8_MAX __INT8_MAX__INTMAX_C__ARM_FEATURE_COPROC__ULFRACT_MIN__ 0.0ULR__FLT_MANT_DIG__ 24UINT_FAST64_MAX __UINT_FAST64_MAX____ARM_ARCH__FLT64_DECIMAL_DIG__ 17LIBOPENCM3_CM3_MEMORYMAP_H __REGISTER_PREFIX__ __FLT32_MIN_EXP__ (-125)STK_RVR MMIO32(SYS_TICK_BASE + 0x04)WINT_MAXSTK_CALIB_TENMS 0x00FFFFFF__UACCUM_IBIT__ 16__UINT_FAST16_MAX__ 0xffffffffU__UINT_FAST16_TYPE__ unsigned intINT_LEAST64_MAX__DBL_MIN_10_EXP__ (-307)__USACCUM_IBIT__ 8__THUMB_INTERWORK__ 1INT_LEAST8_MAXUINT_LEAST16_MAX__FLT32_DIG__ 6_GCC_STDINT_H __FLT64_HAS_DENORM__ 1BIT1 (1<<1)__FLT_EVAL_METHOD__ 0__FLT32X_HAS_DENORM__ 1INT64_MININT32_C__INT_LEAST64_MAX__ 0x7fffffffffffffffLLINT64_MAX__ACCUM_FBIT__ 15__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1INT_FAST8_MIN__ULACCUM_IBIT__ 32__LLFRACT_FBIT__ 63__GCC_ATOMIC_LLONG_LOCK_FREE 1UINT_FAST64_MAX__INT_LEAST8_WIDTH__ 8__ARM_32BIT_STATE__USA_FBIT__ 16__UINT8_MAX__ 0xff__ARM_FEATURE_IDIV__UINT16_MAX__ 0xffffINT_LEAST8_MAX __INT_LEAST8_MAX____ARM_FEATURE_FMA__UACCUM_FBIT__ 16uint8_tSIZE_MAX __SIZE_MAX____INTMAX_WIDTH__ 64__ARM_FEATURE_CDE__LFRACT_FBIT__ 31__DBL_IS_IEC_60559__ 2__INT_LEAST16_TYPE__ short int__FLT32_MAX_EXP__ 128__GCC_ATOMIC_CHAR_LOCK_FREE 1INT_FAST8_MIN (-INT_FAST8_MAX - 1)INT8_C__GNUC_STDC_INLINE__ 1__DBL_DIG__ 15true 1__ARMEL__ 1__ARM_ARCH_ISA_THUMB__LACCUM_FBIT__ 31SIZE_MAX__FLT_MIN__ 1.1754943508222875e-38F__FLT32X_DIG__ 15__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__INT_FAST16_MAX__ 0x7fffffff__ARM_ARCH_ISA_THUMB 1UINT_FAST32_MAX __UINT_FAST32_MAX____UTQ_FBIT__ 128long long int__CHAR_BIT__ 8WCHAR_MIN__FLT32X_IS_IEC_60559__ 2INT_FAST16_MAX__INTPTR_WIDTH__ 32__UINT_LEAST8_TYPE__ unsigned char__LDBL_MAX__ 1.7976931348623157e+308L__FINITE_MATH_ONLY__ 0__SACCUM_MAX__ 0X7FFFP-7HK__arm__ 1INT64_MAX __INT64_MAX__INTPTR_MAX__LDBL_MANT_DIG__ 53INT16_MIN (-INT16_MAX - 1)__TQ_IBIT__ 0__UHA_FBIT__ 8INTPTR_MIN (-INTPTR_MAX - 1)systick_clear__ATOMIC_CONSUME 1BIT6 (1<<6)BIT21 (1<<21)STK_CSR_ENABLE (1 << 0)__ELF__ 1__ARM_ARCH_PROFILEINT8_MIN (-INT8_MAX - 1)__INT16_C(c) c__GCC_HAVE_DWARF2_CFI_ASM 1__UINT64_MAX__ 0xffffffffffffffffULL__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__SCHAR_MAX__ 0x7f__USFRACT_EPSILON__ 0x1P-8UHR__ATOMIC_ACQUIRE 2WINT_MAX __WINT_MAX__INTPTR_MIN__STDC__ 1BIT10 (1<<10)__SIZEOF_LONG__ 4STK_CSR_TICKINT (1 << 1)__DBL_MAX_EXP__ 1024__GCC_IEC_559_COMPLEX 0BIT13 (1<<13)PTRDIFF_MAX__INT_FAST32_WIDTH__ 32__ARM_BF16_FORMAT_ALTERNATIVESTK_CALIB_NOREF (1 << 31)__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__ULFRACT_FBIT__ 32__SCHAR_WIDTH__ 8__ACCUM_MIN__ (-0X1P15K-0X1P15K)__SIZEOF_DOUBLE__ 8INT8_MAX__GNUC_PATCHLEVEL__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0__ARM_ARCH_EXT_IDIV____FRACT_MAX__ 0X7FFFP-15R__WINT_MIN__ 0U__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)systick_get_reload__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 32__FLT32_IS_IEC_60559__ 2UINT_FAST32_MAX__FRACT_IBIT__ 0__LDBL_MIN__ 2.2250738585072014e-308L__TA_FBIT__ 63__LDBL_HAS_INFINITY__ 1__UINT_FAST64_TYPE__ long long unsigned int__UINT32_MAX__ 0xffffffffUL__LDBL_MIN_EXP__ (-1021)__ULLFRACT_FBIT__ 64__SIZEOF_WCHAR_T__ 4_Bool__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____ACCUM_MAX__ 0X7FFFFFFFP-15K__SIZE_WIDTH__ 32__ARM_FEATURE_MVEINT_LEAST32_MININT64_C(c) __INT64_C(c)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__LLFRACT_EPSILON__ 0x1P-63LLRUINT32_Csystick_set_frequency__LONG_WIDTH__ 32__SFRACT_FBIT__ 7__CHAR32_TYPE__ long unsigned intSTK_CSR_CLKSOURCE_EXT (0 << STK_CSR_CLKSOURCE_LSB)__SFRACT_IBIT__ 0__ARM_FEATURE_SAT__ARM_PCS 1__HQ_IBIT__ 0INT64_MIN (-INT64_MAX - 1)__USER_LABEL_PREFIX__ MPU_BASE (SCS_BASE + 0x0D90)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__UINT_LEAST32_TYPE__ long unsigned intBIT27 (1<<27)__DQ_FBIT__ 63__USACCUM_MAX__ 0XFFFFP-8UHKINT_FAST64_MAX __INT_FAST64_MAX__INT64_CUINTMAX_C(c) __UINTMAX_C(c)__SIG_ATOMIC_WIDTH__ 32__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__SHRT_MAX__ 0x7fff__INT_FAST32_MAX__ 0x7fffffff__ARM_FP16_ARGS__ORDER_PDP_ENDIAN__ 3412INT_LEAST64_MIN__SQ_IBIT__ 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32__FLT_DECIMAL_DIG__ 9__INT32_MAX__ 0x7fffffffL__WINT_WIDTH__ 32INT16_MAX __INT16_MAX__INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UQQ_FBIT__ 8valueINT_FAST64_MIN (-INT_FAST64_MAX - 1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16UR__GXX_ABI_VERSION 1017STK_CALIB MMIO32(SYS_TICK_BASE + 0x0C)INT8_C(c) __INT8_C(c)__INT_LEAST64_WIDTH__ 64__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong intUINT64_C__thumb2____LDBL_MAX_EXP__ 1024__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX____UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64__thumb__ 1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUUINTMAX_MAX__LDBL_DECIMAL_DIG__ 17BIT19 (1<<19)BIT25 (1<<25)__TQ_FBIT__ 127__UHQ_FBIT__ 16LIBOPENCM3_SYSTICK_H __CHAR_UNSIGNED__ 1__UINT_FAST64_MAX__ 0xffffffffffffffffULL/build/libopencm3/lib/lpc43xx/m0__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15__UHA_IBIT__ 8LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__WCHAR_MAX__ 0xffffffffUSIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__aeabi_uidivUINT32_MAXINT32_MAX __INT32_MAX__BIT17 (1<<17)__FLT_EPSILON__ 1.1920928955078125e-7F__INT_LEAST64_TYPE__ long long intINT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UKSTK_CVR_CURRENT 0x00FFFFFF__VFP_FP__ 1__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 1__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)STK_CSR_CLKSOURCE_AHB (1 << STK_CSR_CLKSOURCE_LSB)__LACCUM_EPSILON__ 0x1P-31LK__SIZEOF_LONG_LONG__ 8__SFRACT_EPSILON__ 0x1P-7HRBIT23 (1<<23)__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned int__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1BIT30 (1<<30)__STDC_VERSION__ 199901LINT_LEAST8_MININT_FAST32_MINPPBI_BASE (0xE0000000U)__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAXINTMAX_C(c) __INTMAX_C(c)__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1STK_CSR_CLKSOURCE_LSB 2BIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__UINT_FAST8_MAX __UINT_FAST8_MAX____CHAR16_TYPE__ short unsigned int__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4SCS_BASE (PPBI_BASE + 0xE000)unsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKUINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intLPC43XX 1UINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN__INT16_MIN__ULLACCUM_FBIT__ 32BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15systick_get_countflag__UTA_IBIT__ 64__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUINT8_C__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____INT_FAST32_TYPE__ int__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long int__INTMAX_C(c) c ## LLINT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned int__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308__FLT32X_MIN__ 2.2250738585072014e-308F32xUINT32_MAX __UINT32_MAX__short unsigned intINT_FAST8_MAX__TA_IBIT__ 64__QQ_FBIT__ 7__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN____UINT_LEAST16_TYPE__ short unsigned int__ARM_ARCH_PROFILE 77GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sections__INT_FAST8_WIDTH__ 32systick_counter_disable__FLT_MIN_EXP__ (-125)__GCC_ATOMIC_BOOL_LOCK_FREE 1__DECIMAL_DIG__ 17__INT32_C(c) c ## LINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1BIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"INT16_CUINT64_MAX __UINT64_MAX____ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAX__ARM_FEATURE_CLZMMIO32(addr) (*(volatile uint32_t *)(addr))__LFRACT_MAX__ 0X7FFFFFFFP-31LRfalse 0STK_CSR_COUNTFLAG (1 << 16)__INT_LEAST32_MAX__ 0x7fffffffL__LLACCUM_FBIT__ 31BIT11 (1<<11)INT32_C(c) __INT32_C(c)__GCC_ATOMIC_LONG_LOCK_FREE 1__ARM_ARCH_6M__ 1__UINTMAX_MAX__ 0xffffffffffffffffULL__SIG_ATOMIC_TYPE__ int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_LEAST32_MAX __INT_LEAST32_MAX____ARM_FP__ULLFRACT_EPSILON__ 0x1P-64ULLR__LDBL_HAS_DENORM__ 1__UINT_LEAST16_MAX__ 0xffff__ARM_FEATURE_LDREXUINTPTR_MAX__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__USACCUM_FBIT__ 8__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (15:12.2.rel1-1) 12.2.1 20221205 |  ,A        A+aeabi!6S-M M        $                 !13#%')+-/58l147c v ,  !9O ]systick.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.systick.h.66.5c73bf3982c44aca93a34688bb9da2besystick_set_reloadsystick_get_reload__aeabi_uidivsystick_set_frequencysystick_get_valuesystick_set_clocksourcesystick_interrupt_enablesystick_interrupt_disablesystick_counter_enablesystick_counter_disablesystick_get_countflagsystick_clearsystick_get_calib K* 000-"/&.-040;0B0I0N0[0b0g0t0{00&0#0 00000 00!,07 F0Q+U+e+i+n0y+}+ -++ -++ 0000++%<0@0 1 O   )  (08@HPX `#h&   %+1 7=CIOU[ a#g&/102%3-465<6B70 0000#0)0/050;0A0G0M0S0Y0_0e0k0q0w0}000000000000000000000000 0000%0+01070=0C0I0O0U0[0a0g0m0s0y000000000000000000000000 0000!0'0-03090?0E0K0Q0W0]0c0i0o0u0{000000000000000000000000 0000#0)0/050;0A0G0M0S0Y0_0e0k0q0w0}000000000000000000000000 0000%0+01070=0C0I0O0U0[0a0g0m0s0y000000000000000000000000 0000!0'0-03090?0E0K0Q0W0]0c0i0o0u0{000000000000000000000000 0000#0)0/050;0A0G0M0S0Y0_0e0k0q0w0}000000000000000000000000 0000%0+01070=0C0I0O0U0[0a0g0m0s0y000000000000000000000000 0000!0'0-03090?0E0K0Q0W0]0c0i0o0u0{00000000000000000000000 0 0 0 0 0# 0) 0/ 05 0; 0A 0G 0M 0S 0Y 0_ 0e 0k 0q 0w 0} 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0% 0+ 01 07 0= 0C 0I 0O 0U 0[ 0a 0g 0m 0s 0y 00 0000#0)0/050;0A0G0M00 0000 0000#0)0/050;0A0G0M0S0Y0_0e0k0q0x000000000000000000000 000 0'0.050<0C0J0Q0X0_0f0m0t0{000000000000000000000000#0*01080?0F0M0T0[0b0i0p0w0~00000000000000000000 0000&0-040;0B0I00 00000 0000#0)0/050;0A0G0M0S0Y0_0e0k0q0w0}0000000000000000000 0000#0)0/050;0A0H0O0V0]0d0 u4Y ~#&8$8(488 L8P\8`l8p|8888 8#8&.symtab.strtab.shstrtab.text.data.bss.text.systick_set_reload.text.systick_get_reload.rel.text.systick_set_frequency.text.systick_get_value.text.systick_set_clocksource.text.systick_interrupt_enable.text.systick_interrupt_disable.text.systick_counter_enable.text.systick_counter_disable.text.systick_get_countflag.text.systick_clear.text.systick_get_calib.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group%4 89%@ 8:%L 8;%X 8<%d 8=%p 8>%| 8?!',Eb,^ @Db8 ~(.8JH ^TzdEv @Lb8H @\d08x @dh8Bm @dp8I @deH8!~  @e 8#vR @sh8% @ t 8'N @,t8)2" @x(8+T @,x08-<i @\y8/ @y`810b?0FY'pY @?@ABCDEFGHIJKLMNOPQRSTUVWXKJ` %L (GY- @int2]j^0#NMg4[wW6$ > % Uy$ > : ; 9 I.?: ; 9 '@z(HY  ?  Ka    B     EE"+'e/ h*Q"#?@8d~ 7W&_-T5}n 66}[ [!=GNH Y>CsO=eXWAQbDS<9&01eD.iMvp*PXY4 wP@j2ih 8Z#XBUO_p\I68iZi*kDy<7: =I ht^o_)b/6a26p"E,+A-mJi#Tm*d!o-3[j/J)j].$NB4d{BRe"f c:rC;9 C0$B1*w95A<%0i$!Y Q%#/EV)pZQK ?5`j@d.@6#r_TYgh?Ek@dCd#G46L'g:iO3Kd F'tZao>3dj'H!jzi]' ;R6;<bAbZA`NmdQ(W.(J0VF;g5*|>@0O  4!" +>N9w2?Jo=8=E|zCF =pSPZjgQYl7xfub MOPYg&tAx?\6M/sh8%6A&dQ "AO#9RhcW2+"l:cdq$$j.Wzkn KOUB8 P8 ~I @5QU !#;Vp0v#m'(3HH>>h!E`^D*c_Z+Mh&E4k &Xc)W;&f0KL00=cC1;mlM0HOce-?02:B 0Xm\Fk.<@F7l`9TAjBV%HA yNE%g+h#59:9<0?<BEAH'IKdND!(b +Q=OT&waaFFXDE>$F $!%E+_E I7JY  3poH1$iKm9T@Ow"9fQAC R9Z:aG7U<YU)nRxH V DA:fU >++'<](J*+7E=6BPY 5HCBl`R9U >++ 4e dh`R9U  @>++ 4G>%R!`/,0="Sd<mLC+ >LN-\U2aXQoBH9`1 ![/9QkfWMEimo]7X5._MXHl onEdUp fUc*WM;7V&h9c^URQSF"X,a,-P"J%=Aj>^IX_"Z:1F2N3?>6H9:i<1=>T?aBM C%D}YNQ"^'M_[k )l6pqp[ru[x]&aEeoMAkHO@N ]96`fg PGx%vQ1E!Kc[d"n=/OD&>hDj+%\22FfTa!Wl0^} %c%a=V3" 0<`^T(^{JkbmK %8be[lGZ#I]a5n>%$5/2OIk^[M-R,Dn{E$CU|]G]8%|T?O:eG7?XRX;3(l9Ro6eo4lb  7ZT4KmK`GBaYb0ZxVZ7r$%+! 5"!xF& E'&2kCP(DY7EF8I)L0QR0`S^T9UpV$`W:X*#Y4Zv;[X \I]Vg^)_/`LaLib#c2dNe <f.gihi2jNkSlm4niPo3p3O+sK..1cc4/7W:(B9HKI2:$%_'cdgh.'UM K# p ;[V:B=*Sg< ./[ 5A?O+'Ff,n(BDO2g8oHWz($]V ../../cm3/usr/lib/gcc/arm-none-eabi/12.2.1/include/usr/include/newlib/usr/include/newlib/machine/usr/include/newlib/sys../../../include/libopencm3/cm3scb.cstdint.hstdlib.hieeefp.h_ansi.hnewlib.h_newlib_version.hconfig.hfeatures.hstddef.hreent.h_types.h_types.h_default_types.hlock.hcdefs.hstdlib.hscb.hmemorymap.hcommon.hstdbool.h6 >__GNUCLIKE___SECTION 1__GXX_TYPEINFO_EQUALITY_INLINE 0MMIO64(addr) (*(volatile uint64_t *)(addr))__DECIMAL_DIG__ 17__SVID_VISIBLE 0unsigned char__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1_REENT_GETDATE_ERR_P(ptr) (&((ptr)->_new._reent._getdate_err))__CHAR_UNSIGNED__ 1_GLOBAL_ATEXIT (_GLOBAL_REENT->_atexit)__FLT64_HAS_INFINITY__ 1__requires_exclusive(...) __lock_annotate(exclusive_locks_required(__VA_ARGS__))__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__GCC_DESTRUCTIVE_SIZE 64__LACCUM_EPSILON__ 0x1P-31LK__PTRDIFF_MAX__ 0x7fffffff_LONG_DOUBLE long double__INTMAX_C(c) c ## LL__INTMAX_MAX__ 0x7fffffffffffffffLL__TQ_IBIT__ 0__FLT64_DECIMAL_DIG__ 17__LDBL_MIN__ 2.2250738585072014e-308LLPC43XX_M0 1_Kmax (sizeof (size_t) << 3)__ATOMIC_CONSUME 1__ULACCUM_FBIT__ 32__WCHAR_MAX__ 0xffffffffU__CONCAT(x,y) __CONCAT1(x,y)__ARM_FEATURE_QBIT__SIZEOF_INT__ 4__GNUCLIKE___TYPEOF 1SCB_SHCSR_SVCALLPENDED (1 << 15)INT64_MAX __INT64_MAX__INTMAX_MIN__SIZEOF_LONG_LONG__ 8__DBL_MAX_10_EXP__ 308__RCSID_SOURCE(s) struct __hack__FRACT_MIN__ (-0.5R-0.5R)CORESIGHT_LAR_KEY 0xC5ACCE55__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__strong_reference(sym,aliassym) extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)))__SFRACT_FBIT__ 7__INTMAX_WIDTH__ 64__ARM_FEATURE_BF16_SCALAR_ARITHMETIC__SQ_IBIT__ 0__ORDER_PDP_ENDIAN__ 3412__SIZE_TYPE__ unsigned int_REENT_MP_FREELIST(ptr) ((ptr)->_freelist)__FLT_HAS_DENORM__ 1__INT8_TYPE__ signed char__FLT32_MIN__ 1.1754943508222875e-38F32__USACCUM_MIN__ 0.0UHK__FLT32_DECIMAL_DIG__ 9__LDBL_MIN_EXP__ (-1021)INT_FAST16_MIN__LDBL_MANT_DIG__ 53INT64_MIN (-INT64_MAX - 1)__UINT8_C(c) c__INT16_TYPE__ short int__aligned(x) __attribute__((__aligned__(x)))__FLT64_MAX__ 1.7976931348623157e+308F64UINT_FAST32_MAX__unbounded INT_FAST64_MAX __INT_FAST64_MAX____APCS_32__ 1INT64_C__UINT_LEAST16_MAX__ 0xffff__STDC_HOSTED__ 1__ULLFRACT_FBIT__ 64_LDBL_EQ_DBL 1SCB_AIRCR_VECTKEY (0x05FA << SCB_AIRCR_VECTKEYSTAT_LSB)_REENT_MP_RESULT(ptr) ((ptr)->_result)__INT_FAST64_TYPE__ long long int__WINT_TYPE__ unsigned int_REENT_STRTOK_LAST(ptr) ((ptr)->_new._reent._strtok_last)__SIZE_T__ INT32_MIN (-INT32_MAX - 1)__FLT32_MAX_10_EXP__ 38SCB_AIRCR_ENDIANESS (1 << 15)__USFRACT_MAX__ 0XFFP-8UHR__ARM_FEATURE_CLZSCB_ICSR_PENDSTSET (1 << 26)__UINTPTR_MAX__ 0xffffffffU__need_wchar_t__FLT32_MIN_EXP__ (-125)__result_use_check __attribute__((__warn_unused_result__))UINT32_MAX __UINT32_MAX__SCB_AIRCR_VECTKEYSTAT_LSB 16_BSD_PTRDIFF_T_ __WCHAR_WIDTH__ 32__ULFRACT_FBIT__ 32__FLT64_MIN_10_EXP__ (-307)__size_t __bounded BIT10 (1<<10)__INT_FAST64_WIDTH__ 64__STDC_VERSION__ 199901L___int_wchar_t_h _REENT_INIT_PTR_ZEROED(var) { (var)->_stdin = _REENT_STDIO_STREAM(var, 0); (var)->_stdout = _REENT_STDIO_STREAM(var, 1); (var)->_stderr = _REENT_STDIO_STREAM(var, 2); (var)->_new._reent._rand_next = 1; (var)->_new._reent._r48._seed[0] = _RAND48_SEED_0; (var)->_new._reent._r48._seed[1] = _RAND48_SEED_1; (var)->_new._reent._r48._seed[2] = _RAND48_SEED_2; (var)->_new._reent._r48._mult[0] = _RAND48_MULT_0; (var)->_new._reent._r48._mult[1] = _RAND48_MULT_1; (var)->_new._reent._r48._mult[2] = _RAND48_MULT_2; (var)->_new._reent._r48._add = _RAND48_ADD; }__SFRACT_EPSILON__ 0x1P-7HR__CONCAT1(x,y) x ## y__CC_SUPPORTS___INLINE 1__DBL_MIN_10_EXP__ (-307)__USQ_FBIT__ 32__ORDER_BIG_ENDIAN__ 4321SIZE_MAX__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1__SQ_FBIT__ 31_ELIDABLE_INLINE static __inline____UHQ_FBIT__ 16_REENT_EMERGENCY_SIZE 25__PTRDIFF_WIDTH__ 32INT_FAST8_MAX__weak_reference(sym,alias) __asm__(".weak " #alias); __asm__(".equ " #alias ", " #sym)__UINT_FAST8_MAX__ 0xffffffffUPTRDIFF_MIN_NOTHROW __has_extension __has_featureNULL_REENT_CHECK_MP(ptr) __LACCUM_IBIT__ 32__SCHAR_WIDTH__ 8__NEWLIB_H__ 1__INT_FAST16_WIDTH__ 32INTMAX_C__VERSION__ "12.2.1 20221205"__VFP_FP__ 1__LLFRACT_MIN__ (-0.5LLR-0.5LLR)__INTPTR_MAX__ 0x7fffffffSCB_SHPR_PRI_9_RESERVED 5__RAND_MAX__UINT_FAST16_MAX__ 0xffffffffU__INTPTR_TYPE__ intINT64_C(c) __INT64_C(c)__attribute_pure__ _Nonnull __GNUC_PREREQ(maj,min) ((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min))__UFRACT_MIN__ 0.0UR_N_LISTS 30_WANT_IO_LONG_LONG 1__FLT32X_HAS_INFINITY__ 1UINT_FAST16_MAX __UINT_FAST16_MAX___SYS_SIZE_T_H _REENT_RAND48_SEED(ptr) ((ptr)->_new._reent._r48._seed)__UINT_LEAST8_TYPE__ unsigned char__locks_exclusive(...) __lock_annotate(exclusive_lock_function(__VA_ARGS__))SCB_BASE (SCS_BASE + 0x0D00)__ACCUM_FBIT__ 15SCB_SCR_SLEEPONEXIT (1 << 1)__UACCUM_IBIT__ 16long intUINT8_MAXSIZE_MAX __SIZE_MAX____INT_FAST64_MAX__ 0x7fffffffffffffffLL__FLT32X_DECIMAL_DIG__ 17__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT32X_HAS_QUIET_NAN__ 1__FLT32X_EPSILON__ 2.2204460492503131e-16F32x___int_least16_t_defined 1_Nullable NVIC_BASE (SCS_BASE + 0x0100)__INT_FAST8_TYPE__ int_NOINLINE __attribute__ ((__noinline__))__UDA_FBIT__ 32__size_t__ __LFRACT_MIN__ (-0.5LR-0.5LR)__USACCUM_EPSILON__ 0x1P-8UHK__UINTMAX_C(c) c ## ULLHAVE_INITFINI_ARRAY 1__SIZEOF_POINTER__ 4__INT_LEAST8_TYPE__ signed char__GCC_ATOMIC_BOOL_LOCK_FREE 1__LOCK_INIT_RECURSIVE(class,lock) static int lock = 0;BIT4 (1<<4)UINT_FAST64_MAXBIT0 (1<<0)INT_FAST32_MAX__ARM_NEON____FLT32_MAX_EXP__ 128UINT_LEAST8_MAX __UINT_LEAST8_MAX____THUMB_INTERWORK__ 1__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLRBBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"UINT_FAST8_MAX __UINT_FAST8_MAX____const const_SIZE_T_DECLARED UINT8_MAX __UINT8_MAX____CHAR32_TYPE__ long unsigned intSIG_ATOMIC_MIN__ARM_FEATURE_FP16_VECTOR_ARITHMETICLIBOPENCM3_CM3_COMMON_H BIT23 (1<<23)__CC_SUPPORTS_DYNAMIC_ARRAY_INIT 1__DBL_IS_IEC_60559__ 2__UINT_FAST32_MAX__ 0xffffffffU__FLT_MAX_EXP__ 128__SIZEOF_LONG__ 4WINT_MIN __WINT_MIN____FLT_MIN_10_EXP__ (-37)_READ_WRITE_BUFSIZE_TYPE int__SIZEOF_DOUBLE__ 8__INT_LEAST32_WIDTH__ 32_CLOCK_T_ unsigned long_TIME_T_ __int_least64_tBIT27 (1<<27)__LARGEFILE_VISIBLE 0UINT64_MAX__NEWLIB__ 3SCB_CPUID_CONSTANT_LSB 16__GNUC_EXECUTION_CHARSET_NAME "UTF-8"EXIT_SUCCESS 0__UTA_FBIT__ 64__ISO_C_VISIBLE 1999__FLT_DECIMAL_DIG__ 9signed char__asserts_exclusive(...) __lock_annotate(assert_exclusive_lock(__VA_ARGS__))INT8_MAXINTMAX_MIN (-INTMAX_MAX - 1)INT32_C(c) __INT32_C(c)__ptr_t void *_REENT_MBRTOWC_STATE(ptr) ((ptr)->_new._reent._mbrtowc_state)_REENT_RAND48_ADD(ptr) ((ptr)->_new._reent._r48._add)__FRACT_FBIT__ 15__LLACCUM_EPSILON__ 0x1P-31LLK__GNUC_PATCHLEVEL__ 1__alloc_align(x) __attribute__((__alloc_align__(x)))SCB_CPUID_VARIANT_LSB 20_RAND48_SEED_2 (0x1234)PPBI_BASE (0xE0000000U)_REENT_MP_RESULT_K(ptr) ((ptr)->_result_k)__predict_true(exp) __builtin_expect((exp), 1)_STDBOOL_H _REENT_WCSRTOMBS_STATE(ptr) ((ptr)->_new._reent._wcsrtombs_state)__FLT64_MAX_10_EXP__ 308MMIO32(addr) (*(volatile uint32_t *)(addr))WINT_MIN__attribute_format_strfmon__(a,b) _BSD_SIZE_T_DEFINED_ __UINT_FAST32_TYPE__ unsigned int___int_size_t_h END_DECLS __SIZEOF_FLOAT__ 4__FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32x__GNUCLIKE_MATH_BUILTIN_RELOPS __FLT_MAX_10_EXP__ 38__PMT(args) argsSCB_SCR MMIO32(SCB_BASE + 0x10)__FRACT_MAX__ 0X7FFFP-15RINT_LEAST32_MAX __INT_LEAST32_MAX__UINTMAX_C__INT_FAST32_MAX__ 0x7fffffff__ATOMIC_SEQ_CST 5_READ_WRITE_RETURN_TYPE int__ARM_ARCH_EXT_IDIV____DEFINED_size_t BIT8 (1<<8)__need_wint_tBEGIN_DECLS __sym_default(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@@" #verid)__alloc_size2(n,x) __attribute__((__alloc_size__(n, x)))__UINT16_MAX__ 0xffff__TQ_FBIT__ 127__LDBL_MAX_EXP__ 1024__POSIX_VISIBLE 0_HAVE_LONG_DOUBLE 1_Alignas(x) __aligned(x)__GNUCLIKE_BUILTIN_CONSTANT_P 1__SIZEOF_SHORT__ 2__P(protos) protosSCB_SHCSR MMIO32(SCB_BASE + 0x24)__DECONST(type,var) ((type)(__uintptr_t)(const void *)(var))__STRICT_ANSI__ 1_SYS_FEATURES_H __returns_twice __attribute__((__returns_twice__))UINT_LEAST8_MAX_MACHSTDLIB_H_ UINT8_C(c) __UINT8_C(c)__SIZEOF_LONG_DOUBLE__ 8__PRAGMA_REDEFINE_EXTNAME 1__WCHAR_TYPE__ unsigned intWINT_MAX __WINT_MAX__char__USA_IBIT__ 16__need_wchar_t __hidden __attribute__((__visibility__("hidden")))__SFRACT_MAX__ 0X7FP-7HR__UINT_FAST64_TYPE__ long long unsigned intSCB_ICSR_NMIPENDSET (1 << 31)_WINT_T __lock_close(lock) ((void) 0)__FLT_MIN__ 1.1754943508222875e-38F__need_size_t __HA_FBIT__ 7__FDPIC____FLT_MAX__ 3.4028234663852886e+38F__FLT32_IS_IEC_60559__ 2__noinline __attribute__ ((__noinline__))UINT64_C(c) __UINT64_C(c)INT_FAST64_MIN__USFRACT_IBIT__ 0__INT32_C(c) c ## L__weak_symbol __attribute__((__weak__))__USFRACT_MIN__ 0.0UHR__used __attribute__((__used__))__ARM_NEON_REENT_EMERGENCY(ptr) ((ptr)->_emergency)__UINT8_MAX__ 0xff___int16_t_defined 1UINTMAX_C(c) __UINTMAX_C(c)_REENT _impure_ptr__has_feature(x) 0__exported __attribute__((__visibility__("default")))__SCCSID(s) struct __hackBIT7 (1<<7)__DBL_HAS_DENORM__ 1SCB_ICSR_PENDSVSET (1 << 28)_MB_LEN_MAX 1__DA_FBIT__ 31long long intBIT17 (1<<17)__GXX_ABI_VERSION 1017__INT_LEAST16_MAX__ 0x7fff__FLT_DENORM_MIN__ 1.4012984643248171e-45F__LDBL_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__requires_shared(...) __lock_annotate(shared_locks_required(__VA_ARGS__))_END_STD_C SCB_SHPR_PRI_14_PENDSV 10_T_SIZE SCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__UINT32_C(c) c ## UL__UACCUM_MIN__ 0.0UKUINT32_C(c) __UINT32_C(c)_Null_unspecified __FLT_EPSILON__ 1.1920928955078125e-7F__XSTRING(x) __STRING(x)__restrict restrictSCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)__compar_fn_t_defined __ARM_ARCH_ISA_THUMB__GNUCLIKE_BUILTIN_VARARGS 1__ARM_FEATURE_MATMUL_INT8__UINT8_TYPE__ unsigned char_REENT_SIGNGAM(ptr) ((ptr)->_new._reent._gamma_signgam)__GCC_ATOMIC_SHORT_LOCK_FREE 1false 0__USACCUM_FBIT__ 8__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1__MISC_VISIBLE 0__LACCUM_FBIT__ 31SCS_BASE (PPBI_BASE + 0xE000)SCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)__FLT32_HAS_QUIET_NAN__ 1SCB_SCR_SLEEPDEEP (1 << 2)__OBSOLETE_MATH __OBSOLETE_MATH_DEFAULT__LDBL_HAS_INFINITY__ 1SCB_CCR MMIO32(SCB_BASE + 0x14)__TA_FBIT__ 63UINT16_MAX __UINT16_MAX__MMIO8(addr) (*(volatile uint8_t *)(addr))SCB_SHPR_PRI_13_RESERVED 9__FLT32X_MAX_10_EXP__ 308SCB_SHPR_PRI_5_BUSFAULT 1__ARM_PCS 1__FLT32X_MIN_EXP__ (-1021)UINTMAX_MAX __UINTMAX_MAX____GNUCLIKE_ASM 3__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__UINT_LEAST8_MAX__ 0xff__GCC_ATOMIC_LONG_LOCK_FREE 1BIT13 (1<<13)_BSD_WCHAR_T_ BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT16_MAX __INT16_MAX____FLT32X_IS_IEC_60559__ 2INT_LEAST64_MAX __INT_LEAST64_MAX__LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))UINT32_MAX_REENT_CHECK_EMERGENCY(ptr) __INT_LEAST16_WIDTH__ 16__DEC_EVAL_METHOD__ 2__ARM_FEATURE_FP16_FMLINT16_MIN (-INT16_MAX - 1)__ATFILE_VISIBLE 0__USFRACT_EPSILON__ 0x1P-8UHRNULL ((void *)0)SCB_SCR_SEVONPEND (1 << 4)_Thread_local __thread___int_least32_t_defined 1__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK__need_NULLUINT64_C__USER_LABEL_PREFIX__ __UINT64_MAX__ 0xffffffffffffffffULLINT_FAST8_MININT_FAST8_MAX __INT_FAST8_MAX____UINT32_MAX__ 0xffffffffUL_REENT_MBTOWC_STATE(ptr) ((ptr)->_new._reent._mbtowc_state)SCB_CCR_UNALIGN_TRP (1 << 3)_REENT_MBLEN_STATE(ptr) ((ptr)->_new._reent._mblen_state)__trylocks_shared(...) __lock_annotate(shared_trylock_function(__VA_ARGS__))__INT_LEAST8_MAX__ 0x7f/build/libopencm3/lib/lpc43xx/m0__ARM_FEATURE_IDIV__ATOMIC_ACQUIRE 2__ARM_FEATURE_COMPLEX__locks_shared(...) __lock_annotate(shared_lock_function(__VA_ARGS__))unsigned signedSCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)__UINT64_TYPE__ long long unsigned int__ARM_SIZEOF_WCHAR_T 4__FLT32X_MAX_EXP__ 1024SCB_ICSR MMIO32(SCB_BASE + 0x04)BIT21 (1<<21)__UINT_LEAST32_MAX__ 0xffffffffUL__DBL_EPSILON__ ((double)2.2204460492503131e-16L)__lock_acquire(lock) ((void) 0)__section(x) __attribute__((__section__(x)))__INT_LEAST64_WIDTH__ 64__FLT_HAS_INFINITY__ 1__ACCUM_MAX__ 0X7FFFFFFFP-15K__INT8_MAX__ 0x7fSCB_AIRCR MMIO32(SCB_BASE + 0x0C)BIT14 (1<<14)SCB_VTOR_TBLOFF_LSB 7__GCC_HAVE_DWARF2_CFI_ASM 1___int8_t_defined 1__SFRACT_MIN__ (-0.5HR-0.5HR)long unsigned int__SA_IBIT__ 16__ARM_FEATURE_UNALIGNED__offsetof(type,field) offsetof(type, field)__GCC_IEC_559_COMPLEX 0__ARM_FEATURE_MVE__nonnull_all __attribute__((__nonnull__))__ARM_FP16_FORMAT_IEEE__UINT16_TYPE__ short unsigned intRAND_MAX __RAND_MAX__SOFTFP__ 1UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT_FAST32_MIN_T_SIZE_ __FLT_EVAL_METHOD_TS_18661_3__ 0__attribute_malloc__ __lock_init_recursive(lock) ((void) 0)BIT18 (1<<18)UINT_FAST16_MAX__NULLABILITY_PRAGMA_POP SCB_DFSR MMIO32(SCB_BASE + 0x30)__UINT_FAST8_TYPE__ unsigned int__LLACCUM_IBIT__ 32__FRACT_EPSILON__ 0x1P-15RBIT24 (1<<24)__INT32_MAX__ 0x7fffffffL__min_size(x) static (x)_TIMER_T_ unsigned longUINTMAX_MAXBIT30 (1<<30)__INT_LEAST64_MAX__ 0x7fffffffffffffffLL__null_sentinel __attribute__((__sentinel__))__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__need_NULL __FLT32_MANT_DIG__ 24INT_LEAST8_MAX__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32offsetof(TYPE,MEMBER) __builtin_offsetof (TYPE, MEMBER)__UINT64_C(c) c ## ULL__UINT_LEAST64_TYPE__ long long unsigned intWCHAR_MIN __WCHAR_MIN____USFRACT_FBIT__ 8__LDBL_EPSILON__ 2.2204460492503131e-16LBIT28 (1<<28)__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1INTMAX_C(c) __INTMAX_C(c)__NULLABILITY_PRAGMA_PUSH __DBL_MAX_EXP__ 1024__ATOMIC_RELEASE 3__FLT32X_HAS_DENORM__ 1__FLT_MANT_DIG__ 24_RAND48_SEED_1 (0xabcd)__UDQ_IBIT__ 0SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)___int_ptrdiff_t_h __OPTIMIZE__ 1__UACCUM_MAX__ 0XFFFFFFFFP-16UK__CC_SUPPORTS___FUNC__ 1__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__GNUCLIKE_MATH_BUILTIN_CONSTANTS __FINITE_MATH_ONLY__ 0_T_PTRDIFF_ __LDBL_DENORM_MIN__ 4.9406564584124654e-324L__INT64_MAX__ 0x7fffffffffffffffLL__ULLFRACT_IBIT__ 0_ANSI_STDDEF_H _REENT_CHECK_SIGNAL_BUF(ptr) MMIO16(addr) (*(volatile uint16_t *)(addr))UINT16_C(c) __UINT16_C(c)LPC43XX 1_REENT_SMALL_CHECK_INIT(ptr) __GNUC__ 12WCHAR_MAX__LONG_WIDTH__ 32_T_WCHAR_ INT32_MAX __INT32_MAX____UACCUM_FBIT__ 16__warn_references(sym,msg) __asm__(".section .gnu.warning." #sym); __asm__(".asciz \"" msg "\""); __asm__(".previous")__UFRACT_EPSILON__ 0x1P-16UR__WCHAR_MIN__ 0UCORESIGHT_LSR_SLK (1<<1)__UQQ_IBIT__ 0CORESIGHT_LSR_OFFSET 0xfb4_NEWLIB_VERSION_H__ 1__ULACCUM_MIN__ 0.0ULK_ATEXIT_DYNAMIC_ALLOC 1__need_size_t__ARM_ARCH 6_SIZE_T_ __FLT_RADIX__ 2BIT3 (1<<3)__lock_acquire_recursive(lock) ((void) 0)_REENT_RAND48_MULT(ptr) ((ptr)->_new._reent._r48._mult)SCB_SHPR32(ipr_id) MMIO32(SCS_BASE + 0xD18 + ((ipr_id) * 4))__ARM_FEATURE_CMSEINT16_MAXINTPTR_MAX__wchar_t__ __LDBL_HAS_QUIET_NAN__ 1__LONG_LONG_WIDTH__ 64BIT6 (1<<6)__DEFINED_wchar_t SCB_CPUID_IMPLEMENTER_LSB 24__UINT_FAST64_MAX__ 0xffffffffffffffffULL__ARM_FPSCB_ICSR_PENDSTCLR (1 << 25)__HA_IBIT__ 8__ARM_FEATURE_DSP__INTPTR_WIDTH__ 32__GCC_ATOMIC_LLONG_LOCK_FREE 1BIT9 (1<<9)__FLT32X_MIN__ 2.2250738585072014e-308F32xINT_FAST8_MIN (-INT_FAST8_MAX - 1)INTMAX_MAX __INTMAX_MAX____FLT64_MAX_EXP__ 1024__WCHAR_T BIT20 (1<<20)MB_CUR_MAX __locale_mb_cur_max()__FLT64_MIN__ 2.2250738585072014e-308F64___int32_t_defined 1__INT_WIDTH__ 32_HAVE_CC_INHIBIT_LOOP_TO_LIBCALL 1__FLT_MIN_EXP__ (-125)__ARM_ARCH_PROFILE__INT64_TYPE__ long long intSCB_ICSR_VECTACTIVE_LSB 0__LFRACT_FBIT__ 31__CHAR_BIT__ 8__SIZEOF_WCHAR_T__ 4_PTRDIFF_T __BSD_VISIBLE 0__predict_false(exp) __builtin_expect((exp), 0)_REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_new._reent._mbsrtowcs_state)SCB_ICSR_VECTPENDING_LSB 12__UFRACT_MAX__ 0XFFFFP-16UR___int_least64_t_defined 1_Alignof(x) __alignof(x)__THROW __UHA_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)__SFRACT_IBIT__ 0_REENT_L64A_BUF(ptr) ((ptr)->_new._reent._l64a_buf)__EXP(x) __ ##x ##____BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_EPSILON__ 1.1920928955078125e-7F32__ARM_NEON_FPINTPTR_MIN (-INTPTR_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX____USACCUM_MAX__ 0XFFFFP-8UHK_ANSIDECL_H_ SYS_TICK_BASE (SCS_BASE + 0x0010)SCB_AIRCR_VECTCLRACTIVE (1 << 1)__ARM_32BIT_STATE__UFRACT_FBIT__ 16__UDQ_FBIT__ 64__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)__GNUCLIKE_BUILTIN_MEMCPY 1__LDBL_MAX_10_EXP__ 308__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__INT_FAST32_TYPE__ int__ARM_ARCH_PROFILE 77unsigned int_SIZE_T_DEFINED_ __GCC_ASM_FLAG_OUTPUTS__SCB_AIRCR_SYSRESETREQ (1 << 2)__NEWLIB_MINOR__ 3_SIZET_ __FLT64_HAS_QUIET_NAN__ 1__USACCUM_IBIT__ 8__FLT64_HAS_DENORM__ 1__FLT_DIG__ 6__UACCUM_EPSILON__ 0x1P-16UK_FVWRITE_IN_STREAMIO 1_WCHAR_T_DECLARED INT_LEAST8_MAX __INT_LEAST8_MAX___SYS_REENT_H_ __FLT_EVAL_METHOD__ 0SCB_ICSR_ISRPENDING (1 << 22)__SCHAR_MAX__ 0x7fINT_LEAST32_MIN__INT_FAST8_WIDTH__ 32SCB_SHPR_PRI_6_USAGEFAULT 2__thumb2____ARM_FEATURE_LDREX_T_PTRDIFF __UQQ_FBIT__ 8INT16_C__ARM_FP16_ARGS__GCC_IEC_559 0__requires_unlocked(...) __lock_annotate(locks_excluded(__VA_ARGS__))INT_LEAST16_MAX __INT_LEAST16_MAX____LFRACT_MAX__ 0X7FFFFFFFP-31LR__SIZEOF_PTRDIFF_T__ 4_PTRDIFF_T_DECLARED ___int_least8_t_defined 1__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN___GCC_WCHAR_T __unlocks(...) __lock_annotate(unlock_function(__VA_ARGS__))__EXPORT __SIG_ATOMIC_TYPE__ int__OBSOLETE_MATH_DEFAULT 1_Noreturn __dead2UINT64_MAX __UINT64_MAX__SCB_SHPR_PRI_7_RESERVED 3__SHRT_WIDTH__ 16_UNBUF_STREAM_OPT 1__IMPORT true 1_ATEXIT_SIZE 32__USA_FBIT__ 16__volatile volatile_MACHINE__TYPES_H __IEEE_LITTLE_ENDIAN _REENT_SIGNAL_SIZE 24__LDBL_MIN_10_EXP__ (-307)INT64_MAX_WANT_REGISTER_FINI 1__FLT_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1__LFRACT_IBIT__ 0__LFRACT_EPSILON__ 0x1P-31LR_BEGIN_STD_C __malloc_like __attribute__((__malloc__))__ARM_SIZEOF_MINIMAL_ENUM 1bool _Bool_POINTER_INT long__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__arm__ 1INT_FAST64_MAX__FLT32_MIN_10_EXP__ (-37)__RAND_MAX 0x7fffffff__STRING(x) #x_WCHAR_T ../../cm3/scb.cINT8_MAX __INT8_MAX____ARM_FP16_FORMAT_ALTERNATIVE__FBSDID(s) struct __hack__LDBL_NORM_MAX__ 1.7976931348623157e+308LINTPTR_MIN_MACHINE__DEFAULT_TYPES_H __BIGGEST_ALIGNMENT__ 8INT8_C(c) __INT8_C(c)_GCC_PTRDIFF_T __GNUCLIKE_BUILTIN_NEXT_ARG 1__TA_IBIT__ 64__LOCK_INIT(class,lock) static int lock = 0;_SIZE_T _WCHAR_T_H _RAND48_MULT_2 (0x0005)__ARM_FEATURE_QRDMX__ARM_ARCH_ISA_THUMB 1__ASMNAME(cname) __XSTRING (__USER_LABEL_PREFIX__) cname__LONG_LONG_MAX__ 0x7fffffffffffffffLL_FSEEK_OPTIMIZATION 1__WINT_WIDTH__ 32__arg_type_tag(arg_kind,arg_idx,type_tag_idx) __USQ_IBIT__ 0_REENT_INIT_PTR(var) { memset((var), 0, sizeof(*(var))); _REENT_INIT_PTR_ZEROED(var); }BIT11 (1<<11)__COPYRIGHT(s) struct __hack__UFRACT_IBIT__ 0_REENT_MBRLEN_STATE(ptr) ((ptr)->_new._reent._mbrlen_state)_GCC_STDINT_H __INT8_C(c) c__scanflike(fmtarg,firstvararg) __attribute__((__format__ (__scanf__, fmtarg, firstvararg)))INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)_STDDEF_H_ INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__GCC_ATOMIC_POINTER_LOCK_FREE 1__DBL_MIN_EXP__ (-1021)__SIZE_T SCB_CPUID MMIO32(SCB_BASE + 0x00)INT8_MIN (-INT8_MAX - 1)__printf0like(fmtarg,firstvararg) __FLT32_DIG__ 6INT_LEAST16_MAX__dead2 __attribute__((__noreturn__))BIT15 (1<<15)GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sections__EXP___int64_t_defined 1__LDBL_HAS_DENORM__ 1__HAVE_SPECULATION_SAFE_VALUE 1__SACCUM_FBIT__ 7INT32_MAX__BEGIN_DECLS __ACCUM_MIN__ (-0X1P15K-0X1P15K)_REENT_CHECK_MISC(ptr) __GNUC_VA_LIST_COMPATIBILITY 1__ARM_FEATURE_CRYPTO__INT_LEAST32_TYPE__ long intSCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)UINT_LEAST16_MAXBIT19 (1<<19)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FRACT_IBIT__ 0UINT_LEAST64_MAX__FLT64_IS_IEC_60559__ 2__NEWLIB_PATCHLEVEL__ 0BIT25 (1<<25)__ORDER_LITTLE_ENDIAN__ 1234__size_t__CC_SUPPORTS_INLINE 1__DOTS , ...long long unsigned int__alloc_size(x) __attribute__((__alloc_size__(x)))BIT31 (1<<31)__ULACCUM_IBIT__ 32__SHRT_MAX__ 0x7fff__LDBL_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int_SIZE_T_DEFINED __DQ_FBIT__ 63SCB_SHPR_PRI_8_RESERVED 4__GNU_VISIBLE 0INT_LEAST64_MAX__SACCUM_IBIT__ 8__PTRDIFF_T __UHQ_IBIT__ 0INT_LEAST8_MIN_REENT_WCTOMB_STATE(ptr) ((ptr)->_new._reent._wctomb_state)BIT29 (1<<29)__INT_FAST16_TYPE__ int__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__UINT_LEAST16_TYPE__ short unsigned intUINT16_MAX__ARM_FEATURE_FMA__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__CHAR16_TYPE__ short unsigned int__FLT32X_DIG__ 15__signed signed__UTQ_FBIT__ 128LIBOPENCM3_SCB_H _REENT_ASCTIME_BUF(ptr) ((ptr)->_new._reent._asctime_buf)__lock_try_acquire(lock) ((void) 0)__INT_FAST16_MAX__ 0x7fffffff__have_longlong64 1PTRDIFF_MAX __PTRDIFF_MAX___REENT_MP_P5S(ptr) ((ptr)->_p5s)INT8_MINUINTPTR_MAX __UINTPTR_MAX___WCHAR_T_DEFINED __ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__trylocks_exclusive(...) __lock_annotate(exclusive_trylock_function(__VA_ARGS__))SCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)UINT_FAST32_MAX __UINT_FAST32_MAX____ULFRACT_MIN__ 0.0ULRBIT26 (1<<26)_REENT_TM(ptr) (&(ptr)->_new._reent._localtime_buf)__ARM_BF16_FORMAT_ALTERNATIVE__INT32_TYPE__ long int__always_inline __inline__ __attribute__((__always_inline__))INT32_MIN__containerof(x,s,m) ({ const volatile __typeof(((s *)0)->m) *__x = (x); __DEQUALIFY(s *, (const volatile char *)__x - __offsetof(s, m));})_BSD_SIZE_T_ WCHAR_MINSCB_CPUID_REVISION_LSB 0__no_lock_analysis __lock_annotate(no_thread_safety_analysis)_WCHAR_T_ _REENT_STDIO_STREAM(var,index) &(var)->__sf[index]_T_WCHAR __DQ_IBIT__ 0_CLOCKID_T_ unsigned long_REENT_CHECK_TM(ptr) __UTQ_IBIT__ 0INT_FAST32_MAX __INT_FAST32_MAX____SA_FBIT__ 15__INT_WCHAR_T_H __FLT32X_MAX__ 1.7976931348623157e+308F32xSCB_ICSR_ISRPREEMPT (1 << 23)__ARM_EABI__ 1INT16_MIN__ELF__ 1__FLT_IS_IEC_60559__ 2__THUMBEL__ 1SCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)__QQ_IBIT__ 0__ARMEL__ 1SCB_SHPR_PRI_12_RESERVED 8__LLACCUM_FBIT__ 31scb_reset_system__UINTMAX_TYPE__ long long unsigned int__FLT32X_MIN_10_EXP__ (-307)__GNUC_MINOR__ 2__lock_release_recursive(lock) ((void) 0)__UINT_LEAST32_TYPE__ long unsigned int__ARM_FEATURE_NUMERIC_MAXMIN_RAND48_MULT_1 (0xdeec)__INTMAX_TYPE__ long long intUINTPTR_MAX__GCC_ATOMIC_INT_LOCK_FREE 1_RAND48_SEED_0 (0x330e)INTMAX_MAXDEBUG_BASE (SCS_BASE + 0x0DF0)__Long long__ARM_FEATURE_FP16_SCALAR_ARITHMETIC__FLT_NORM_MAX__ 3.4028234663852886e+38F_STDLIB_H_ __DBL_HAS_QUIET_NAN__ 1UINT_LEAST32_MAX__ptrvalue _NOINLINE_STATIC _NOINLINE static__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRINT32_C_PTRDIFF_T_ INT64_MIN__SACCUM_MAX__ 0X7FFFP-7HK_GLOBAL_REENT _global_impure_ptrUINT8_C__UINTPTR_TYPE__ unsigned intUINT16_C__REGISTER_PREFIX__ __FLT32_MAX__ 3.4028234663852886e+38F32__DBL_DIG__ 15__ULFRACT_EPSILON__ 0x1P-32ULR__RCSID(s) struct __hackWCHAR_MAX __WCHAR_MAX____ARM_ARCH_6M__ 1__SIZEOF_SIZE_T__ 4__lock_close_recursive(lock) ((void) 0)INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__GNUCLIKE___OFFSETOF 1__INT64_C(c) c ## LL__GNUCLIKE_CTOR_SECTION_HANDLING 1__lockable __lock_annotate(lockable)__END_DECLS SCB_VTOR_TBLOFF (0x1FFFFFF << SCB_VTOR_TBLOFF_LSB)__generic(expr,t,yes,no) __builtin_choose_expr( __builtin_types_compatible_p(__typeof(expr), t), yes, no)__LONG_MAX__ 0x7fffffffL__ARM_FEATURE_CDE__ACCUM_IBIT__ 16unsignedCORESIGHT_LAR_OFFSET 0xfb0INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)SCB_SHPR_PRI_15_SYSTICK 11short int_STDDEF_H __pt_guarded_by(x) __lock_annotate(pt_guarded_by(x))__guarded_by(x) __lock_annotate(guarded_by(x))__UINT16_C(c) c__FLT64_MIN_EXP__ (-1021)_REENT_INIT_ATEXIT _NULL, _ATEXIT_INIT,__CC_SUPPORTS___INLINE__ 1__UDA_IBIT__ 32__printflike(fmtarg,firstvararg) __attribute__((__format__ (__printf__, fmtarg, firstvararg)))__fastcall __attribute__((__fastcall__))__lock_annotate(x) BIT2 (1<<2)_REENT_SIGNAL_BUF(ptr) ((ptr)->_new._reent._signal_buf)__ATOMIC_RELAXED 0_ATTRIBUTE(attrs) __attribute__ (attrs)__ARM_FEATURE_COPROC__ATTRIBUTE_IMPURE_PTR__ __DBL_HAS_INFINITY__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____SIG_ATOMIC_MAX__ 0x7fffffffUINT_LEAST32_MAX __UINT_LEAST32_MAX___RAND48_MULT_0 (0xe66d)CORESIGHT_LSR_SLI (1<<0)BIT5 (1<<5)BIT1 (1<<1)__rangeof(type,start,end) (__offsetof(type, end) - __offsetof(type, start))INT8_CINT_LEAST32_MAX__USES_INITFINI__ 1__lock_init(lock) ((void) 0)__need_ptrdiff_t__DBL_DECIMAL_DIG__ 17__have_long32 1_NULL 0__flexarr [0]INT16_C(c) __INT16_C(c)__INT16_MAX__ 0x7fff__SYS_CONFIG_H__ __DEVOLATILE(type,var) ((type)(__uintptr_t)(volatile void *)(var))__WCHAR_T__ __SSP_FORTIFY_LEVEL 0__GNUCLIKE_BUILTIN_STDARG 1__XSI_VISIBLE 0INT_FAST32_MIN (-INT_FAST32_MAX - 1)__strfmonlike(fmtarg,firstvararg) __attribute__((__format__ (__strfmon__, fmtarg, firstvararg)))__ULLFRACT_EPSILON__ 0x1P-64ULLR__SIG_ATOMIC_WIDTH__ 32__FLT64_EPSILON__ 2.2204460492503131e-16F64__GNUC_PREREQ__(ma,mi) __GNUC_PREREQ(ma, mi)__pure2 __attribute__((__const__))__UTA_IBIT__ 64__ULLACCUM_IBIT__ 32__ARM_FEATURE_CRC32SCB_VTOR MMIO32(SCB_BASE + 0x08)_REENT_CHECK_ASCTIME_BUF(ptr) __unreachable() __builtin_unreachable()__SIZEOF_WINT_T__ 4SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__INT_LEAST32_MAX__ 0x7fffffffL__STDC__ 1__LDBL_DECIMAL_DIG__ 17__unused __attribute__((__unused__))__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__INT_FAST8_MAX__ 0x7fffffff__FLT32_HAS_DENORM__ 1_WIDE_ORIENT 1__ULLACCUM_MIN__ 0.0ULLK_SYS__TYPES_H __INT_FAST32_WIDTH__ 32_SYS_CDEFS_H_ SIG_ATOMIC_MAX__GNUCLIKE_BUILTIN_VAALIST 1__sym_compat(sym,impl,verid) __asm__(".symver " #impl ", " #sym "@" #verid)__UINT32_TYPE__ long unsigned intINTPTR_MAX __INTPTR_MAX____ARM_FEATURE_DOTPROD_NEWLIB_VERSION "3.3.0"__pure __attribute__((__pure__))_GCC_SIZE_T SCB_CCR_STKALIGN (1 << 9)__CC_SUPPORTS_WARNING 1__ULLFRACT_MIN__ 0.0ULLRUINT_FAST8_MAX_REENT_CHECK_RAND48(ptr) __lock_release(lock) ((void) 0)__GCC_CONSTRUCTIVE_SIZE 64_BSD_WCHAR_T___LLFRACT_IBIT__ 0__CC_SUPPORTS_VARADIC_XXX 1SCB_SHPR_PRI_10_RESERVED 6uint32_tBIT12 (1<<12)SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)SCB_ICSR_RETOBASE (1 << 11)MPU_BASE (SCS_BASE + 0x0D90)__SACCUM_EPSILON__ 0x1P-7HK_REENT_CHECK_VERIFY 1_REENT_RAND_NEXT(ptr) ((ptr)->_new._reent._rand_next)__UHA_IBIT__ 8__GNUC_STDC_INLINE__ 1__need_wint_t __ACCUM_EPSILON__ 0x1P-15K__ULACCUM_EPSILON__ 0x1P-32ULKSCB_CPUID_PARTNO_LSB 4__LDBL_DIG__ 15_Atomic(T) struct { T volatile __val; }__SIZE_WIDTH__ 32__UINT_FAST16_TYPE__ unsigned intLIBOPENCM3_CM3_MEMORYMAP_H BIT16 (1<<16)__WINT_MIN__ 0UINT_LEAST16_MIN__FLT64_DIG__ 15__WINT_MAX__ 0xffffffffUBIT22 (1<<22)__INT_LEAST8_WIDTH__ 8__long_double_t long double__INT_LEAST16_TYPE__ short int__QQ_FBIT__ 7__DBL_MAX__ ((double)1.7976931348623157e+308L)_REENT_WCRTOMB_STATE(ptr) ((ptr)->_new._reent._wcrtomb_state)short unsigned int__LLFRACT_FBIT__ 63__FLT32_HAS_INFINITY__ 1__thumb__ 1INT_FAST16_MAX __INT_FAST16_MAX____FLT64_MANT_DIG__ 53__format_arg(fmtarg) __attribute__((__format_arg__ (fmtarg)))__compiler_membar() __asm __volatile(" " : : : "memory")__HQ_FBIT__ 15__bool_true_false_are_defined 1__datatype_type_tag(kind,type) __lock_try_acquire_recursive(lock) ((void) 0)__SIZE_MAX__ 0xffffffffU__ARM_FEATURE_SAT__ULLACCUM_FBIT__ 32__ARM_ARCH__DEFINED_ptrdiff_t __nonnull(x) __attribute__((__nonnull__ x))_RAND48_ADD (0x000b)EXIT_FAILURE 1SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__INT_LEAST64_MINPTRDIFF_MAX__LLFRACT_EPSILON__ 0x1P-63LLR__ARM_FEATURE_SIMD32__FLT32X_MANT_DIG__ 53__ARM_ASM_SYNTAX_UNIFIED__WINT_MAX__INT16_C(c) cINT_FAST16_MIN (-INT_FAST16_MAX - 1)__DA_IBIT__ 32__strftimelike(fmtarg,firstvararg) __attribute__((__format__ (__strftime__, fmtarg, firstvararg)))_ATEXIT_INIT {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}__DEQUALIFY(type,var) ((type)(__uintptr_t)(const volatile void *)(var))__ATOMIC_ACQ_REL 4__HQ_IBIT__ 0__packed __attribute__((__packed__))_WCHAR_T_DEFINED_ SCB_SHPR_PRI_4_MEMMANAGE 0__asserts_shared(...) __lock_annotate(assert_shared_lock(__VA_ARGS__))SCB_SHPR_PRI_11_SVCALL 7__SYS_LOCK_H__ __FLT32_NORM_MAX__ 3.4028234663852886e+38F32_REENT_ASCTIME_SIZE 26SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__PTRDIFF_MIN (-PTRDIFF_MAX - 1)__UINTMAX_MAX__ 0xffffffffffffffffULLSCB_ICSR_PENDSVCLR (1 << 27)__DBL_MANT_DIG__ 53__ULFRACT_IBIT__ 0INT_FAST16_MAX__INT_MAX__ 0x7fffffff__INT_LEAST64_TYPE__ long long int_REENT_INIT(var) { 0, _REENT_STDIO_STREAM(&(var), 0), _REENT_STDIO_STREAM(&(var), 1), _REENT_STDIO_STREAM(&(var), 2), 0, "", 0, _NULL, 0, _NULL, _NULL, 0, _NULL, _NULL, 0, _NULL, { { 0, _NULL, "", {0, 0, 0, 0, 0, 0, 0, 0, 0}, 0, 1, { {_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, _RAND48_ADD }, {0, {0}}, {0, {0}}, {0, {0}}, "", "", 0, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}}, {0, {0}} } }, _REENT_INIT_ATEXIT _NULL, {_NULL, 0, _NULL} }__ARM_FEATURE_CDE_COPROCUINT32_CGCC: (15:12.2.rel1-1) 12.2.1 20221205 | A+aeabi!6S-M M   !#%Y[')+-/13579;=?ACEGIKMOQSUW] 4e4d   ) [ #SJ|\_     scb.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.ieeefp.h.77.f33a4dce62116f6f5175ff8bae57a54cwm4._newlib_version.h.4.1ef4e12f167f8b69d7c30054be56050dwm4.newlib.h.21.1ae2897bc09bbe4bc80ffb801fb02432wm4.features.h.22.0ca0b2e469d5b0fcf64dfa21c188c8f3wm4.config.h.224.c701144a7b0518c6ee9b9b5465b79f81wm4._ansi.h.31.de524f58584151836e90d8620a16f8e8wm4.stdlib.h.13.4ed386f5c1a80d71e72172885d946ef2wm4.stddef.h.185.882514a1a6169ceba9142f401cbe27c6wm4.stddef.h.39.d045698d061bdaf9245f5033b3abee66wm4._types.h.20.dd0d04dca3800a0d2a6129b87f3adbb2wm4.stddef.h.158.5f30652bb2ea05b142c1bbee9108c999wm4._default_types.h.6.959254cf5f09734ea7516c89e8bb21bdwm4._types.h.127.34941de1b2539d59d5cac00e0dd27a45wm4.reent.h.17.e292bf8b0bec6c96e131a54347145a30wm4.lock.h.2.c0958401bd0ce484d507ee19aacab817wm4.reent.h.77.dcd6129ff07fe81bd5636db29abe53b2wm4.cdefs.h.49.3d0fe8ea14e93bda8c589d4f684b21b8wm4.stdlib.h.56.b4ddaf162082f284ba35b4444af99a9awm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.scb.h.43.009db5889753775abc8c2139d8c04e70scb_reset_system  " & -;BIPW^elsx  &/7=GSY_emw !"#$%&' #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y    #)/5;AGM &-4;BIPW ")0 #)/  ")07>ELSZahov}  &-4;BIPW^elsz  ")07> #)/6=DKR !(/  #)/5;AGM &-4;BIPW^elsz ")07>ELSZahov} #)/5;AGMSY_ekqw} !(/6=DKRY`gnu|$+29@GNU\cjqx  '.5<CJQ  #)/5;AGM  #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5<CJQX_fmt{#*18?FMT[bipw~(.symtab.strtab.shstrtab.text.data.bss.text.scb_reset_system.rel.debug_info.debug_abbrev.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 `)@ `*L `+X `,d `-p `.| `/ `0 `1 `2 `3 `4 `5 `6 `7 `8 `9 `:  `; `<$ `=0 `>< `?H `@T `A`!`'`,`GpC @`SWe] a @``!x}t @p`## @x`%~  @ `'1 @`)I" @(`+kR @ȭh`-\ @0h`/5 @8`1N4 @Ю@`3 @`5 @(@`7 @h`9A @`;WC @ H`=W @hh`?4 @б8`A% @`C5R @h`E @`G V @8`I_" @ (`KR @Hh`M @ `ON @и`Q=" @(`S_ @м0`UG @`W @`Y0r0'  @`]pȒ,a] Ԙnvic.o/ 0 0 0 644 37352 ` ELF(4(;: !"#$%&'()*+,-./0J!F"@@C cD`pGFJ!F"@@C cD`pGFIC FcDh#@;@@CApGJ!F"@@C cD`pGFJ!F"@@C cD`pGFIC FcDh#@;@@CApG(#$@;۲@# H@F@bDhCC`$JF @4@@cDhCC`F xC :44 gN1&2$".Q5;B4j8T intxX!? F J3.FF> &|FjfregF .|FregF~F$M?~&Fpo?p%FP>0b?b#FP'ATF$?T&FF?FFP 9?9FP$ > .?:!; 9!'@z:!; 9 IB:!; 9 I:!; 9 I4:!; 9! IB4:!; 9! IB.?:!; 9! 'I@z % Uy $ >    .?: ; 9 '@zPSp?4.8P8XP Q .Q.@Q@XQs3$H p?43$Hs2% p?42%. p3$H *P3$H. p2% *P2%P$PP$PL$$X3$$X.&(?@)7 / '8i9#w)M ) V': (CW%@@5R >Z),$a/ ,6E<=_(@M;@y-*H3m1Gf5sH6A "6%9C.\5m@ =:;cu1 /( 23*J )57U-b0<7h,4AHG %"G,'/(i0kb!!+& >)!D &}vG6E<E 414H3_?7 D$$F'8(}Ige49$Ev+ ?;jnCDs?:dS0=(*#5T.hIP @a#J')BIn(AE?^"%+j6C2E#E31%H8+;H^+v3  hFM0=z Q7e*  >a H2 =:8I"#?1.EX8u;@B?#  CB$g-.5u-84<8' ?*)N9Q*X1K" F?v6 1BH,+ M"7n%2<.x  )J,#'T6p#y &8*  +2>* IBh4-Y20.q=4%0I8*48$v$#.78RReB%4R!u w? .YE-ZD"y8 G:^03%7&974<,-TF@!z,P!F S&bC%f& aAS382D#B$w#:65kE/:"z !*t*WG-Es)u!{M9"2[/P()I&\==!C ",)4dn)e.fgq&jkn>6o0p(>q%tMu*xy5z< {~5kBn %; .f=(Fm! &9{9# D& |XcH,6dch2/0)B #:$JE7FA>8.}'#C@#1 FG_ G/,k?T-*/2) D /!'&p#'IG2-C=DAEFF"1I Li>QF R S6TU9VW/&X}Y4Z;['\G]/:^(_E`a(bced4ef;&g>hif*jQkl.mHno8ph269*;<#?2BE7.J[ -\G_a+c 3-<E<NbDx'y2:g i'B7@bE-zG>G9BFBdG 1!z"5#n($ 9% &&'QG()K*F+, .W>+B.<1547g :e BHtK! A)K44@_3_  +" !7,G}$3@u"/?oA+@' /Z<B=?/9 0+K/G#L$-xD ../../cm3/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/cm3../../../include/libopencm3/dispatch../../../include/libopencm3/lpc43xx/m0nvic.cstdint.hnvic.hcommon.hstdbool.hmemorymap.hnvic.hnvic.hscb.h9% ! %   <!% ! %   <! = - !, #..7 =% ! %   <!% ! %   <! = - !, #..7 =$22# / 2".2  !'<=  x 2  :2"='<=  &SCB_AIRCR MMIO32(SCB_BASE + 0x0C)__ARM_FEATURE_FP16_VECTOR_ARITHMETIC__SIG_ATOMIC_MAX__ 0x7fffffff__TA_FBIT__ 63SCB_SHCSR MMIO32(SCB_BASE + 0x24)__UFRACT_IBIT__ 0__FLT32_HAS_INFINITY__ 1BIT17 (1<<17)UINT8_MAX__UINT_FAST8_TYPE__ unsigned int__FLT64_MAX_EXP__ 1024SCB_AIRCR_VECTKEYSTAT_LSB 16__FLT32X_MAX_EXP__ 1024__INT_FAST16_WIDTH__ 32__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1INT_LEAST16_MINNVIC_UART1_IRQ 25__ULACCUM_EPSILON__ 0x1P-32ULKINT_LEAST16_MAX __INT_LEAST16_MAX____ARM_FEATURE_SIMD32UINT16_C__FLT32_MANT_DIG__ 24__UINT8_C(c) c__ARM_NEON____SIZEOF_WINT_T__ 4NVIC_USART2_OR_C_CAN1_IRQ 26__QQ_IBIT__ 0__UDQ_IBIT__ 0CORESIGHT_LSR_SLK (1<<1)__ARM_FEATURE_MATMUL_INT8BIT23 (1<<23)__WCHAR_MAX__ 0xffffffffU__GCC_ATOMIC_SHORT_LOCK_FREE 1__FLT32X_DECIMAL_DIG__ 17SCB_CPUID_VARIANT (0xF << SCB_CPUID_VARIANT_LSB)__DBL_MIN_EXP__ (-1021)__LONG_LONG_WIDTH__ 64__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1SCB_SHPR_PRI_13_RESERVED 9__ARM_FEATURE_CDE_COPROC__LFRACT_MIN__ (-0.5LR-0.5LR)__ARM_SIZEOF_WCHAR_T 4__ARM_FP16_FORMAT_IEEE__ARM_FEATURE_COMPLEX__LLFRACT_IBIT__ 0INT_LEAST16_MAXUINT16_C(c) __UINT16_C(c)__DBL_MAX__ ((double)1.7976931348623157e+308L)__UINT_FAST32_MAX__ 0xffffffffUINT_FAST32_MAX__USFRACT_MIN__ 0.0UHRLIBOPENCM3_LPC43xx_M0_NVIC_H INT_FAST16_MAX __INT_FAST16_MAX____GNUC_MINOR__ 2__UINT_LEAST8_MAX__ 0xffUINT16_MAXINT_LEAST32_MAXINT_LEAST64_MAXunsigned intSCB_ICSR_VECTPENDING (0x1FF << SCB_ICSR_VECTPENDING_LSB)BIT5 (1<<5)__ARM_FEATURE_CRYPTO__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)INT8_MIN__UINT16_C(c) c__SIZEOF_SIZE_T__ 4__CHAR16_TYPE__ short unsigned intUINT_LEAST32_MAX __UINT_LEAST32_MAX__NVIC_IRQ_COUNT 30__SIZEOF_LONG_DOUBLE__ 8BIT29 (1<<29)__INT_FAST8_MAX__ 0x7fffffff__ORDER_BIG_ENDIAN__ 4321__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__GCC_CONSTRUCTIVE_SIZE 64SCB_ICSR_VECTACTIVE (0x1FF << SCB_ICSR_VECTACTIVE_LSB)__UTA_FBIT__ 64__DBL_MANT_DIG__ 53__UINT_LEAST64_TYPE__ long long unsigned intNVIC_DMA_IRQ 2__INT_MAX__ 0x7fffffff__ATOMIC_RELEASE 3__FLT_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__CHAR_UNSIGNED__ 1MMIO16(addr) (*(volatile uint16_t *)(addr))__INT16_TYPE__ short intUINT8_MAX __UINT8_MAX____ARM_FEATURE_QRDMX__LDBL_DIG__ 15__SIZEOF_LONG__ 4__FLT32_MAX__ 3.4028234663852886e+38F32__LLACCUM_IBIT__ 32NVIC_SSP0_OR_SSP1_IRQ 22__ATOMIC_SEQ_CST 5INT32_MINBIT0 (1<<0)__SIZEOF_SHORT__ 2SCB_CCR MMIO32(SCB_BASE + 0x14)SCB_CPUID_REVISION_LSB 0__INT_LEAST8_MAX__ 0x7fCORESIGHT_LAR_KEY 0xC5ACCE55__INT_LEAST8_TYPE__ signed char__FLT64_MANT_DIG__ 53SCB_SHPR_PRI_8_RESERVED 4UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_C(c) c ## ULLINT32_CSCB_SCR MMIO32(SCB_BASE + 0x10)__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_MIN_10_EXP__ (-37)__LFRACT_IBIT__ 0SCB_CPUID_IMPLEMENTER (0xFF << SCB_CPUID_IMPLEMENTER_LSB)__ARM_ARCH 6SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____INT_LEAST16_MAX__ 0x7fffSCB_CPUID_PARTNO (0xFFF << SCB_CPUID_PARTNO_LSB)__SCHAR_MAX__ 0x7f__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__ARM_FEATURE_NUMERIC_MAXMIN__ULLFRACT_IBIT__ 0NVIC_C_CAN0_IRQ 29__FLT64_DIG__ 15INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__ATOMIC_RELAXED 0INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_FP16_FML__SIZE_MAX__ 0xffffffffU__LDBL_IS_IEC_60559__ 2__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__ULACCUM_MIN__ 0.0ULKUINT64_C(c) __UINT64_C(c)BEGIN_DECLS __FLT_HAS_INFINITY__ 1NVIC_PENDSV_IRQ -2__FLT32_EPSILON__ 1.1920928955078125e-7F32BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT_FAST64_MAX__UDA_IBIT__ 32__INT_FAST64_TYPE__ long long int__INT8_C(c) cSCB_SHPR_PRI_15_SYSTICK 11signed char__FDPIC____INT_LEAST16_WIDTH__ 16nvic_get_irq_enabledINT32_MIN (-INT32_MAX - 1)SCB_ICSR_ISRPENDING (1 << 22)__ULLACCUM_MIN__ 0.0ULLKuint32_t__ARM_FEATURE_DOTPROD__ARM_NEONbool _BoolNVIC_BASE (SCS_BASE + 0x0100)__ARM_FEATURE_CMSE__UINTPTR_TYPE__ unsigned int__FLT64_IS_IEC_60559__ 2__FLT32_HAS_DENORM__ 1INTMAX_MAXLIBOPENCM3_NVIC_H __SA_IBIT__ 16__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRUINTMAX_C__INT_FAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_FP16_SCALAR_ARITHMETICSIG_ATOMIC_MAX__FLT_DIG__ 6shiftUINT_LEAST64_MAX__DA_FBIT__ 31__ARM_SIZEOF_MINIMAL_ENUM 1__USES_INITFINI__ 1__GCC_IEC_559 0INT32_MAXNVIC_TIMER3_IRQ 15INT_FAST8_MAX __INT_FAST8_MAX____USACCUM_EPSILON__ 0x1P-8UHKLPC43XX_M0 1__PTRDIFF_MAX__ 0x7fffffff__FLT32_HAS_QUIET_NAN__ 1SCB_CPUID_CONSTANT_ARMV7 (0xF << SCB_CPUID_CONSTANT_LSB)__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__UFRACT_MAX__ 0XFFFFP-16UR__SFRACT_MAX__ 0X7FP-7HR__GNUC__ 12SYS_TICK_BASE (SCS_BASE + 0x0010)__ARM_EABI__ 1long long unsigned int__INT64_MAX__ 0x7fffffffffffffffLL__VERSION__ "12.2.1 20221205"__INT8_MAX__ 0x7f__ULFRACT_EPSILON__ 0x1P-32ULR__INT_LEAST32_TYPE__ long intSCB_ICSR_PENDSVSET (1 << 28)__ULFRACT_IBIT__ 0__LLACCUM_FBIT__ 31__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FLT_RADIX__ 2NVIC_I2C0_OR_IRC1_IRQ 18UINT_LEAST16_MAX __UINT_LEAST16_MAX__nvic_enable_irqSCB_SCR_SLEEPONEXIT (1 << 1)__ULLFRACT_MIN__ 0.0ULLR__DBL_HAS_QUIET_NAN__ 1__UACCUM_MIN__ 0.0UK__ARM_FEATURE_QBIT__LFRACT_EPSILON__ 0x1P-31LR__INT_FAST8_TYPE__ intINTMAX_MIN (-INTMAX_MAX - 1)NVIC_I2S0_OR_I2S1_IRQ 28__FLT64_HAS_INFINITY__ 1UINTPTR_MAX __UINTPTR_MAX____FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xSCB_CPUID_IMPLEMENTER_LSB 24__bool_true_false_are_defined 1__SACCUM_FBIT__ 7__WCHAR_TYPE__ unsigned int__ARM_ASM_SYNTAX_UNIFIED__BIT26 (1<<26)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT64_MIN__ 2.2250738585072014e-308F64__FRACT_MIN__ (-0.5R-0.5R)__GCC_ATOMIC_INT_LOCK_FREE 1__INTMAX_MAX__ 0x7fffffffffffffffLLWCHAR_MAX __WCHAR_MAX____UACCUM_EPSILON__ 0x1P-16UK__GCC_ASM_FLAG_OUTPUTS____ACCUM_IBIT__ 16__SIZEOF_WCHAR_T__ 4__LDBL_DENORM_MIN__ 4.9406564584124654e-324LNVIC_LCD_IRQ 7__FLT64_MAX_10_EXP__ 308__SACCUM_IBIT__ 8__SIZEOF_PTRDIFF_T__ 4SCB_SHPR_PRI_11_SVCALL 7UINT_LEAST32_MAX__SFRACT_MIN__ (-0.5HR-0.5HR)__USA_IBIT__ 16BIT15 (1<<15)__ULFRACT_FBIT__ 32UINT_FAST64_MAX __UINT_FAST64_MAX__BIT3 (1<<3)PTRDIFF_MINSCB_SHPR32(ipr_id) MMIO32(SCS_BASE + 0xD18 + ((ipr_id) * 4))__SIZEOF_FLOAT__ 4BIT25 (1<<25)__UINT32_C(c) c ## UL__UDA_FBIT__ 32DEBUG_BASE (SCS_BASE + 0x0DF0)SCB_ICSR_ISRPREEMPT (1 << 23)SCB_VTOR_TBLOFF_LSB 7BIT20 (1<<20)nvic_set_priority_STDBOOL_H UINT_FAST8_MAX__ARM_FEATURE_UNALIGNEDCORESIGHT_LSR_SLI (1<<0)__THUMBEL__ 1__DA_IBIT__ 32__BIGGEST_ALIGNMENT__ 8__LACCUM_IBIT__ 32__USFRACT_MAX__ 0XFFP-8UHR__UINT_FAST8_MAX__ 0xffffffffU__ORDER_LITTLE_ENDIAN__ 1234__HAVE_SPECULATION_SAFE_VALUE 1LIBOPENCM3_CM3_COMMON_H __LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__OPTIMIZE__ 1__SA_FBIT__ 15__FLT64_MIN_10_EXP__ (-307)BIT7 (1<<7)NVIC_ICPR(icpr_id) MMIO32(NVIC_BASE + 0x180 + ((icpr_id) * 4))SCB_BASE (SCS_BASE + 0x0D00)__SACCUM_EPSILON__ 0x1P-7HKSCB_ICSR_RETOBASE (1 << 11)UINT8_C(c) __UINT8_C(c)__INT_FAST16_TYPE__ int__FLT32_DECIMAL_DIG__ 9BIT18 (1<<18)__UINT16_TYPE__ short unsigned intSCB_SHPR_PRI_4_MEMMANAGE 0__WCHAR_WIDTH__ 32__GNUC_STDC_INLINE__ 1__UHQ_IBIT__ 0__UFRACT_FBIT__ 16WINT_MININTMAX_C(c) __INTMAX_C(c)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__INT64_TYPE__ long long int__FLT_MAX_10_EXP__ 38NVIC_USB0_IRQ 8__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKnvic_clear_pending_irqPTRDIFF_MAX __PTRDIFF_MAX____LLACCUM_EPSILON__ 0x1P-31LLKnvic_disable_irq__FLT32X_MANT_DIG__ 53INT8_MAX __INT8_MAX__INTMAX_C__ARM_FEATURE_COPROCNVIC_ETHERNET_IRQ 5__ULFRACT_MIN__ 0.0ULR__FLT_MANT_DIG__ 24__ULLFRACT_EPSILON__ 0x1P-64ULLR__USQ_IBIT__ 0LIBOPENCM3_CM3_MEMORYMAP_H __REGISTER_PREFIX__ __FLT32_MIN_EXP__ (-125)NVIC_TIMER0_IRQ 12WINT_MAXSCB_ICSR_PENDSTSET (1 << 26)__UACCUM_IBIT__ 16__UINT_FAST16_MAX__ 0xffffffffU__UINT_FAST16_TYPE__ unsigned int__FLT32_MAX_EXP__ 128__DBL_MIN_10_EXP__ (-307)__USACCUM_IBIT__ 8SCB_CPUID_CONSTANT (0xF << SCB_CPUID_CONSTANT_LSB)SCB_AIRCR_VECTKEY (0x05FA << SCB_AIRCR_VECTKEYSTAT_LSB)__THUMB_INTERWORK__ 1INT_LEAST8_MAXUINT_LEAST16_MAX__FLT32_DIG__ 6_GCC_STDINT_H NVIC_ICER(icer_id) MMIO32(NVIC_BASE + 0x80 + ((icer_id) * 4))__FLT64_HAS_DENORM__ 1BIT1 (1<<1)__FLT_EVAL_METHOD__ 0__FLT32X_HAS_DENORM__ 1INT64_MIN__INT_LEAST64_MAX__ 0x7fffffffffffffffLLINT64_MAX__ACCUM_FBIT__ 15__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1INT_FAST8_MIN__ULACCUM_IBIT__ 32SCB_SCR_SLEEPDEEP (1 << 2)__LLFRACT_FBIT__ 63UINT_FAST64_MAXSCB_ICSR_PENDSVCLR (1 << 27)__INT_LEAST8_WIDTH__ 8__ARM_32BIT_STATE__USA_FBIT__ 16__UINT8_MAX__ 0xff__ARM_FEATURE_IDIV__UINT16_MAX__ 0xffffSCB_DFSR MMIO32(SCB_BASE + 0x30)INT_LEAST8_MAX __INT_LEAST8_MAX____ARM_FEATURE_FMA__ARM_FEATURE_LDREXuint8_tSIZE_MAX __SIZE_MAX____INTMAX_WIDTH__ 64__ARM_FEATURE_CDE__LFRACT_FBIT__ 31__DBL_IS_IEC_60559__ 2SCB_VTOR_TBLOFF (0x1FFFFFF << SCB_VTOR_TBLOFF_LSB)__INT_LEAST16_TYPE__ short int__FLT64_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1SCB_ICSR_NMIPENDSET (1 << 31)INT_FAST8_MIN (-INT_FAST8_MAX - 1)INT8_CSCB_SHPR_PRI_14_PENDSV 10__DBL_DIG__ 15true 1__ARMEL__ 1__ARM_ARCH_ISA_THUMB__LACCUM_FBIT__ 31__UTQ_IBIT__ 0SIZE_MAX__FLT_MIN__ 1.1754943508222875e-38F__FLT32X_DIG__ 15__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__INT_FAST16_MAX__ 0x7fffffff__ARM_ARCH_ISA_THUMB 1UINT_FAST32_MAX __UINT_FAST32_MAX__SCB_ICSR_VECTPENDING_LSB 12__UTQ_FBIT__ 128long long int__CHAR_BIT__ 8WCHAR_MIN__FLT32X_IS_IEC_60559__ 2INT_FAST16_MAX__INTPTR_WIDTH__ 32__UINT_LEAST8_TYPE__ unsigned char__LDBL_MAX__ 1.7976931348623157e+308L__FINITE_MATH_ONLY__ 0__SACCUM_MAX__ 0X7FFFP-7HK__arm__ 1INT64_MAX __INT64_MAX__INTPTR_MAX__LDBL_MANT_DIG__ 53INT16_MIN (-INT16_MAX - 1)__TQ_IBIT__ 0__UHA_FBIT__ 8INTPTR_MIN (-INTPTR_MAX - 1)INT_LEAST8_MINBIT6 (1<<6)BIT21 (1<<21)__ELF__ 1__ARM_ARCH_PROFILE__ARM_ARCHINT8_MIN (-INT8_MAX - 1)__INT16_C(c) c__GCC_HAVE_DWARF2_CFI_ASM 1NVIC_EVENTROUTER_IRQ 23__UINT64_MAX__ 0xffffffffffffffffULL__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__INT_FAST32_MAX__ 0x7fffffff__USFRACT_EPSILON__ 0x1P-8UHR__ATOMIC_ACQUIRE 2NVIC_SYSTICK_IRQ -1WINT_MAX __WINT_MAX__INTPTR_MINNVIC_NMI_IRQ -14__STDC__ 1BIT10 (1<<10)__UACCUM_FBIT__ 16SCB_SCR_SEVONPEND (1 << 4)__DBL_MAX_EXP__ 1024__ATOMIC_CONSUME 1BIT13 (1<<13)PTRDIFF_MAX__INT_FAST32_WIDTH__ 32__ARM_BF16_FORMAT_ALTERNATIVENVIC_SPI_OR_DAC_IRQ 20__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__DBL_EPSILON__ ((double)2.2204460492503131e-16L)__SCHAR_WIDTH__ 8__ACCUM_MIN__ (-0X1P15K-0X1P15K)SCB_CPUID_VARIANT_LSB 20__SIZEOF_DOUBLE__ 8INT8_MAX__GNUC_PATCHLEVEL__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0__ARM_ARCH_EXT_IDIV____FRACT_MAX__ 0X7FFFP-15R__WINT_MIN__ 0U__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 32__FLT32_IS_IEC_60559__ 2UINT_FAST32_MAX__FRACT_IBIT__ 0SCB_CPUID_REVISION (0xF << SCB_CPUID_REVISION_LSB)__LDBL_MIN__ 2.2250738585072014e-308L__LDBL_HAS_INFINITY__ 1__GCC_IEC_559_COMPLEX 0__UINT32_MAX__ 0xffffffffULSCB_AIRCR_SYSRESETREQ (1 << 2)__LDBL_MIN_EXP__ (-1021)SCB_SHPR_PRI_10_RESERVED 6__ULLFRACT_FBIT__ 64END_DECLS __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____ACCUM_MAX__ 0X7FFFFFFFP-15K__SIZE_WIDTH__ 32__ARM_FEATURE_MVEINT_LEAST32_MININT64_C(c) __INT64_C(c)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__LLFRACT_EPSILON__ 0x1P-63LLRUINT32_CCORESIGHT_LSR_OFFSET 0xfb4SCB_SHCSR_SVCALLPENDED (1 << 15)NVIC_SDIO_IRQ 6__LONG_WIDTH__ 32__SFRACT_FBIT__ 7__CHAR32_TYPE__ long unsigned int__ARM_FEATURE_SATNVIC_ISER(iser_id) MMIO32(NVIC_BASE + 0x00 + ((iser_id) * 4))__ARM_PCS 1__HQ_IBIT__ 0INT64_MIN (-INT64_MAX - 1)__USER_LABEL_PREFIX__ MPU_BASE (SCS_BASE + 0x0D90)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__UINT_LEAST32_TYPE__ long unsigned intBIT27 (1<<27)__DQ_FBIT__ 63__USACCUM_MAX__ 0XFFFFP-8UHKINT_FAST64_MAX __INT_FAST64_MAX__INT64_CUINTMAX_C(c) __UINTMAX_C(c)__SIG_ATOMIC_WIDTH__ 32SCB_SHPR_PRI_6_USAGEFAULT 2__ARM_FEATURE_BF16_VECTOR_ARITHMETICSCB_SHPR_PRI_12_RESERVED 8__SHRT_MAX__ 0x7fff__ARM_FP16_ARGSSCB_CCR_STKALIGN (1 << 9)__ORDER_PDP_ENDIAN__ 3412INT_LEAST64_MIN__SQ_IBIT__ 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32nvic_set_pending_irq__FLT_DECIMAL_DIG__ 9__INT32_MAX__ 0x7fffffffLSCB_SHPR_PRI_9_RESERVED 5__WINT_WIDTH__ 32INT16_MAX __INT16_MAX__INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UQQ_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16UR__GXX_ABI_VERSION 1017NVIC_ADC0_IRQ 17INT8_C(c) __INT8_C(c)__INT_LEAST64_WIDTH__ 64__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong intUINT64_C__thumb2____LDBL_MAX_EXP__ 1024__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__USACCUM_FBIT__ 8__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX__NVIC_HARD_FAULT_IRQ -13__UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64priority__thumb__ 1SCB_CPUID_PARTNO_LSB 4__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUUINTMAX_MAX__LDBL_DECIMAL_DIG__ 17SCB_ICSR_VECTACTIVE_LSB 0BIT19 (1<<19)BIT8 (1<<8)__TQ_FBIT__ 127__UHQ_FBIT__ 16../../cm3/nvic.cSCB_CPUID_CONSTANT_LSB 16__UINT_FAST64_MAX__ 0xffffffffffffffffULL/build/libopencm3/lib/lpc43xx/m0__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15__UHA_IBIT__ 8LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__SFRACT_IBIT__ 0__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX__NVIC_SGPIO_IRQ 19__FLT_EPSILON__ 1.1920928955078125e-7FSCB_VTOR MMIO32(SCB_BASE + 0x08)__INT_LEAST64_TYPE__ long long intINT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1__ULFRACT_MAX__ 0XFFFFFFFFP-32ULRNVIC_M4CORE_IRQ 1__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 1__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LK__SFRACT_EPSILON__ 0x1P-7HR__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned int__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1BIT30 (1<<30)__STDC_VERSION__ 199901LINT_FAST32_MINNVIC_ADC1_IRQ 21SCB_SHPR_PRI_7_RESERVED 3PPBI_BASE (0xE0000000U)__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAXNVIC_RITIMER_OR_WWDT_IRQ 11__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1NVIC_SV_CALL_IRQ -5BIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__UINT_FAST8_MAX __UINT_FAST8_MAX____GCC_ATOMIC_LLONG_LOCK_FREE 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intSCS_BASE (PPBI_BASE + 0xE000)unsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKNVIC_ISPR(ispr_id) MMIO32(NVIC_BASE + 0x100 + ((ispr_id) * 4))SCB_CCR_UNALIGN_TRP (1 << 3)UINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0SCB_ICSR MMIO32(SCB_BASE + 0x04)__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intSCB_SHPR_PRI_5_BUSFAULT 1LPC43XX 1UINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN__INT16_MIN__ULLACCUM_FBIT__ 32NVIC_USB1_IRQ 9LIBOPENCM3_SCB_H BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__UTA_IBIT__ 64SCB_AIRCR_VECTKEYSTAT (0xFFFF << SCB_AIRCR_VECTKEYSTAT_LSB)UINT8_C__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xirqn__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__SCB_CPUID_CONSTANT_ARMV6 (0xC << SCB_CPUID_CONSTANT_LSB)__INT_FAST32_TYPE__ intNVIC_FLASHEEPROMAT_IRQ 4__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long intINTMAX_MINSCB_AIRCR_VECTCLRACTIVE (1 << 1)__INTMAX_C(c) c ## LLnvic_get_pending_irqINT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1SCB_AIRCR_ENDIANESS (1 << 15)UINT_FAST16_MAX __UINT_FAST16_MAX____DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned int__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308__FLT32X_MIN__ 2.2250738585072014e-308F32xUINT32_MAX __UINT32_MAX__SCB_CPUID MMIO32(SCB_BASE + 0x00)short unsigned intINT_FAST8_MAX__TA_IBIT__ 64__QQ_FBIT__ 7NVIC_PIN_INT4_IRQ 14NVIC_RTC_IRQ 0__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN____UINT_LEAST16_TYPE__ short unsigned int__ARM_ARCH_PROFILE 77GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sections__INT_FAST8_WIDTH__ 32PTRDIFF_MIN (-PTRDIFF_MAX - 1)__FLT_MIN_EXP__ (-125)__GCC_ATOMIC_BOOL_LOCK_FREE 1SCB_GET_EXCEPTION_STACK_FRAME(f) do { asm volatile ("mov %[frameptr], sp" : [frameptr]"=r" (f)); } while (0)NVIC_IPR32(ipr_id) MMIO32(NVIC_BASE + 0x300 + ((ipr_id) * 4))__DECIMAL_DIG__ 17__INT32_C(c) c ## LINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1BIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"INT16_CUINT64_MAX __UINT64_MAX__NVIC_GINT1_IRQ 13__ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAX__ARM_FEATURE_CLZMMIO32(addr) (*(volatile uint32_t *)(addr))__LFRACT_MAX__ 0X7FFFFFFFP-31LRNVIC_USART3_IRQ 27CORESIGHT_LAR_OFFSET 0xfb0NVIC_SCT_IRQ 10SCB_ICSR_PENDSTCLR (1 << 25)false 0NVIC_USART0_IRQ 24NVIC_MCPWM_IRQ 16__INT_LEAST32_MAX__ 0x7fffffffLINT16_C(c) __INT16_C(c)BIT11 (1<<11)INT32_C(c) __INT32_C(c)__GCC_ATOMIC_LONG_LOCK_FREE 1__ARM_ARCH_6M__ 1__UINTMAX_MAX__ 0xffffffffffffffffULL__SIG_ATOMIC_TYPE__ int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_LEAST32_MAX __INT_LEAST32_MAX__BIT28 (1<<28)__FLT64_DECIMAL_DIG__ 17__LDBL_HAS_DENORM__ 1__UINT_LEAST16_MAX__ 0xffffUINTPTR_MAX__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (15:12.2.rel1-1) 12.2.1 20221205 |   $   $XAA+aeabi!6S-M M             P13!#%')+-/55f.] 47  $$1Xnvic.c$t$dwm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.nvic.h.51.6a4ccc052047bc1ce936a2cf7c472456wm4.nvic.h.16.e780f22c8916f7a06287ff79598c63b9wm4.scb.h.22.7c4b9bb583c75a569add5108d839e95dnvic_enable_irqnvic_disable_irqnvic_get_pending_irqnvic_set_pending_irqnvic_clear_pending_irqnvic_get_irq_enablednvic_set_priority !!!" &-!4!;!B!G!T![!`!m!t!!!!!!! "!+:!DHN!Sb!p!u!! !!!!!Gk   (08@  %+1 "!#$$-%3&<'B(O!X)c*! !!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!!!!!!!!!!!!!!!!!!!!!!!! !!!!%!+!1!7!=!C!I!O!U![!a!g!m!s!y!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!'!-!3!9!?!E!K!Q!W!]!c!i!o!u!{!!!!!!!!!!!!!!!!!!!!!!!! !!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!!!!!!!!!!!!!!!!!!!!!!!! !!!!%!+!1!7!=!C!I!O!U![!a!g!m!s!y!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!'!-!3!9!?!E!K!Q!W!]!c!i!o!u!{!!!!!!!!!!!!!!!!!!!!!!!! !!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!!!!!!!!!!!!!!!!!!!!!!!! !!!!%!+!1!7!=!C!I!O!U![!a!g!m!s!y!!!!!!!!!!!!!!!!!!!!!!!! !!!!!!'!-!3!9!?!E!K!Q!W!]!c!i!o!u!{!!!!!!!!!!!!!!!!!!!!!!! ! ! ! ! !# !) !/ !5 !; !A !G !M !S !Y !_ !e !k !q !w !} ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !% !+ !1 !7 != !C !I !O !U ![ !a !g !m !s !y !! !!!! !!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!x!!!!!!!!!!!!!!!!!!!!! !!! !'!.!5!<!C!J!Q!X!_!f!m!t!{!!!!!!!!!!!!!!!!!!!!!!!!#!*!1!8!?!F!M!T![!b!i!p!w!~!!!!!!!!!!!!!!!!!!!! !!!!&!-!4!;!B!I!! !!!!! !!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!!!!!!!!!!!!!!!!!!! !!!!#!)!/!5!;!A!G!M!! !!!!#!)!0!7!>!! !!!!#!)!/!5!;!A!G!M!S!Y!_!e!k!q!w!}!!!!!!!!!!! !!!!#!)!/!5!;!B!I!P!W!^!e!l!s!z!!!!!!!!!!!!!!!!!!!!! !!!"!)!0!7!>!E!L!S!Z!a!h!o!v!}!!!!!!'W R+$+(4+8 D+HT+Xd+ht+x.symtab.strtab.shstrtab.text.data.bss.text.nvic_enable_irq.text.nvic_disable_irq.text.nvic_get_pending_irq.text.nvic_set_pending_irq.text.nvic_clear_pending_irq.text.nvic_get_irq_enabled.text.nvic_set_priority.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 8,@ 8-L 8.X 8/d 80p 81| 82 83 84!',BY$t4$XX @l8 @n@8P @n@8(7$ @o88<Ej8 @8o`8<~ 8 @o 8<-8 @} 8!<IN8 @}8#<"8 @(8%<8 @08'<R8 @h8)<C8 @HP8+<68 @8-<8 @8/MI @p881Y0bId0e'q8em @p85~pe,ep9@ \jCassert.o/ 0 0 0 644 28936 ` ELF(i4(.- !"#FF6 R* \ '(P0M6.intE +b'# >:$8UQ .$ > :!; 9 IB% Uy$ > .?: ; 9 '@zH} I&I .?: ; 9 '@zdPPQQRRSS$1q 3?@ .(/}!W Q0g0_ 58 u+p`!^By&#,812Z 50$:*c(+fJ,5$d,6%(4, 2z0?1 (}& [+O)(* "' -!+-$6',-$75:R%b$@&3!'a#bN 7r 981*J(Q;)N -\7  <#*J/8 I#~4_17)2 74S03'Y2."+{%;Z 4C#nJ 6<Ys@ 584n}#l,7o87M*; #1;;1#) Zj6<9@&}2 A-A wB" 3@H`)./X y!( -4{(8TH.0(H4V66w$9.*13"W! /eW"(xQ1)9!,E\: $# w;Yp-;u11 ?!#),Z ."H \D=I 3"  ;}6+;%)&%K2*'9.*s.'?m-.  Cn6%d 4d%?8o7.5rY:40)-_F/#k1%^(9 ($ m;d9  6/=cr5)(E9/,+Q8&   z"$w:/%h !f (X& ! 62s!M "#)#+jdt!efgjkDn@,oH'p3qtu"x y+zm{ ~+36KI%@29:p/://c40 IG%::$,5)&`'r !`6 :008-T953.M5" %")'pcj  ;: /A*1 # 4+p|<0m2a64(9:A:&J$v4?$"(3  $&! &2'92C2DEv9F'I LN3Q7RS,T Ud/VRWXYdZS1[* \3:]/^r _8`a bcXde*etfg3h'il"js*kl%m ;n6o.p)59Vf!3 ../../cm3../../../include/libopencm3/cm3/usr/lib/gcc/arm-none-eabi/12.2.1/includeassert.cassert.hcommon.hstdint.hstdbool.h!.__ARM_FEATURE_FP16_VECTOR_ARITHMETIC__SIG_ATOMIC_MAX__ 0x7fffffff__TA_FBIT__ 63../../cm3/assert.c__UFRACT_IBIT__ 0__FLT32_HAS_INFINITY__ 1BIT17 (1<<17)UINT8_MAX__UINT_FAST8_TYPE__ unsigned int__FLT64_MAX_EXP__ 1024__FLT32X_MAX_EXP__ 1024__INT_FAST16_WIDTH__ 32__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1INT_LEAST16_MIN__ULACCUM_EPSILON__ 0x1P-32ULKINT_LEAST16_MAX __INT_LEAST16_MAX____ARM_FEATURE_SIMD32UINT16_C__FLT32_MANT_DIG__ 24char__UINT8_C(c) c__ARM_NEON____SIZEOF_WINT_T__ 4__QQ_IBIT__ 0__UDQ_IBIT__ 0__ARM_FEATURE_MATMUL_INT8BIT23 (1<<23)__GCC_ATOMIC_SHORT_LOCK_FREE 1__FLT32X_DECIMAL_DIG__ 17__DBL_MIN_EXP__ (-1021)__LONG_LONG_WIDTH__ 64__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1__ARM_FEATURE_CDE_COPROC__ARM_SIZEOF_WCHAR_T 4__ARM_FP16_FORMAT_IEEE__ARM_FEATURE_COMPLEX__LLFRACT_IBIT__ 0INT_LEAST16_MAXUINT16_C(c) __UINT16_C(c)__DBL_MAX__ ((double)1.7976931348623157e+308L)__UINT_FAST32_MAX__ 0xffffffffUINT_FAST32_MAX__USFRACT_MIN__ 0.0UHRINT_FAST16_MAX __INT_FAST16_MAX____GNUC_MINOR__ 2__UINT_LEAST8_MAX__ 0xffUINT16_MAXINT_LEAST32_MAXINT_LEAST64_MAXunsigned intBIT5 (1<<5)__ARM_FEATURE_CRYPTO__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)INT8_MIN__UINT16_C(c) c__SIZEOF_SIZE_T__ 4__CHAR16_TYPE__ short unsigned intUINT_LEAST32_MAX __UINT_LEAST32_MAX____SIZEOF_LONG_DOUBLE__ 8BIT29 (1<<29)UINT8_MAX __UINT8_MAX____INT_FAST8_MAX__ 0x7fffffff__ORDER_BIG_ENDIAN__ 4321__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__GCC_CONSTRUCTIVE_SIZE 64__UTA_FBIT__ 64__DBL_MANT_DIG__ 53__UINT_LEAST64_TYPE__ long long unsigned intline__ATOMIC_RELEASE 3__FLT_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__CHAR_UNSIGNED__ 1MMIO16(addr) (*(volatile uint16_t *)(addr))__INT16_TYPE__ short intcm3_assert_failed_verbose__ARM_FEATURE_QRDMX__LDBL_DIG__ 15__OPTIMIZE__ 1__FLT32_MAX__ 3.4028234663852886e+38F32__LLACCUM_IBIT__ 32__ATOMIC_SEQ_CST 5BIT8 (1<<8)__SIZEOF_SHORT__ 2__INT_LEAST8_MAX__ 0x7f__REGISTER_PREFIX__ __FLT64_MANT_DIG__ 53UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_C(c) c ## ULLINT32_Cfunc__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_MIN_10_EXP__ (-37)__LFRACT_IBIT__ 0__ARM_ARCH 6SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____INT_LEAST16_MAX__ 0x7fff__SCHAR_MAX__ 0x7f__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__ARM_FEATURE_NUMERIC_MAXMIN__ULLFRACT_IBIT__ 0__FLT64_DIG__ 15INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__ATOMIC_RELAXED 0INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_FP16_FML__SIZE_MAX__ 0xffffffffU__LDBL_IS_IEC_60559__ 2__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__ULACCUM_MIN__ 0.0ULKUINT64_C(c) __UINT64_C(c)BEGIN_DECLS __FLT_HAS_INFINITY__ 1LIBOPENCM3_CM3_ASSERT_H __FLT32_EPSILON__ 1.1920928955078125e-7F32BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT_FAST64_MAX__UDA_IBIT__ 32__INT_FAST64_TYPE__ long long int__INT8_C(c) csigned char__FDPIC____INT_LEAST16_WIDTH__ 16INT32_MIN (-INT32_MAX - 1)__ULLACCUM_MIN__ 0.0ULLKBIT3 (1<<3)__ARM_FEATURE_DOTPROD__ARM_NEONbool _Bool__ARM_FEATURE_CMSE__UINTPTR_TYPE__ unsigned int__FLT64_IS_IEC_60559__ 2__FLT32_HAS_DENORM__ 1__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64INTMAX_MAX__SA_IBIT__ 16__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRUINTMAX_C__INT_FAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_FP16_SCALAR_ARITHMETICSIG_ATOMIC_MAX__FLT_DIG__ 6__DBL_EPSILON__ ((double)2.2204460492503131e-16L)UINT_LEAST64_MAX__DA_FBIT__ 31__ARM_SIZEOF_MINIMAL_ENUM 1__USES_INITFINI__ 1__GCC_IEC_559 0INT32_MAXINT_FAST8_MAX __INT_FAST8_MAX____USACCUM_EPSILON__ 0x1P-8UHKLPC43XX_M0 1__PTRDIFF_MAX__ 0x7fffffff__FLT32_HAS_QUIET_NAN__ 1__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__UFRACT_MAX__ 0XFFFFP-16UR__SFRACT_MAX__ 0X7FP-7HR__GNUC__ 12__ARM_EABI__ 1long long unsigned int__INT64_MAX__ 0x7fffffffffffffffLLfile__VERSION__ "12.2.1 20221205"__INT8_MAX__ 0x7f__ULFRACT_EPSILON__ 0x1P-32ULR__INT_LEAST32_TYPE__ long int__ULFRACT_IBIT__ 0__LLACCUM_FBIT__ 31cm3_assert(expr) do { if (CM3_LIKELY(expr)) { (void)0; } else { cm3_assert_failed(); } } while (0)__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FLT_RADIX__ 2UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT32_MIN__ULLFRACT_MIN__ 0.0ULLR__DBL_HAS_QUIET_NAN__ 1__UACCUM_MIN__ 0.0UK__ARM_FEATURE_QBIT__LFRACT_EPSILON__ 0x1P-31LR__INT_FAST8_TYPE__ intINTMAX_MIN (-INTMAX_MAX - 1)__FLT64_HAS_INFINITY__ 1UINTPTR_MAX __UINTPTR_MAX____FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32x__bool_true_false_are_defined 1__SACCUM_FBIT__ 7__WCHAR_TYPE__ unsigned int__ARM_ASM_SYNTAX_UNIFIED__BIT26 (1<<26)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT64_MIN__ 2.2250738585072014e-308F64__FRACT_MIN__ (-0.5R-0.5R)__GCC_ATOMIC_INT_LOCK_FREE 1__INTMAX_MAX__ 0x7fffffffffffffffLLWCHAR_MAX __WCHAR_MAX____UACCUM_EPSILON__ 0x1P-16UK__GCC_ASM_FLAG_OUTPUTS____ACCUM_IBIT__ 16__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__FLT64_MAX_10_EXP__ 308__SACCUM_IBIT__ 8__SIZEOF_PTRDIFF_T__ 4UINT_LEAST32_MAX__SFRACT_MIN__ (-0.5HR-0.5HR)__USA_IBIT__ 16BIT15 (1<<15)PTRDIFF_MIN (-PTRDIFF_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__PTRDIFF_MIN__SIZEOF_FLOAT__ 4__USACCUM_MAX__ 0XFFFFP-8UHK__UINT32_C(c) c ## UL__UDA_FBIT__ 32BIT20 (1<<20)INTMAX_MIN_STDBOOL_H UINT_FAST8_MAX__ARM_FEATURE_UNALIGNED__THUMBEL__ 1__DA_IBIT__ 32__BIGGEST_ALIGNMENT__ 8__LACCUM_IBIT__ 32__USFRACT_MAX__ 0XFFP-8UHR__UINT_FAST8_MAX__ 0xffffffffU__ORDER_LITTLE_ENDIAN__ 1234__HAVE_SPECULATION_SAFE_VALUE 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__SA_FBIT__ 15__FLT64_MIN_10_EXP__ (-307)BIT7 (1<<7)__INT_MAX__ 0x7fffffff__SACCUM_EPSILON__ 0x1P-7HKUINT8_C(c) __UINT8_C(c)__INT_FAST16_TYPE__ int__FLT32_DECIMAL_DIG__ 9BIT18 (1<<18)__UINT16_TYPE__ short unsigned int__WCHAR_WIDTH__ 32__GNUC_STDC_INLINE__ 1__UHQ_IBIT__ 0__UFRACT_FBIT__ 16INTMAX_C(c) __INTMAX_C(c)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__INT64_TYPE__ long long int__FLT_MAX_10_EXP__ 38__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKLIBOPENCM3_CM3_COMMON_H PTRDIFF_MAX __PTRDIFF_MAX____LLACCUM_EPSILON__ 0x1P-31LLK__FLT32X_MANT_DIG__ 53INT8_MAX __INT8_MAX__INTMAX_C__ARM_FEATURE_COPROC__ULFRACT_MIN__ 0.0ULR__FLT_MANT_DIG__ 24__ARM_ARCH__FLT64_DECIMAL_DIG__ 17WINT_MIN__FLT32_MIN_EXP__ (-125)WINT_MAX__UACCUM_IBIT__ 16__UINT_FAST16_MAX__ 0xffffffffU__UINT_FAST16_TYPE__ unsigned int__FLT32_MAX_EXP__ 128__DBL_MIN_10_EXP__ (-307)__USACCUM_IBIT__ 8__THUMB_INTERWORK__ 1INT_LEAST8_MAXUINT_LEAST16_MAX__FLT32_DIG__ 6_GCC_STDINT_H __FLT64_HAS_DENORM__ 1BIT1 (1<<1)__FLT_EVAL_METHOD__ 0__FLT32X_HAS_DENORM__ 1INT64_MIN__INT_LEAST64_MAX__ 0x7fffffffffffffffLLINT64_MAX__ACCUM_FBIT__ 15__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1INT_FAST8_MIN__ULACCUM_IBIT__ 32__LLFRACT_FBIT__ 63UINT_FAST64_MAX__INT_LEAST8_WIDTH__ 8__ARM_32BIT_STATE__USA_FBIT__ 16__UINT8_MAX__ 0xff__ARM_FEATURE_IDIV__UINT16_MAX__ 0xffffINT_LEAST8_MAX __INT_LEAST8_MAX____ARM_FEATURE_FMA__UACCUM_FBIT__ 16SIZE_MAX __SIZE_MAX____INTMAX_WIDTH__ 64__ARM_FEATURE_CDE__LFRACT_FBIT__ 31__DBL_IS_IEC_60559__ 2__INT_LEAST16_TYPE__ short int__FLT64_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1INT_FAST8_MIN (-INT_FAST8_MAX - 1)INT8_C__DBL_DIG__ 15true 1__ARMEL__ 1__ARM_ARCH_ISA_THUMB__LACCUM_FBIT__ 31__UTQ_IBIT__ 0SIZE_MAX__FLT_MIN__ 1.1754943508222875e-38F__FLT32X_DIG__ 15__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__INT_FAST16_MAX__ 0x7fffffff__ARM_ARCH_ISA_THUMB 1UINT_FAST32_MAX __UINT_FAST32_MAX____UTQ_FBIT__ 128long long int__CHAR_BIT__ 8WCHAR_MIN__FLT32X_IS_IEC_60559__ 2INT_FAST16_MAX__INTPTR_WIDTH__ 32__UINT_LEAST8_TYPE__ unsigned char__LDBL_MAX__ 1.7976931348623157e+308L__FINITE_MATH_ONLY__ 0__SACCUM_MAX__ 0X7FFFP-7HK__arm__ 1__SFRACT_IBIT__ 0INT64_MAX __INT64_MAX__INTPTR_MAX__LDBL_MANT_DIG__ 53INT16_MIN (-INT16_MAX - 1)__TQ_IBIT__ 0__UHA_FBIT__ 8INTPTR_MIN (-INTPTR_MAX - 1)INT_LEAST8_MINBIT6 (1<<6)BIT21 (1<<21)__ELF__ 1__ARM_ARCH_PROFILEINT8_MIN (-INT8_MAX - 1)__INT16_C(c) c__GCC_HAVE_DWARF2_CFI_ASM 1__UINT64_MAX__ 0xffffffffffffffffULL__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__INT_FAST32_MAX__ 0x7fffffff__USFRACT_EPSILON__ 0x1P-8UHR__ATOMIC_ACQUIRE 2WINT_MAX __WINT_MAX__INTPTR_MIN__STDC__ 1BIT10 (1<<10)__SIZEOF_LONG__ 4__DBL_MAX_EXP__ 1024__ATOMIC_CONSUME 1BIT13 (1<<13)PTRDIFF_MAX__INT_FAST32_WIDTH__ 32__ARM_BF16_FORMAT_ALTERNATIVE__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__ULFRACT_FBIT__ 32__SCHAR_WIDTH__ 8__ACCUM_MIN__ (-0X1P15K-0X1P15K)__SIZEOF_DOUBLE__ 8INT8_MAX__GNUC_PATCHLEVEL__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0__ARM_ARCH_EXT_IDIV____FRACT_MAX__ 0X7FFFP-15R__WINT_MIN__ 0U__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 32__FLT32_IS_IEC_60559__ 2UINT_FAST32_MAX__FRACT_IBIT__ 0__LDBL_MIN__ 2.2250738585072014e-308L__LDBL_HAS_INFINITY__ 1__GCC_IEC_559_COMPLEX 0__UINT32_MAX__ 0xffffffffUL__LDBL_MIN_EXP__ (-1021)__ULLFRACT_FBIT__ 64__SIZEOF_WCHAR_T__ 4END_DECLS __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____ACCUM_MAX__ 0X7FFFFFFFP-15K__SIZE_WIDTH__ 32__ARM_FEATURE_MVEINT_LEAST32_MININT64_C(c) __INT64_C(c)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__LLFRACT_EPSILON__ 0x1P-63LLRUINT32_C__LONG_WIDTH__ 32__SFRACT_FBIT__ 7__CHAR32_TYPE__ long unsigned int__INT_LEAST8_TYPE__ signed char__ARM_FEATURE_SAT__ARM_PCS 1__HQ_IBIT__ 0INT64_MIN (-INT64_MAX - 1)__USER_LABEL_PREFIX__ __FLT_DENORM_MIN__ 1.4012984643248171e-45F__UINT_LEAST32_TYPE__ long unsigned intBIT27 (1<<27)__DQ_FBIT__ 63__UHA_IBIT__ 8INT_FAST64_MAX __INT_FAST64_MAX__INT64_CUINTMAX_C(c) __UINTMAX_C(c)__SIG_ATOMIC_WIDTH__ 32__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__SHRT_MAX__ 0x7fff__ARM_FP16_ARGS__ORDER_PDP_ENDIAN__ 3412INT_LEAST64_MIN__SQ_IBIT__ 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32__FLT_DECIMAL_DIG__ 9__INT32_MAX__ 0x7fffffffL__WINT_WIDTH__ 32INT16_MAX __INT16_MAX__INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UQQ_FBIT__ 8__USQ_IBIT__ 0INT_FAST64_MIN (-INT_FAST64_MAX - 1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16UR__GXX_ABI_VERSION 1017INT8_C(c) __INT8_C(c)__INT_LEAST64_WIDTH__ 64__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong intUINT64_C__thumb2____FLT32X_MIN__ 2.2250738585072014e-308F32x__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX____UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64__thumb__ 1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUUINTMAX_MAX__LDBL_DECIMAL_DIG__ 17BIT19 (1<<19)BIT25 (1<<25)__TQ_FBIT__ 127__UHQ_FBIT__ 16__UINT_FAST64_MAX__ 0xffffffffffffffffULL/build/libopencm3/lib/lpc43xx/m0__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__WCHAR_MAX__ 0xffffffffU__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX____FLT_EPSILON__ 1.1920928955078125e-7F__INT_LEAST64_TYPE__ long long intINT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 1__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LK__SFRACT_EPSILON__ 0x1P-7HR__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned intcm3_assert_failed__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1BIT30 (1<<30)__STDC_VERSION__ 199901LINT_FAST32_MIN__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAX__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1BIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__UINT_FAST8_MAX __UINT_FAST8_MAX____GCC_ATOMIC_LLONG_LOCK_FREE 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intunsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKUINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intLPC43XX 1UINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN__INT16_MIN__ULLACCUM_FBIT__ 32cm3_assert_not_reached() cm3_assert_failed()BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__UTA_IBIT__ 64__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUINT8_C__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____INT_FAST32_TYPE__ int__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long int__INTMAX_C(c) c ## LLINT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned int__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308UINT32_MAX __UINT32_MAX__short unsigned intINT_FAST8_MAX__TA_IBIT__ 64__QQ_FBIT__ 7__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN____UINT_LEAST16_TYPE__ short unsigned int__ARM_ARCH_PROFILE 77GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sections__INT_FAST8_WIDTH__ 32__LDBL_MAX_EXP__ 1024BIT0 (1<<0)__FLT_MIN_EXP__ (-125)__GCC_ATOMIC_BOOL_LOCK_FREE 1__DECIMAL_DIG__ 17__INT32_C(c) c ## Lassert_exprINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1BIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"INT16_CUINT64_MAX __UINT64_MAX____ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAX__ARM_FEATURE_CLZMMIO32(addr) (*(volatile uint32_t *)(addr))__LFRACT_MAX__ 0X7FFFFFFFP-31LRCM3_LIKELY(expr) (__builtin_expect(!!(expr), 1))false 0__INT_LEAST32_MAX__ 0x7fffffffLINT16_C(c) __INT16_C(c)BIT11 (1<<11)INT32_C(c) __INT32_C(c)__GCC_ATOMIC_LONG_LOCK_FREE 1__ARM_ARCH_6M__ 1__UINTMAX_MAX__ 0xffffffffffffffffULL__SIG_ATOMIC_TYPE__ int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_LEAST32_MAX __INT_LEAST32_MAX__BIT28 (1<<28)__ULLFRACT_EPSILON__ 0x1P-64ULLR__LDBL_HAS_DENORM__ 1__UINT_LEAST16_MAX__ 0xffff__ARM_FEATURE_LDREXUINTPTR_MAX__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__USACCUM_FBIT__ 8__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (15:12.2.rel1-1) 12.2.1 20221205 | AA+aeabi!6S-M M     $& "( 4e'**" <" assert.c$twm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.assert.h.53.565a4ee64503b1a51b0509de816d9092cm3_assert_failedcm3_assert_failed_verbose &  "&-4;BIPW^lqx        (?V  $-39 #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y   #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} $(.symtab.strtab.shstrtab.text.data.bss.text.cm3_assert_failed.rel.text.cm3_assert_failed_verbose.rel.debug_info.debug_abbrev.rel.debug_loclists.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 +@ +L +X +d +p +|!|'|,|HD @S+ lh @S+ xh @T +( @T+ @T+@ @T@+~  @(U +  @ c + N @@c+" @g(+ @@g0+  @ph+" @h+$00<0%O'LO8 @h +(pO,O,& 0RVhsync.o/ 0 0 0 644 27456 ` ELF((e4('&_pGF'6 ^* I .''0z5-intC $ > % Uy$ > .?: ; 9 '@zC,?@S?.. ] G(/154}*f@_%#, 8@1)2R: F40$9F)'r*+56$Ld+5$m4 n1/0 U'%0 K*(`)A! r *,#}&,l9d4~9%#%I c&)"y; k_ 8=717*'F:("-B67 :).7 "30n 6A3/M&1e!=+$:` 4;ml<I5;Wq- 4B3"+67*7) :D"p00:j"-) '&f8  &1w ,. R/"% 2(&/E   !Z3'7R-@0(u35.5$m{-$*1k33"'!g.O#!s8'Wi(8P^ jWZ,-9 #" y:(,H@:V0$% Q 1#s(,KX ^-Q!" I.93f2!  :5L*t$=(&%1)&-)-s}|,-  p 1C5[*1 13$`7g 7%.c3N9/)-z.".1=V$\ R8 a# b:8q ?6ci4h!)(#8 /6,+r7%  a !i!"h$U !V#'% 5 1!S "")j*d e8fgRjykn+o&p\2qtu!x y%+z{x ~+`5G$188? ..-M6 #9s#+3(&&_  5 Cl/Q79-~842X.z4\O A%Z(&np Hv:u R/y)0O 3*v03D225fl'0869c%#3l=#!'9 N1 k%! &|'82C1D{E8F'I L{2Q6RS+T U.VPWX4YZZ0[o\(9]/^_7`Aa" bkcd)ef'g2h-i!j)kql%m:n4o1.pL( ../../cm3../../../include/libopencm3/cm3/usr/lib/gcc/arm-none-eabi/12.2.1/includesync.csync.hcommon.hstdint.hstdbool.h/__ARM_FEATURE_FP16_VECTOR_ARITHMETIC__SIG_ATOMIC_MAX__ 0x7fffffff__TA_FBIT__ 63__FLT32_HAS_INFINITY__ 1BIT17 (1<<17)UINT8_MAX__UINT_FAST8_TYPE__ unsigned int__FLT64_MAX_EXP__ 1024__FLT32X_MAX_EXP__ 1024__INT_FAST16_WIDTH__ 32__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1INT_LEAST16_MIN_GCC_STDINT_H __ULACCUM_EPSILON__ 0x1P-32ULKINT_LEAST16_MAX __INT_LEAST16_MAX____ARM_FEATURE_SIMD32UINT16_C__FLT32_MANT_DIG__ 24__USQ_IBIT__ 0__UINT8_C(c) c__ARM_NEON____SIZEOF_WINT_T__ 4__QQ_IBIT__ 0__UDQ_IBIT__ 0__ARM_FEATURE_MATMUL_INT8INT16_C(c) __INT16_C(c)__GCC_ATOMIC_SHORT_LOCK_FREE 1__FLT32X_DECIMAL_DIG__ 17__DBL_MIN_EXP__ (-1021)__LONG_LONG_WIDTH__ 64__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1__ARM_FEATURE_CDE_COPROC__ARM_SIZEOF_WCHAR_T 4__ARM_FP16_FORMAT_IEEE__ARM_FEATURE_COMPLEX__LLFRACT_IBIT__ 0INT_LEAST16_MAXUINT16_C(c) __UINT16_C(c)__DBL_MAX__ ((double)1.7976931348623157e+308L)__UINT_FAST32_MAX__ 0xffffffffUINT_FAST32_MAX__USFRACT_MIN__ 0.0UHRINT_FAST16_MAX __INT_FAST16_MAX____GNUC_MINOR__ 2__UINT_LEAST8_MAX__ 0xffUINT16_MAXINT_LEAST32_MAXINT_LEAST64_MAXunsigned intBIT5 (1<<5)__ARM_FEATURE_CRYPTO__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)INT8_MIN__UINT16_C(c) c__SIZEOF_SIZE_T__ 4__CHAR16_TYPE__ short unsigned intUINT_LEAST32_MAX __UINT_LEAST32_MAX____SIZEOF_LONG_DOUBLE__ 8BIT29 (1<<29)__INT_FAST8_MAX__ 0x7fffffff__ORDER_BIG_ENDIAN__ 4321__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__GCC_CONSTRUCTIVE_SIZE 64__UTA_FBIT__ 64__DBL_MANT_DIG__ 53__UINT_LEAST64_TYPE__ long long unsigned int__INT_MAX__ 0x7fffffff__ATOMIC_RELEASE 3__FLT_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__CHAR_UNSIGNED__ 1MMIO16(addr) (*(volatile uint16_t *)(addr))__INT16_TYPE__ short intUINT8_MAX __UINT8_MAX____ARM_FEATURE_QRDMX__LDBL_DIG__ 15__OPTIMIZE__ 1__FLT32_MAX__ 3.4028234663852886e+38F32__LLACCUM_IBIT__ 32__ATOMIC_SEQ_CST 5BIT8 (1<<8)__SIZEOF_SHORT__ 2__INT_LEAST8_MAX__ 0x7f__REGISTER_PREFIX__ __FLT64_MANT_DIG__ 53UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_C(c) c ## ULLINT32_C__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_MIN_10_EXP__ (-37)__DBL_HAS_DENORM__ 1__LFRACT_IBIT__ 0__ARM_ARCH 6SIG_ATOMIC_MIN __SIG_ATOMIC_MIN____INT_LEAST16_MAX__ 0x7fff__SCHAR_MAX__ 0x7f__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__ARM_FEATURE_NUMERIC_MAXMIN__ULLFRACT_IBIT__ 0__FLT64_DIG__ 15INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__ATOMIC_RELAXED 0INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_FP16_FML__SIZE_MAX__ 0xffffffffU__LDBL_IS_IEC_60559__ 2__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__ULACCUM_MIN__ 0.0ULKUINT64_C(c) __UINT64_C(c)BEGIN_DECLS __FLT_HAS_INFINITY__ 1__FLT32_EPSILON__ 1.1920928955078125e-7F32BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT_FAST64_MAX__UDA_IBIT__ 32__INT_FAST64_TYPE__ long long int__INT8_C(c) csigned char__FDPIC____INT_LEAST16_WIDTH__ 16INT32_MIN (-INT32_MAX - 1)__ULLACCUM_MIN__ 0.0ULLKBIT3 (1<<3)__ARM_FEATURE_DOTPROD__ARM_NEONbool _Bool__ARM_FEATURE_CMSE__UINTPTR_TYPE__ unsigned int__FLT64_IS_IEC_60559__ 2__FLT32_HAS_DENORM__ 1__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64INTMAX_MAX__SA_IBIT__ 16__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRUINTMAX_C__INT_FAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_FP16_SCALAR_ARITHMETICSIG_ATOMIC_MAX__FLT_DIG__ 6__DBL_EPSILON__ ((double)2.2204460492503131e-16L)UINT_LEAST64_MAX__DA_FBIT__ 31__ARM_SIZEOF_MINIMAL_ENUM 1__USES_INITFINI__ 1__GCC_IEC_559 0INT32_MAXINT_FAST8_MAX __INT_FAST8_MAX____USACCUM_EPSILON__ 0x1P-8UHKLPC43XX_M0 1__PTRDIFF_MAX__ 0x7fffffff__FLT32_HAS_QUIET_NAN__ 1__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__UFRACT_MAX__ 0XFFFFP-16UR__SFRACT_MAX__ 0X7FP-7HR__GNUC__ 12__ARM_EABI__ 1long long unsigned int__INT64_MAX__ 0x7fffffffffffffffLL__VERSION__ "12.2.1 20221205"__INT8_MAX__ 0x7f__ULFRACT_EPSILON__ 0x1P-32ULR__INT_LEAST32_TYPE__ long int__ULFRACT_IBIT__ 0__UTQ_IBIT__ 0__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FLT_RADIX__ 2UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT32_MIN__ULLFRACT_MIN__ 0.0ULLR__DBL_HAS_QUIET_NAN__ 1__UACCUM_MIN__ 0.0UK__ARM_FEATURE_QBIT__LFRACT_EPSILON__ 0x1P-31LR__INT_FAST8_TYPE__ intINTMAX_MIN (-INTMAX_MAX - 1)__FLT64_HAS_INFINITY__ 1UINTPTR_MAX __UINTPTR_MAX____FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32x__bool_true_false_are_defined 1__SACCUM_FBIT__ 7__WCHAR_TYPE__ unsigned int__ARM_ASM_SYNTAX_UNIFIED__BIT26 (1<<26)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT64_MIN__ 2.2250738585072014e-308F64__FRACT_MIN__ (-0.5R-0.5R)__GCC_ATOMIC_INT_LOCK_FREE 1__INTMAX_MAX__ 0x7fffffffffffffffLLWCHAR_MAX __WCHAR_MAX____UACCUM_EPSILON__ 0x1P-16UK__GCC_ASM_FLAG_OUTPUTS____ACCUM_IBIT__ 16__LDBL_DENORM_MIN__ 4.9406564584124654e-324L__FLT64_MAX_10_EXP__ 308__SACCUM_IBIT__ 8__SIZEOF_PTRDIFF_T__ 4UINT_LEAST32_MAX__SFRACT_MIN__ (-0.5HR-0.5HR)__USA_IBIT__ 16BIT15 (1<<15)PTRDIFF_MIN (-PTRDIFF_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__PTRDIFF_MIN__SIZEOF_FLOAT__ 4__UINT32_C(c) c ## UL__UDA_FBIT__ 32BIT20 (1<<20)INTMAX_MIN_STDBOOL_H UINT_FAST8_MAX__ARM_FEATURE_UNALIGNED__THUMBEL__ 1__DA_IBIT__ 32__BIGGEST_ALIGNMENT__ 8__LACCUM_IBIT__ 32__USFRACT_MAX__ 0XFFP-8UHR__UINT_FAST8_MAX__ 0xffffffffU__ORDER_LITTLE_ENDIAN__ 1234__HAVE_SPECULATION_SAFE_VALUE 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)__SA_FBIT__ 15__FLT64_MIN_10_EXP__ (-307)BIT7 (1<<7)__SACCUM_EPSILON__ 0x1P-7HKUINT_FAST32_MAXUINT8_C(c) __UINT8_C(c)__INT_FAST16_TYPE__ int__FLT32_DECIMAL_DIG__ 9BIT18 (1<<18)__UINT16_TYPE__ short unsigned int__WCHAR_WIDTH__ 32__GNUC_STDC_INLINE__ 1__UHQ_IBIT__ 0__UFRACT_FBIT__ 16INTMAX_C(c) __INTMAX_C(c)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__INT64_TYPE__ long long int__FLT_MAX_10_EXP__ 38__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKLIBOPENCM3_CM3_COMMON_H PTRDIFF_MAX __PTRDIFF_MAX____LLACCUM_EPSILON__ 0x1P-31LLK__ARM_FEATURE_COPROCINT8_MAX __INT8_MAX__INTMAX_C__ULFRACT_MIN__ 0.0ULR__FLT_MANT_DIG__ 24__ARM_ARCH__FLT64_DECIMAL_DIG__ 17WINT_MIN__FLT32_MIN_EXP__ (-125)WINT_MAX__UACCUM_IBIT__ 16__UINT_FAST16_MAX__ 0xffffffffU__UINT_FAST16_TYPE__ unsigned int__FLT32_MAX_EXP__ 128__DBL_MIN_10_EXP__ (-307)__USACCUM_IBIT__ 8__THUMB_INTERWORK__ 1INT_LEAST8_MAXUINT_LEAST16_MAX__FLT32_DIG__ 6__SIZEOF_DOUBLE__ 8__FLT64_HAS_DENORM__ 1BIT1 (1<<1)__FLT_EVAL_METHOD__ 0__FLT32X_HAS_DENORM__ 1INT64_MIN__INT_LEAST64_MAX__ 0x7fffffffffffffffLLINT64_MAX__ACCUM_FBIT__ 15__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1INT_FAST8_MIN__ULACCUM_IBIT__ 32__LLFRACT_FBIT__ 63UINT_FAST64_MAX__INT_LEAST8_WIDTH__ 8__ARM_32BIT_STATE__USA_FBIT__ 16__UINT8_MAX__ 0xff__ARM_FEATURE_IDIV__UINT16_MAX__ 0xffffINT_LEAST8_MAX __INT_LEAST8_MAX____ARM_FEATURE_FMA__UACCUM_FBIT__ 16SIZE_MAX __SIZE_MAX____INTMAX_WIDTH__ 64__ARM_FEATURE_CDE__LFRACT_FBIT__ 31__DBL_IS_IEC_60559__ 2__INT_LEAST16_TYPE__ short int__FLT64_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1INT_FAST8_MIN (-INT_FAST8_MAX - 1)INT8_C__DBL_DIG__ 15true 1__ARMEL__ 1__ARM_ARCH_ISA_THUMB__LACCUM_FBIT__ 31SIZE_MAX__FLT_MIN__ 1.1754943508222875e-38F__FLT32X_DIG__ 15__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__FLT32X_MANT_DIG__ 53__ARM_ARCH_ISA_THUMB 1UINT_FAST32_MAX __UINT_FAST32_MAX____UTQ_FBIT__ 128long long int__CHAR_BIT__ 8WCHAR_MIN__FLT32X_IS_IEC_60559__ 2INT_FAST16_MAX__INTPTR_WIDTH__ 32__UINT_LEAST8_TYPE__ unsigned char__LDBL_MAX__ 1.7976931348623157e+308L__FINITE_MATH_ONLY__ 0__SACCUM_MAX__ 0X7FFFP-7HK__arm__ 1__SFRACT_IBIT__ 0INT64_MAX __INT64_MAX__INTPTR_MAX__LDBL_MANT_DIG__ 53INT16_MIN (-INT16_MAX - 1)__TQ_IBIT__ 0__UHA_FBIT__ 8INTPTR_MIN (-INTPTR_MAX - 1)INT_LEAST8_MINBIT6 (1<<6)BIT21 (1<<21)__ELF__ 1__ARM_ARCH_PROFILEINT8_MIN (-INT8_MAX - 1)__INT16_C(c) c__GCC_HAVE_DWARF2_CFI_ASM 1__UINT64_MAX__ 0xffffffffffffffffULL__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__INT_FAST32_MAX__ 0x7fffffff__USFRACT_EPSILON__ 0x1P-8UHR__ATOMIC_ACQUIRE 2WINT_MAX __WINT_MAX__INTPTR_MIN__STDC__ 1../../cm3/sync.cBIT10 (1<<10)__SIZEOF_LONG__ 4__DBL_MAX_EXP__ 1024__ATOMIC_CONSUME 1BIT13 (1<<13)PTRDIFF_MAX__INT_FAST32_WIDTH__ 32__ARM_BF16_FORMAT_ALTERNATIVE__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__ULFRACT_FBIT__ 32__SCHAR_WIDTH__ 8__ACCUM_MIN__ (-0X1P15K-0X1P15K)__dmbINT8_MAX__GNUC_PATCHLEVEL__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0__ARM_ARCH_EXT_IDIV____FRACT_MAX__ 0X7FFFP-15R__WINT_MIN__ 0U__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 32__FLT32_IS_IEC_60559__ 2__ARM_ARCH_6M__ 1__FRACT_IBIT__ 0__LDBL_MIN__ 2.2250738585072014e-308L__LDBL_HAS_INFINITY__ 1__GCC_IEC_559_COMPLEX 0__UINT32_MAX__ 0xffffffffUL__LDBL_MIN_EXP__ (-1021)__ULLFRACT_FBIT__ 64__SIZEOF_WCHAR_T__ 4END_DECLS __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____ACCUM_MAX__ 0X7FFFFFFFP-15K__UFRACT_IBIT__ 0__ARM_FEATURE_MVEINT_LEAST32_MININT64_C(c) __INT64_C(c)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__LLFRACT_EPSILON__ 0x1P-63LLRUINT32_C__LONG_WIDTH__ 32__SFRACT_FBIT__ 7__CHAR32_TYPE__ long unsigned int__INT_LEAST8_TYPE__ signed char__ARM_FEATURE_SAT__ARM_PCS 1__HQ_IBIT__ 0INT64_MIN (-INT64_MAX - 1)__USER_LABEL_PREFIX__ __FLT_DENORM_MIN__ 1.4012984643248171e-45F__UINT_LEAST32_TYPE__ long unsigned intBIT27 (1<<27)__DQ_FBIT__ 63__USACCUM_MAX__ 0XFFFFP-8UHKINT_FAST64_MAX __INT_FAST64_MAX__INT64_CUINTMAX_C(c) __UINTMAX_C(c)__SIG_ATOMIC_WIDTH__ 32__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__SHRT_MAX__ 0x7fff__ARM_FP16_ARGS__ORDER_PDP_ENDIAN__ 3412INT_LEAST64_MIN__SQ_IBIT__ 0__FLT32_NORM_MAX__ 3.4028234663852886e+38F32__FLT_DECIMAL_DIG__ 9__INT32_MAX__ 0x7fffffffL__WINT_WIDTH__ 32INT16_MAX __INT16_MAX__INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UQQ_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16UR__GXX_ABI_VERSION 1017INT8_C(c) __INT8_C(c)__INT_LEAST64_WIDTH__ 64__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong intUINT64_C__thumb2____FLT32X_MIN__ 2.2250738585072014e-308F32x__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX____UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64__thumb__ 1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUUINTMAX_MAX__LDBL_DECIMAL_DIG__ 17BIT19 (1<<19)BIT25 (1<<25)__TQ_FBIT__ 127__UHQ_FBIT__ 16__UINT_FAST64_MAX__ 0xffffffffffffffffULL/build/libopencm3/lib/lpc43xx/m0__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15__UHA_IBIT__ 8LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__WCHAR_MAX__ 0xffffffffU__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX____FLT_EPSILON__ 1.1920928955078125e-7F__INT_LEAST64_TYPE__ long long intINT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1LIBOPENCM3_CM3_SYNC_H __ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 1__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LK__SFRACT_EPSILON__ 0x1P-7HRBIT23 (1<<23)__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned int__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1BIT30 (1<<30)__STDC_VERSION__ 199901LINT_FAST32_MIN__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAX__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1BIT12 (1<<12)__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__UINT_FAST8_MAX __UINT_FAST8_MAX____GCC_ATOMIC_LLONG_LOCK_FREE 1__FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intunsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned int__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32x__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKUINTMAX_MAX __UINTMAX_MAX____USFRACT_IBIT__ 0__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intLPC43XX 1UINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN__INT16_MIN__ULLACCUM_FBIT__ 32BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__UTA_IBIT__ 64__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUINT8_C__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____INT_FAST32_TYPE__ int__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4__INTMAX_TYPE__ long long int__INTMAX_C(c) c ## LLINT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1UINT_FAST16_MAX __UINT_FAST16_MAX____DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned int__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308UINT32_MAX __UINT32_MAX__short unsigned intINT_FAST8_MAX__TA_IBIT__ 64__QQ_FBIT__ 7__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN____UINT_LEAST16_TYPE__ short unsigned int__ARM_ARCH_PROFILE 77GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sections__INT_FAST8_WIDTH__ 32__LDBL_MAX_EXP__ 1024BIT0 (1<<0)__FLT_MIN_EXP__ (-125)__GCC_ATOMIC_BOOL_LOCK_FREE 1__DECIMAL_DIG__ 17__INT32_C(c) c ## LINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__INT_FAST16_MAX__ 0x7fffffffBIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"INT16_CUINT64_MAX __UINT64_MAX____ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAX__ARM_FEATURE_CLZMMIO32(addr) (*(volatile uint32_t *)(addr))__LFRACT_MAX__ 0X7FFFFFFFP-31LRfalse 0__INT_LEAST32_MAX__ 0x7fffffffL__LLACCUM_FBIT__ 31BIT11 (1<<11)INT32_C(c) __INT32_C(c)__GCC_ATOMIC_LONG_LOCK_FREE 1__SIZE_WIDTH__ 32__UINTMAX_MAX__ 0xffffffffffffffffULL__SIG_ATOMIC_TYPE__ int__LLFRACT_MIN__ (-0.5LLR-0.5LLR)INT_LEAST32_MAX __INT_LEAST32_MAX__BIT28 (1<<28)__ULLFRACT_EPSILON__ 0x1P-64ULLR__LDBL_HAS_DENORM__ 1__UINT_LEAST16_MAX__ 0xffff__ARM_FEATURE_LDREXUINTPTR_MAX__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__USACCUM_FBIT__ 8__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (15:12.2.rel1-1) 12.2.1 20221205 | A+aeabi!6S-M M      ! 2c # sync.c$twm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0__dmb     " & - 4 ; B I P W ^ l q x   $-3     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                            ! ' - 3 9 ? E K Q W ] c i o u {                            # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                            ! ' - 3 9 ? E K Q W ] c i o u {                            # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y                            ! ' - 3 9 ? E K Q W ] c i o u {                                #  )  /  5  ;  A  G  M  S  Y  _  e  k  q  w  }                                  %  +  1  7  =  C  I  O  U  [  a  g  m  s  y           # ) / 5 ; A G M S Y _ e k q x                         ' . 5 < C J Q X _ f m t {                        # * 1 8 ? F M T [ b i p w ~                        & - 4 ; B I           # ) / 5 ; A G M S Y _ e k q w }                  .symtab.strtab.shstrtab.text.data.bss.text.__dmb.rel.debug_info.debug_abbrev.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 $@ $L $X $d $p!p'p,p<x8 @ P$ HEZ@ V @P$ m`i @P$s;} @P8$~ } @P $, } @^ $H N} @_$"} @b($} @c0$ @4d$0b%;0L'L  @ -0 x ,l-c 6Q= 4`4int'Z T:'$ > .?:!; 9 'I@z% Uy: ; 9 I$ > $./?@#45<H% 1#}6#n!;#0$uq F* @2?g8P9IV$;6,(A.-01<)s51 =)V[i;H k867c , *$[0-/% $13(+2' <A#FG(y*$+H'"j Q }" !A4?<8;0'YB\.zJ3>" $RtC'K/35 ?C0'^:7>:i6+8%|1)_C ;B# =C<?;\!^d'1>?!?%/K/C&7B'. ! V@}`+8 2 &dT 9. 5 ; 3:*-?3F7-:t== (S!S#3(0)8 #F:&%4.s%,IX -@>$S2-s Bt(}'@ pB72.!ZLC7}$'8U2Z\ "3%Q Rf9q& % +C=P0W)-0+*8}/!N,3/3"R o2 4dr=!$*zq08 2X:O)W??X4rA&6~.)3c"~5'+U8+9)JB@ ]h (P B~@# Q">I!w F<w.~-G ;5u2#1,i?*z! j  /&AK)j n%ep7JG-*8$M%G"/8?K;]%i8no/p qr;st*u"vwvxy=|}/~BBA6< 0';4h:Z#B+&@+.e!! "O1)_0,d%eJfgd"jk2n1o+p9q!truW&xSy71z{ ~,17=e)84Y5#5qBe  }E6( 2BO8.`', '%d=]"6  H?a3n@T<$:4!<&. ) 3*-],A! x#!B 5mr/($G;0 ~ 6B k9/D# = ,@AAgAU*/(:(=&u-h 5AH]*x!' & '@2C&9DE@F,I L9Q>RRS42TUM5VW-"X1Yq/Z7[#\YA]5^$_?`aq$bcd=/e_f9"g:hdi&jkl*mbBnoz4p-4*z+Z1 ../../cm3/usr/lib/gcc/arm-none-eabi/12.2.1/include../../../include/libopencm3/cm3dwt.cstdint.hscs.hdwt.hcommon.hstdbool.hmemorymap.h: SCS_DHCSR_C_SNAPSTALL 0x00000020__ARM_FEATURE_FP16_VECTOR_ARITHMETIC__SIG_ATOMIC_MAX__ 0x7fffffff__TA_FBIT__ 63__UFRACT_IBIT__ 0__FLT32_HAS_INFINITY__ 1BIT17 (1<<17)UINT8_MAX__UINT_FAST8_TYPE__ unsigned int__FLT64_MAX_EXP__ 1024__FLT32X_MAX_EXP__ 1024__INT_FAST16_WIDTH__ 32__GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1INT_LEAST16_MIN__ULACCUM_EPSILON__ 0x1P-32ULKINT_LEAST16_MAX __INT_LEAST16_MAX____ARM_FEATURE_SIMD32UINT16_C__FLT32_MANT_DIG__ 24__USQ_IBIT__ 0__UINT8_C(c) cdwt_enable_cycle_counter__SIZEOF_WINT_T__ 4__QQ_IBIT__ 0__UDQ_IBIT__ 0CORESIGHT_LSR_SLK (1<<1)__ARM_FEATURE_MATMUL_INT8BIT23 (1<<23)__GCC_ATOMIC_SHORT_LOCK_FREE 1__FLT32X_DECIMAL_DIG__ 17__DBL_MIN_EXP__ (-1021)__LONG_LONG_WIDTH__ 64__GCC_ATOMIC_CHAR16_T_LOCK_FREE 1__ARM_FEATURE_CDE_COPROC__ARM_SIZEOF_WCHAR_T 4__ARM_FP16_FORMAT_IEEEDWT_FUNCTIONx_FUNCTION 15__ARM_FEATURE_COMPLEX__LLFRACT_IBIT__ 0INT_LEAST16_MAXUINT16_C(c) __UINT16_C(c)__DBL_MAX__ ((double)1.7976931348623157e+308L)__UINT_FAST32_MAX__ 0xffffffffUINT_FAST32_MAX__USFRACT_MIN__ 0.0UHRSCS_DCRDR MMIO32(SCS_BASE + 0xDF8)__GNUC_MINOR__ 2__UINT_LEAST8_MAX__ 0xffUINT16_MAXINT_LEAST32_MAXINT_LEAST64_MAXunsigned intBIT5 (1<<5)__ARM_FEATURE_CRYPTO__DBL_NORM_MAX__ ((double)1.7976931348623157e+308L)INT8_MIN__UINT16_C(c) c__SIZEOF_SIZE_T__ 4__CHAR16_TYPE__ short unsigned intUINT_LEAST32_MAX __UINT_LEAST32_MAX____SIZEOF_LONG_DOUBLE__ 8BIT29 (1<<29)UINT8_C(c) __UINT8_C(c)__INT_FAST8_MAX__ 0x7fffffff__ORDER_BIG_ENDIAN__ 4321__ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR__GCC_CONSTRUCTIVE_SIZE 64__UTA_FBIT__ 64__DBL_MANT_DIG__ 53__UINT_LEAST64_TYPE__ long long unsigned int__INT_MAX__ 0x7fffffff__ATOMIC_RELEASE 3__FLT_IS_IEC_60559__ 2__PTRDIFF_TYPE__ int__CHAR_UNSIGNED__ 1MMIO16(addr) (*(volatile uint16_t *)(addr))__INT16_TYPE__ short intUINT8_MAX __UINT8_MAX____ARM_FEATURE_QRDMX__LDBL_DIG__ 15__OPTIMIZE__ 1__FLT32_MAX__ 3.4028234663852886e+38F32__LLACCUM_IBIT__ 32__ATOMIC_SEQ_CST 5SCS_DHCSR_S_RETIRE_ST 0x01000000__SIZEOF_SHORT__ 2UINT64_MAX __UINT64_MAX____INT_LEAST8_MAX__ 0x7fCORESIGHT_LAR_KEY 0xC5ACCE55__REGISTER_PREFIX__ __FLT64_MANT_DIG__ 53SCS_BASE (PPBI_BASE + 0xE000)UINT_LEAST8_MAX __UINT_LEAST8_MAX____UINTMAX_C(c) c ## ULLSCS_DEMCR_VC_MON_EN (1 << 16)INT32_C__BYTE_ORDER__ __ORDER_LITTLE_ENDIAN____FLT32_MIN_10_EXP__ (-37)SCS_DEMCR_MON_REQ (1 << 19)__LFRACT_IBIT__ 0__ARM_NEON____ARM_ARCH 6SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__DWT_PCSR MMIO32(DWT_BASE + 0x1C)__INT_LEAST16_MAX__ 0x7fff__SCHAR_MAX__ 0x7f__FLT64_NORM_MAX__ 1.7976931348623157e+308F64__ARM_FEATURE_NUMERIC_MAXMIN__ULLFRACT_IBIT__ 0__FLT64_DIG__ 15INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)__ATOMIC_RELAXED 0INTPTR_MAX __INTPTR_MAX____ARM_FEATURE_FP16_FML__SIZE_MAX__ 0xffffffffU__LDBL_IS_IEC_60559__ 2__LACCUM_MIN__ (-0X1P31LK-0X1P31LK)__ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK__ULACCUM_MIN__ 0.0ULKUINT64_C(c) __UINT64_C(c)BEGIN_DECLS __FLT_HAS_INFINITY__ 1__FLT32_EPSILON__ 1.1920928955078125e-7F32BBIO_SRAM(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x22000000 + (bit) * 4)INT_FAST64_MAX__UDA_IBIT__ 32__INT_FAST64_TYPE__ long long int__INT8_C(c) csigned char__FDPIC____INT_LEAST16_WIDTH__ 16INT32_MIN (-INT32_MAX - 1)INT_FAST16_MAX __INT_FAST16_MAX____ULLACCUM_MIN__ 0.0ULLKuint32_t__ARM_FEATURE_DOTPROD__ARM_NEONbool _BoolNVIC_BASE (SCS_BASE + 0x0100)__ARM_FEATURE_CMSE__UINTPTR_TYPE__ unsigned int__FLT64_IS_IEC_60559__ 2__FLT32_HAS_DENORM__ 1__FLT64_DENORM_MIN__ 4.9406564584124654e-324F64true 1INTMAX_MAXSCS_DHCSR_C_HALT 0x00000002__SA_IBIT__ 16__LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLRUINTMAX_C__INT_FAST64_MAX__ 0x7fffffffffffffffLL__ARM_FEATURE_FP16_SCALAR_ARITHMETICSIG_ATOMIC_MAX__FLT_DIG__ 6__DBL_EPSILON__ ((double)2.2204460492503131e-16L)LIBOPENCM3_CM3_DWT_H __DA_FBIT__ 31__ARM_SIZEOF_MINIMAL_ENUM 1__USES_INITFINI__ 1__GCC_IEC_559 0INT32_MAXINT_FAST8_MAX __INT_FAST8_MAX____USACCUM_EPSILON__ 0x1P-8UHKLPC43XX_M0 1__PTRDIFF_MAX__ 0x7fffffff__FLT32_HAS_QUIET_NAN__ 1__ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK__UFRACT_MAX__ 0XFFFFP-16UR__SFRACT_MAX__ 0X7FP-7HR__GNUC__ 12SYS_TICK_BASE (SCS_BASE + 0x0010)__ARM_EABI__ 1DWT_FUNCTION(n) MMIO32(DWT_BASE + 0x28 + (n) * 16)long long unsigned int__INT64_MAX__ 0x7fffffffffffffffLL__VERSION__ "12.2.1 20221205"__INT8_MAX__ 0x7f__ULFRACT_EPSILON__ 0x1P-32ULR__INT_LEAST32_TYPE__ long int__ULFRACT_IBIT__ 0__LLACCUM_FBIT__ 31__UINT_LEAST64_MAX__ 0xffffffffffffffffULL__FLT_RADIX__ 2UINT_LEAST16_MAX __UINT_LEAST16_MAX__INT32_MIN__ULLFRACT_MIN__ 0.0ULLR__DBL_HAS_QUIET_NAN__ 1__UACCUM_MIN__ 0.0UK__ARM_FEATURE_QBIT__LFRACT_EPSILON__ 0x1P-31LR__INT_FAST8_TYPE__ intINTMAX_MIN (-INTMAX_MAX - 1)__FLT64_HAS_INFINITY__ 1UINTPTR_MAX __UINTPTR_MAX____FLT32X_DENORM_MIN__ 4.9406564584124654e-324F32xSCS_DCRSR_REGSEL_MASK 0x0000001F__bool_true_false_are_defined 1__SACCUM_FBIT__ 7__WCHAR_TYPE__ unsigned int__ARM_ASM_SYNTAX_UNIFIED__BIT26 (1<<26)__DBL_MIN__ ((double)2.2250738585072014e-308L)__FLT64_MIN__ 2.2250738585072014e-308F64__FRACT_MIN__ (-0.5R-0.5R)__GCC_ATOMIC_INT_LOCK_FREE 1__INTMAX_MAX__ 0x7fffffffffffffffLLWCHAR_MAX __WCHAR_MAX____UACCUM_EPSILON__ 0x1P-16UK__GCC_ASM_FLAG_OUTPUTS____ACCUM_IBIT__ 16DWT_FUNCTIONx_FUNCTION_DWATCH_RW 7__LDBL_DENORM_MIN__ 4.9406564584124654e-324LBIT25 (1<<25)__FLT64_MAX_10_EXP__ 308__SACCUM_IBIT__ 8__SIZEOF_PTRDIFF_T__ 4UINT_LEAST32_MAX__SFRACT_MIN__ (-0.5HR-0.5HR)__USA_IBIT__ 16BIT15 (1<<15)PTRDIFF_MIN (-PTRDIFF_MAX - 1)UINT_FAST64_MAX __UINT_FAST64_MAX__BIT3 (1<<3)PTRDIFF_MIN__SIZEOF_FLOAT__ 4__USACCUM_MAX__ 0XFFFFP-8UHK__UINT32_C(c) c ## UL__UDA_FBIT__ 32DEBUG_BASE (SCS_BASE + 0x0DF0)BIT20 (1<<20)INTMAX_MIN_STDBOOL_H UINT_FAST8_MAX__ARM_FEATURE_UNALIGNEDCORESIGHT_LSR_SLI (1<<0)__THUMBEL__ 1__DA_IBIT__ 32__BIGGEST_ALIGNMENT__ 8__LACCUM_IBIT__ 32__USFRACT_MAX__ 0XFFP-8UHR__UINT_FAST8_MAX__ 0xffffffffU__ORDER_LITTLE_ENDIAN__ 1234__HAVE_SPECULATION_SAFE_VALUE 1__LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)DWT_CTRL MMIO32(DWT_BASE + 0x00)SCS_DHCSR MMIO32(SCS_BASE + 0xDF0)__SA_FBIT__ 15__FLT64_MIN_10_EXP__ (-307)INT64_MAX __INT64_MAX__BIT7 (1<<7)SCB_BASE (SCS_BASE + 0x0D00)__SACCUM_EPSILON__ 0x1P-7HKSCS_DHCSR_S_LOCKUP 0x00080000__INT_FAST16_TYPE__ int__FLT32_DECIMAL_DIG__ 9BIT18 (1<<18)__UINT16_TYPE__ short unsigned int__WCHAR_WIDTH__ 32__GNUC_STDC_INLINE__ 1__UHQ_IBIT__ 0__UFRACT_FBIT__ 16INTMAX_C(c) __INTMAX_C(c)__LONG_LONG_MAX__ 0x7fffffffffffffffLL__INT64_TYPE__ long long int__FLT_MAX_10_EXP__ 38__LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLKLIBOPENCM3_CM3_COMMON_H PTRDIFF_MAX __PTRDIFF_MAX____LLACCUM_EPSILON__ 0x1P-31LLK__FLT32X_MANT_DIG__ 53INT8_MAX __INT8_MAX__INT_LEAST64_MIN__ARM_FEATURE_COPROCSCS_DEMCR_VC_INTERR (1 << 9)__ULFRACT_MIN__ 0.0ULR__FLT_MANT_DIG__ 24__ARM_ARCH__FLT64_DECIMAL_DIG__ 17LIBOPENCM3_CM3_MEMORYMAP_H WINT_MIN__FLT32_MIN_EXP__ (-125)WINT_MAX__UACCUM_IBIT__ 16__UINT_FAST16_MAX__ 0xffffffffU__UINT_FAST16_TYPE__ unsigned int__FLT32_MAX_EXP__ 128__DBL_MIN_10_EXP__ (-307)__USACCUM_IBIT__ 8LIBOPENCM3_CM3_SCS_H __THUMB_INTERWORK__ 1INT_LEAST8_MAXUINT_LEAST16_MAX__FLT32_DIG__ 6_GCC_STDINT_H __FLT64_HAS_DENORM__ 1BIT1 (1<<1)__FLT_EVAL_METHOD__ 0__FLT32X_HAS_DENORM__ 1INT64_MIN__INT_LEAST64_MAX__ 0x7fffffffffffffffLLINT64_MAX__ACCUM_FBIT__ 15__GCC_ATOMIC_WCHAR_T_LOCK_FREE 1SCS_DHCSR_S_SLEEP 0x00040000__ULACCUM_IBIT__ 32__LLFRACT_FBIT__ 63UINT_FAST64_MAX__INT_LEAST8_WIDTH__ 8__ARM_32BIT_STATE__USA_FBIT__ 16__UINT8_MAX__ 0xff__ARM_FEATURE_IDIV__UINT16_MAX__ 0xffffINT_LEAST8_MAX __INT_LEAST8_MAX____ARM_FEATURE_FMA__UACCUM_FBIT__ 16SIZE_MAX __SIZE_MAX____INTMAX_WIDTH__ 64__ARM_FEATURE_CDE__LFRACT_FBIT__ 31__DBL_IS_IEC_60559__ 2__INT_LEAST16_TYPE__ short int__FLT64_HAS_QUIET_NAN__ 1__GCC_ATOMIC_CHAR_LOCK_FREE 1SCS_DHCSR_DBGKEY 0xA05F0000INT_FAST8_MIN (-INT_FAST8_MAX - 1)INT8_C__DBL_DIG__ 15SCS_DHCSR_C_STEP 0x00000004__ARMEL__ 1__ARM_ARCH_ISA_THUMB__LACCUM_FBIT__ 31__UTQ_IBIT__ 0SIZE_MAX__FLT_MIN__ 1.1754943508222875e-38F__FLT32X_DIG__ 15__ACCUM_EPSILON__ 0x1P-15K__UDQ_FBIT__ 64__INT_FAST16_MAX__ 0x7fffffff__ARM_ARCH_ISA_THUMB 1UINT_LEAST64_MAXUINT_FAST32_MAX __UINT_FAST32_MAX____UTQ_FBIT__ 128long long int__CHAR_BIT__ 8WCHAR_MIN__FLT32X_IS_IEC_60559__ 2INT_FAST16_MAX__INTPTR_WIDTH__ 32__UINT_LEAST8_TYPE__ unsigned char__FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN____FINITE_MATH_ONLY__ 0__SACCUM_MAX__ 0X7FFFP-7HK__arm__ 1__SFRACT_IBIT__ 0SCS_DWT_LAR MMIO32(SCS_DWT_BASE + 0xFB0)INTPTR_MAX__LDBL_MANT_DIG__ 53INT16_MIN (-INT16_MAX - 1)__TQ_IBIT__ 0__UHA_FBIT__ 8INTPTR_MIN (-INTPTR_MAX - 1)SCS_DHCSR_S_HALT 0x00020000INT_FAST8_MINBIT6 (1<<6)BIT21 (1<<21)__ELF__ 1__ARM_ARCH_PROFILEINT8_MIN (-INT8_MAX - 1)__INT16_C(c) c__GCC_HAVE_DWARF2_CFI_ASM 1__UINT64_MAX__ 0xffffffffffffffffULL__LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK__INT_FAST32_MAX__ 0x7fffffff__USFRACT_EPSILON__ 0x1P-8UHR__ATOMIC_ACQUIRE 2WINT_MAX __WINT_MAX__SCS_DEMCR_VC_STATERR (1 << 7)INTPTR_MIN__STDC__ 1BIT10 (1<<10)__SIZEOF_LONG__ 4DWT_LSR MMIO32(DWT_BASE + CORESIGHT_LSR_OFFSET)__DBL_MAX_EXP__ 1024__ATOMIC_CONSUME 1BIT13 (1<<13)PTRDIFF_MAX__INT_FAST32_WIDTH__ 32__ARM_BF16_FORMAT_ALTERNATIVE__WINT_TYPE__ unsigned intBIT16 (1<<16)__LONG_MAX__ 0x7fffffffL__INT16_MAX__ 0x7fff__ULFRACT_FBIT__ 32__SCHAR_WIDTH__ 8__ACCUM_MIN__ (-0X1P15K-0X1P15K)__SIZEOF_DOUBLE__ 8INT8_MAX__GNUC_PATCHLEVEL__ 1UINT_LEAST64_MAX __UINT_LEAST64_MAX____GXX_TYPEINFO_EQUALITY_INLINE 0__ARM_ARCH_EXT_IDIV____FRACT_MAX__ 0X7FFFP-15R__WINT_MIN__ 0U__ULACCUM_FBIT__ 32__FLT_NORM_MAX__ 3.4028234663852886e+38F__UFRACT_MIN__ 0.0URBIT24 (1<<24)DWT_FUNCTIONx_FUNCTION_PCWATCH 4__ARM_NEON_FPUINT32_C(c) __UINT32_C(c)UINT16_MAX __UINT16_MAX____ULLACCUM_IBIT__ 32__FLT32_IS_IEC_60559__ 2UINT_FAST32_MAX__FRACT_IBIT__ 0__LDBL_MIN__ 2.2250738585072014e-308LDWT_CTRL_NUMCOMP (0x0F << DWT_CTRL_NUMCOMP_SHIFT)__LDBL_HAS_INFINITY__ 1__GCC_IEC_559_COMPLEX 0__UINT32_MAX__ 0xffffffffUL__LDBL_MIN_EXP__ (-1021)__ULLFRACT_FBIT__ 64__SIZEOF_WCHAR_T__ 4_Bool__INT_LEAST64_WIDTH__ 64dwt_read_cycle_counter__ACCUM_MAX__ 0X7FFFFFFFP-15K__SIZE_WIDTH__ 32__ARM_FEATURE_MVEINT_LEAST32_MININT64_C(c) __INT64_C(c)__SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)__LLFRACT_EPSILON__ 0x1P-63LLRUINT32_CCORESIGHT_LSR_OFFSET 0xfb4UINTMAX_MAX __UINTMAX_MAX____LONG_WIDTH__ 32__SFRACT_FBIT__ 7__CHAR32_TYPE__ long unsigned int__INT_LEAST8_TYPE__ signed char__ARM_FEATURE_SAT__ARM_PCS 1__HQ_IBIT__ 0INT64_MIN (-INT64_MAX - 1)__USER_LABEL_PREFIX__ MPU_BASE (SCS_BASE + 0x0D90)__FLT_DENORM_MIN__ 1.4012984643248171e-45F__UINT_LEAST32_TYPE__ long unsigned intBIT27 (1<<27)__DQ_FBIT__ 63__UHA_IBIT__ 8INT_FAST64_MAX __INT_FAST64_MAX__INT64_CUINTMAX_C(c) __UINTMAX_C(c)__SIG_ATOMIC_WIDTH__ 32SCS_DHCSR_S_REGRDY 0x00010000__ARM_FEATURE_BF16_VECTOR_ARITHMETIC__SHRT_MAX__ 0x7fff__ARM_FP16_ARGS__ORDER_PDP_ENDIAN__ 3412SCS_DEMCR_VC_NOCPERR (1 << 5)__SQ_IBIT__ 0DWT_FUNCTIONx_FUNCTION_DWATCH_R 5__FLT32_NORM_MAX__ 3.4028234663852886e+38F32__FLT_DECIMAL_DIG__ 9__INT32_MAX__ 0x7fffffffL__WINT_WIDTH__ 32SCS_DEMCR_VC_CORERESET (1 << 0)INT16_MAX __INT16_MAX__DWT_FUNCTIONx_MATCHED (1 << 24)INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)__UQQ_FBIT__ 8INT_FAST64_MIN (-INT_FAST64_MAX - 1)MMIO64(addr) (*(volatile uint64_t *)(addr))short int__UFRACT_EPSILON__ 0x1P-16UR__GXX_ABI_VERSION 1017INT8_C(c) __INT8_C(c)../../cm3/dwt.c__INT32_TYPE__ long int__FLT32X_MIN_10_EXP__ (-307)__ARM_FEATURE_BF16_SCALAR_ARITHMETIClong intUINT64_C__thumb2____FLT32X_MIN__ 2.2250738585072014e-308F32x__SQ_FBIT__ 31BIT31 (1<<31)INT_FAST64_MIN__LFRACT_MIN__ (-0.5LR-0.5LR)__WCHAR_MIN__ 0U__FLT64_MAX__ 1.7976931348623157e+308F64INT_LEAST64_MAX __INT_LEAST64_MAX____UINT_LEAST32_MAX__ 0xffffffffUL__GCC_DESTRUCTIVE_SIZE 64SCS_DWT_LSR MMIO32(SCS_DWT_BASE + 0xFB4)__thumb__ 1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUUINTMAX_MAX__LDBL_DECIMAL_DIG__ 17BIT19 (1<<19)__LDBL_MAX__ 1.7976931348623157e+308LBIT8 (1<<8)__TQ_FBIT__ 127__UHQ_FBIT__ 16SCS_DHCSR_C_DEBUGEN 0x00000001SCS_DCRSR_REGSEL_XPSR 0x00000010__UINT_FAST64_MAX__ 0xffffffffffffffffULL/build/libopencm3/lib/lpc43xx/m0__USFRACT_FBIT__ 8__INT64_C(c) c ## LL__HQ_FBIT__ 15LIBOPENCM3_DEPRECATED(x) __attribute__((deprecated(x)))__WCHAR_MAX__ 0xffffffffUSCS_DEMCR_MON_STEP (1 << 18)__SIZEOF_LONG_LONG__ 8SIG_ATOMIC_MIN__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16__ARM_FPUINT32_MAXINT32_MAX __INT32_MAX__END_DECLS DWT_FUNCTIONx_FUNCTION_DWATCH_W 6__FLT_EPSILON__ 1.1920928955078125e-7F__INT_LEAST64_TYPE__ long long intINT16_MAX__UINT32_TYPE__ long unsigned int__LDBL_MIN_10_EXP__ (-307)INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)BIT2 (1<<2)__SIZEOF_POINTER__ 4__UACCUM_MAX__ 0XFFFFFFFFP-16UK__VFP_FP__ 1__ULFRACT_MAX__ 0XFFFFFFFFP-32ULR__HA_FBIT__ 7__PTRDIFF_WIDTH__ 32__FLT32_DENORM_MIN__ 1.4012984643248171e-45F32__SACCUM_MIN__ (-0X1P7HK-0X1P7HK)__INT_WIDTH__ 32__GCC_ATOMIC_POINTER_LOCK_FREE 1__UINT64_C(c) c ## ULLINT_FAST16_MIN (-INT_FAST16_MAX - 1)__LACCUM_EPSILON__ 0x1P-31LK__SFRACT_EPSILON__ 0x1P-7HR__UQQ_IBIT__ 0__FLT32X_MAX__ 1.7976931348623157e+308F32x__USQ_FBIT__ 32__HA_IBIT__ 8long unsigned intDWT_MASK(n) MMIO32(DWT_BASE + 0x24 + (n) * 16)__GCC_ATOMIC_CHAR32_T_LOCK_FREE 1BIT30 (1<<30)__STDC_VERSION__ 199901LINT_LEAST8_MINSCS_DEMCR_VC_HARDERR (1 << 10)INT_FAST32_MINPPBI_BASE (0xE0000000U)__FRACT_EPSILON__ 0x1P-15R__STDC_HOSTED__ 1UINT_LEAST8_MAX__INTPTR_MAX__ 0x7fffffffBIT4 (1<<4)INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)__PRAGMA_REDEFINE_EXTNAME 1__SOFTFP__ 1BIT12 (1<<12)INTMAX_C__FLT64_EPSILON__ 2.2204460492503131e-16F64INTMAX_MAX __INTMAX_MAX__UINT_FAST8_MAX __UINT_FAST8_MAX____GCC_ATOMIC_LLONG_LOCK_FREE 1INT_LEAST32_MAX __INT_LEAST32_MAX____FLT_MAX_EXP__ 128__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intSCS_DEMCR_TRCENA (1 << 24)unsigned charWCHAR_MAX__UINTMAX_TYPE__ long long unsigned intDWT_COMP(n) MMIO32(DWT_BASE + 0x20 + (n) * 16)__FLT32X_NORM_MAX__ 1.7976931348623157e+308F32xDWT_CTRL_NUMCOMP_SHIFT 28__LDBL_EPSILON__ 2.2204460492503131e-16L__INTPTR_TYPE__ intBIT9 (1<<9)__DEC_EVAL_METHOD__ 2__USACCUM_MIN__ 0.0UHKSCS_DEMCR MMIO32(SCS_BASE + 0xDFC)__USFRACT_IBIT__ 0__INT_LEAST32_WIDTH__ 32__ARM_FEATURE_DSP__GNUC_WIDE_EXECUTION_CHARSET_NAME "UTF-32LE"__UINT_FAST32_TYPE__ unsigned intLPC43XX 1UINT64_MAX__DQ_IBIT__ 0__FLT_MAX__ 3.4028234663852886e+38F__FLT32_MIN__ 1.1754943508222875e-38F32MMIO8(addr) (*(volatile uint8_t *)(addr))__SIZE_TYPE__ unsigned intWCHAR_MIN __WCHAR_MIN__INT16_MIN__ULLACCUM_FBIT__ 32BBIO_PERIPH(addr,bit) MMIO32((((uint32_t)addr) & 0x0FFFFF) * 32 + 0x42000000 + (bit) * 4)__FLT64_MIN_EXP__ (-1021)BIT22 (1<<22)INT_FAST32_MAX __INT_FAST32_MAX____FRACT_FBIT__ 15__UTA_IBIT__ 64SCS_DEMCR_VC_BUSERR (1 << 8)__FLT_MIN_10_EXP__ (-37)__FLT32X_MIN_EXP__ (-1021)__FLT32X_EPSILON__ 2.2204460492503131e-16F32xUINT8_C__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1SCS_DEMCR_VC_MON_PEND (1 << 17)SIG_ATOMIC_MAX __SIG_ATOMIC_MAX____INT_FAST32_TYPE__ int__FLT_HAS_QUIET_NAN__ 1__SIZEOF_INT__ 4SCS_DCRSR MMIO32(SCS_BASE + 0xDF4)__INTMAX_TYPE__ long long intSCS_DHCSR_C_MASKINTS 0x00000008__INTMAX_C(c) c ## LLINT_FAST32_MIN (-INT_FAST32_MAX - 1)__APCS_32__ 1UINT_FAST16_MAX __UINT_FAST16_MAX__DWT_LAR MMIO32(DWT_BASE + CORESIGHT_LAR_OFFSET)__DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)__UINT64_TYPE__ long long unsigned int__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308UINT32_MAX __UINT32_MAX__short unsigned intINT_FAST8_MAX__TA_IBIT__ 64__QQ_FBIT__ 7__FLT32X_HAS_INFINITY__ 1WINT_MIN __WINT_MIN__SCS_DHCSR_S_RESET_ST 0x02000000__UINT_LEAST16_TYPE__ short unsigned int__ARM_ARCH_PROFILE 77GNU C99 12.2.1 20221205 -mcpu=cortex-m0 -mthumb -mfloat-abi=soft -march=armv6s-m -ggdb3 -O2 -std=c99 -fno-common -ffunction-sections -fdata-sections__INT_FAST8_WIDTH__ 32__LDBL_MAX_EXP__ 1024BIT0 (1<<0)__FLT_MIN_EXP__ (-125)__GCC_ATOMIC_BOOL_LOCK_FREE 1__DECIMAL_DIG__ 17__INT32_C(c) c ## LINT_FAST16_MIN__STRICT_ANSI__ 1__ARM_FP16_FORMAT_ALTERNATIVE__LDBL_MAX_10_EXP__ 308__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1BIT14 (1<<14)__GNUC_EXECUTION_CHARSET_NAME "UTF-8"INT16_CSCS_DEMCR_VC_MMERR (1 << 4)__ARM_FEATURE_CRC32__FLT32_MAX_10_EXP__ 38UINT_FAST16_MAX__ARM_FEATURE_CLZMMIO32(addr) (*(volatile uint32_t *)(addr))__LFRACT_MAX__ 0X7FFFFFFFP-31LRCORESIGHT_LAR_OFFSET 0xfb0false 0DWT_FUNCTIONx_FUNCTION_DISABLED 0__INT_LEAST32_MAX__ 0x7fffffffLINT16_C(c) __INT16_C(c)BIT11 (1<<11)INT32_C(c) __INT32_C(c)__GCC_ATOMIC_LONG_LOCK_FREE 1__ARM_ARCH_6M__ 1__UINTMAX_MAX__ 0xffffffffffffffffULL__SIG_ATOMIC_TYPE__ intSCS_DCRSR_REGSEL_PSP 0x00000012__LLFRACT_MIN__ (-0.5LLR-0.5LLR)DWT_MASKx_MASK 0x0FSCS_DCRSR_REGSEL_MSP 0x00000011BIT28 (1<<28)__ULLFRACT_EPSILON__ 0x1P-64ULLR__LDBL_HAS_DENORM__ 1SCS_DEMCR_VC_CHKERR (1 << 6)__UINT_LEAST16_MAX__ 0xffff__ARM_FEATURE_LDREXUINTPTR_MAX__LDBL_NORM_MAX__ 1.7976931348623157e+308L__ULLACCUM_EPSILON__ 0x1P-32ULLK__USACCUM_FBIT__ 8__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (15:12.2.rel1-1) 12.2.1 20221205 |  A+aeabi!6S-M M        ')!#%+ 1_$X*-  dwt.c$twm4.0.fe37fee8a84eaba1dc2e390509a6a644wm4.scs.h.22.1ac8693f455c5ba0f27b0d8537183ef0wm4.common.h.21.c9066c2f6b12c71b40226ea6107829a4wm4.stdint.h.29.6d480f4ba0f60596e88234283d42444fwm4.stdbool.h.29.4a1c88fe569adb8d03217dd16982ca34wm4.common.h.67.5c568a1f62c8e726909b04e29f9e1fc0wm4.memorymap.h.21.991cbfb03a4e91ff777157049f1f9499wm4.dwt.h.47.a7b62070e4a9aa049674d6c111755e94dwt_enable_cycle_counterdwt_read_cycle_counter  "& -4;BIPUcjx}  %-6<EK #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{ #)/5;AGMSY_ekqw} %+17=CIOU[agmsy !'-39?EKQW]ciou{     # ) / 5 ; A G M S Y _ e k q w }                            % + 1 7 = C I O U [ a g m s y  #)/5;AGMSY_ekqw}  #)/5;AGMSY_ekqx  '.5<CJQX_fmt{#*18?FMT[bipw~ &-4;BI  #)/5;AGMSY_ekqw} #)/5;AGM #)/5<CJQX_fm$(.symtab.strtab.shstrtab.text.data.bss.text.dwt_enable_cycle_counter.text.dwt_read_cycle_counter.rel.debug_info.debug_abbrev.rel.debug_aranges.rel.debug_rnglists.rel.debug_macro.rel.debug_line.debug_str.comment.rel.debug_frame.ARM.attributes.group4 .@ .L .X .d .p .| . . !',Klh @x\.xJW( @(]. @@].R @P]P.4~  @] .  @k .  @l . N @l." @p(.) @p0.!R @rh.#cr @pr.% @r.'0C0mW'W0 @s .+pW,W/+ Z(s