// SPDX-License-Identifier: GPL-2.0 OR MIT /* * Copyright (c) 2024 Yixun Lan */ #include #define K1_PADCONF(pin, func) (((pin) << 16) | (func)) /* Map GPIO pin to each bank's */ #define K1_GPIO(x) (x / 32) (x % 32) &pinctrl { gmac0_cfg: gmac0-cfg { gmac0-pins { pinmux = , /* gmac0_rxdv */ , /* gmac0_rx_d0 */ , /* gmac0_rx_d1 */ , /* gmac0_rx_clk */ , /* gmac0_rx_d2 */ , /* gmac0_rx_d3 */ , /* gmac0_tx_d0 */ , /* gmac0_tx_d1 */ , /* gmac0_tx */ , /* gmac0_tx_d2 */ , /* gmac0_tx_d3 */ , /* gmac0_tx_en */ , /* gmac0_mdc */ , /* gmac0_mdio */ , /* gmac0_int_n */ ; /* gmac0_clk_ref */ bias-pull-up = <0>; drive-strength = <21>; }; }; gmac1_cfg: gmac1-cfg { gmac1-pins { pinmux = , /* gmac1_rxdv */ , /* gmac1_rx_d0 */ , /* gmac1_rx_d1 */ , /* gmac1_rx_clk */ , /* gmac1_rx_d2 */ , /* gmac1_rx_d3 */ , /* gmac1_tx_d0 */ , /* gmac1_tx_d1 */ , /* gmac1_tx */ , /* gmac1_tx_d2 */ , /* gmac1_tx_d3 */ , /* gmac1_tx_en */ , /* gmac1_mdc */ , /* gmac1_mdio */ , /* gmac1_int_n */ ; /* gmac1_clk_ref */ bias-pull-up = <0>; drive-strength = <21>; }; }; uart0_2_cfg: uart0-2-cfg { uart0-2-pins { pinmux = , ; bias-pull-up = <0>; drive-strength = <32>; }; }; pwm14_1_cfg: pwm14-1-cfg { pwm14-1-pins { pinmux = ; bias-pull-up = <0>; drive-strength = <32>; }; }; };