// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
 */

#include "amlogic-a4-common.dtsi"
#include <dt-bindings/power/amlogic,a4-pwrc.h>
/ {
	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x0>;
			enable-method = "psci";
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x1>;
			enable-method = "psci";
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x2>;
			enable-method = "psci";
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0 0x3>;
			enable-method = "psci";
		};
	};

	sm: secure-monitor {
		compatible = "amlogic,meson-gxbb-sm";

		pwrc: power-controller {
			compatible = "amlogic,a4-pwrc";
			#power-domain-cells = <1>;
		};
	};
};

&apb {
	gpio_intc: interrupt-controller@4080 {
		compatible = "amlogic,a4-gpio-intc",
			     "amlogic,meson-gpio-intc";
		reg = <0x0 0x4080 0x0 0x20>;
		interrupt-controller;
		#interrupt-cells = <2>;
		amlogic,channel-interrupts =
			<10 11 12 13 14 15 16 17 18 19 20 21>;
	};

	gpio_ao_intc: interrupt-controller@8e72c {
		compatible = "amlogic,a4-gpio-ao-intc",
			     "amlogic,meson-gpio-intc";
		reg = <0x0 0x8e72c 0x0 0x0c>;
		interrupt-controller;
		#interrupt-cells = <2>;
		amlogic,channel-interrupts = <140 141>;
	};
};