// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright 2024 NXP
 *
 * Authors: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
 *          Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
 *          Larisa Grigore <larisa.grigore@nxp.com>
 */

&pinctrl {
	can0_pins: can0-pins {
		can0-grp0 {
			pinmux = <0x112>;
			output-enable;
			slew-rate = <133>;
		};

		can0-grp1 {
			pinmux = <0x120>;
			input-enable;
			slew-rate = <133>;
		};

		can0-grp2 {
			pinmux = <0x2013>;
		};
	};

	can1_pins: can1-pins {
		can1-grp0 {
			pinmux = <0x132>;
			output-enable;
			slew-rate = <133>;
		};

		can1-grp1 {
			pinmux = <0x140>;
			input-enable;
			slew-rate = <133>;
		};

		can1-grp2 {
			pinmux = <0x2772>;
		};
	};

	i2c0_pins: i2c0-pins {
		i2c0-grp0 {
			pinmux = <0x1f2>, <0x201>;
			drive-open-drain;
			output-enable;
			input-enable;
			slew-rate = <133>;
		};

		i2c0-grp1 {
			pinmux = <0x2353>, <0x2363>;
		};
	};

	i2c0_gpio_pins: i2c0-gpio-pins {
		i2c0-gpio-grp0 {
			pinmux = <0x1f0>, <0x200>;
			drive-open-drain;
			output-enable;
			input-enable;
			slew-rate = <133>;
		};

		i2c0-gpio-grp1 {
			pinmux = <0x2350>, <0x2360>;
		};
	};

	i2c2_pins: i2c2-pins {
		i2c2-grp0 {
			pinmux = <0x151>, <0x161>;
			drive-open-drain;
			output-enable;
			input-enable;
			slew-rate = <133>;
		};

		i2c2-grp1 {
			pinmux = <0x2cf2>, <0x2d02>;
		};
	};

	i2c2_gpio_pins: i2c2-gpio-pins {
		i2c2-gpio-grp0 {
			pinmux = <0x2cf0>, <0x2d00>;
		};

		i2c2-gpio-grp1 {
			pinmux = <0x150>, <0x160>;
			drive-open-drain;
			output-enable;
			input-enable;
			slew-rate = <133>;
		};
	};

	i2c4_pins: i2c4-pins {
		i2c4-grp0 {
			pinmux = <0x211>, <0x222>;
			drive-open-drain;
			output-enable;
			input-enable;
			slew-rate = <133>;
		};

		i2c4-grp1 {
			pinmux = <0x2d43>, <0x2d33>;
		};
	};

	i2c4_gpio_pins: i2c4-gpio-pins {
		i2c4-gpio-grp0 {
			pinmux = <0x210>, <0x220>;
			drive-open-drain;
			output-enable;
			input-enable;
			slew-rate = <133>;
		};

		i2c4-gpio-grp1 {
			pinmux = <0x2d40>, <0x2d30>;
		};
	};
};

&can0 {
	pinctrl-names = "default";
	pinctrl-0 = <&can0_pins>;
	status = "okay";
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&can1_pins>;
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-1 = <&i2c0_gpio_pins>;
	status = "okay";

	pcal6524: gpio-expander@22 {
		compatible = "nxp,pcal6524";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&i2c2 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-1 = <&i2c2_gpio_pins>;
	status = "okay";
};

&i2c4 {
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&i2c4_pins>;
	pinctrl-1 = <&i2c4_gpio_pins>;
	status = "okay";
};