// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2021-2022 BayLibre, SAS. * Authors: * Fabien Parent * Bernhard Rosenkränzer * Alexandre Mergnat */ /dts-v1/; #include #include #include #include "mt8365.dtsi" #include "mt6357.dtsi" / { model = "MediaTek MT8365 Open Platform EVK"; compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; aliases { serial0 = &uart0; ethernet = ðernet; }; chosen { stdout-path = "serial0:921600n8"; }; connector { compatible = "hdmi-connector"; label = "hdmi"; type = "d"; port { #address-cells = <1>; #size-cells = <0>; hdmi_connector_in: endpoint@0 { reg = <0>; remote-endpoint = <&hdmi_connector_out>; }; }; }; firmware { optee { compatible = "linaro,optee-tz"; method = "smc"; }; }; gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&gpio_keys>; key-volume-up { gpios = <&pio 24 GPIO_ACTIVE_LOW>; label = "volume_up"; linux,code = ; wakeup-source; debounce-interval = <15>; }; }; memory@40000000 { device_type = "memory"; reg = <0 0x40000000 0 0xc0000000>; }; usb_otg_vbus: regulator-0 { compatible = "regulator-fixed"; regulator-name = "otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&pio 16 GPIO_ACTIVE_HIGH>; enable-active-high; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ bl31_secmon_reserved: secmon@43000000 { no-map; reg = <0 0x43000000 0 0x30000>; }; /* 12 MiB reserved for OP-TEE (BL32) * +-----------------------+ 0x43e0_0000 * | SHMEM 2MiB | * +-----------------------+ 0x43c0_0000 * | | TA_RAM 8MiB | * + TZDRAM +--------------+ 0x4340_0000 * | | TEE_RAM 2MiB | * +-----------------------+ 0x4320_0000 */ optee_reserved: optee@43200000 { no-map; reg = <0 0x43200000 0 0x00c00000>; }; }; sound: sound { compatible = "mediatek,mt8365-mt6357"; pinctrl-names = "default", "dmic", "miso_off", "miso_on", "mosi_off", "mosi_on"; pinctrl-0 = <&aud_default_pins>; pinctrl-1 = <&aud_dmic_pins>; pinctrl-2 = <&aud_miso_off_pins>; pinctrl-3 = <&aud_miso_on_pins>; pinctrl-4 = <&aud_mosi_off_pins>; pinctrl-5 = <&aud_mosi_on_pins>; mediatek,platform = <&afe>; }; vsys_lcm_reg: regulator-vsys-lcm { compatible = "regulator-fixed"; enable-active-high; gpio = <&pio 129 GPIO_ACTIVE_HIGH>; regulator-max-microvolt = <5000000>; regulator-min-microvolt = <5000000>; regulator-name = "vsys_lcm"; }; }; &afe { mediatek,dmic-mode = <1>; status = "okay"; }; &cpu0 { proc-supply = <&mt6357_vproc_reg>; sram-supply = <&mt6357_vsram_proc_reg>; }; &cpu1 { proc-supply = <&mt6357_vproc_reg>; sram-supply = <&mt6357_vsram_proc_reg>; }; &cpu2 { proc-supply = <&mt6357_vproc_reg>; sram-supply = <&mt6357_vsram_proc_reg>; }; &cpu3 { proc-supply = <&mt6357_vproc_reg>; sram-supply = <&mt6357_vsram_proc_reg>; }; &dither0_out { remote-endpoint = <&dsi0_in>; }; &dpi0 { pinctrl-0 = <&dpi_default_pins>; pinctrl-1 = <&dpi_idle_pins>; pinctrl-names = "default", "sleep"; /* * Ethernet and HDMI (DPI0) are sharing pins. * Only one can be enabled at a time and require the physical switch * SW2101 to be set on LAN position */ status = "disabled"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; dpi0_in: endpoint@1 { reg = <1>; remote-endpoint = <&rdma1_out>; }; }; port@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; dpi0_out: endpoint@1 { reg = <1>; remote-endpoint = <&it66121_in>; }; }; }; }; &dsi0 { #address-cells = <1>; #size-cells = <0>; status = "okay"; panel@0 { compatible = "startek,kd070fhfid015"; reg = <0>; enable-gpios = <&pio 67 GPIO_ACTIVE_HIGH>; reset-gpios = <&pio 20 GPIO_ACTIVE_HIGH>; iovcc-supply = <&mt6357_vsim1_reg>; power-supply = <&vsys_lcm_reg>; port { #address-cells = <1>; #size-cells = <0>; panel_in: endpoint@0 { reg = <0>; remote-endpoint = <&dsi0_out>; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; dsi0_in: endpoint@0 { reg = <0>; remote-endpoint = <&dither0_out>; }; }; port@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; dsi0_out: endpoint@0 { reg = <0>; remote-endpoint = <&panel_in>; }; }; }; }; ðernet { pinctrl-0 = <ðernet_pins>; pinctrl-names = "default"; phy-handle = <ð_phy>; phy-mode = "rmii"; /* * Ethernet and HDMI (DPI0) are sharing pins. * Only one can be enabled at a time and require the physical switch * SW2101 to be set on LAN position * mt6357_vibr_reg and mt6357_vsim2_reg are needed to supply ethernet */ status = "disabled"; mdio { #address-cells = <1>; #size-cells = <0>; eth_phy: ethernet-phy@0 { reg = <0>; }; }; }; &i2c0 { clock-frequency = <100000>; pinctrl-0 = <&i2c0_pins>; pinctrl-names = "default"; status = "okay"; }; &i2c1 { #address-cells = <1>; #size-cells = <0>; clock-div = <2>; clock-frequency = <100000>; pinctrl-0 = <&i2c1_pins>; pinctrl-names = "default"; status = "okay"; it66121_hdmi: hdmi@4c { compatible = "ite,it66121"; reg = <0x4c>; #sound-dai-cells = <0>; interrupt-parent = <&pio>; interrupts = <68 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&ite_pins>; pinctrl-names = "default"; reset-gpios = <&pio 69 GPIO_ACTIVE_LOW>; vcn18-supply = <&mt6357_vsim2_reg>; vcn33-supply = <&mt6357_vibr_reg>; vrf12-supply = <&mt6357_vrf12_reg>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; it66121_in: endpoint@0 { reg = <0>; bus-width = <12>; remote-endpoint = <&dpi0_out>; }; }; port@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; hdmi_connector_out: endpoint@0 { reg = <0>; remote-endpoint = <&hdmi_connector_in>; }; }; }; }; }; &mmc0 { assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL>; assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; bus-width = <8>; cap-mmc-highspeed; cap-mmc-hw-reset; hs400-ds-delay = <0x12012>; max-frequency = <200000000>; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sd; no-sdio; non-removable; pinctrl-0 = <&mmc0_default_pins>; pinctrl-1 = <&mmc0_uhs_pins>; pinctrl-names = "default", "state_uhs"; vmmc-supply = <&mt6357_vemc_reg>; vqmmc-supply = <&mt6357_vio18_reg>; status = "okay"; }; &mmc1 { bus-width = <4>; cap-sd-highspeed; cd-gpios = <&pio 76 GPIO_ACTIVE_LOW>; max-frequency = <200000000>; pinctrl-0 = <&mmc1_default_pins>; pinctrl-1 = <&mmc1_uhs_pins>; pinctrl-names = "default", "state_uhs"; sd-uhs-sdr104; sd-uhs-sdr50; vmmc-supply = <&mt6357_vmch_reg>; vqmmc-supply = <&mt6357_vmc_reg>; status = "okay"; }; &mt6357_pmic { interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; mediatek,micbias0-microvolt = <1900000>; mediatek,micbias1-microvolt = <1700000>; }; &mt6357_vsim1_reg { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; &pio { aud_default_pins: audiodefault-pins { clk-dat-pins { pinmux = , , , ; }; }; aud_dmic_pins: audiodmic-pins { clk-dat-pins { pinmux = , , ; }; }; aud_miso_off_pins: misooff-pins { clk-dat-pins { pinmux = , , , ; input-enable; bias-pull-down; drive-strength = <2>; }; }; aud_miso_on_pins: misoon-pins { clk-dat-pins { pinmux = , , , ; drive-strength = <6>; }; }; aud_mosi_off_pins: mosioff-pins { clk-dat-pins { pinmux = , , , ; input-enable; bias-pull-down; drive-strength = <2>; }; }; aud_mosi_on_pins: mosion-pins { clk-dat-pins { pinmux = , , , ; drive-strength = <6>; }; }; dpi_default_pins: dpi-default-pins { pins { pinmux = , , , , , , , , , , , , , , , ; drive-strength = <4>; }; }; dpi_idle_pins: dpi-idle-pins { pins { pinmux = , , , , , , , , , , , , , , , ; }; }; ethernet_pins: ethernet-pins { phy_reset_pins { pinmux = ; }; rmii_pins { pinmux = , , , , , , , , , , , , , , , ; }; }; gpio_keys: gpio-keys-pins { pins { pinmux = ; bias-pull-up; input-enable; }; }; i2c0_pins: i2c0-pins { pins { pinmux = , ; bias-pull-up; }; }; i2c1_pins: i2c1-pins { pins { pinmux = , ; bias-pull-up; }; }; ite_pins: ite-pins { irq_ite_pins { pinmux = ; input-enable; bias-pull-up; }; pwr_pins { pinmux = , ; output-high; }; rst_ite_pins { pinmux = ; output-high; }; }; mmc0_default_pins: mmc0-default-pins { clk-pins { pinmux = ; bias-pull-down; }; cmd-dat-pins { pinmux = , , , , , , , , ; input-enable; bias-pull-up; }; rst-pins { pinmux = ; bias-pull-up; }; }; mmc0_uhs_pins: mmc0-uhs-pins { clk-pins { pinmux = ; drive-strength = ; bias-pull-down = ; }; cmd-dat-pins { pinmux = , , , , , , , , ; input-enable; drive-strength = ; bias-pull-up = ; }; ds-pins { pinmux = ; drive-strength = ; bias-pull-down = ; }; rst-pins { pinmux = ; drive-strength = ; bias-pull-up; }; }; mmc1_default_pins: mmc1-default-pins { cd-pins { pinmux = ; bias-pull-up; }; clk-pins { pinmux = ; bias-pull-down = ; }; cmd-dat-pins { pinmux = , , , , ; input-enable; bias-pull-up = ; }; }; mmc1_uhs_pins: mmc1-uhs-pins { clk-pins { pinmux = ; drive-strength = <8>; bias-pull-down = ; }; cmd-dat-pins { pinmux = , , , , ; input-enable; drive-strength = <6>; bias-pull-up = ; }; }; uart0_pins: uart0-pins { pins { pinmux = , ; }; }; uart1_pins: uart1-pins { pins { pinmux = , ; }; }; uart2_pins: uart2-pins { pins { pinmux = , ; }; }; usb_pins: usb-pins { id-pins { pinmux = ; input-enable; bias-pull-up; }; usb0-vbus-pins { pinmux = ; output-high; }; usb1-vbus-pins { pinmux = ; output-high; }; }; pwm_pins: pwm-pins { pins { pinmux = , ; }; }; }; &pwm { pinctrl-0 = <&pwm_pins>; pinctrl-names = "default"; status = "okay"; }; &rdma1_out { remote-endpoint = <&dpi0_in>; }; &ssusb { dr_mode = "otg"; maximum-speed = "high-speed"; pinctrl-0 = <&usb_pins>; pinctrl-names = "default"; usb-role-switch; vusb33-supply = <&mt6357_vusb33_reg>; status = "okay"; connector { compatible = "gpio-usb-b-connector", "usb-b-connector"; id-gpios = <&pio 17 GPIO_ACTIVE_HIGH>; type = "micro"; vbus-supply = <&usb_otg_vbus>; }; }; &usb_host { vusb33-supply = <&mt6357_vusb33_reg>; status = "okay"; }; &uart0 { pinctrl-0 = <&uart0_pins>; pinctrl-names = "default"; status = "okay"; }; &uart1 { pinctrl-0 = <&uart1_pins>; pinctrl-names = "default"; status = "okay"; }; &uart2 { pinctrl-0 = <&uart2_pins>; pinctrl-names = "default"; status = "okay"; };