(launched: 2026-02-27_22:48:37.261831)
Fri Feb 27 22:48:37 2026 DVIRPHY virtphy.c:248 Virtual physical layer starting up...
Fri Feb 27 22:48:37 2026 DVIRPHY virtphy.c:257 Virtual physical layer ready, waiting for l23 app(s) on /tmp/ogteventserversk134x9lsc/osmo-ms-virt-phy/00010/osmocom_l2_00010
Fri Feb 27 22:48:52 2026 DMAIN virt_l1_model.c:42 MS 0000: allocated
Fri Feb 27 22:48:52 2026 DL1C l1ctl_sock.c:138 Accepted client (fd=6) from server (fd=5)
Fri Feb 27 22:48:52 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:52 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:53 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:53 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Fri Feb 27 22:48:53 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Fri Feb 27 22:48:53 2026 DL1C l1ctl_sap.c:472 MS 0000: Rx L1CTL_CCCH_MODE_REQ (mode=2)
Fri Feb 27 22:48:53 2026 DL1C l1ctl_sap.c:600 MS 0000: Tx L1CTL_CCCH_MODE_CONF (mode: 2)
Fri Feb 27 22:48:54 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:48:54 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:54 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:54 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Fri Feb 27 22:48:54 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Fri Feb 27 22:48:54 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:48:55 2026 DL1C l1ctl_sap.c:472 MS 0000: Rx L1CTL_CCCH_MODE_REQ (mode=2)
Fri Feb 27 22:48:55 2026 DL1C l1ctl_sap.c:600 MS 0000: Tx L1CTL_CCCH_MODE_CONF (mode: 2)
Fri Feb 27 22:48:55 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:55 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Fri Feb 27 22:48:55 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Fri Feb 27 22:48:55 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:48:55 2026 DL1C virt_prim_rach.c:81 MS 0000: Rx L1CTL_RACH_REQ (ra=0x0f, offset=8 combined=1)
Fri Feb 27 22:48:55 2026 DL1C virt_prim_rach.c:124 MS 0000: Tx L1CTL_RACH_CONF (fn: 5326, arfcn: 860)
Fri Feb 27 22:48:55 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:48:55 2026 DL1C virt_prim_rach.c:81 MS 0000: Rx L1CTL_RACH_REQ (ra=0x0f, offset=116 combined=1)
Fri Feb 27 22:48:56 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 2)
Fri Feb 27 22:48:56 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:48:56 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:48:57 2026 DL1C l1ctl_sap.c:379 MS 0000: Rx L1CTL_DM_REL_REQ
Fri Feb 27 22:48:57 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:57 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Fri Feb 27 22:48:57 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Fri Feb 27 22:48:57 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Fri Feb 27 22:48:57 2026 DL1C l1ctl_sap.c:526 MS 0000: Rx L1CTL_NEIGH_PM_REQ (list with 0 entries): IGNORED
Fri Feb 27 22:48:57 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:48:58 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:01 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:02 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:05 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:05 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:09 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:09 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:12 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:13 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:15 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:16 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:18 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:19 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:22 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:22 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:26 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:26 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:29 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:30 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:33 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:34 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:37 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Fri Feb 27 22:49:37 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Fri Feb 27 22:49:40 2026 DMAIN virtphy.c:217 Signal 15 received
