trial-ttcn3_bts_tests:sysmo 101

Took 47 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51 Regression	2	35 sec
TC_chan_act_a52	1	33 sec
TC_chan_act_a53	36	33 sec
TC_chan_act_stress	1	23 sec
TC_conn_fail_crit Regression	1	33 sec
TC_deact_sacch	36	35 sec
TC_encr_cmd_a51	1	33 sec
TC_encr_cmd_a52	1	33 sec
TC_encr_cmd_a53	36	33 sec
TC_ho_rach	36	22 sec
TC_meas_res_sign_sdcch4	36	26 sec
TC_meas_res_sign_sdcch8	36	34 sec
TC_meas_res_sign_tchf	36	20 sec
TC_meas_res_sign_tchh	36	19 sec
TC_meas_res_sign_tchh_toa256	36	34 sec
TC_meas_res_speech_tchf	10	11 sec
TC_meas_res_speech_tchf_facch	7	28 sec
TC_meas_res_speech_tchh	10	26 sec
TC_meas_res_speech_tchh_facch	7	19 sec
TC_meas_res_speech_tchh_toa256	9	19 sec
TC_ms_pwr_ctrl_constant	11	26 sec
TC_ms_pwr_ctrl_pf_ewma	10	17 sec
TC_paging_imsi_200percent	1	58 sec
TC_paging_imsi_80percent	1	47 sec
TC_paging_tmsi_200percent	1	53 sec
TC_paging_tmsi_80percent	1	46 sec
TC_rach_load_count	36	2 sec
TC_rach_load_idle_below_thresh	36	2 sec
TC_rach_load_idle_thresh0	36	2 sec
TC_rach_max_ta	36	26 sec
TC_rll_est_ind	1	25 sec
TC_rll_est_req_ACCH_3	36	34 sec
TC_rll_est_req_DCCH_3 Regression	1	33 sec
TC_rll_rel_ind_ACCH_0	36	34 sec
TC_rll_rel_ind_ACCH_3	36	43 sec
TC_rll_rel_ind_DCCH_0	1	34 sec
TC_rll_rel_ind_DCCH_3 Regression	1	33 sec
TC_rll_rel_req	36	33 sec
TC_rll_unit_data_ind_ACCH	1	33 sec
TC_rll_unit_data_ind_DCCH	1	33 sec
TC_rll_unit_data_req_ACCH	36	34 sec
TC_rll_unit_data_req_DCCH	1	33 sec
TC_rsl_bs_pwr_static_ass Regression	1	26 sec
TC_rsl_bs_pwr_static_power_control Regression	1	33 sec
TC_rsl_chan_initial_ms_pwr	36	24 sec
TC_rsl_chan_initial_ta	36	25 sec
TC_rsl_modify_encr	36	24 sec
TC_rsl_ms_pwr_ctrl	1	34 sec
TC_rsl_ms_pwr_dyn_active	36	26 sec
TC_rsl_ms_pwr_dyn_active2	36	15 sec
TC_rsl_ms_pwr_dyn_ass_updown	36	15 sec
TC_rsl_ms_pwr_dyn_down	36	15 sec
TC_rsl_ms_pwr_dyn_max	36	15 sec
TC_rsl_ms_pwr_dyn_up	36	15 sec
TC_sacch_chan_act	36	31 sec
TC_sacch_chan_act_ho_async	36	22 sec
TC_sacch_chan_act_ho_sync	36	16 sec
TC_sacch_filling	36	38 sec
TC_sacch_info_mod	36	31 sec
TC_sacch_multi	36	27 sec
TC_sacch_multi_chg	36	38 sec
TC_si_sched_13	1	33 sec
TC_si_sched_13_2bis_2ter_2quater	2	40 sec
TC_si_sched_2ter_2bis	1	32 sec
TC_speech_no_rtp_tchf Regression	1	25 sec
TC_speech_no_rtp_tchh Regression	1	33 sec
TC_tch_sign_l2_fill_frame	36	22 sec
TC_tch_sign_l2_fill_frame_dtxd	36	33 sec
TC_tx_power_ramp_adm_state_change	36	19 sec
TC_tx_power_start_ramp_down_bcch	36	19 sec
TC_tx_power_start_ramp_up_bcch	36	25 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	71+8	0	30-8	101	47 min