trial-ttcn3_bts_tests:sysmo 101

Took 59 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51	2	44 sec
TC_chan_act_a52	2	44 sec
TC_chan_act_a53	9	44 sec
TC_chan_act_stress	2	25 sec
TC_conn_fail_crit	5	44 sec
TC_deact_sacch	9	33 sec
TC_encr_cmd_a51	2	45 sec
TC_encr_cmd_a52	2	44 sec
TC_encr_cmd_a53	9	44 sec
TC_ho_rach	9	42 sec
TC_meas_res_sign_sdcch4	9	44 sec
TC_meas_res_sign_sdcch8	9	44 sec
TC_meas_res_sign_tchf	9	44 sec
TC_meas_res_sign_tchh	9	44 sec
TC_meas_res_sign_tchh_toa256	9	44 sec
TC_meas_res_speech_tchf	9	32 sec
TC_meas_res_speech_tchf_facch	9	44 sec
TC_meas_res_speech_tchh	9	44 sec
TC_meas_res_speech_tchh_facch	9	44 sec
TC_meas_res_speech_tchh_toa256	9	44 sec
TC_ms_pwr_ctrl_constant	9	45 sec
TC_ms_pwr_ctrl_pf_ewma	9	44 sec
TC_paging_imsi_200percent	2	48 sec
TC_paging_imsi_80percent	2	44 sec
TC_paging_tmsi_200percent	2	45 sec
TC_paging_tmsi_80percent	2	44 sec
TC_rach_load_count	9	2 sec
TC_rach_load_idle_below_thresh	9	2 sec
TC_rach_load_idle_thresh0	9	2 sec
TC_rach_max_ta	9	26 sec
TC_rll_est_ind	2	37 sec
TC_rll_est_req_ACCH_3	9	45 sec
TC_rll_est_req_DCCH_3	2	44 sec
TC_rll_rel_ind_ACCH_0	9	45 sec
TC_rll_rel_ind_ACCH_3	9	45 sec
TC_rll_rel_ind_DCCH_0	2	44 sec
TC_rll_rel_ind_DCCH_3	2	44 sec
TC_rll_rel_req	9	44 sec
TC_rll_unit_data_ind_ACCH	2	44 sec
TC_rll_unit_data_ind_DCCH	2	44 sec
TC_rll_unit_data_req_ACCH	9	44 sec
TC_rll_unit_data_req_DCCH	2	45 sec
TC_rsl_bs_pwr_static_ass	2	37 sec
TC_rsl_bs_pwr_static_power_control	2	44 sec
TC_rsl_chan_initial_ms_pwr	9	36 sec
TC_rsl_chan_initial_ta	9	44 sec
TC_rsl_modify_encr	9	44 sec
TC_rsl_ms_pwr_ctrl	2	44 sec
TC_rsl_ms_pwr_dyn_active	9	25 sec
TC_rsl_ms_pwr_dyn_active2	9	16 sec
TC_rsl_ms_pwr_dyn_ass_updown	9	16 sec
TC_rsl_ms_pwr_dyn_down	9	16 sec
TC_rsl_ms_pwr_dyn_max	9	16 sec
TC_rsl_ms_pwr_dyn_up	9	16 sec
TC_sacch_chan_act	9	25 sec
TC_sacch_chan_act_ho_async	9	27 sec
TC_sacch_chan_act_ho_sync	9	39 sec
TC_sacch_filling	9	43 sec
TC_sacch_info_mod	9	29 sec
TC_sacch_multi	9	24 sec
TC_sacch_multi_chg	9	25 sec
TC_si_sched_1	2	45 sec
TC_si_sched_13	2	49 sec
TC_si_sched_13_2bis_2ter_2quater	2	44 sec
TC_si_sched_2bis	2	44 sec
TC_si_sched_2quater	2	44 sec
TC_si_sched_2ter	2	44 sec
TC_si_sched_2ter_2bis	2	47 sec
TC_si_sched_default	2	35 sec
TC_speech_no_rtp_tchf	4	44 sec
TC_speech_no_rtp_tchh	2	44 sec
TC_tch_sign_l2_fill_frame	2	33 sec
TC_tch_sign_l2_fill_frame_dtxd	9	44 sec
TC_tx_power_ramp_adm_state_change	9	20 sec
TC_tx_power_start_ramp_down_bcch	9	27 sec
TC_tx_power_start_ramp_up_bcch	9	44 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	76	0	25	101	59 min