(launched: 2026-02-21_22:48:34.412633)
Sat Feb 21 22:48:34 2026 DVIRPHY virtphy.c:248 Virtual physical layer starting up...
Sat Feb 21 22:48:34 2026 DVIRPHY virtphy.c:257 Virtual physical layer ready, waiting for l23 app(s) on /tmp/ogteventserverskj6xizgmy/osmo-ms-virt-phy/00062/osmocom_l2_00062
Sat Feb 21 22:49:08 2026 DMAIN virt_l1_model.c:42 MS 0000: allocated
Sat Feb 21 22:49:08 2026 DL1C l1ctl_sock.c:138 Accepted client (fd=6) from server (fd=5)
Sat Feb 21 22:49:08 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:08 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:09 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:09 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Sat Feb 21 22:49:09 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Sat Feb 21 22:49:10 2026 DL1C l1ctl_sap.c:472 MS 0000: Rx L1CTL_CCCH_MODE_REQ (mode=2)
Sat Feb 21 22:49:10 2026 DL1C l1ctl_sap.c:600 MS 0000: Tx L1CTL_CCCH_MODE_CONF (mode: 2)
Sat Feb 21 22:49:10 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:11 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:11 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Sat Feb 21 22:49:11 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Sat Feb 21 22:49:11 2026 DL1C l1ctl_sap.c:472 MS 0000: Rx L1CTL_CCCH_MODE_REQ (mode=2)
Sat Feb 21 22:49:11 2026 DL1C l1ctl_sap.c:600 MS 0000: Tx L1CTL_CCCH_MODE_CONF (mode: 2)
Sat Feb 21 22:49:12 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:12 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Sat Feb 21 22:49:12 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Sat Feb 21 22:49:12 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:12 2026 DL1C virt_prim_rach.c:81 MS 0000: Rx L1CTL_RACH_REQ (ra=0x0e, offset=5 combined=1)
Sat Feb 21 22:49:12 2026 DL1C virt_prim_rach.c:124 MS 0000: Tx L1CTL_RACH_CONF (fn: 9811, arfcn: 860)
Sat Feb 21 22:49:12 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:12 2026 DL1C virt_prim_rach.c:81 MS 0000: Rx L1CTL_RACH_REQ (ra=0x09, offset=124 combined=1)
Sat Feb 21 22:49:13 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 2)
Sat Feb 21 22:49:13 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:13 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:14 2026 DL1C l1ctl_sap.c:379 MS 0000: Rx L1CTL_DM_REL_REQ
Sat Feb 21 22:49:14 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:14 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:14 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Sat Feb 21 22:49:14 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Sat Feb 21 22:49:14 2026 DL1C l1ctl_sap.c:526 MS 0000: Rx L1CTL_NEIGH_PM_REQ (list with 0 entries): IGNORED
Sat Feb 21 22:49:15 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:21 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:24 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:24 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:28 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:28 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:29 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:29 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Sat Feb 21 22:49:29 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Sat Feb 21 22:49:29 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:29 2026 DL1C virt_prim_rach.c:81 MS 0000: Rx L1CTL_RACH_REQ (ra=0x06, offset=3 combined=1)
Sat Feb 21 22:49:30 2026 DL1C virt_prim_rach.c:124 MS 0000: Tx L1CTL_RACH_CONF (fn: 13530, arfcn: 860)
Sat Feb 21 22:49:30 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:30 2026 DL1C virt_prim_rach.c:81 MS 0000: Rx L1CTL_RACH_REQ (ra=0x0b, offset=115 combined=1)
Sat Feb 21 22:49:30 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 2)
Sat Feb 21 22:49:30 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:30 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:31 2026 DL1C l1ctl_sap.c:379 MS 0000: Rx L1CTL_DM_REL_REQ
Sat Feb 21 22:49:31 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:31 2026 DL1C l1ctl_sap.c:578 MS 0000: Tx L1CTL_RESET_CONF (reset_type: 1)
Sat Feb 21 22:49:31 2026 DL1C virt_prim_fbsb.c:57 MS 0000: Rx L1CTL_FBSB_REQ (arfcn=860, flags=0x7)
Sat Feb 21 22:49:31 2026 DL1C virt_prim_fbsb.c:126 MS 0000: Tx L1CTL_FBSB_CONF (res: 0)
Sat Feb 21 22:49:31 2026 DL1C l1ctl_sap.c:526 MS 0000: Rx L1CTL_NEIGH_PM_REQ (list with 0 entries): IGNORED
Sat Feb 21 22:49:31 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:32 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:35 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=31)
Sat Feb 21 22:49:36 2026 DL1C l1ctl_sap.c:411 MS 0000: Rx L1CTL_PARAM_REQ (ta=0, tx_power=0)
Sat Feb 21 22:49:37 2026 DMAIN virtphy.c:217 Signal 15 received
